diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index b64345cfff8..329b0ab95e5 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -2059,8 +2059,11 @@ files { MAME_DIR .. "src/mame/drivers/glasgow.cpp", MAME_DIR .. "src/mame/drivers/mephisto.cpp", MAME_DIR .. "src/mame/drivers/mmodular.cpp", + MAME_DIR .. "src/mame/drivers/polgar.cpp", MAME_DIR .. "src/mame/drivers/risc2500.cpp", MAME_DIR .. "src/mame/drivers/stratos.cpp", + MAME_DIR .. "src/mame/machine/mmboard.cpp", + MAME_DIR .. "src/mame/machine/mmboard.h", } createMESSProjects(_target, _subtarget, "hitachi") diff --git a/src/mame/drivers/mmodular.cpp b/src/mame/drivers/mmodular.cpp index 25d01fdca68..81517df312e 100644 --- a/src/mame/drivers/mmodular.cpp +++ b/src/mame/drivers/mmodular.cpp @@ -1407,12 +1407,6 @@ MACHINE_CONFIG_END /* ROM definitions */ - -ROM_START(polgar) - ROM_REGION(0x10000,"maincpu",0) - ROM_LOAD("polgar.bin", 0x0000, 0x10000, CRC(88d55c0f) SHA1(e86d088ec3ac68deaf90f6b3b97e3e31b1515913)) -ROM_END - ROM_START( alm16 ) ROM_REGION16_BE( 0x20000, "maincpu", 0 ) ROM_LOAD16_BYTE("alm16eve.bin", 0x00000, 0x10000,CRC(EE5B6EC4) SHA1(30920C1B9E16FFAE576DA5AFA0B56DA59ADA3DBB)) @@ -1509,12 +1503,11 @@ DRIVER_INIT_MEMBER(polgar_state,polgar) } /* YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS */ - CONS( 1986, polgar, 0, 0, polgar, polgar, polgar_state, polgar, "Hegener & Glaser", "Mephisto Polgar Schachcomputer", MACHINE_NOT_WORKING | MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK) CONS( 1988, alm16, van16, 0, alm16, van16, polgar_state, 0, "Hegener & Glaser Muenchen", "Mephisto Almeria 68000", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) CONS( 1988, alm32, van16, 0, alm32, van32, polgar_state, 0, "Hegener & Glaser Muenchen", "Mephisto Alimera 68020", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) CONS( 1989, academy, 0, 0, academy, academy, polgar_state, 0, "Hegener & Glaser", "Mephisto Academy Schachcomputer", MACHINE_REQUIRES_ARTWORK|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) CONS( 1989, megaiv, 0, 0, megaiv, megaiv, polgar_state, 0, "Hegener & Glaser", "Mephisto Mega IV Schachcomputer", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) - CONS( 1989, milano, polgar, 0, milano, polgar, polgar_state, polgar, "Hegener & Glaser", "Mephisto Milano Schachcomputer", MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) + CONS( 1989, milano, 0, 0, milano, polgar, polgar_state, polgar, "Hegener & Glaser", "Mephisto Milano Schachcomputer", MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) // CONS( 1989, montec4, 0, 0, monteciv, monteciv, polgar_state, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) CONS( 1990, lyon16, van16, 0, alm16, van16, polgar_state, 0, "Hegener & Glaser Muenchen", "Mephisto Lyon 68000", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) CONS( 1990, lyon32, van16, 0, alm32, van32, polgar_state, 0, "Hegener & Glaser Muenchen", "Mephisto Lyon 68020", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/drivers/polgar.cpp b/src/mame/drivers/polgar.cpp new file mode 100644 index 00000000000..daa03ab56a6 --- /dev/null +++ b/src/mame/drivers/polgar.cpp @@ -0,0 +1,305 @@ +// license:BSD-3-Clause +// copyright-holders:Sandro Ronco +/************************************************************************************************** + + Mephisto Polgar and RISC + +**************************************************************************************************/ + + +#include "emu.h" +#include "cpu/m6502/m65c02.h" +#include "cpu/arm/arm.h" +#include "machine/nvram.h" +#include "machine/mmboard.h" +#include "video/hd44780.h" +#include "screen.h" +#include "speaker.h" + +#include "mephisto_lcd.lh" + + +class mephisto_polgar_state : public driver_device +{ +public: + mephisto_polgar_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_keys(*this, "KEY") + { } + + DECLARE_WRITE8_MEMBER(polgar_led_w); + DECLARE_READ8_MEMBER(polgar_keys_r); + +protected: + optional_ioport m_keys; +}; + +class mephisto_risc_state : public mephisto_polgar_state +{ +public: + mephisto_risc_state(const machine_config &mconfig, device_type type, const char *tag) + : mephisto_polgar_state(mconfig, type, tag) + , m_subcpu(*this, "subcpu") + , m_rombank(*this, "rombank") + { } + + DECLARE_WRITE8_MEMBER(bank_w); + DECLARE_READ8_MEMBER(latch0_r); + DECLARE_WRITE8_MEMBER(latch0_w); + DECLARE_WRITE8_MEMBER(latch1_w); + DECLARE_READ8_MEMBER(latch1_r); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + required_device m_subcpu; + required_memory_bank m_rombank; + uint8_t m_bank; + uint8_t m_com_latch0; + uint8_t m_com_latch1; + + // ARM bootstrap HLE + void arm_bootstrap(uint8_t data); + TIMER_CALLBACK_MEMBER(clean_com_flag) { m_com_latch0 &= ~0x01; } + + emu_timer* m_arm_bootstrap_timer; + uint16_t m_com_offset; + uint8_t m_com_bits; + uint8_t m_com_data; +}; + + +READ8_MEMBER(mephisto_polgar_state::polgar_keys_r) +{ + return (BIT(m_keys->read(), offset) << 7) | 0x7f; +} + +WRITE8_MEMBER(mephisto_polgar_state::polgar_led_w) +{ + output().set_led_value(100 + offset, BIT(data, 7)); +} + +static ADDRESS_MAP_START(polgar_mem, AS_PROGRAM, 8, mephisto_polgar_state) + AM_RANGE( 0x0000, 0x1fff ) AM_RAM AM_SHARE("nvram") + AM_RANGE( 0x2000, 0x2000 ) AM_DEVWRITE("display", mephisto_display_modul_device, latch_w) + AM_RANGE( 0x2004, 0x2004 ) AM_DEVWRITE("display", mephisto_display_modul_device, io_w) + AM_RANGE( 0x2400, 0x2400 ) AM_DEVWRITE("board", mephisto_board_device, led_upd_w) + AM_RANGE( 0x2800, 0x2800 ) AM_DEVWRITE("board", mephisto_board_device, mux_upd_w) + AM_RANGE( 0x2c00, 0x2c07 ) AM_READ(polgar_keys_r) + AM_RANGE( 0x3000, 0x3000 ) AM_DEVREAD("board", mephisto_board_device, input_r) + AM_RANGE( 0x3400, 0x3405 ) AM_WRITE(polgar_led_w) + AM_RANGE( 0x4000, 0xffff ) AM_ROM +ADDRESS_MAP_END + + +WRITE8_MEMBER(mephisto_risc_state::bank_w) +{ + if (offset == 0 && (data & 0x01)) m_bank &= ~0x01; + else if (offset == 0 && !(data & 0x01)) m_bank |= 0x01; + else if (offset == 1 && (data & 0x01)) m_bank |= 0x02; + else if (offset == 1 && !(data & 0x01)) m_bank &= ~0x02; + + m_rombank->set_entry(m_bank); +} + +void mephisto_risc_state::arm_bootstrap(uint8_t data) +{ + if (data & 0x02) + { + m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + m_com_offset = 0; + } + + if (m_com_offset < 0x100 && ((m_com_latch1 ^ data) & 0x80)) + { + m_com_data |= (data & 1) << (7-m_com_bits); + m_com_bits++; + + if (m_com_bits == 8) + { + m_subcpu->space(AS_PROGRAM).write_byte(m_com_offset, m_com_data); + m_com_bits = 0; + m_com_data = 0; + m_com_offset++; + + if (m_com_offset == 0x100) + m_subcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + } + + if (m_com_offset < 0x100) + { + m_com_latch0 |= 0x01; + m_arm_bootstrap_timer->adjust(attotime::from_usec(15)); + } + } +} + +WRITE8_MEMBER(mephisto_risc_state::latch1_w) +{ + arm_bootstrap(data); + m_com_latch1 = data; + m_subcpu->set_input_line(ARM_FIRQ_LINE, ASSERT_LINE); +} + + +READ8_MEMBER(mephisto_risc_state::latch1_r) +{ + return m_com_latch1; +} + +WRITE8_MEMBER(mephisto_risc_state::latch0_w) +{ + m_subcpu->set_input_line(ARM_FIRQ_LINE, CLEAR_LINE); + m_com_latch0 = data; +} + +READ8_MEMBER(mephisto_risc_state::latch0_r) +{ + return m_com_latch0; +} + +static ADDRESS_MAP_START(mrisc_mem, AS_PROGRAM, 8, mephisto_risc_state) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE( 0x0000, 0x1fff ) AM_RAM AM_SHARE("nvram") + AM_RANGE( 0x2000, 0x2000 ) AM_DEVWRITE("display", mephisto_display_modul_device, latch_w) + AM_RANGE( 0x2004, 0x2004 ) AM_DEVWRITE("display", mephisto_display_modul_device, io_w) + AM_RANGE( 0x2c00, 0x2c07 ) AM_READ(polgar_keys_r) + AM_RANGE( 0x2400, 0x2400 ) AM_DEVWRITE("board", mephisto_board_device, led_upd_w) + AM_RANGE( 0x2800, 0x2800 ) AM_DEVWRITE("board", mephisto_board_device, mux_w) + AM_RANGE( 0x3000, 0x3000 ) AM_DEVREAD("board", mephisto_board_device, input_r) + AM_RANGE( 0x3400, 0x3405 ) AM_WRITE(polgar_led_w) + AM_RANGE( 0x3406, 0x3407 ) AM_WRITE(bank_w) + AM_RANGE( 0x3800, 0x3800 ) AM_WRITE(latch1_w) + AM_RANGE( 0x3c00, 0x3c00 ) AM_READ(latch0_r) + AM_RANGE( 0x8000, 0xffff ) AM_ROMBANK("rombank") +ADDRESS_MAP_END + + +static ADDRESS_MAP_START(mrisc_arm_mem, AS_PROGRAM, 32, mephisto_risc_state) + AM_RANGE( 0x00000000, 0x000fffff ) AM_RAM + AM_RANGE( 0x00400000, 0x007fffff ) AM_READWRITE8(latch1_r, latch0_w, 0x000000ff) +ADDRESS_MAP_END + + +static INPUT_PORTS_START( polgar ) + PORT_START("KEY") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Trn") PORT_CODE(KEYCODE_T) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Info") PORT_CODE(KEYCODE_I) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Mem") PORT_CODE(KEYCODE_M) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Pos") PORT_CODE(KEYCODE_O) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("LEV") PORT_CODE(KEYCODE_L) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("FCT") PORT_CODE(KEYCODE_F) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("ENT") PORT_CODE(KEYCODE_ENTER) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("CL") PORT_CODE(KEYCODE_BACKSPACE) +INPUT_PORTS_END + +void mephisto_risc_state::machine_start() +{ + m_arm_bootstrap_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mephisto_risc_state::clean_com_flag), this)); + m_rombank->configure_entries(0, 4, memregion("maincpu")->base(), 0x8000); + + save_item(NAME(m_bank)); + save_item(NAME(m_com_latch0)); + save_item(NAME(m_com_latch1)); + save_item(NAME(m_com_offset)); + save_item(NAME(m_com_bits)); + save_item(NAME(m_com_data)); +} + +void mephisto_risc_state::machine_reset() +{ + m_bank = 1; + m_com_latch0 = 0; + m_com_latch1 = 0; + m_rombank->set_entry(m_bank); + + // ARM bootstrap HLE + m_com_offset = 0; + m_com_bits = 0; + m_com_data = 0; + m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); +} + +static MACHINE_CONFIG_START( polgar ) + MCFG_CPU_ADD("maincpu", M65C02, XTAL_4_9152MHz) + MCFG_CPU_PROGRAM_MAP(polgar_mem) + MCFG_CPU_PERIODIC_INT_DRIVER(mephisto_polgar_state, nmi_line_pulse, XTAL_4_9152MHz / (1 << 13)) + + MCFG_NVRAM_ADD_0FILL("nvram") + + MCFG_MEPHISTO_SENSORS_BOARD_ADD("board") + MCFG_MEPHISTO_DISPLAY_MODUL_ADD("display") + MCFG_DEFAULT_LAYOUT(layout_mephisto_lcd) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( polgar10, polgar ) + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_CLOCK( XTAL_10MHz ) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_START( mrisc ) + MCFG_CPU_ADD("maincpu", M65C02, XTAL_10MHz / 4) // G65SC02 + MCFG_CPU_PROGRAM_MAP(mrisc_mem) + MCFG_CPU_PERIODIC_INT_DRIVER(mephisto_risc_state, irq0_line_hold, (double)XTAL_10MHz / (1 << 14)) + + MCFG_CPU_ADD("subcpu", ARM, XTAL_14MHz) // VY86C010 + MCFG_CPU_PROGRAM_MAP(mrisc_arm_mem) + MCFG_ARM_COPRO(VL86C020) + + MCFG_QUANTUM_PERFECT_CPU("maincpu") + + MCFG_NVRAM_ADD_0FILL("nvram") + + MCFG_MEPHISTO_SENSORS_BOARD_ADD("board") + MCFG_MEPHISTO_DISPLAY_MODUL_ADD("display") + MCFG_DEFAULT_LAYOUT(layout_mephisto_lcd) +MACHINE_CONFIG_END + + +ROM_START(polgar) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD("polgar.bin", 0x0000, 0x10000, CRC(88d55c0f) SHA1(e86d088ec3ac68deaf90f6b3b97e3e31b1515913)) +ROM_END + +ROM_START(polgar10) + ROM_REGION(0x10000, "maincpu", 0) + ROM_SYSTEM_BIOS( 0, "v101", "V10.1" ) + ROMX_LOAD("polg_101.bin", 0x00000, 0x10000, CRC(8fb6afa4) SHA1(d1cf868302a665ff351686b26a149ced0045fc81), ROM_BIOS(1)) + ROM_SYSTEM_BIOS( 1, "v100", "V10.0" ) + ROMX_LOAD("polgar10.bin", 0x00000, 0x10000, CRC(7c1960d4) SHA1(4d15b51f9e6f7943815945cd56078ca512a964d4), ROM_BIOS(2)) +ROM_END + +ROM_START(mrisc) + ROM_REGION(0x20000, "maincpu", 0) + ROM_LOAD("Meph-RiscI-V1-2.bin", 0x00000, 0x20000, CRC(19c6ab83) SHA1(0baab84e5aa6999c24250938d207145144945fd5)) + + ROM_REGION(0x80, "arm_bootstrap", 0) + ROM_LOAD32_BYTE( "74s288.1", 0x00, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.2", 0x01, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.3", 0x02, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.4", 0x03, 0x20, NO_DUMP ) +ROM_END + +ROM_START(mrisc2) + ROM_REGION(0x20000, "maincpu", 0) + ROM_LOAD("Meph-RiscII-V2.bin", 0x00000, 0x20000, CRC(9ecf9cd3) SHA1(7bfc628183037a172242c9589f15aca218d8fb12)) + + ROM_REGION(0x80, "arm_bootstrap", 0) + ROM_LOAD32_BYTE( "74s288.1", 0x00, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.2", 0x01, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.3", 0x02, 0x20, NO_DUMP ) + ROM_LOAD32_BYTE( "74s288.4", 0x03, 0x20, NO_DUMP ) +ROM_END + + +/*************************************************************************** + Game driver(s) +***************************************************************************/ + +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +CONS( 1989, polgar, 0, 0, polgar, polgar, mephisto_polgar_state, 0, "Hegener & Glaser", "Mephisto Polgar", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +CONS( 1990, polgar10, polgar, 0, polgar10, polgar, mephisto_polgar_state, 0, "Hegener & Glaser", "Mephisto Polgar 10MHz", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +CONS( 1992, mrisc, 0, 0, mrisc, polgar, mephisto_risc_state, 0, "Hegener & Glaser", "Mephisto RISC 1MB", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +CONS( 1994, mrisc2, mrisc, 0, mrisc, polgar, mephisto_risc_state, 0, "Hegener & Glaser", "Mephisto RISC II", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/layout/mephisto_lcd.lay b/src/mame/layout/mephisto_lcd.lay new file mode 100644 index 00000000000..637a13b8cb3 --- /dev/null +++ b/src/mame/layout/mephisto_lcd.lay @@ -0,0 +1,317 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/machine/mmboard.cpp b/src/mame/machine/mmboard.cpp new file mode 100644 index 00000000000..d6f14a0cd0f --- /dev/null +++ b/src/mame/machine/mmboard.cpp @@ -0,0 +1,279 @@ +// license:BSD-3-Clause +// copyright-holders:Sandro Ronco +/********************************************************************** + + Mephisto Sensors Board emulation + Mephisto Display Modul emulation + +*********************************************************************/ + +#include "emu.h" +#include "mmboard.h" + + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +DEFINE_DEVICE_TYPE(MEPHISTO_SENSORS_BOARD, mephisto_sensors_board_device, "msboard", "Mephisto Sensors Board") +DEFINE_DEVICE_TYPE(MEPHISTO_DISPLAY_MODUL, mephisto_display_modul_device, "mdisplay_modul", "Mephisto Display Modul") + + +//*************************************************************************** +// IMPLEMENTATION +//*************************************************************************** + +static INPUT_PORTS_START( mephisto_sensors_board ) + PORT_START("IN.0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.3") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.4") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.5") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.6") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_START("IN.7") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE +INPUT_PORTS_END + + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor mephisto_sensors_board_device::device_input_ports() const +{ + return INPUT_PORTS_NAME( mephisto_sensors_board ); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// mephisto_board_device - constructor +//------------------------------------------------- + +mephisto_board_device::mephisto_board_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , m_sensors(*this, "IN.%u", 0) + , m_upd_all_leds(true) +{ +} + +//------------------------------------------------- +// mephisto_sensors_board_device - constructor +//------------------------------------------------- + +mephisto_sensors_board_device::mephisto_sensors_board_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mephisto_board_device(mconfig, MEPHISTO_SENSORS_BOARD, tag, owner, clock) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void mephisto_board_device::device_start() +{ + save_item(NAME(m_mux)); + save_item(NAME(m_leds)); +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void mephisto_board_device::device_reset() +{ + m_mux = 0x00; + m_leds = 0x00; +} + +void mephisto_board_device::update_leds() +{ + for (int i=0; i<8; i++) + if (m_upd_all_leds || !BIT(m_mux, i)) + for (int j=0; j<8; j++) + machine().output().set_led_value(i*8 + j, !BIT(m_mux, i) ? BIT(m_leds, j) : 0); + +} + +READ8_MEMBER( mephisto_board_device::input_r ) +{ + uint8_t data = 0xff; + + for (int i=0; i<8; i++) + if (!BIT(m_mux, i)) + data &= m_sensors[i]->read(); + + return data; +} + +READ8_MEMBER( mephisto_board_device::mux_r ) +{ + return m_mux; +} + +WRITE8_MEMBER( mephisto_board_device::mux_w ) +{ + m_mux = data; +} + +WRITE8_MEMBER( mephisto_board_device::led_w ) +{ + m_leds = data; +} + +WRITE8_MEMBER( mephisto_board_device::mux_upd_w ) +{ + m_mux = data; + update_leds(); +} + +WRITE8_MEMBER( mephisto_board_device::led_upd_w ) +{ + m_leds = data; + update_leds(); +} + + + +//------------------------------------------------- +// mephisto_display_modul_device - constructor +//------------------------------------------------- + +mephisto_display_modul_device::mephisto_display_modul_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, MEPHISTO_DISPLAY_MODUL, tag, owner, clock) + , m_lcdc(*this, "hd44780") + , m_beeper(*this, "beeper") +{ +} + +//------------------------------------------------- +// device_add_mconfig +//------------------------------------------------- + +MACHINE_CONFIG_MEMBER( mephisto_display_modul_device::device_add_mconfig ) + /* video hardware */ + MCFG_SCREEN_ADD("screen", LCD) + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(16*6, 9*2) + MCFG_SCREEN_VISIBLE_AREA(0, 16*6-1, 0, 9*2-3) + MCFG_SCREEN_UPDATE_DEVICE("hd44780", hd44780_device, screen_update) + MCFG_SCREEN_PALETTE("palette") + MCFG_PALETTE_ADD("palette", 2) + MCFG_PALETTE_INIT_OWNER(mephisto_display_modul_device, lcd_palette) + + MCFG_HD44780_ADD("hd44780") + MCFG_HD44780_LCD_SIZE(2, 16) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("beeper", BEEP, 3250) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) +MACHINE_CONFIG_END + + +PALETTE_INIT_MEMBER(mephisto_display_modul_device,lcd_palette) +{ + palette.set_pen_color(0, rgb_t(138, 146, 148)); + palette.set_pen_color(1, rgb_t(92, 83, 88)); +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void mephisto_display_modul_device::device_start() +{ + save_item(NAME(m_latch)); + save_item(NAME(m_ctrl)); +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void mephisto_display_modul_device::device_reset() +{ + m_latch = 0; + m_ctrl = 0; +} + +WRITE8_MEMBER(mephisto_display_modul_device::latch_w) +{ + m_latch = data; +} + +WRITE8_MEMBER(mephisto_display_modul_device::io_w) +{ + if (BIT(data, 1) && !BIT(m_ctrl, 1)) + m_lcdc->write(space, BIT(data, 0), m_latch); + + m_beeper->set_state(BIT(data, 2) | BIT(data, 3)); + + m_ctrl = data; +} diff --git a/src/mame/machine/mmboard.h b/src/mame/machine/mmboard.h new file mode 100644 index 00000000000..6414a61777e --- /dev/null +++ b/src/mame/machine/mmboard.h @@ -0,0 +1,118 @@ +// license:BSD-3-Clause +// copyright-holders:Sandro Ronco +/********************************************************************** + + Mephisto Modular + +*********************************************************************/ + +#ifndef MAME_MACHINE_MMBOARD_H +#define MAME_MACHINE_MMBOARD_H + +#pragma once + + +#include "sound/beep.h" +#include "video/hd44780.h" +#include "screen.h" +#include "speaker.h" + + +//************************************************************************** +// INTERFACE CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_MEPHISTO_SENSORS_BOARD_ADD(_tag) \ + MCFG_DEVICE_ADD(_tag, MEPHISTO_SENSORS_BOARD, 0) \ + +#define MCFG_MEPHISTO_BOARD_UPDATE_ALL_LEDS(_val) \ + mephisto_board_device::static_set_upd_all_leds(*device, _val); + +#define MCFG_MEPHISTO_DISPLAY_MODUL_ADD(_tag) \ + MCFG_DEVICE_ADD(_tag, MEPHISTO_DISPLAY_MODUL, 0) + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> mephisto_board_device + +class mephisto_board_device : public device_t +{ +public: + // construction/destruction + mephisto_board_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // static configuration helpers + static void static_set_upd_all_leds(device_t &device, bool _upd_all_leds) { mephisto_board_device &dev=downcast(device); dev.m_upd_all_leds = _upd_all_leds; } + + DECLARE_READ8_MEMBER(input_r); + DECLARE_WRITE8_MEMBER(led_w); + DECLARE_READ8_MEMBER(mux_r); + DECLARE_WRITE8_MEMBER(mux_w); + DECLARE_WRITE8_MEMBER(led_upd_w); + DECLARE_WRITE8_MEMBER(mux_upd_w); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + void update_leds(); + +private: + required_ioport_array<8> m_sensors; + bool m_upd_all_leds; + uint8_t m_mux; + uint8_t m_leds; +}; + +// ======================> mephisto_sensors_board_device + +class mephisto_sensors_board_device : public mephisto_board_device +{ +public: + // construction/destruction + mephisto_sensors_board_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + + // optional information overrides + virtual ioport_constructor device_input_ports() const override; +}; + + +// ======================> mephisto_display_modul_device + +class mephisto_display_modul_device : public device_t +{ +public: + // construction/destruction + mephisto_display_modul_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + DECLARE_WRITE8_MEMBER(latch_w); + DECLARE_WRITE8_MEMBER(io_w); + + DECLARE_PALETTE_INIT(lcd_palette); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_add_mconfig(machine_config &config) override; + +private: + optional_device m_lcdc; + required_device m_beeper; + uint8_t m_latch; + uint8_t m_ctrl; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(MEPHISTO_SENSORS_BOARD, mephisto_sensors_board_device) +DECLARE_DEVICE_TYPE(MEPHISTO_DISPLAY_MODUL, mephisto_display_modul_device) + + +#endif // MAME_MACHINE_MMBOARD_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0cd0f5b1c71..59296a09ce8 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20928,7 +20928,6 @@ lyon32 // 1990 Mephisto Lyon 68020 megaiv // 1989 Mephisto Mega IV Schachcomputer milano // 1989 Mephisto Milano Schachcomputer monteciv // 1990 Mephisto Monte Carlo IV LE Schachcomputer -polgar // 1986 Mephisto Polgar Schachcomputer van16 // 1991 Mephisto Vancouver 68000 van32 // 1991 Mephisto Vancouver 68020 @@ -31528,6 +31527,12 @@ topracer // bootleg topracera // bootleg topracern // bootleg +@source:polgar.cpp +polgar // 1989 Mephisto Polgar +polgar10 // 1990 Mephisto Polgar 10MHz +mrisc // 1992 Mephisto RISC 1MB +mrisc2 // 1994 Mephisto RISC II + @source:policetr.cpp policetr // (c) 1996 P&P Marketing policetr10 // (c) 1996 P&P Marketing