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De-legacy the z80sio device.

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This commit is contained in:
Aaron Giles 2012-08-08 19:52:22 +00:00
parent 06eb1d9b19
commit 8384cadb55
6 changed files with 50 additions and 85 deletions
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52
src/emu/machine/z80sio.c
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@ -804,62 +804,50 @@ void z80sio_device::sio_channel::serial_callback()
// GLOBAL STUBS
//**************************************************************************
WRITE8_DEVICE_HANDLER( z80sio_c_w ) { downcast<z80sio_device *>(device)->control_write(offset & 1, data); }
WRITE8_DEVICE_HANDLER( z80sio_d_w ) { downcast<z80sio_device *>(device)->data_write(offset & 1, data); }
READ8_DEVICE_HANDLER( z80sio_c_r ) { return downcast<z80sio_device *>(device)->control_read(offset & 1); }
READ8_DEVICE_HANDLER( z80sio_d_r ) { return downcast<z80sio_device *>(device)->data_read(offset & 1); }
READ8_DEVICE_HANDLER( z80sio_get_dtr ) { return downcast<z80sio_device *>(device)->dtr(offset & 1); }
READ8_DEVICE_HANDLER( z80sio_get_rts ) { return downcast<z80sio_device *>(device)->rts(offset & 1); }
WRITE8_DEVICE_HANDLER( z80sio_set_cts ) { downcast<z80sio_device *>(device)->set_cts(offset & 1, data); }
WRITE8_DEVICE_HANDLER( z80sio_set_dcd ) { downcast<z80sio_device *>(device)->set_dcd(offset & 1, data); }
WRITE8_DEVICE_HANDLER( z80sio_receive_data ) { downcast<z80sio_device *>(device)->receive_data(offset & 1, data); }
READ8_DEVICE_HANDLER( z80sio_cd_ba_r )
READ8_MEMBER( z80sio_device::read )
{
switch (offset & 3)
{
case 0: return z80sio_d_r(device, 0);
case 1: return z80sio_d_r(device, 1);
case 2: return z80sio_c_r(device, 0);
case 3: return z80sio_c_r(device, 1);
case 0: return data_read(0);
case 1: return data_read(1);
case 2: return control_read(0);
case 3: return control_read(1);
}
return 0xff;
}
WRITE8_DEVICE_HANDLER( z80sio_cd_ba_w )
WRITE8_MEMBER( z80sio_device::write )
{
switch (offset & 3)
{
case 0: z80sio_d_w(device, 0, data); break;
case 1: z80sio_d_w(device, 1, data); break;
case 2: z80sio_c_w(device, 0, data); break;
case 3: z80sio_c_w(device, 1, data); break;
case 0: data_write(0, data); break;
case 1: data_write(1, data); break;
case 2: control_write(0, data); break;
case 3: control_write(1, data); break;
}
}
READ8_DEVICE_HANDLER( z80sio_ba_cd_r )
READ8_MEMBER( z80sio_device::read_alt )
{
switch (offset & 3)
{
case 0: return z80sio_d_r(device, 0);
case 1: return z80sio_c_r(device, 0);
case 2: return z80sio_d_r(device, 1);
case 3: return z80sio_c_r(device, 1);
case 0: return data_read(0);
case 1: return control_read(0);
case 2: return data_read(1);
case 3: return control_read(1);
}
return 0xff;
}
WRITE8_DEVICE_HANDLER( z80sio_ba_cd_w )
WRITE8_MEMBER( z80sio_device::write_alt )
{
switch (offset & 3)
{
case 0: z80sio_d_w(device, 0, data); break;
case 1: z80sio_c_w(device, 0, data); break;
case 2: z80sio_d_w(device, 1, data); break;
case 3: z80sio_c_w(device, 1, data); break;
case 0: data_write(0, data); break;
case 1: control_write(0, data); break;
case 2: data_write(1, data); break;
case 3: control_write(1, data); break;
}
}

39
src/emu/machine/z80sio.h
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@ -66,6 +66,14 @@ public:
void set_cts(int ch, int state) { m_channel[ch].set_cts(state); }
void set_dcd(int ch, int state) { m_channel[ch].set_dcd(state); }
void receive_data(int ch, int data) { m_channel[ch].receive_data(data); }
// standard read/write, with C/D in bit 1, B/A in bit 0
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
// alternate read/write, with C/D in bit 0, B/A in bit 1
DECLARE_READ8_MEMBER( read_alt );
DECLARE_WRITE8_MEMBER( write_alt );
private:
// device-level overrides
@ -140,35 +148,4 @@ private:
extern const device_type Z80SIO;
//**************************************************************************
// CONTROL/DATA REGISTER READ/WRITE
//**************************************************************************
// register access (A1=C/_D A0=B/_A)
READ8_DEVICE_HANDLER( z80sio_cd_ba_r );
WRITE8_DEVICE_HANDLER( z80sio_cd_ba_w );
// register access (A1=B/_A A0=C/_D)
READ8_DEVICE_HANDLER( z80sio_ba_cd_r );
WRITE8_DEVICE_HANDLER( z80sio_ba_cd_w );
WRITE8_DEVICE_HANDLER( z80sio_c_w );
READ8_DEVICE_HANDLER( z80sio_c_r );
WRITE8_DEVICE_HANDLER( z80sio_d_w );
READ8_DEVICE_HANDLER( z80sio_d_r );
//**************************************************************************
// CONTROL LINE READ/WRITE
//**************************************************************************
READ8_DEVICE_HANDLER( z80sio_get_dtr );
READ8_DEVICE_HANDLER( z80sio_get_rts );
WRITE8_DEVICE_HANDLER( z80sio_set_cts );
WRITE8_DEVICE_HANDLER( z80sio_set_dcd );
WRITE8_DEVICE_HANDLER( z80sio_receive_data );
#endif

2
src/mame/drivers/dlair.c
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@ -443,7 +443,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dleuro_io_map, AS_IO, 8, dlair_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_MIRROR(0x7c) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
AM_RANGE(0x80, 0x83) AM_MIRROR(0x7c) AM_DEVREADWRITE_LEGACY("sio", z80sio_ba_cd_r, z80sio_ba_cd_w)
AM_RANGE(0x80, 0x83) AM_MIRROR(0x7c) AM_DEVREADWRITE("sio", z80sio_device, read_alt, write_alt)
ADDRESS_MAP_END

8
src/mame/drivers/mcr.c
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@ -577,7 +577,7 @@ READ8_MEMBER(mcr_state::nflfoot_ip2_r)
WRITE8_MEMBER(mcr_state::nflfoot_op4_w)
{
device_t *sio = machine().device("ipu_sio");
z80sio_device *sio = machine().device<z80sio_device>("ipu_sio");
/* bit 7 = J3-7 on IPU board = /RXDA on SIO */
logerror("%04X:op4_w(%d%d%d)\n", cpu_get_pc(&space.device()), (data >> 7) & 1, (data >> 6) & 1, (data >> 5) & 1);
@ -607,12 +607,12 @@ WRITE8_MEMBER(mcr_state::nflfoot_op4_w)
{
logerror(" -- stop bit = %d; final value = %02X\n", (data >> 7) & 1, nflfoot_serial_out_bits);
nflfoot_serial_out_active = FALSE;
z80sio_receive_data(sio, 0, nflfoot_serial_out_bits);
sio->receive_data(0, nflfoot_serial_out_bits);
}
}
/* bit 6 = J3-3 on IPU board = CTSA on SIO */
z80sio_set_cts(sio, 0, (data >> 6) & 1);
sio->set_cts(0, (data >> 6) & 1);
/* bit 4 = SEL0 (J1-8) on squawk n talk board */
/* bits 3-0 = MD3-0 connected to squawk n talk (J1-4,3,2,1) */
@ -752,7 +752,7 @@ static ADDRESS_MAP_START( ipu_91695_portmap, AS_IO, 8, mcr_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio0", z80pio_device, read, write)
AM_RANGE(0x04, 0x07) AM_MIRROR(0xe0) AM_DEVREADWRITE_LEGACY("ipu_sio", z80sio_cd_ba_r, z80sio_cd_ba_w)
AM_RANGE(0x04, 0x07) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_sio", z80sio_device, read, write)
AM_RANGE(0x08, 0x0b) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_ctc", z80ctc_device, read, write)
AM_RANGE(0x0c, 0x0f) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio1", z80pio_device, read, write)
AM_RANGE(0x10, 0x13) AM_MIRROR(0xe0) AM_WRITE(mcr_ipu_laserdisk_w)

32
src/mame/drivers/proconn.c
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@ -38,15 +38,15 @@ public:
DECLARE_WRITE8_MEMBER( ay_w0 ) { ay8910_address_data_w(m_ay, 0, data); }
DECLARE_WRITE8_MEMBER( ay_w1 ) { ay8910_address_data_w(m_ay, 1, data); }
DECLARE_WRITE8_MEMBER( ctc_w0 ) { m_z80ctc->write(0, data); }
DECLARE_WRITE8_MEMBER( ctc_w1 ) { m_z80ctc->write(1, data); }
DECLARE_WRITE8_MEMBER( ctc_w2 ) { m_z80ctc->write(2, data); }
DECLARE_WRITE8_MEMBER( ctc_w3 ) { m_z80ctc->write(3, data); }
DECLARE_WRITE8_MEMBER( ctc_w0 ) { m_z80ctc->write(space, 0, data); }
DECLARE_WRITE8_MEMBER( ctc_w1 ) { m_z80ctc->write(space, 1, data); }
DECLARE_WRITE8_MEMBER( ctc_w2 ) { m_z80ctc->write(space, 2, data); }
DECLARE_WRITE8_MEMBER( ctc_w3 ) { m_z80ctc->write(space, 3, data); }
DECLARE_WRITE8_MEMBER( sio_w0 ) { z80sio_cd_ba_w(m_z80sio, 0, data); }
DECLARE_WRITE8_MEMBER( sio_w1 ) { z80sio_cd_ba_w(m_z80sio, 1, data); }
DECLARE_WRITE8_MEMBER( sio_w2 ) { z80sio_cd_ba_w(m_z80sio, 2, data); }
DECLARE_WRITE8_MEMBER( sio_w3 ) { z80sio_cd_ba_w(m_z80sio, 3, data); }
DECLARE_WRITE8_MEMBER( sio_w0 ) { m_z80sio->write(space, 0, data); }
DECLARE_WRITE8_MEMBER( sio_w1 ) { m_z80sio->write(space, 1, data); }
DECLARE_WRITE8_MEMBER( sio_w2 ) { m_z80sio->write(space, 2, data); }
DECLARE_WRITE8_MEMBER( sio_w3 ) { m_z80sio->write(space, 3, data); }
DECLARE_WRITE8_MEMBER( pio1_w0 ) { m_z80pio_1->write(space, 0, data); }
DECLARE_WRITE8_MEMBER( pio1_w1 ) { m_z80pio_1->write(space, 1, data); }
@ -75,15 +75,15 @@ public:
DECLARE_READ8_MEMBER( ay_r0 ) { return ay8910_r(m_ay, 0); }
DECLARE_READ8_MEMBER( ctc_r0 ) { return m_z80ctc->read(0); }
DECLARE_READ8_MEMBER( ctc_r1 ) { return m_z80ctc->read(1); }
DECLARE_READ8_MEMBER( ctc_r2 ) { return m_z80ctc->read(2); }
DECLARE_READ8_MEMBER( ctc_r3 ) { return m_z80ctc->read(3); }
DECLARE_READ8_MEMBER( ctc_r0 ) { return m_z80ctc->read(space, 0); }
DECLARE_READ8_MEMBER( ctc_r1 ) { return m_z80ctc->read(space, 1); }
DECLARE_READ8_MEMBER( ctc_r2 ) { return m_z80ctc->read(space, 2); }
DECLARE_READ8_MEMBER( ctc_r3 ) { return m_z80ctc->read(space, 3); }
DECLARE_READ8_MEMBER( sio_r0 ) { return z80sio_cd_ba_r(m_z80sio, 0); }
DECLARE_READ8_MEMBER( sio_r1 ) { return z80sio_cd_ba_r(m_z80sio, 1); }
DECLARE_READ8_MEMBER( sio_r2 ) { return z80sio_cd_ba_r(m_z80sio, 2); }
DECLARE_READ8_MEMBER( sio_r3 ) { return z80sio_cd_ba_r(m_z80sio, 3); }
DECLARE_READ8_MEMBER( sio_r0 ) { return m_z80sio->read(space, 0); }
DECLARE_READ8_MEMBER( sio_r1 ) { return m_z80sio->read(space, 1); }
DECLARE_READ8_MEMBER( sio_r2 ) { return m_z80sio->read(space, 2); }
DECLARE_READ8_MEMBER( sio_r3 ) { return m_z80sio->read(space, 3); }
DECLARE_READ8_MEMBER( pio1_r0 ) { return m_z80pio_1->read(space, 0); }
DECLARE_READ8_MEMBER( pio1_r1 ) { return m_z80pio_1->read(space, 1); }

2
src/mame/machine/mcr.c
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@ -234,7 +234,7 @@ static WRITE8_DEVICE_HANDLER( ipu_break_changed )
{
logerror("DTR changed -> %d\n", data);
if (data == 1)
z80sio_receive_data(device, 1, 0);
downcast<z80sio_device *>(device)->receive_data(1, 0);
}
}