From 83bc3035e6d81220cc08d2f05a85e00c102de6ef Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 21 Jan 2019 14:00:19 -0500 Subject: [PATCH] ins8250: Allow writes to MSR with lower 4 bits zero to clear the associated interrupt. This is not confirmed behavior, but is logically consistent with nonzero bits causing interrupts when written. --- src/devices/machine/ins8250.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/devices/machine/ins8250.cpp b/src/devices/machine/ins8250.cpp index 88262cdbac2..d127ce0e40d 100644 --- a/src/devices/machine/ins8250.cpp +++ b/src/devices/machine/ins8250.cpp @@ -390,6 +390,8 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w ) if ( m_regs.msr & 0x0f ) trigger_int(COM_INT_PENDING_MODEM_STATUS_REGISTER); + else + clear_int(COM_INT_PENDING_MODEM_STATUS_REGISTER); break; case 7: m_regs.scr = data;