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https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
ppc: converted remaining callbacks to delegates (nw)
This commit is contained in:
Osso
parent
48df1930c4
commit
841c2d7b13
@ -159,24 +159,12 @@ enum
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#define PPCDRC_COMPATIBLE_OPTIONS (PPCDRC_STRICT_VERIFY | PPCDRC_FLUSH_PC | PPCDRC_ACCURATE_SINGLES)
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#define PPCDRC_FASTEST_OPTIONS (0)
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/***************************************************************************
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STRUCTURES AND TYPEDEFS
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***************************************************************************/
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typedef void (*ppc4xx_spu_tx_handler)(device_t *device, UINT8 data);
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typedef void (*ppc_dcstore_handler)(device_t *device, UINT32 address);
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typedef UINT32 (*ppc4xx_dma_read_handler)(device_t *device, int width);
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typedef void (*ppc4xx_dma_write_handler)(device_t *device, int width, UINT32 data);
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/***************************************************************************
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PUBLIC FUNCTIONS
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***************************************************************************/
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/***************************************************************************
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PUBLIC FUNCTIONS
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***************************************************************************/
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#define MCFG_PPC_BUS_FREQUENCY(_frequency) \
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ppc_device::set_bus_frequency(*device, _frequency);
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@ -225,14 +213,14 @@ protected:
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public:
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// construction/destruction
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ppc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int address_bits, int data_bits, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor, address_map_constructor internal_map);
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static void set_bus_frequency(device_t &device, UINT32 bus_frequency) { downcast<ppc_device &>(device).c_bus_frequency = bus_frequency; }
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void ppc_set_dcstore_callback(ppc_dcstore_handler handler);
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void ppcdrc_set_options(UINT32 options);
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void ppcdrc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
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void ppcdrc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles);
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static void set_bus_frequency(device_t &device, UINT32 bus_frequency) { downcast<ppc_device &>(device).c_bus_frequency = bus_frequency; }
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void ppc_set_dcstore_callback(write32_delegate callback);
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void ppcdrc_set_options(UINT32 options);
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void ppcdrc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
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void ppcdrc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles);
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TIMER_CALLBACK_MEMBER(decrementer_int_callback);
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TIMER_CALLBACK_MEMBER(ppc4xx_buffered_dma_callback);
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@ -491,13 +479,13 @@ protected:
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UINT8 regs[9];
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UINT8 txbuf;
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UINT8 rxbuf;
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emu_timer * timer;
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UINT8 rxbuffer[256];
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UINT32 rxin, rxout;
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ppc4xx_spu_tx_handler tx_handler;
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};
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ppc4xx_spu_state m_spu;
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emu_timer * timer;
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UINT8 rxbuffer[256];
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UINT32 rxin, rxout;
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write8_delegate tx_cb;
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};
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ppc4xx_spu_state m_spu;
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emu_timer * m_fit_timer;
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emu_timer * m_pit_timer;
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emu_timer * m_wdog_timer;
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@ -515,16 +503,16 @@ protected:
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UINT64 m_dec_zero_cycles;
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emu_timer * m_decrementer_int_timer;
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read32_delegate m_dcr_read_func;
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write32_delegate m_dcr_write_func;
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ppc_dcstore_handler m_dcstore_handler;
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ppc4xx_dma_read_handler m_ext_dma_read_handler[4];
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ppc4xx_dma_write_handler m_ext_dma_write_handler[4];
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/* PowerPC function pointers for memory accesses/exceptions */
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jmp_buf m_exception_jmpbuf;
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read32_delegate m_dcr_read_func;
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write32_delegate m_dcr_write_func;
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write32_delegate m_dcstore_cb;
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read32_delegate m_ext_dma_read_cb[4];
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write32_delegate m_ext_dma_write_cb[4];
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/* PowerPC function pointers for memory accesses/exceptions */
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jmp_buf m_exception_jmpbuf;
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UINT8 (*m_ppcread8)(address_space &space, offs_t address);
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UINT16 (*m_ppcread16)(address_space &space, offs_t address);
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UINT32 (*m_ppcread32)(address_space &space, offs_t address);
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@ -763,17 +751,17 @@ public:
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class ppc4xx_device : public ppc_device
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{
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public:
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ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor);
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void ppc4xx_spu_set_tx_handler(ppc4xx_spu_tx_handler handler);
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void ppc4xx_spu_receive_byte(UINT8 byteval);
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void ppc4xx_set_dma_read_handler(int channel, ppc4xx_dma_read_handler handler, int rate);
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void ppc4xx_set_dma_write_handler(int channel, ppc4xx_dma_write_handler handler, int rate);
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void ppc4xx_set_dcr_read_handler(read32_delegate dcr_read_func);
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void ppc4xx_set_dcr_write_handler(write32_delegate dcr_write_func);
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public:
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ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor);
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void ppc4xx_spu_set_tx_handler(write8_delegate callback);
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void ppc4xx_spu_receive_byte(UINT8 byteval);
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void ppc4xx_set_dma_read_handler(int channel, read32_delegate callback, int rate);
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void ppc4xx_set_dma_write_handler(int channel, write32_delegate callback, int rate);
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void ppc4xx_set_dcr_read_handler(read32_delegate dcr_read_func);
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void ppc4xx_set_dcr_write_handler(write32_delegate dcr_write_func);
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DECLARE_READ8_MEMBER( ppc4xx_spu_r );
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DECLARE_WRITE8_MEMBER( ppc4xx_spu_w );
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@ -214,22 +214,19 @@ ppc_device::ppc_device(const machine_config &mconfig, device_type type, const ch
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, m_core(NULL)
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, m_bus_freq_multiplier(1)
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, m_vtlb(NULL)
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, m_flavor(flavor)
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, m_cap(cap)
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, m_tb_divisor(tb_divisor)
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, m_dcstore_handler(NULL)
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, m_cache(CACHE_SIZE + sizeof(internal_ppc_state))
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, m_drcuml(NULL)
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, m_drcfe(NULL)
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, m_flavor(flavor)
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, m_cap(cap)
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, m_tb_divisor(tb_divisor)
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, m_cache(CACHE_SIZE + sizeof(internal_ppc_state))
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, m_drcuml(NULL)
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, m_drcfe(NULL)
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, m_drcoptions(0)
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{
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m_program_config.m_logaddr_width = 32;
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m_program_config.m_page_shift = POWERPC_MIN_PAGE_SHIFT;
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memset(m_ext_dma_read_handler, 0, sizeof(m_ext_dma_read_handler));
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memset(m_ext_dma_write_handler, 0, sizeof(m_ext_dma_write_handler));
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}
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//ppc403_device::ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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{
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m_program_config.m_logaddr_width = 32;
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m_program_config.m_page_shift = POWERPC_MIN_PAGE_SHIFT;
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}
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//ppc403_device::ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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// : ppc_device(mconfig, PPC403, "PPC403", tag, owner, clock, "ppc403", 32?, 64?)
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//{
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//}
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@ -1241,15 +1238,15 @@ offs_t ppc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opro
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ppccom_dcstore_callback - call the dcstore
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callback if installed
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-------------------------------------------------*/
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void ppc_device::ppccom_dcstore_callback()
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{
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if (m_dcstore_handler != NULL)
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{
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m_dcstore_handler(this, m_core->param0);
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}
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}
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void ppc_device::ppccom_dcstore_callback()
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{
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if (!m_dcstore_cb.isnull())
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{
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m_dcstore_cb(*m_program, m_core->param0, 0, 0xffffffff);
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}
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}
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/***************************************************************************
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TLB HANDLING
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@ -2061,15 +2058,15 @@ TIMER_CALLBACK_MEMBER( ppc_device::decrementer_int_callback )
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/*-------------------------------------------------
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ppc_set_dcstore_callback - installs a callback
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for detecting datacache stores with dcbst
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-------------------------------------------------*/
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void ppc_device::ppc_set_dcstore_callback(ppc_dcstore_handler handler)
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{
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m_dcstore_handler = handler;
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}
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for detecting datacache stores with dcbst
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-------------------------------------------------*/
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void ppc_device::ppc_set_dcstore_callback(write32_delegate callback)
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{
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m_dcstore_cb = callback;
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}
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void ppc_device::execute_set_input(int inputnum, int state)
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{
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switch (inputnum)
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@ -2288,38 +2285,38 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
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{
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/* byte transfer */
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case 1:
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do
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{
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UINT8 data = 0;
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if (m_ext_dma_read_handler[dmachan] != NULL)
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data = (*m_ext_dma_read_handler[dmachan])(this, 1);
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m_program->write_byte(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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do
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{
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UINT8 data = 0;
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if (!m_ext_dma_read_cb[dmachan].isnull())
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data = (m_ext_dma_read_cb[dmachan])(*m_program, 1, 0xffffffff);
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m_program->write_byte(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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/* word transfer */
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case 2:
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do
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{
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UINT16 data = 0;
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if (m_ext_dma_read_handler[dmachan] != NULL)
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data = (*m_ext_dma_read_handler[dmachan])(this, 2);
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m_program->write_word(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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do
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{
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UINT16 data = 0;
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if (!m_ext_dma_read_cb[dmachan].isnull())
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data = (m_ext_dma_read_cb[dmachan])(*m_program, 2, 0xffffffff);
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m_program->write_word(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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/* dword transfer */
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case 4:
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do
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{
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UINT32 data = 0;
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if (m_ext_dma_read_handler[dmachan] != NULL)
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data = (*m_ext_dma_read_handler[dmachan])(this, 4);
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m_program->write_dword(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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do
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{
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UINT32 data = 0;
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if (!m_ext_dma_read_cb[dmachan].isnull())
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data = (m_ext_dma_read_cb[dmachan])(*m_program, 4, 0xffffffff);
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m_program->write_dword(dmaregs[DCR4XX_DMADA0], data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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}
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}
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@ -2332,36 +2329,36 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
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{
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/* byte transfer */
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case 1:
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do
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{
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UINT8 data = m_program->read_byte(dmaregs[DCR4XX_DMADA0]);
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if (m_ext_dma_write_handler[dmachan] != NULL)
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(*m_ext_dma_write_handler[dmachan])(this, 1, data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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do
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{
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UINT8 data = m_program->read_byte(dmaregs[DCR4XX_DMADA0]);
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if (!m_ext_dma_write_cb[dmachan].isnull())
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(m_ext_dma_write_cb[dmachan])(*m_program, 1, data, 0xffffffff);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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/* word transfer */
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case 2:
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do
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{
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UINT16 data = m_program->read_word(dmaregs[DCR4XX_DMADA0]);
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if (m_ext_dma_write_handler[dmachan] != NULL)
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(*m_ext_dma_write_handler[dmachan])(this, 2, data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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do
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{
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UINT16 data = m_program->read_word(dmaregs[DCR4XX_DMADA0]);
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if (!m_ext_dma_write_cb[dmachan].isnull())
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(m_ext_dma_write_cb[dmachan])(*m_program, 2, data, 0xffffffff);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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/* dword transfer */
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case 4:
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do
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{
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UINT32 data = m_program->read_dword(dmaregs[DCR4XX_DMADA0]);
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if (m_ext_dma_write_handler[dmachan] != NULL)
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(*m_ext_dma_write_handler[dmachan])(this, 4, data);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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do
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{
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UINT32 data = m_program->read_dword(dmaregs[DCR4XX_DMADA0]);
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if (!m_ext_dma_write_cb[dmachan].isnull())
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(m_ext_dma_write_cb[dmachan])(*m_program, 4, data, 0xffffffff);
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dmaregs[DCR4XX_DMADA0] += destinc;
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} while (!ppc4xx_dma_decrement_count(dmachan));
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break;
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}
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}
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}
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@ -2677,14 +2674,14 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_spu_callback )
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int operation = (m_spu.regs[SPU4XX_TX_COMMAND] >> 5) & 3;
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/* if we have data to transmit, do it now */
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if (!(m_spu.regs[SPU4XX_LINE_STATUS] & 0x04))
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{
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/* if we have a transmit handler, send it that way */
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if (m_spu.tx_handler != NULL)
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(*m_spu.tx_handler)(this, m_spu.txbuf);
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/* indicate that we have moved it to the shift register */
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m_spu.regs[SPU4XX_LINE_STATUS] |= 0x04;
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if (!(m_spu.regs[SPU4XX_LINE_STATUS] & 0x04))
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{
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/* if we have a transmit handler, send it that way */
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if (!m_spu.tx_cb.isnull())
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(m_spu.tx_cb)(*m_program, 0, m_spu.txbuf, 0xff);
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/* indicate that we have moved it to the shift register */
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m_spu.regs[SPU4XX_LINE_STATUS] |= 0x04;
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m_spu.regs[SPU4XX_LINE_STATUS] &= ~0x02;
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}
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@ -2823,15 +2820,15 @@ WRITE8_MEMBER( ppc4xx_device::ppc4xx_spu_w )
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/*-------------------------------------------------
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ppc4xx_spu_set_tx_handler - PowerPC 4XX-
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specific TX handler configuration
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-------------------------------------------------*/
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void ppc4xx_device::ppc4xx_spu_set_tx_handler(ppc4xx_spu_tx_handler handler)
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{
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m_spu.tx_handler = handler;
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}
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specific TX handler configuration
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-------------------------------------------------*/
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void ppc4xx_device::ppc4xx_spu_set_tx_handler(write8_delegate callback)
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{
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m_spu.tx_cb = callback;
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}
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/*-------------------------------------------------
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ppc4xx_spu_receive_byte - PowerPC 4XX-
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specific serial byte receive
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@ -2844,26 +2841,26 @@ void ppc4xx_device::ppc4xx_spu_receive_byte(UINT8 byteval)
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/*-------------------------------------------------
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ppc4xx_set_dma_read_handler - PowerPC 4XX-
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specific external DMA read handler configuration
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-------------------------------------------------*/
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void ppc4xx_device::ppc4xx_set_dma_read_handler(int channel, ppc4xx_dma_read_handler handler, int rate)
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{
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m_ext_dma_read_handler[channel] = handler;
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m_buffered_dma_rate[channel] = rate;
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}
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specific external DMA read handler configuration
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-------------------------------------------------*/
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void ppc4xx_device::ppc4xx_set_dma_read_handler(int channel, read32_delegate callback, int rate)
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{
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m_ext_dma_read_cb[channel] = callback;
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m_buffered_dma_rate[channel] = rate;
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}
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/*-------------------------------------------------
|
||||
ppc4xx_set_dma_write_handler - PowerPC 4XX-
|
||||
specific external DMA write handler configuration
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ppc4xx_device::ppc4xx_set_dma_write_handler(int channel, ppc4xx_dma_write_handler handler, int rate)
|
||||
{
|
||||
m_ext_dma_write_handler[channel] = handler;
|
||||
m_buffered_dma_rate[channel] = rate;
|
||||
}
|
||||
|
||||
specific external DMA write handler configuration
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ppc4xx_device::ppc4xx_set_dma_write_handler(int channel, write32_delegate callback, int rate)
|
||||
{
|
||||
m_ext_dma_write_cb[channel] = callback;
|
||||
m_buffered_dma_rate[channel] = rate;
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
ppc4xx_set_dcr_read_handler
|
||||
-------------------------------------------------*/
|
||||
|
||||
@ -630,13 +630,14 @@ public:
|
||||
DECLARE_READ64_MEMBER(main_comram_r);
|
||||
DECLARE_WRITE64_MEMBER(main_comram_w);
|
||||
DECLARE_READ64_MEMBER(main_fifo_r);
|
||||
DECLARE_WRITE64_MEMBER(main_fifo_w);
|
||||
DECLARE_READ64_MEMBER(main_mpc106_r);
|
||||
DECLARE_WRITE64_MEMBER(main_mpc106_w);
|
||||
|
||||
DECLARE_READ32_MEMBER(sub_comram_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_comram_w);
|
||||
DECLARE_READ32_MEMBER(sub_sound_r);
|
||||
DECLARE_WRITE64_MEMBER(main_fifo_w);
|
||||
DECLARE_READ64_MEMBER(main_mpc106_r);
|
||||
DECLARE_WRITE64_MEMBER(main_mpc106_w);
|
||||
DECLARE_WRITE32_MEMBER(main_cpu_dc_store);
|
||||
|
||||
DECLARE_READ32_MEMBER(sub_comram_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_comram_w);
|
||||
DECLARE_READ32_MEMBER(sub_sound_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_sound_w);
|
||||
DECLARE_READ32_MEMBER(sub_unk7e_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_debug_w);
|
||||
@ -650,21 +651,25 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(sub_ata0_w);
|
||||
DECLARE_READ16_MEMBER(sub_ata1_r);
|
||||
DECLARE_WRITE16_MEMBER(sub_ata1_w);
|
||||
DECLARE_READ32_MEMBER(sub_psac2_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_psac2_w);
|
||||
DECLARE_WRITE32_MEMBER(sub_psac_palette_w);
|
||||
|
||||
DECLARE_WRITE64_MEMBER(gfx_fifo0_w);
|
||||
DECLARE_WRITE64_MEMBER(gfx_fifo1_w);
|
||||
DECLARE_READ32_MEMBER(sub_psac2_r);
|
||||
DECLARE_WRITE32_MEMBER(sub_psac2_w);
|
||||
DECLARE_WRITE32_MEMBER(sub_psac_palette_w);
|
||||
DECLARE_WRITE32_MEMBER(sub_sound_dma_w);
|
||||
|
||||
DECLARE_WRITE64_MEMBER(gfx_fifo0_w);
|
||||
DECLARE_WRITE64_MEMBER(gfx_fifo1_w);
|
||||
DECLARE_WRITE64_MEMBER(gfx_fifo2_w);
|
||||
DECLARE_WRITE64_MEMBER(gfx_debug_state_w);
|
||||
DECLARE_READ64_MEMBER(gfx_unk1_r);
|
||||
DECLARE_WRITE64_MEMBER(gfx_unk1_w);
|
||||
DECLARE_READ64_MEMBER(gfx_fifo_r);
|
||||
DECLARE_WRITE64_MEMBER(gfx_buf_w);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
|
||||
|
||||
DECLARE_WRITE64_MEMBER(gfx_unk1_w);
|
||||
DECLARE_READ64_MEMBER(gfx_fifo_r);
|
||||
DECLARE_WRITE64_MEMBER(gfx_buf_w);
|
||||
DECLARE_WRITE32_MEMBER(gfx_cpu_dc_store);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sub_jvs_w);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
|
||||
|
||||
cobra_renderer *m_renderer;
|
||||
|
||||
cobra_fifo *m_gfxfifo_in;
|
||||
@ -1596,20 +1601,18 @@ WRITE64_MEMBER(cobra_state::main_comram_w)
|
||||
UINT32 m2 = (UINT32)(mem_mask);
|
||||
|
||||
m_comram[page][(offset << 1) + 0] = (w1 & ~m1) | (d1 & m1);
|
||||
m_comram[page][(offset << 1) + 1] = (w2 & ~m2) | (d2 & m2);
|
||||
}
|
||||
|
||||
static void main_cpu_dc_store(device_t *device, UINT32 address)
|
||||
{
|
||||
cobra_state *cobra = device->machine().driver_data<cobra_state>();
|
||||
|
||||
if ((address & 0xf0000000) == 0xc0000000)
|
||||
{
|
||||
// force sync when writing to GFX board main ram
|
||||
cobra->m_maincpu->spin_until_time(attotime::from_usec(80));
|
||||
}
|
||||
}
|
||||
|
||||
m_comram[page][(offset << 1) + 1] = (w2 & ~m2) | (d2 & m2);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(cobra_state::main_cpu_dc_store)
|
||||
{
|
||||
if ((offset & 0xf0000000) == 0xc0000000)
|
||||
{
|
||||
// force sync when writing to GFX board main ram
|
||||
m_maincpu->spin_until_time(attotime::from_usec(80));
|
||||
}
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( cobra_main_map, AS_PROGRAM, 64, cobra_state )
|
||||
AM_RANGE(0x00000000, 0x003fffff) AM_RAM
|
||||
AM_RANGE(0x07c00000, 0x07ffffff) AM_RAM
|
||||
@ -1885,49 +1888,46 @@ READ32_MEMBER(cobra_state::sub_psac2_r)
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(cobra_state::sub_psac2_w)
|
||||
{
|
||||
}
|
||||
|
||||
static void sub_sound_dma_w(device_t *device, int width, UINT32 data)
|
||||
{
|
||||
//printf("DMA write to unknown: size %d, data %08X\n", width, data);
|
||||
|
||||
/*
|
||||
static FILE *out;
|
||||
{
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(cobra_state::sub_sound_dma_w)
|
||||
{
|
||||
//printf("DMA write to unknown: size %d, data %08X\n", address, data);
|
||||
|
||||
/*
|
||||
static FILE *out;
|
||||
if (out == NULL)
|
||||
out = fopen("sound.bin", "wb");
|
||||
|
||||
fputc((data >> 24) & 0xff, out);
|
||||
fputc((data >> 16) & 0xff, out);
|
||||
fputc((data >> 8) & 0xff, out);
|
||||
fputc((data >> 0) & 0xff, out);
|
||||
*/
|
||||
|
||||
cobra_state *cobra = device->machine().driver_data<cobra_state>();
|
||||
|
||||
INT16 ldata = (INT16)(data >> 16);
|
||||
INT16 rdata = (INT16)(data);
|
||||
|
||||
cobra->m_sound_dma_buffer_l[cobra->m_sound_dma_ptr] = ldata;
|
||||
cobra->m_sound_dma_buffer_r[cobra->m_sound_dma_ptr] = rdata;
|
||||
cobra->m_sound_dma_ptr++;
|
||||
|
||||
if (cobra->m_sound_dma_ptr >= DMA_SOUND_BUFFER_SIZE)
|
||||
{
|
||||
cobra->m_sound_dma_ptr = 0;
|
||||
|
||||
dmadac_transfer(&cobra->m_dmadac[0], 1, 0, 1, DMA_SOUND_BUFFER_SIZE, cobra->m_sound_dma_buffer_l);
|
||||
dmadac_transfer(&cobra->m_dmadac[1], 1, 0, 1, DMA_SOUND_BUFFER_SIZE, cobra->m_sound_dma_buffer_r);
|
||||
}
|
||||
}
|
||||
|
||||
static void sub_jvs_w(device_t *device, UINT8 data)
|
||||
{
|
||||
cobra_state *cobra = device->machine().driver_data<cobra_state>();
|
||||
cobra_jvs_host *jvs = downcast<cobra_jvs_host *>(device->machine().device("cobra_jvs_host"));
|
||||
|
||||
#if LOG_JVS
|
||||
printf("sub_jvs_w: %02X\n", data);
|
||||
fputc((data >> 0) & 0xff, out);
|
||||
*/
|
||||
|
||||
INT16 ldata = (INT16)(data >> 16);
|
||||
INT16 rdata = (INT16)(data);
|
||||
|
||||
m_sound_dma_buffer_l[m_sound_dma_ptr] = ldata;
|
||||
m_sound_dma_buffer_r[m_sound_dma_ptr] = rdata;
|
||||
m_sound_dma_ptr++;
|
||||
|
||||
if (m_sound_dma_ptr >= DMA_SOUND_BUFFER_SIZE)
|
||||
{
|
||||
m_sound_dma_ptr = 0;
|
||||
|
||||
dmadac_transfer(&m_dmadac[0], 1, 0, 1, DMA_SOUND_BUFFER_SIZE, m_sound_dma_buffer_l);
|
||||
dmadac_transfer(&m_dmadac[1], 1, 0, 1, DMA_SOUND_BUFFER_SIZE, m_sound_dma_buffer_r);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(cobra_state::sub_jvs_w)
|
||||
{
|
||||
cobra_jvs_host *jvs = machine().device<cobra_jvs_host>("cobra_jvs_host");
|
||||
|
||||
#if LOG_JVS
|
||||
printf("sub_jvs_w: %02X\n", data);
|
||||
#endif
|
||||
|
||||
const UINT8 *rec_data;
|
||||
@ -1945,13 +1945,13 @@ static void sub_jvs_w(device_t *device, UINT8 data)
|
||||
}
|
||||
printf("\n");
|
||||
#endif
|
||||
|
||||
for (int i=0; i < rec_size; i++)
|
||||
{
|
||||
cobra->m_subcpu->ppc4xx_spu_receive_byte(rec_data[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (int i=0; i < rec_size; i++)
|
||||
{
|
||||
m_subcpu->ppc4xx_spu_receive_byte(rec_data[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( cobra_sub_map, AS_PROGRAM, 32, cobra_state )
|
||||
AM_RANGE(0x00000000, 0x003fffff) AM_MIRROR(0x80000000) AM_RAM // Main RAM
|
||||
@ -2988,38 +2988,36 @@ WRITE64_MEMBER(cobra_state::gfx_buf_w)
|
||||
// prc_read always expects a value...
|
||||
|
||||
m_gfxfifo_out->push(&space.device(), 0);
|
||||
}
|
||||
}
|
||||
|
||||
static void gfx_cpu_dc_store(device_t *device, UINT32 address)
|
||||
{
|
||||
cobra_state *cobra = device->machine().driver_data<cobra_state>();
|
||||
|
||||
UINT32 addr = address >> 24;
|
||||
if (addr == 0x10 || addr == 0x18 || addr == 0x1e)
|
||||
{
|
||||
UINT64 i = (UINT64)(cobra->m_gfx_fifo_cache_addr) << 32;
|
||||
cobra_fifo *fifo_in = cobra->m_gfxfifo_in;
|
||||
|
||||
UINT32 a = (address / 8) & 0xff;
|
||||
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+0] >> 32) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+0] >> 0) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+1] >> 32) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+1] >> 0) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+2] >> 32) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+2] >> 0) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+3] >> 32) | i);
|
||||
fifo_in->push(device, (UINT32)(cobra->m_gfx_fifo_mem[a+3] >> 0) | i);
|
||||
|
||||
cobra->m_renderer->gfx_fifo_exec();
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("gfx: data cache store at %08X\n", address);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(cobra_state::gfx_cpu_dc_store)
|
||||
{
|
||||
UINT32 addr = offset >> 24;
|
||||
if (addr == 0x10 || addr == 0x18 || addr == 0x1e)
|
||||
{
|
||||
UINT64 i = (UINT64)(m_gfx_fifo_cache_addr) << 32;
|
||||
cobra_fifo *fifo_in = m_gfxfifo_in;
|
||||
|
||||
UINT32 a = (offset / 8) & 0xff;
|
||||
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+0] >> 32) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+0] >> 0) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+1] >> 32) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+1] >> 0) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+2] >> 32) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+2] >> 0) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+3] >> 32) | i);
|
||||
fifo_in->push(&space.device(), (UINT32)(m_gfx_fifo_mem[a+3] >> 0) | i);
|
||||
|
||||
m_renderer->gfx_fifo_exec();
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("gfx: data cache store at %08X\n", offset);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(cobra_state::gfx_debug_state_w)
|
||||
{
|
||||
if (ACCESSING_BITS_40_47)
|
||||
@ -3260,18 +3258,18 @@ DRIVER_INIT_MEMBER(cobra_state, cobra)
|
||||
2048,
|
||||
"S2MFIFO",
|
||||
S2MFIFO_VERBOSE != 0,
|
||||
cobra_fifo::event_delegate(FUNC(cobra_state::s2mfifo_event_callback), this))
|
||||
);
|
||||
|
||||
m_maincpu->ppc_set_dcstore_callback(main_cpu_dc_store);
|
||||
|
||||
m_gfxcpu->ppc_set_dcstore_callback(gfx_cpu_dc_store);
|
||||
|
||||
m_subcpu->ppc4xx_set_dma_write_handler(0, sub_sound_dma_w, 44100);
|
||||
m_subcpu->ppc4xx_spu_set_tx_handler(sub_jvs_w);
|
||||
|
||||
|
||||
m_comram[0] = auto_alloc_array(machine(), UINT32, 0x40000/4);
|
||||
cobra_fifo::event_delegate(FUNC(cobra_state::s2mfifo_event_callback), this))
|
||||
);
|
||||
|
||||
m_maincpu->ppc_set_dcstore_callback(write32_delegate(FUNC(cobra_state::main_cpu_dc_store),this));
|
||||
|
||||
m_gfxcpu->ppc_set_dcstore_callback(write32_delegate(FUNC(cobra_state::gfx_cpu_dc_store), this));
|
||||
|
||||
m_subcpu->ppc4xx_set_dma_write_handler(0, write32_delegate(FUNC(cobra_state::sub_sound_dma_w), this), 44100);
|
||||
m_subcpu->ppc4xx_spu_set_tx_handler(write8_delegate(FUNC(cobra_state::sub_jvs_w), this));
|
||||
|
||||
|
||||
m_comram[0] = auto_alloc_array(machine(), UINT32, 0x40000/4);
|
||||
m_comram[1] = auto_alloc_array(machine(), UINT32, 0x40000/4);
|
||||
|
||||
m_comram_page = 0;
|
||||
|
||||
@ -256,12 +256,13 @@ public:
|
||||
void gcu_exec_display_list(bitmap_ind16 &bitmap, const rectangle &cliprect, int chip, UINT32 address);
|
||||
UINT32 update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int chip);
|
||||
UINT32 GCU_r(int chip, UINT32 offset, UINT32 mem_mask);
|
||||
void GCU_w(int chip, UINT32 offset, UINT32 data, UINT32 mem_mask);
|
||||
void set_ibutton(UINT8 *data);
|
||||
int ibutton_w(UINT8 data);
|
||||
void init_lights(write32_delegate out1, write32_delegate out2, write32_delegate out3);
|
||||
void init_firebeat();
|
||||
void init_keyboard();
|
||||
void GCU_w(int chip, UINT32 offset, UINT32 data, UINT32 mem_mask);
|
||||
void set_ibutton(UINT8 *data);
|
||||
int ibutton_w(UINT8 data);
|
||||
DECLARE_WRITE8_MEMBER(security_w);
|
||||
void init_lights(write32_delegate out1, write32_delegate out2, write32_delegate out3);
|
||||
void init_firebeat();
|
||||
void init_keyboard();
|
||||
DECLARE_WRITE_LINE_MEMBER(sound_irq_callback);
|
||||
DECLARE_WRITE_LINE_MEMBER(midi_uart_ch0_irq_callback);
|
||||
DECLARE_WRITE_LINE_MEMBER(midi_uart_ch1_irq_callback);
|
||||
@ -1946,18 +1947,17 @@ int firebeat_state::ibutton_w(UINT8 data)
|
||||
}
|
||||
}
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
static void security_w(device_t *device, UINT8 data)
|
||||
{
|
||||
firebeat_state *state = device->machine().driver_data<firebeat_state>();
|
||||
int r = state->ibutton_w(data);
|
||||
if (r >= 0)
|
||||
state->m_maincpu->ppc4xx_spu_receive_byte(r);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
return r;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(firebeat_state::security_w)
|
||||
{
|
||||
int r = ibutton_w(data);
|
||||
if (r >= 0)
|
||||
m_maincpu->ppc4xx_spu_receive_byte(r);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
void firebeat_state::init_lights(write32_delegate out1, write32_delegate out2, write32_delegate out3)
|
||||
{
|
||||
@ -1979,13 +1979,13 @@ void firebeat_state::init_firebeat()
|
||||
|
||||
m_extend_board_irq_enable = 0x3f;
|
||||
m_extend_board_irq_active = 0x00;
|
||||
|
||||
m_cur_cab_data = cab_data;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(security_w);
|
||||
|
||||
set_ibutton(rom);
|
||||
|
||||
|
||||
m_cur_cab_data = cab_data;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(write8_delegate(FUNC(firebeat_state::security_w), this));
|
||||
|
||||
set_ibutton(rom);
|
||||
|
||||
init_lights(write32_delegate(), write32_delegate(), write32_delegate());
|
||||
}
|
||||
|
||||
|
||||
@ -402,12 +402,13 @@ public:
|
||||
DECLARE_WRITE32_MEMBER(dsp_dataram1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_0);
|
||||
DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_1);
|
||||
DECLARE_WRITE16_MEMBER(soundtimer_en_w);
|
||||
DECLARE_WRITE16_MEMBER(soundtimer_count_w);
|
||||
ADC12138_IPT_CONVERT_CB(adc12138_input_callback);
|
||||
|
||||
DECLARE_DRIVER_INIT(hornet);
|
||||
DECLARE_DRIVER_INIT(hornet_2board);
|
||||
DECLARE_WRITE16_MEMBER(soundtimer_en_w);
|
||||
DECLARE_WRITE16_MEMBER(soundtimer_count_w);
|
||||
ADC12138_IPT_CONVERT_CB(adc12138_input_callback);
|
||||
DECLARE_WRITE8_MEMBER(jamma_jvs_w);
|
||||
|
||||
DECLARE_DRIVER_INIT(hornet);
|
||||
DECLARE_DRIVER_INIT(hornet_2board);
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
DECLARE_MACHINE_RESET(hornet_2board);
|
||||
@ -1135,22 +1136,21 @@ static MACHINE_CONFIG_DERIVED( sscope2, hornet_2board_v2)
|
||||
MCFG_EEPROM_SERIAL_93C46_ADD("lan_eeprom")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
static void jamma_jvs_w(device_t *device, UINT8 data)
|
||||
{
|
||||
hornet_state *state = device->machine().driver_data<hornet_state>();
|
||||
if (state->m_jvs_sdata_ptr == 0 && data != 0xe0)
|
||||
return;
|
||||
state->m_jvs_sdata[state->m_jvs_sdata_ptr] = data;
|
||||
state->m_jvs_sdata_ptr++;
|
||||
|
||||
if (state->m_jvs_sdata_ptr >= 3 && state->m_jvs_sdata_ptr >= 3 + state->m_jvs_sdata[2])
|
||||
state->jamma_jvs_cmd_exec();
|
||||
}
|
||||
|
||||
int hornet_state::jvs_encode_data(UINT8 *in, int length)
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(hornet_state::jamma_jvs_w)
|
||||
{
|
||||
if (m_jvs_sdata_ptr == 0 && data != 0xe0)
|
||||
return;
|
||||
m_jvs_sdata[m_jvs_sdata_ptr] = data;
|
||||
m_jvs_sdata_ptr++;
|
||||
|
||||
if (m_jvs_sdata_ptr >= 3 && m_jvs_sdata_ptr >= 3 + m_jvs_sdata[2])
|
||||
jamma_jvs_cmd_exec();
|
||||
}
|
||||
|
||||
int hornet_state::jvs_encode_data(UINT8 *in, int length)
|
||||
{
|
||||
int inptr = 0;
|
||||
int sum = 0;
|
||||
@ -1280,22 +1280,22 @@ void hornet_state::jamma_jvs_cmd_exec()
|
||||
|
||||
DRIVER_INIT_MEMBER(hornet_state,hornet)
|
||||
{
|
||||
m_konppc->set_cgboard_texture_bank(0, "bank5", memregion("user5")->base());
|
||||
m_led_reg0 = m_led_reg1 = 0x7f;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(jamma_jvs_w);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(hornet_state,hornet_2board)
|
||||
m_konppc->set_cgboard_texture_bank(0, "bank5", memregion("user5")->base());
|
||||
m_led_reg0 = m_led_reg1 = 0x7f;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(write8_delegate(FUNC(hornet_state::jamma_jvs_w), this));
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(hornet_state,hornet_2board)
|
||||
{
|
||||
m_konppc->set_cgboard_texture_bank(0, "bank5", memregion("user5")->base());
|
||||
m_konppc->set_cgboard_texture_bank(1, "bank6", memregion("user5")->base());
|
||||
m_led_reg0 = m_led_reg1 = 0x7f;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(jamma_jvs_w);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
m_konppc->set_cgboard_texture_bank(1, "bank6", memregion("user5")->base());
|
||||
m_led_reg0 = m_led_reg1 = 0x7f;
|
||||
|
||||
m_maincpu->ppc4xx_spu_set_tx_handler(write8_delegate(FUNC(hornet_state::jamma_jvs_w), this));
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
ROM_START(sscope)
|
||||
ROM_REGION32_BE(0x400000, "user1", 0) /* PowerPC program */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user