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https://github.com/holub/mame
synced 2025-05-11 16:48:52 +03:00
tms99xx/ti99: Change setaddress handling (write operation, including DBIN state) (nw)
This commit is contained in:
parent
24c49b2548
commit
844245bcf2
@ -371,7 +371,7 @@ WRITE_LINE_MEMBER( mainboard8_device::dbin_in )
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m_dbin_level = (line_state)state;
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}
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uint8_t mainboard8_device::setoffset(offs_t offset)
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void mainboard8_device::setaddress(offs_t mode, uint16_t offset)
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{
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LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset);
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@ -410,8 +410,6 @@ uint8_t mainboard8_device::setoffset(offs_t offset)
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// AMIGO is the one to control the READY line to the CPU
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// MOFETTA does not contribute to READY
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m_ready(m_amigo->cpury_out());
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return 0;
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}
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WRITE_LINE_MEMBER( mainboard8_device::reset_console )
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@ -541,7 +541,7 @@ public:
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// Memory space
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uint8_t read(offs_t offset);
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void write(offs_t offset, uint8_t data);
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uint8_t setoffset(offs_t offset);
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void setaddress(offs_t mode, uint16_t address);
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// Memory space for debugger access
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uint8_t debugger_read(offs_t offset);
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@ -427,21 +427,21 @@ void datamux_device::write(offs_t offset, uint16_t data)
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Called when the memory access starts by setting the address bus. From that
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point on, we suspend the CPU until all operations are done.
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*/
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uint8_t datamux_device::setoffset(offs_t offset)
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void datamux_device::setaddress(offs_t mode, uint16_t addr)
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{
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m_addr_buf = offset;
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m_addr_buf = addr;
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m_waitcount = 0;
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LOGMASKED(LOG_ADDRESS, "Set address %04x\n", m_addr_buf);
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if ((m_addr_buf & 0xe000) == 0x0000)
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{
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return 0; // console ROM
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return; // console ROM
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}
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if ((m_addr_buf & 0xfc00) == 0x8000)
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{
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return 0; // console RAM
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return; // console RAM
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}
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// Initialize counter
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@ -468,8 +468,6 @@ uint8_t datamux_device::setoffset(offs_t offset)
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ready_join();
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}
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else m_waitcount = 0;
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return 0;
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}
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/*
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@ -35,7 +35,7 @@ public:
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datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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uint16_t read(offs_t offset);
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void write(offs_t offset, uint16_t data);
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uint8_t setoffset(offs_t offset);
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void setaddress(offs_t mode, uint16_t address);
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DECLARE_WRITE_LINE_MEMBER( clock_in );
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DECLARE_WRITE_LINE_MEMBER( dbin_in );
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@ -465,7 +465,7 @@ void geneve_mapper_device::set_extra_waitstates(bool wait)
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/*
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Read a byte via the data bus. The decoding has already been done in the
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SETOFFSET method, and we re-use the values stored there to quickly
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SETADDRESS method, and we re-use the values stored there to quickly
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access the appropriate component.
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*/
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uint8_t geneve_mapper_device::readm(offs_t offset)
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@ -907,11 +907,11 @@ void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
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This decoding will later be used in the READ/WRITE member functions. Also,
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we initiate wait state creation here.
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*/
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uint8_t geneve_mapper_device::setoffset(offs_t offset)
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void geneve_mapper_device::setaddress(offs_t mode, uint16_t address)
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{
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LOGMASKED(LOG_DETAIL, "setoffset = %04x\n", offset);
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LOGMASKED(LOG_DETAIL, "setaddress = %04x\n", address);
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m_debug_no_ws = false;
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m_decoded.offset = offset;
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m_decoded.offset = address;
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decode_logical(m_read_mode, &m_decoded);
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if (m_decoded.function == MUNDEF)
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@ -928,7 +928,6 @@ uint8_t geneve_mapper_device::setoffset(offs_t offset)
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m_peribox->memen_in(ASSERT_LINE);
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m_peribox->setaddress_dbin(m_decoded.physaddr, m_read_mode);
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}
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return 0;
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}
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/*
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@ -997,7 +996,7 @@ WRITE_LINE_MEMBER( geneve_mapper_device::clock_in )
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}
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/*
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We need the DBIN line for the setoffset operation.
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We need the DBIN line for the setaddress operation.
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*/
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WRITE_LINE_MEMBER( geneve_mapper_device::dbin_in )
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{
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@ -123,7 +123,7 @@ public:
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uint8_t readm(offs_t offset);
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void writem(offs_t offset, uint8_t data);
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uint8_t setoffset(offs_t offset);
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void setaddress(offs_t mode, uint16_t address);
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DECLARE_INPUT_CHANGED_MEMBER( settings_changed );
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@ -56,7 +56,7 @@
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#define DECLARE_READ8Z_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
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/*
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For almost all applications of setoffset, we also need the data bus
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For almost all applications of setaddress, we also need the data bus
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direction. This line is called DBIN on the TI CPUs, but as we do not assume
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that this is a general rule, we use new macros here which contain the
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DBIN setting.
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@ -114,7 +114,7 @@
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#define NOPRG -1
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constexpr int tms99xx_device::AS_SETOFFSET;
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constexpr int tms99xx_device::AS_SETADDRESS;
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/* tms9900 ST register bits. */
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enum
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@ -181,7 +181,7 @@ enum
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tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *tag, int data_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock)
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: cpu_device(mconfig, type, tag, owner, clock),
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m_program_config("program", ENDIANNESS_BIG, data_width, prg_addr_bits),
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m_setoffset_config("setoffset", ENDIANNESS_BIG, data_width, prg_addr_bits),
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m_setaddress_config("setaddress", ENDIANNESS_BIG, prg_addr_bits, prg_addr_bits), // data = address
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m_io_config("cru", ENDIANNESS_LITTLE, 8, cru_addr_bits + 1, 1),
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m_prgspace(nullptr),
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m_cru(nullptr),
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@ -226,7 +226,7 @@ void tms99xx_device::device_start()
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// TODO: Restore state save feature
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resolve_lines();
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m_prgspace = &space(AS_PROGRAM);
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m_sospace = has_space(AS_SETOFFSET) ? &space(AS_SETOFFSET) : nullptr;
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m_setaddr = has_space(AS_SETADDRESS) ? &space(AS_SETADDRESS) : nullptr;
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m_cru = &space(AS_IO);
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// set our instruction counter
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@ -441,10 +441,10 @@ void tms99xx_device::write_workspace_register_debug(int reg, uint16_t data)
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device_memory_interface::space_config_vector tms99xx_device::memory_space_config() const
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{
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if (has_configured_map(AS_SETOFFSET))
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if (has_configured_map(AS_SETADDRESS))
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_SETOFFSET, &m_setoffset_config),
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std::make_pair(AS_SETADDRESS, &m_setaddress_config),
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std::make_pair(AS_IO, &m_io_config)
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};
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else
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@ -1534,8 +1534,8 @@ void tms99xx_device::mem_read()
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if (m_mem_phase==1)
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{
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if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE);
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if (m_sospace)
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m_sospace->read_byte(m_address & m_prgaddr_mask & 0xfffe);
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if (m_setaddr)
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m_setaddr->write_word(ASSERT_LINE, m_address & m_prgaddr_mask & 0xfffe);
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m_check_ready = true;
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m_mem_phase = 2;
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m_pass = 2;
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@ -1562,8 +1562,8 @@ void tms99xx_device::mem_write()
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if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
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// When writing, the data bus is asserted immediately after the address bus
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if (TRACE_ADDRESSBUS) logerror("set address (w) %04x\n", m_address);
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if (m_sospace)
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m_sospace->read_byte(m_address & m_prgaddr_mask & 0xfffe);
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if (m_setaddr)
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m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & 0xfffe);
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if (TRACE_MEM) logerror("mem w %04x <- %04x\n", m_address, m_current_value);
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m_prgspace->write_word(m_address & m_prgaddr_mask & 0xfffe, m_current_value);
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m_check_ready = true;
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@ -43,7 +43,7 @@ static const char opname[][5] =
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class tms99xx_device : public cpu_device
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{
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public:
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static constexpr int AS_SETOFFSET = 4;
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static constexpr int AS_SETADDRESS = 4;
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~tms99xx_device();
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@ -95,10 +95,10 @@ protected:
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void decode(uint16_t inst);
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const address_space_config m_program_config;
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const address_space_config m_setoffset_config;
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const address_space_config m_setaddress_config;
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const address_space_config m_io_config;
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address_space* m_prgspace;
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address_space* m_sospace;
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address_space* m_setaddr;
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address_space* m_cru;
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virtual uint16_t read_workspace_register_debug(int reg);
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@ -201,8 +201,8 @@ void tms9980a_device::mem_read()
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case 1:
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m_pass = 4; // make the CPU visit this method more than once
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if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE);
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if (m_sospace)
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m_sospace->read_byte(m_address & m_prgaddr_mask & ~1);
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if (m_setaddr)
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m_setaddr->write_word(ASSERT_LINE, m_address & m_prgaddr_mask & ~1);
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if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1);
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m_check_ready = true;
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break;
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@ -213,8 +213,8 @@ void tms9980a_device::mem_read()
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m_current_value = (value << 8) & 0xff00;
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break;
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case 3:
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if (m_sospace)
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m_sospace->read_byte((m_address & m_prgaddr_mask) | 1);
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if (m_setaddr)
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m_setaddr->write_word(ASSERT_LINE, (m_address & m_prgaddr_mask) | 1);
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if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1);
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break;
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case 4:
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@ -236,8 +236,8 @@ void tms9980a_device::mem_write()
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case 1:
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m_pass = 4; // make the CPU visit this method once more
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if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
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if (m_sospace)
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m_sospace->read_byte(m_address & m_prgaddr_mask & ~1);
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if (m_setaddr)
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m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & ~1);
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if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1);
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m_prgspace->write_byte(m_address & 0x3ffe & ~1, (m_current_value >> 8)&0xff);
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if (TRACE_MEM) logerror("tms9980a: memory write high byte %04x <- %02x\n", m_address & m_prgaddr_mask & ~1, (m_current_value >> 8)&0xff);
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@ -247,8 +247,8 @@ void tms9980a_device::mem_write()
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// no action here, just wait for READY
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break;
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case 3:
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if (m_sospace)
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m_sospace->read_byte((m_address & m_prgaddr_mask) | 1);
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if (m_setaddr)
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m_setaddr->write_word(CLEAR_LINE, (m_address & m_prgaddr_mask) | 1);
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if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1);
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m_prgspace->write_byte((m_address & m_prgaddr_mask) | 1, m_current_value & 0xff);
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if (TRACE_MEM) logerror("tms9980a: memory write low byte %04x <- %02x\n", (m_address & m_prgaddr_mask) | 1, m_current_value & 0xff);
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@ -151,7 +151,7 @@ enum
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#include "logmacro.h"
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constexpr int tms9995_device::AS_SETOFFSET;
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constexpr int tms9995_device::AS_SETADDRESS;
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/****************************************************************************
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Constructor
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@ -169,10 +169,10 @@ tms9995_device::tms9995_device(const machine_config &mconfig, device_type type,
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PC(0),
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PC_debug(0),
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m_program_config("program", ENDIANNESS_BIG, 8, 16),
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m_setoffset_config("setoffset", ENDIANNESS_BIG, 8, 16),
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m_setaddress_config("setaddress", ENDIANNESS_BIG, 16, 16), // data = address
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m_io_config("cru", ENDIANNESS_LITTLE, 8, 16, 1),
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m_prgspace(nullptr),
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m_sospace(nullptr),
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m_setaddr(nullptr),
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m_cru(nullptr),
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m_external_operation(*this),
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m_iaq_line(*this),
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@ -198,7 +198,7 @@ void tms9995_device::device_start()
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// TODO: Restore save state suport
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m_prgspace = &space(AS_PROGRAM);
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m_sospace = has_space(AS_SETOFFSET) ? &space(AS_SETOFFSET) : nullptr;
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m_setaddr = has_space(AS_SETADDRESS) ? &space(AS_SETADDRESS) : nullptr;
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m_cru = &space(AS_IO);
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// Resolve our external connections
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@ -443,10 +443,10 @@ void tms9995_device::write_workspace_register_debug(int reg, uint16_t data)
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device_memory_interface::space_config_vector tms9995_device::memory_space_config() const
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{
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if (has_configured_map(AS_SETOFFSET))
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if (has_configured_map(AS_SETADDRESS))
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_SETOFFSET, &m_setoffset_config),
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std::make_pair(AS_SETADDRESS, &m_setaddress_config),
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std::make_pair(AS_IO, &m_io_config)
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};
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else
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@ -1856,8 +1856,8 @@ void tms9995_device::mem_read()
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m_check_hold = false;
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LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address & ~1);
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if (m_sospace)
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m_sospace->read_byte(address);
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if (m_setaddr)
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m_setaddr->write_word(ASSERT_LINE, address);
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m_request_auto_wait_state = m_auto_wait;
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pulse_clock(1);
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break;
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@ -1871,8 +1871,8 @@ void tms9995_device::mem_read()
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case 3:
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// Set address + 1 (unless byte command)
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LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1);
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if (m_sospace)
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m_sospace->read_byte(m_address | 1);
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if (m_setaddr)
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m_setaddr->write_word(ASSERT_LINE, m_address | 1);
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m_request_auto_wait_state = m_auto_wait;
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pulse_clock(1);
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break;
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@ -1990,8 +1990,8 @@ void tms9995_device::mem_write()
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m_check_hold = false;
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LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", address);
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if (m_sospace)
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m_sospace->read_byte(address);
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if (m_setaddr)
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m_setaddr->write_word(CLEAR_LINE, address);
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LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", address, (m_current_value >> 8)&0xff);
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m_prgspace->write_byte(address, (m_current_value >> 8)&0xff);
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m_request_auto_wait_state = m_auto_wait;
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@ -2004,8 +2004,8 @@ void tms9995_device::mem_write()
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case 3:
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// Set address + 1 (unless byte command)
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LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1);
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if (m_sospace)
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m_sospace->read_byte(m_address | 1);
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if (m_setaddr)
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m_setaddr->write_word(CLEAR_LINE, m_address | 1);
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LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", m_address | 1, m_current_value & 0xff);
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m_prgspace->write_byte(m_address | 1, m_current_value & 0xff);
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m_request_auto_wait_state = m_auto_wait;
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@ -30,7 +30,7 @@ enum
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class tms9995_device : public cpu_device
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{
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public:
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static constexpr int AS_SETOFFSET = 4;
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static constexpr int AS_SETADDRESS = 4;
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tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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@ -108,10 +108,10 @@ private:
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uint8_t m_onchip_memory[256];
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const address_space_config m_program_config;
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const address_space_config m_setoffset_config;
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const address_space_config m_setaddress_config;
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const address_space_config m_io_config;
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address_space* m_prgspace;
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address_space* m_sospace;
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address_space* m_setaddr;
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address_space* m_cru;
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// Processor states
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@ -279,7 +279,7 @@ private:
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void crumap(address_map &map);
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void memmap(address_map &map);
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void memmap_setoffset(address_map &map);
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void memmap_setaddress(address_map &map);
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};
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/*
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@ -291,9 +291,9 @@ void geneve_state::memmap(address_map &map)
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map(0x0000, 0xffff).rw(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::readm), FUNC(bus::ti99::internal::geneve_mapper_device::writem));
|
||||
}
|
||||
|
||||
void geneve_state::memmap_setoffset(address_map &map)
|
||||
void geneve_state::memmap_setaddress(address_map &map)
|
||||
{
|
||||
map(0x0000, 0xffff).r(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::setoffset));
|
||||
map(0x0000, 0xffff).w(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::setaddress));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -729,7 +729,7 @@ void geneve_state::geneve_common(machine_config &config)
|
||||
TMS9995(config, m_cpu, 12000000);
|
||||
m_cpu->set_addrmap(AS_PROGRAM, &geneve_state::memmap);
|
||||
m_cpu->set_addrmap(AS_IO, &geneve_state::crumap);
|
||||
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &geneve_state::memmap_setoffset);
|
||||
m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &geneve_state::memmap_setaddress);
|
||||
m_cpu->extop_cb().set(FUNC(geneve_state::external_operation));
|
||||
m_cpu->clkout_cb().set(FUNC(geneve_state::clock_out));
|
||||
m_cpu->dbin_cb().set(FUNC(geneve_state::dbin_line));
|
||||
|
@ -167,7 +167,7 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER( notconnected );
|
||||
uint8_t interrupt_level();
|
||||
|
||||
uint8_t setoffset(offs_t offset);
|
||||
void setaddress(offs_t mode, uint16_t address);
|
||||
uint16_t memread(offs_t offset);
|
||||
void memwrite(offs_t offset, uint16_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER( dbin_in );
|
||||
@ -193,7 +193,7 @@ private:
|
||||
|
||||
void crumap(address_map &map);
|
||||
void memmap(address_map &map);
|
||||
void memmap_setoffset(address_map &map);
|
||||
void memmap_setaddress(address_map &map);
|
||||
|
||||
void datamux_clock_in(int clock);
|
||||
|
||||
@ -296,9 +296,9 @@ void ti99_4p_state::memmap(address_map &map)
|
||||
map(0x0000, 0xffff).rw(FUNC(ti99_4p_state::memread), FUNC(ti99_4p_state::memwrite));
|
||||
}
|
||||
|
||||
void ti99_4p_state::memmap_setoffset(address_map &map)
|
||||
void ti99_4p_state::memmap_setaddress(address_map &map)
|
||||
{
|
||||
map(0x0000, 0xffff).r(FUNC(ti99_4p_state::setoffset));
|
||||
map(0x0000, 0xffff).w(FUNC(ti99_4p_state::setaddress));
|
||||
}
|
||||
|
||||
void ti99_4p_state::crumap(address_map &map)
|
||||
@ -431,9 +431,9 @@ int ti99_4p_state::decode_address(int address)
|
||||
Called when the memory access starts by setting the address bus. From that
|
||||
point on, we suspend the CPU until all operations are done.
|
||||
*/
|
||||
uint8_t ti99_4p_state::setoffset(offs_t offset)
|
||||
void ti99_4p_state::setaddress(offs_t mode, uint16_t address)
|
||||
{
|
||||
m_addr_buf = offset;
|
||||
m_addr_buf = address;
|
||||
m_waitcount = 0;
|
||||
|
||||
LOGMASKED(LOG_ADDRESS, "set address %04x\n", m_addr_buf);
|
||||
@ -456,8 +456,6 @@ uint8_t ti99_4p_state::setoffset(offs_t offset)
|
||||
}
|
||||
|
||||
ready_join();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint16_t ti99_4p_state::memread(offs_t offset)
|
||||
@ -1004,7 +1002,7 @@ void ti99_4p_state::ti99_4p_60hz(machine_config& config)
|
||||
TMS9900(config, m_cpu, 3000000);
|
||||
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4p_state::memmap);
|
||||
m_cpu->set_addrmap(AS_IO, &ti99_4p_state::crumap);
|
||||
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4p_state::memmap_setoffset);
|
||||
m_cpu->set_addrmap(tms99xx_device::AS_SETADDRESS, &ti99_4p_state::memmap_setaddress);
|
||||
m_cpu->extop_cb().set(FUNC(ti99_4p_state::external_operation));
|
||||
m_cpu->intlevel_cb().set(FUNC(ti99_4p_state::interrupt_level));
|
||||
m_cpu->clkout_cb().set(FUNC(ti99_4p_state::clock_out));
|
||||
|
@ -164,7 +164,7 @@ private:
|
||||
|
||||
void crumap(address_map &map);
|
||||
void memmap(address_map &map);
|
||||
void memmap_setoffset(address_map &map);
|
||||
void memmap_setaddress(address_map &map);
|
||||
|
||||
void set_keyboard_column(int number, int data);
|
||||
int m_keyboard_column;
|
||||
@ -235,10 +235,10 @@ void ti99_4x_state::memmap(address_map &map)
|
||||
map(0x0000, 0xffff).rw(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::read), FUNC(bus::ti99::internal::datamux_device::write));
|
||||
}
|
||||
|
||||
void ti99_4x_state::memmap_setoffset(address_map &map)
|
||||
void ti99_4x_state::memmap_setaddress(address_map &map)
|
||||
{
|
||||
map.global_mask(0xffff);
|
||||
map(0x0000, 0xffff).r(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::setoffset));
|
||||
map(0x0000, 0xffff).w(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::setaddress));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -847,7 +847,7 @@ void ti99_4x_state::ti99_4_common(machine_config& config)
|
||||
TMS9900(config, m_cpu, 3000000);
|
||||
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap);
|
||||
m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap);
|
||||
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4x_state::memmap_setoffset);
|
||||
m_cpu->set_addrmap(tms99xx_device::AS_SETADDRESS, &ti99_4x_state::memmap_setaddress);
|
||||
m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation));
|
||||
m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level));
|
||||
m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out));
|
||||
|
@ -279,7 +279,7 @@ private:
|
||||
|
||||
void crumap(address_map &map);
|
||||
void memmap(address_map &map);
|
||||
void memmap_setoffset(address_map &map);
|
||||
void memmap_setaddress(address_map &map);
|
||||
|
||||
// Keyboard support
|
||||
void set_keyboard_column(int number, int data);
|
||||
@ -313,9 +313,9 @@ void ti99_8_state::memmap(address_map &map)
|
||||
map(0x0000, 0xffff).rw(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::read), FUNC(bus::ti99::internal::mainboard8_device::write));
|
||||
}
|
||||
|
||||
void ti99_8_state::memmap_setoffset(address_map &map)
|
||||
void ti99_8_state::memmap_setaddress(address_map &map)
|
||||
{
|
||||
map(0x0000, 0xffff).r(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::setoffset));
|
||||
map(0x0000, 0xffff).w(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::setaddress));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -737,7 +737,7 @@ void ti99_8_state::ti99_8(machine_config& config)
|
||||
TMS9995_MP9537(config, m_cpu, XTAL(10'738'635));
|
||||
m_cpu->set_addrmap(AS_PROGRAM, &ti99_8_state::memmap);
|
||||
m_cpu->set_addrmap(AS_IO, &ti99_8_state::crumap);
|
||||
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &ti99_8_state::memmap_setoffset);
|
||||
m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &ti99_8_state::memmap_setaddress);
|
||||
m_cpu->extop_cb().set(FUNC(ti99_8_state::external_operation));
|
||||
m_cpu->clkout_cb().set(FUNC(ti99_8_state::clock_out));
|
||||
m_cpu->dbin_cb().set(FUNC(ti99_8_state::dbin_line));
|
||||
|
Loading…
Reference in New Issue
Block a user