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tms99xx/ti99: Change setaddress handling (write operation, including DBIN state) (nw)

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This commit is contained in:
Michael Zapf 2019-04-01 00:24:38 +02:00
parent 24c49b2548
commit 844245bcf2
16 changed files with 70 additions and 77 deletions
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4
src/devices/bus/ti99/internal/998board.cpp
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@ -371,7 +371,7 @@ WRITE_LINE_MEMBER( mainboard8_device::dbin_in )
m_dbin_level = (line_state)state; m_dbin_level = (line_state)state;
} }
uint8_t mainboard8_device::setoffset(offs_t offset) void mainboard8_device::setaddress(offs_t mode, uint16_t offset)
{ {
LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset); LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset);
@ -410,8 +410,6 @@ uint8_t mainboard8_device::setoffset(offs_t offset)
// AMIGO is the one to control the READY line to the CPU // AMIGO is the one to control the READY line to the CPU
// MOFETTA does not contribute to READY // MOFETTA does not contribute to READY
m_ready(m_amigo->cpury_out()); m_ready(m_amigo->cpury_out());
return 0;
} }
WRITE_LINE_MEMBER( mainboard8_device::reset_console ) WRITE_LINE_MEMBER( mainboard8_device::reset_console )

2
src/devices/bus/ti99/internal/998board.h
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@ -541,7 +541,7 @@ public:
// Memory space // Memory space
uint8_t read(offs_t offset); uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data); void write(offs_t offset, uint8_t data);
uint8_t setoffset(offs_t offset); void setaddress(offs_t mode, uint16_t address);
// Memory space for debugger access // Memory space for debugger access
uint8_t debugger_read(offs_t offset); uint8_t debugger_read(offs_t offset);

10
src/devices/bus/ti99/internal/datamux.cpp
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@ -427,21 +427,21 @@ void datamux_device::write(offs_t offset, uint16_t data)
Called when the memory access starts by setting the address bus. From that Called when the memory access starts by setting the address bus. From that
point on, we suspend the CPU until all operations are done. point on, we suspend the CPU until all operations are done.
*/ */
uint8_t datamux_device::setoffset(offs_t offset) void datamux_device::setaddress(offs_t mode, uint16_t addr)
{ {
m_addr_buf = offset; m_addr_buf = addr;
m_waitcount = 0; m_waitcount = 0;
LOGMASKED(LOG_ADDRESS, "Set address %04x\n", m_addr_buf); LOGMASKED(LOG_ADDRESS, "Set address %04x\n", m_addr_buf);
if ((m_addr_buf & 0xe000) == 0x0000) if ((m_addr_buf & 0xe000) == 0x0000)
{ {
return 0; // console ROM return; // console ROM
} }
if ((m_addr_buf & 0xfc00) == 0x8000) if ((m_addr_buf & 0xfc00) == 0x8000)
{ {
return 0; // console RAM return; // console RAM
} }
// Initialize counter // Initialize counter
@ -468,8 +468,6 @@ uint8_t datamux_device::setoffset(offs_t offset)
ready_join(); ready_join();
} }
else m_waitcount = 0; else m_waitcount = 0;
return 0;
} }
/* /*

2
src/devices/bus/ti99/internal/datamux.h
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@ -35,7 +35,7 @@ public:
datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
uint16_t read(offs_t offset); uint16_t read(offs_t offset);
void write(offs_t offset, uint16_t data); void write(offs_t offset, uint16_t data);
uint8_t setoffset(offs_t offset); void setaddress(offs_t mode, uint16_t address);
DECLARE_WRITE_LINE_MEMBER( clock_in ); DECLARE_WRITE_LINE_MEMBER( clock_in );
DECLARE_WRITE_LINE_MEMBER( dbin_in ); DECLARE_WRITE_LINE_MEMBER( dbin_in );

11
src/devices/bus/ti99/internal/genboard.cpp
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@ -465,7 +465,7 @@ void geneve_mapper_device::set_extra_waitstates(bool wait)
/* /*
Read a byte via the data bus. The decoding has already been done in the Read a byte via the data bus. The decoding has already been done in the
SETOFFSET method, and we re-use the values stored there to quickly SETADDRESS method, and we re-use the values stored there to quickly
access the appropriate component. access the appropriate component.
*/ */
uint8_t geneve_mapper_device::readm(offs_t offset) uint8_t geneve_mapper_device::readm(offs_t offset)
@ -907,11 +907,11 @@ void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
This decoding will later be used in the READ/WRITE member functions. Also, This decoding will later be used in the READ/WRITE member functions. Also,
we initiate wait state creation here. we initiate wait state creation here.
*/ */
uint8_t geneve_mapper_device::setoffset(offs_t offset) void geneve_mapper_device::setaddress(offs_t mode, uint16_t address)
{ {
LOGMASKED(LOG_DETAIL, "setoffset = %04x\n", offset); LOGMASKED(LOG_DETAIL, "setaddress = %04x\n", address);
m_debug_no_ws = false; m_debug_no_ws = false;
m_decoded.offset = offset; m_decoded.offset = address;
decode_logical(m_read_mode, &m_decoded); decode_logical(m_read_mode, &m_decoded);
if (m_decoded.function == MUNDEF) if (m_decoded.function == MUNDEF)
@ -928,7 +928,6 @@ uint8_t geneve_mapper_device::setoffset(offs_t offset)
m_peribox->memen_in(ASSERT_LINE); m_peribox->memen_in(ASSERT_LINE);
m_peribox->setaddress_dbin(m_decoded.physaddr, m_read_mode); m_peribox->setaddress_dbin(m_decoded.physaddr, m_read_mode);
} }
return 0;
} }
/* /*
@ -997,7 +996,7 @@ WRITE_LINE_MEMBER( geneve_mapper_device::clock_in )
} }
/* /*
We need the DBIN line for the setoffset operation. We need the DBIN line for the setaddress operation.
*/ */
WRITE_LINE_MEMBER( geneve_mapper_device::dbin_in ) WRITE_LINE_MEMBER( geneve_mapper_device::dbin_in )
{ {

2
src/devices/bus/ti99/internal/genboard.h
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@ -123,7 +123,7 @@ public:
uint8_t readm(offs_t offset); uint8_t readm(offs_t offset);
void writem(offs_t offset, uint8_t data); void writem(offs_t offset, uint8_t data);
uint8_t setoffset(offs_t offset); void setaddress(offs_t mode, uint16_t address);
DECLARE_INPUT_CHANGED_MEMBER( settings_changed ); DECLARE_INPUT_CHANGED_MEMBER( settings_changed );

2
src/devices/bus/ti99/ti99defs.h
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@ -56,7 +56,7 @@
#define DECLARE_READ8Z_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value) #define DECLARE_READ8Z_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
/* /*
For almost all applications of setoffset, we also need the data bus For almost all applications of setaddress, we also need the data bus
direction. This line is called DBIN on the TI CPUs, but as we do not assume direction. This line is called DBIN on the TI CPUs, but as we do not assume
that this is a general rule, we use new macros here which contain the that this is a general rule, we use new macros here which contain the
DBIN setting. DBIN setting.

18
src/devices/cpu/tms9900/tms9900.cpp
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@ -114,7 +114,7 @@
#define NOPRG -1 #define NOPRG -1
constexpr int tms99xx_device::AS_SETOFFSET; constexpr int tms99xx_device::AS_SETADDRESS;
/* tms9900 ST register bits. */ /* tms9900 ST register bits. */
enum enum
@ -181,7 +181,7 @@ enum
tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *tag, int data_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock) tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *tag, int data_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock)
: cpu_device(mconfig, type, tag, owner, clock), : cpu_device(mconfig, type, tag, owner, clock),
m_program_config("program", ENDIANNESS_BIG, data_width, prg_addr_bits), m_program_config("program", ENDIANNESS_BIG, data_width, prg_addr_bits),
m_setoffset_config("setoffset", ENDIANNESS_BIG, data_width, prg_addr_bits), m_setaddress_config("setaddress", ENDIANNESS_BIG, prg_addr_bits, prg_addr_bits), // data = address
m_io_config("cru", ENDIANNESS_LITTLE, 8, cru_addr_bits + 1, 1), m_io_config("cru", ENDIANNESS_LITTLE, 8, cru_addr_bits + 1, 1),
m_prgspace(nullptr), m_prgspace(nullptr),
m_cru(nullptr), m_cru(nullptr),
@ -226,7 +226,7 @@ void tms99xx_device::device_start()
// TODO: Restore state save feature // TODO: Restore state save feature
resolve_lines(); resolve_lines();
m_prgspace = &space(AS_PROGRAM); m_prgspace = &space(AS_PROGRAM);
m_sospace = has_space(AS_SETOFFSET) ? &space(AS_SETOFFSET) : nullptr; m_setaddr = has_space(AS_SETADDRESS) ? &space(AS_SETADDRESS) : nullptr;
m_cru = &space(AS_IO); m_cru = &space(AS_IO);
// set our instruction counter // set our instruction counter
@ -441,10 +441,10 @@ void tms99xx_device::write_workspace_register_debug(int reg, uint16_t data)
device_memory_interface::space_config_vector tms99xx_device::memory_space_config() const device_memory_interface::space_config_vector tms99xx_device::memory_space_config() const
{ {
if (has_configured_map(AS_SETOFFSET)) if (has_configured_map(AS_SETADDRESS))
return space_config_vector { return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_SETOFFSET, &m_setoffset_config), std::make_pair(AS_SETADDRESS, &m_setaddress_config),
std::make_pair(AS_IO, &m_io_config) std::make_pair(AS_IO, &m_io_config)
}; };
else else
@ -1534,8 +1534,8 @@ void tms99xx_device::mem_read()
if (m_mem_phase==1) if (m_mem_phase==1)
{ {
if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE); if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address & m_prgaddr_mask & 0xfffe); m_setaddr->write_word(ASSERT_LINE, m_address & m_prgaddr_mask & 0xfffe);
m_check_ready = true; m_check_ready = true;
m_mem_phase = 2; m_mem_phase = 2;
m_pass = 2; m_pass = 2;
@ -1562,8 +1562,8 @@ void tms99xx_device::mem_write()
if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
// When writing, the data bus is asserted immediately after the address bus // When writing, the data bus is asserted immediately after the address bus
if (TRACE_ADDRESSBUS) logerror("set address (w) %04x\n", m_address); if (TRACE_ADDRESSBUS) logerror("set address (w) %04x\n", m_address);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address & m_prgaddr_mask & 0xfffe); m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & 0xfffe);
if (TRACE_MEM) logerror("mem w %04x <- %04x\n", m_address, m_current_value); if (TRACE_MEM) logerror("mem w %04x <- %04x\n", m_address, m_current_value);
m_prgspace->write_word(m_address & m_prgaddr_mask & 0xfffe, m_current_value); m_prgspace->write_word(m_address & m_prgaddr_mask & 0xfffe, m_current_value);
m_check_ready = true; m_check_ready = true;

6
src/devices/cpu/tms9900/tms9900.h
View File

@ -43,7 +43,7 @@ static const char opname[][5] =
class tms99xx_device : public cpu_device class tms99xx_device : public cpu_device
{ {
public: public:
static constexpr int AS_SETOFFSET = 4; static constexpr int AS_SETADDRESS = 4;
~tms99xx_device(); ~tms99xx_device();
@ -95,10 +95,10 @@ protected:
void decode(uint16_t inst); void decode(uint16_t inst);
const address_space_config m_program_config; const address_space_config m_program_config;
const address_space_config m_setoffset_config; const address_space_config m_setaddress_config;
const address_space_config m_io_config; const address_space_config m_io_config;
address_space* m_prgspace; address_space* m_prgspace;
address_space* m_sospace; address_space* m_setaddr;
address_space* m_cru; address_space* m_cru;
virtual uint16_t read_workspace_register_debug(int reg); virtual uint16_t read_workspace_register_debug(int reg);

16
src/devices/cpu/tms9900/tms9980a.cpp
View File

@ -201,8 +201,8 @@ void tms9980a_device::mem_read()
case 1: case 1:
m_pass = 4; // make the CPU visit this method more than once m_pass = 4; // make the CPU visit this method more than once
if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE); if (!m_dbin_line.isnull()) m_dbin_line(ASSERT_LINE);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address & m_prgaddr_mask & ~1); m_setaddr->write_word(ASSERT_LINE, m_address & m_prgaddr_mask & ~1);
if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1); if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1);
m_check_ready = true; m_check_ready = true;
break; break;
@ -213,8 +213,8 @@ void tms9980a_device::mem_read()
m_current_value = (value << 8) & 0xff00; m_current_value = (value << 8) & 0xff00;
break; break;
case 3: case 3:
if (m_sospace) if (m_setaddr)
m_sospace->read_byte((m_address & m_prgaddr_mask) | 1); m_setaddr->write_word(ASSERT_LINE, (m_address & m_prgaddr_mask) | 1);
if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1); if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1);
break; break;
case 4: case 4:
@ -236,8 +236,8 @@ void tms9980a_device::mem_write()
case 1: case 1:
m_pass = 4; // make the CPU visit this method once more m_pass = 4; // make the CPU visit this method once more
if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE); if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address & m_prgaddr_mask & ~1); m_setaddr->write_word(CLEAR_LINE, m_address & m_prgaddr_mask & ~1);
if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1); if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", m_address & m_prgaddr_mask & ~1);
m_prgspace->write_byte(m_address & 0x3ffe & ~1, (m_current_value >> 8)&0xff); m_prgspace->write_byte(m_address & 0x3ffe & ~1, (m_current_value >> 8)&0xff);
if (TRACE_MEM) logerror("tms9980a: memory write high byte %04x <- %02x\n", m_address & m_prgaddr_mask & ~1, (m_current_value >> 8)&0xff); if (TRACE_MEM) logerror("tms9980a: memory write high byte %04x <- %02x\n", m_address & m_prgaddr_mask & ~1, (m_current_value >> 8)&0xff);
@ -247,8 +247,8 @@ void tms9980a_device::mem_write()
// no action here, just wait for READY // no action here, just wait for READY
break; break;
case 3: case 3:
if (m_sospace) if (m_setaddr)
m_sospace->read_byte((m_address & m_prgaddr_mask) | 1); m_setaddr->write_word(CLEAR_LINE, (m_address & m_prgaddr_mask) | 1);
if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1); if (TRACE_ADDRESSBUS) logerror("tms9980a: set address bus %04x\n", (m_address & m_prgaddr_mask) | 1);
m_prgspace->write_byte((m_address & m_prgaddr_mask) | 1, m_current_value & 0xff); m_prgspace->write_byte((m_address & m_prgaddr_mask) | 1, m_current_value & 0xff);
if (TRACE_MEM) logerror("tms9980a: memory write low byte %04x <- %02x\n", (m_address & m_prgaddr_mask) | 1, m_current_value & 0xff); if (TRACE_MEM) logerror("tms9980a: memory write low byte %04x <- %02x\n", (m_address & m_prgaddr_mask) | 1, m_current_value & 0xff);

28
src/devices/cpu/tms9900/tms9995.cpp
View File

@ -151,7 +151,7 @@ enum
#include "logmacro.h" #include "logmacro.h"
constexpr int tms9995_device::AS_SETOFFSET; constexpr int tms9995_device::AS_SETADDRESS;
/**************************************************************************** /****************************************************************************
Constructor Constructor
@ -169,10 +169,10 @@ tms9995_device::tms9995_device(const machine_config &mconfig, device_type type,
PC(0), PC(0),
PC_debug(0), PC_debug(0),
m_program_config("program", ENDIANNESS_BIG, 8, 16), m_program_config("program", ENDIANNESS_BIG, 8, 16),
m_setoffset_config("setoffset", ENDIANNESS_BIG, 8, 16), m_setaddress_config("setaddress", ENDIANNESS_BIG, 16, 16), // data = address
m_io_config("cru", ENDIANNESS_LITTLE, 8, 16, 1), m_io_config("cru", ENDIANNESS_LITTLE, 8, 16, 1),
m_prgspace(nullptr), m_prgspace(nullptr),
m_sospace(nullptr), m_setaddr(nullptr),
m_cru(nullptr), m_cru(nullptr),
m_external_operation(*this), m_external_operation(*this),
m_iaq_line(*this), m_iaq_line(*this),
@ -198,7 +198,7 @@ void tms9995_device::device_start()
// TODO: Restore save state suport // TODO: Restore save state suport
m_prgspace = &space(AS_PROGRAM); m_prgspace = &space(AS_PROGRAM);
m_sospace = has_space(AS_SETOFFSET) ? &space(AS_SETOFFSET) : nullptr; m_setaddr = has_space(AS_SETADDRESS) ? &space(AS_SETADDRESS) : nullptr;
m_cru = &space(AS_IO); m_cru = &space(AS_IO);
// Resolve our external connections // Resolve our external connections
@ -443,10 +443,10 @@ void tms9995_device::write_workspace_register_debug(int reg, uint16_t data)
device_memory_interface::space_config_vector tms9995_device::memory_space_config() const device_memory_interface::space_config_vector tms9995_device::memory_space_config() const
{ {
if (has_configured_map(AS_SETOFFSET)) if (has_configured_map(AS_SETADDRESS))
return space_config_vector { return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_SETOFFSET, &m_setoffset_config), std::make_pair(AS_SETADDRESS, &m_setaddress_config),
std::make_pair(AS_IO, &m_io_config) std::make_pair(AS_IO, &m_io_config)
}; };
else else
@ -1856,8 +1856,8 @@ void tms9995_device::mem_read()
m_check_hold = false; m_check_hold = false;
LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address & ~1); LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address & ~1);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(address); m_setaddr->write_word(ASSERT_LINE, address);
m_request_auto_wait_state = m_auto_wait; m_request_auto_wait_state = m_auto_wait;
pulse_clock(1); pulse_clock(1);
break; break;
@ -1871,8 +1871,8 @@ void tms9995_device::mem_read()
case 3: case 3:
// Set address + 1 (unless byte command) // Set address + 1 (unless byte command)
LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1); LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address | 1); m_setaddr->write_word(ASSERT_LINE, m_address | 1);
m_request_auto_wait_state = m_auto_wait; m_request_auto_wait_state = m_auto_wait;
pulse_clock(1); pulse_clock(1);
break; break;
@ -1990,8 +1990,8 @@ void tms9995_device::mem_write()
m_check_hold = false; m_check_hold = false;
LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", address); LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", address);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(address); m_setaddr->write_word(CLEAR_LINE, address);
LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", address, (m_current_value >> 8)&0xff); LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", address, (m_current_value >> 8)&0xff);
m_prgspace->write_byte(address, (m_current_value >> 8)&0xff); m_prgspace->write_byte(address, (m_current_value >> 8)&0xff);
m_request_auto_wait_state = m_auto_wait; m_request_auto_wait_state = m_auto_wait;
@ -2004,8 +2004,8 @@ void tms9995_device::mem_write()
case 3: case 3:
// Set address + 1 (unless byte command) // Set address + 1 (unless byte command)
LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1); LOGMASKED(LOG_ADDRESSBUS, "set address bus %04x\n", m_address | 1);
if (m_sospace) if (m_setaddr)
m_sospace->read_byte(m_address | 1); m_setaddr->write_word(CLEAR_LINE, m_address | 1);
LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", m_address | 1, m_current_value & 0xff); LOGMASKED(LOG_MEM, "memory write byte %04x <- %02x\n", m_address | 1, m_current_value & 0xff);
m_prgspace->write_byte(m_address | 1, m_current_value & 0xff); m_prgspace->write_byte(m_address | 1, m_current_value & 0xff);
m_request_auto_wait_state = m_auto_wait; m_request_auto_wait_state = m_auto_wait;

6
src/devices/cpu/tms9900/tms9995.h
View File

@ -30,7 +30,7 @@ enum
class tms9995_device : public cpu_device class tms9995_device : public cpu_device
{ {
public: public:
static constexpr int AS_SETOFFSET = 4; static constexpr int AS_SETADDRESS = 4;
tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -108,10 +108,10 @@ private:
uint8_t m_onchip_memory[256]; uint8_t m_onchip_memory[256];
const address_space_config m_program_config; const address_space_config m_program_config;
const address_space_config m_setoffset_config; const address_space_config m_setaddress_config;
const address_space_config m_io_config; const address_space_config m_io_config;
address_space* m_prgspace; address_space* m_prgspace;
address_space* m_sospace; address_space* m_setaddr;
address_space* m_cru; address_space* m_cru;
// Processor states // Processor states

8
src/mame/drivers/geneve.cpp
View File

@ -279,7 +279,7 @@ private:
void crumap(address_map &map); void crumap(address_map &map);
void memmap(address_map &map); void memmap(address_map &map);
void memmap_setoffset(address_map &map); void memmap_setaddress(address_map &map);
}; };
/* /*
@ -291,9 +291,9 @@ void geneve_state::memmap(address_map &map)
map(0x0000, 0xffff).rw(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::readm), FUNC(bus::ti99::internal::geneve_mapper_device::writem)); map(0x0000, 0xffff).rw(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::readm), FUNC(bus::ti99::internal::geneve_mapper_device::writem));
} }
void geneve_state::memmap_setoffset(address_map &map) void geneve_state::memmap_setaddress(address_map &map)
{ {
map(0x0000, 0xffff).r(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::setoffset)); map(0x0000, 0xffff).w(GENEVE_MAPPER_TAG, FUNC(bus::ti99::internal::geneve_mapper_device::setaddress));
} }
/* /*
@ -729,7 +729,7 @@ void geneve_state::geneve_common(machine_config &config)
TMS9995(config, m_cpu, 12000000); TMS9995(config, m_cpu, 12000000);
m_cpu->set_addrmap(AS_PROGRAM, &geneve_state::memmap); m_cpu->set_addrmap(AS_PROGRAM, &geneve_state::memmap);
m_cpu->set_addrmap(AS_IO, &geneve_state::crumap); m_cpu->set_addrmap(AS_IO, &geneve_state::crumap);
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &geneve_state::memmap_setoffset); m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &geneve_state::memmap_setaddress);
m_cpu->extop_cb().set(FUNC(geneve_state::external_operation)); m_cpu->extop_cb().set(FUNC(geneve_state::external_operation));
m_cpu->clkout_cb().set(FUNC(geneve_state::clock_out)); m_cpu->clkout_cb().set(FUNC(geneve_state::clock_out));
m_cpu->dbin_cb().set(FUNC(geneve_state::dbin_line)); m_cpu->dbin_cb().set(FUNC(geneve_state::dbin_line));

16
src/mame/drivers/ti99_4p.cpp
View File

@ -167,7 +167,7 @@ private:
DECLARE_WRITE_LINE_MEMBER( notconnected ); DECLARE_WRITE_LINE_MEMBER( notconnected );
uint8_t interrupt_level(); uint8_t interrupt_level();
uint8_t setoffset(offs_t offset); void setaddress(offs_t mode, uint16_t address);
uint16_t memread(offs_t offset); uint16_t memread(offs_t offset);
void memwrite(offs_t offset, uint16_t data); void memwrite(offs_t offset, uint16_t data);
DECLARE_WRITE_LINE_MEMBER( dbin_in ); DECLARE_WRITE_LINE_MEMBER( dbin_in );
@ -193,7 +193,7 @@ private:
void crumap(address_map &map); void crumap(address_map &map);
void memmap(address_map &map); void memmap(address_map &map);
void memmap_setoffset(address_map &map); void memmap_setaddress(address_map &map);
void datamux_clock_in(int clock); void datamux_clock_in(int clock);
@ -296,9 +296,9 @@ void ti99_4p_state::memmap(address_map &map)
map(0x0000, 0xffff).rw(FUNC(ti99_4p_state::memread), FUNC(ti99_4p_state::memwrite)); map(0x0000, 0xffff).rw(FUNC(ti99_4p_state::memread), FUNC(ti99_4p_state::memwrite));
} }
void ti99_4p_state::memmap_setoffset(address_map &map) void ti99_4p_state::memmap_setaddress(address_map &map)
{ {
map(0x0000, 0xffff).r(FUNC(ti99_4p_state::setoffset)); map(0x0000, 0xffff).w(FUNC(ti99_4p_state::setaddress));
} }
void ti99_4p_state::crumap(address_map &map) void ti99_4p_state::crumap(address_map &map)
@ -431,9 +431,9 @@ int ti99_4p_state::decode_address(int address)
Called when the memory access starts by setting the address bus. From that Called when the memory access starts by setting the address bus. From that
point on, we suspend the CPU until all operations are done. point on, we suspend the CPU until all operations are done.
*/ */
uint8_t ti99_4p_state::setoffset(offs_t offset) void ti99_4p_state::setaddress(offs_t mode, uint16_t address)
{ {
m_addr_buf = offset; m_addr_buf = address;
m_waitcount = 0; m_waitcount = 0;
LOGMASKED(LOG_ADDRESS, "set address %04x\n", m_addr_buf); LOGMASKED(LOG_ADDRESS, "set address %04x\n", m_addr_buf);
@ -456,8 +456,6 @@ uint8_t ti99_4p_state::setoffset(offs_t offset)
} }
ready_join(); ready_join();
return 0;
} }
uint16_t ti99_4p_state::memread(offs_t offset) uint16_t ti99_4p_state::memread(offs_t offset)
@ -1004,7 +1002,7 @@ void ti99_4p_state::ti99_4p_60hz(machine_config& config)
TMS9900(config, m_cpu, 3000000); TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4p_state::memmap); m_cpu->set_addrmap(AS_PROGRAM, &ti99_4p_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4p_state::crumap); m_cpu->set_addrmap(AS_IO, &ti99_4p_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4p_state::memmap_setoffset); m_cpu->set_addrmap(tms99xx_device::AS_SETADDRESS, &ti99_4p_state::memmap_setaddress);
m_cpu->extop_cb().set(FUNC(ti99_4p_state::external_operation)); m_cpu->extop_cb().set(FUNC(ti99_4p_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4p_state::interrupt_level)); m_cpu->intlevel_cb().set(FUNC(ti99_4p_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4p_state::clock_out)); m_cpu->clkout_cb().set(FUNC(ti99_4p_state::clock_out));

8
src/mame/drivers/ti99_4x.cpp
View File

@ -164,7 +164,7 @@ private:
void crumap(address_map &map); void crumap(address_map &map);
void memmap(address_map &map); void memmap(address_map &map);
void memmap_setoffset(address_map &map); void memmap_setaddress(address_map &map);
void set_keyboard_column(int number, int data); void set_keyboard_column(int number, int data);
int m_keyboard_column; int m_keyboard_column;
@ -235,10 +235,10 @@ void ti99_4x_state::memmap(address_map &map)
map(0x0000, 0xffff).rw(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::read), FUNC(bus::ti99::internal::datamux_device::write)); map(0x0000, 0xffff).rw(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::read), FUNC(bus::ti99::internal::datamux_device::write));
} }
void ti99_4x_state::memmap_setoffset(address_map &map) void ti99_4x_state::memmap_setaddress(address_map &map)
{ {
map.global_mask(0xffff); map.global_mask(0xffff);
map(0x0000, 0xffff).r(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::setoffset)); map(0x0000, 0xffff).w(TI99_DATAMUX_TAG, FUNC(bus::ti99::internal::datamux_device::setaddress));
} }
/* /*
@ -847,7 +847,7 @@ void ti99_4x_state::ti99_4_common(machine_config& config)
TMS9900(config, m_cpu, 3000000); TMS9900(config, m_cpu, 3000000);
m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap); m_cpu->set_addrmap(AS_PROGRAM, &ti99_4x_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap); m_cpu->set_addrmap(AS_IO, &ti99_4x_state::crumap);
m_cpu->set_addrmap(tms99xx_device::AS_SETOFFSET, &ti99_4x_state::memmap_setoffset); m_cpu->set_addrmap(tms99xx_device::AS_SETADDRESS, &ti99_4x_state::memmap_setaddress);
m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation)); m_cpu->extop_cb().set(FUNC(ti99_4x_state::external_operation));
m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level)); m_cpu->intlevel_cb().set(FUNC(ti99_4x_state::interrupt_level));
m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out)); m_cpu->clkout_cb().set(FUNC(ti99_4x_state::clock_out));

8
src/mame/drivers/ti99_8.cpp
View File

@ -279,7 +279,7 @@ private:
void crumap(address_map &map); void crumap(address_map &map);
void memmap(address_map &map); void memmap(address_map &map);
void memmap_setoffset(address_map &map); void memmap_setaddress(address_map &map);
// Keyboard support // Keyboard support
void set_keyboard_column(int number, int data); void set_keyboard_column(int number, int data);
@ -313,9 +313,9 @@ void ti99_8_state::memmap(address_map &map)
map(0x0000, 0xffff).rw(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::read), FUNC(bus::ti99::internal::mainboard8_device::write)); map(0x0000, 0xffff).rw(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::read), FUNC(bus::ti99::internal::mainboard8_device::write));
} }
void ti99_8_state::memmap_setoffset(address_map &map) void ti99_8_state::memmap_setaddress(address_map &map)
{ {
map(0x0000, 0xffff).r(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::setoffset)); map(0x0000, 0xffff).w(TI998_MAINBOARD_TAG, FUNC(bus::ti99::internal::mainboard8_device::setaddress));
} }
/* /*
@ -737,7 +737,7 @@ void ti99_8_state::ti99_8(machine_config& config)
TMS9995_MP9537(config, m_cpu, XTAL(10'738'635)); TMS9995_MP9537(config, m_cpu, XTAL(10'738'635));
m_cpu->set_addrmap(AS_PROGRAM, &ti99_8_state::memmap); m_cpu->set_addrmap(AS_PROGRAM, &ti99_8_state::memmap);
m_cpu->set_addrmap(AS_IO, &ti99_8_state::crumap); m_cpu->set_addrmap(AS_IO, &ti99_8_state::crumap);
m_cpu->set_addrmap(tms9995_device::AS_SETOFFSET, &ti99_8_state::memmap_setoffset); m_cpu->set_addrmap(tms9995_device::AS_SETADDRESS, &ti99_8_state::memmap_setaddress);
m_cpu->extop_cb().set(FUNC(ti99_8_state::external_operation)); m_cpu->extop_cb().set(FUNC(ti99_8_state::external_operation));
m_cpu->clkout_cb().set(FUNC(ti99_8_state::clock_out)); m_cpu->clkout_cb().set(FUNC(ti99_8_state::clock_out));
m_cpu->dbin_cb().set(FUNC(ti99_8_state::dbin_line)); m_cpu->dbin_cb().set(FUNC(ti99_8_state::dbin_line));