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dp83932c: refactored, still a skeleton/wip (nw)

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This commit is contained in:
Patrick Mackinlay 2019-01-22 20:03:26 +07:00
parent 4ce894b05f
commit 84b57f9658
3 changed files with 153 additions and 109 deletions
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73
src/devices/machine/dp83932c.cpp
View File

@ -20,42 +20,32 @@
#define VERBOSE 0 #define VERBOSE 0
#include "logmacro.h" #include "logmacro.h"
DEFINE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device, "dp83932c_be", "National Semiconductor DP83932C SONIC (big)") DEFINE_DEVICE_TYPE(DP83932C, dp83932c_device, "dp83932c", "National Semiconductor DP83932C SONIC")
DEFINE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device, "dp83932c_le", "National Semiconductor DP83932C SONIC (little)")
dp83932c_device::dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian) dp83932c_device::dp83932c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock) : device_t(mconfig, DP83932C, tag, owner, clock)
, device_memory_interface(mconfig, *this)
, device_network_interface(mconfig, *this, 10.0f) , device_network_interface(mconfig, *this, 10.0f)
, m_space_config("shared", endian, 32, 32) , m_ram(*this, finder_base::DUMMY_TAG)
, m_out_int(*this) , m_out_int(*this)
{ {
} }
dp83932c_be_device::dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: dp83932c_device(mconfig, DP83932C_BE, tag, owner, clock, ENDIANNESS_BIG)
{
}
dp83932c_le_device::dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: dp83932c_device(mconfig, DP83932C_LE, tag, owner, clock, ENDIANNESS_LITTLE)
{
}
void dp83932c_device::map(address_map &map) void dp83932c_device::map(address_map &map)
{ {
/* // datasheet uses unshifted register addresses
int const shift = 1;
// command and status registers // command and status registers
map(0x00, 0x03).rw(FUNC(dp83932c_device::cr_r), FUNC(dp83932c_device::cr_w)); map(0x00 << shift, (0x00 << shift) | 0x01).rw(FUNC(dp83932c_device::cr_r), FUNC(dp83932c_device::cr_w));
map(0x04, 0x07).rw(FUNC(dp83932c_device::dcr_r), FUNC(dp83932c_device::dcr_w)); //map(0x01 << shift, (0x01 << shift) | 0x01).rw(FUNC(dp83932c_device::dcr_r), FUNC(dp83932c_device::dcr_w));
map(0x08, 0x0b).rw(FUNC(dp83932c_device::rcr_r), FUNC(dp83932c_device::rcr_w)); //map(0x02 << shift, (0x02 << shift) | 0x01).rw(FUNC(dp83932c_device::rcr_r), FUNC(dp83932c_device::rcr_w));
map(0x0c, 0x0f).rw(FUNC(dp83932c_device::tcr_r), FUNC(dp83932c_device::tcr_w)); map(0x03 << shift, (0x03 << shift) | 0x01).rw(FUNC(dp83932c_device::tcr_r), FUNC(dp83932c_device::tcr_w));
map(0x10, 0x13).rw(FUNC(dp83932c_device::imr_r), FUNC(dp83932c_device::imr_w)); //map(0x04 << shift, (0x04 << shift) | 0x01).rw(FUNC(dp83932c_device::imr_r), FUNC(dp83932c_device::imr_w));
map(0x14, 0x17).rw(FUNC(dp83932c_device::isr_r), FUNC(dp83932c_device::isr_w)); map(0x05 << shift, (0x05 << shift) | 0x01).rw(FUNC(dp83932c_device::isr_r), FUNC(dp83932c_device::isr_w));
// transmit registers // transmit registers
map(0x18, 0x1b).rw(FUNC(dp83932c_device::utda_r), FUNC(dp83932c_device::utda_w)); map(0x06 << shift, (0x06 << shift) | 0x01).rw(FUNC(dp83932c_device::utda_r), FUNC(dp83932c_device::utda_w));
map(0x1c, 0x1f).rw(FUNC(dp83932c_device::ctda_r), FUNC(dp83932c_device::ctda_w)); //map(0x07 << shift, (0x07 << shift) | 0x01).rw(FUNC(dp83932c_device::ctda_r), FUNC(dp83932c_device::ctda_w));
// tps // tps
// tfc // tfc
@ -64,8 +54,8 @@ void dp83932c_device::map(address_map &map)
// tfs // tfs
// receive registers // receive registers
map(0x34, 0x37).rw(FUNC(dp83932c_device::urda_r), FUNC(dp83932c_device::urda_w)); //map(0x0d << shift, (0x0d << shift) | 0x01).rw(FUNC(dp83932c_device::urda_r), FUNC(dp83932c_device::urda_w));
map(0x38, 0x3b).rw(FUNC(dp83932c_device::crda_r), FUNC(dp83932c_device::crda_w)); map(0x0e << shift, (0x0e << shift) | 0x01).rw(FUNC(dp83932c_device::crda_r), FUNC(dp83932c_device::crda_w));
// crba0 // crba0
// crba1 // crba1
@ -75,8 +65,8 @@ void dp83932c_device::map(address_map &map)
// urra // urra
// rsa // rsa
// rea // rea
// rrp map(0x17 << shift, (0x17 << shift) | 0x01).rw(FUNC(dp83932c_device::rrp_r), FUNC(dp83932c_device::rrp_w));
// rwp map(0x18 << shift, (0x18 << shift) | 0x01).rw(FUNC(dp83932c_device::rwp_r), FUNC(dp83932c_device::rwp_w));
// trba0 // trba0
// trba1 // trba1
// tbwc0 // tbwc0
@ -89,43 +79,40 @@ void dp83932c_device::map(address_map &map)
// cap2 // cap2
// cap1 // cap1
// cap0 // cap0
// ce map(0x25 << shift, (0x25 << shift) | 0x01).rw(FUNC(dp83932c_device::ce_r), FUNC(dp83932c_device::ce_w));
// cdp // cdp
// cdc // cdc
// sr // sr
// wt0 map(0x29 << shift, (0x29 << shift) | 0x01).rw(FUNC(dp83932c_device::wt0_r), FUNC(dp83932c_device::wt0_w));
// wt1 map(0x2a << shift, (0x2a << shift) | 0x01).rw(FUNC(dp83932c_device::wt1_r), FUNC(dp83932c_device::wt1_w));
// rsc map(0x2b << shift, (0x2b << shift) | 0x01).rw(FUNC(dp83932c_device::rsc_r), FUNC(dp83932c_device::rsc_w));
// crct // crct
// faet map(0x2d << shift, (0x2d << shift) | 0x01).rw(FUNC(dp83932c_device::faet_r), FUNC(dp83932c_device::faet_w));
// mpt // mpt
// mdt // mdt
// 30-3e internal use registers // 30-3e internal use registers
*/ // dcr2
} }
void dp83932c_device::device_start() void dp83932c_device::device_start()
{ {
m_space = &space(0);
m_out_int.resolve(); m_out_int.resolve();
} }
void dp83932c_device::device_reset() void dp83932c_device::device_reset()
{ {
m_cr = RST | STP | RXDIS;
m_tcr = NCRS | PTX;
m_isr = 0;
m_ce = 0;
m_rsc = 0;
} }
void dp83932c_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) void dp83932c_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{ {
} }
device_memory_interface::space_config_vector dp83932c_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(0, &m_space_config)
};
}
void dp83932c_device::send_complete_cb(int result) void dp83932c_device::send_complete_cb(int result)
{ {
} }

113
src/devices/machine/dp83932c.h
View File

@ -6,54 +6,113 @@
#pragma once #pragma once
class dp83932c_device : #include "machine/ram.h"
public device_t,
public device_memory_interface, class dp83932c_device
public device_network_interface : public device_t
, public device_network_interface
{ {
public: public:
// callback configuration dp83932c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static constexpr feature_type imperfect_features() { return feature::LAN; }
// configuration
template <typename T> void set_ram(T &&tag) { m_ram.set_tag(std::forward<T>(tag)); }
auto out_int_cb() { return m_out_int.bind(); } auto out_int_cb() { return m_out_int.bind(); }
void map(address_map &map); void map(address_map &map);
protected: protected:
dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian);
// device_t overrides // device_t overrides
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override; virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
// device_network_interface overrides // device_network_interface overrides
virtual void send_complete_cb(int result) override; virtual void send_complete_cb(int result) override;
virtual int recv_start_cb(u8 *buf, int length) override; virtual int recv_start_cb(u8 *buf, int length) override;
virtual void recv_complete_cb(int result) override; virtual void recv_complete_cb(int result) override;
enum cr_mask : u16
{
HTX = 0x0001, // halt transmission
TXP = 0x0002, // transmit packets
RXDIS = 0x0004, // receiver disable
RXEN = 0x0008, // receiver enable
STP = 0x0010, // stop timer
ST = 0x0020, // start timer
RST = 0x0080, // software reset
RRRA = 0x0100, // read rra
LCAM = 0x0200, // load cam
CR_WMASK = 0x03bf
};
enum tcr_mask : u16
{
PTX = 0x0001, // packet transmitted ok
BCM = 0x0002, // byte count mismatch
FU = 0x0004, // fifo underrun
PMB = 0x0008, // packet monitored bad
OWC = 0x0020, // out of window collision
EXC = 0x0040, // excessive collisions
CRSL = 0x0080, // crs lost
NCRS = 0x0100, // no crs
DEF = 0x0200, // deferred transmission
EXD = 0x0400, // excessive deferral
EXDIS = 0x1000, // disable excessive deferral timer
CRCI = 0x2000, // crc inhibit
POWC = 0x4000, // programmed out of window collision timer
PINT = 0x8000, // programmable interrupt
TCR_WMASK = 0xf000
};
u16 cr_r() { return m_cr; }
u16 tcr_r() { return m_tcr; }
u16 utda_r() { return m_utda; }
u16 crda_r() { return m_crda; }
u16 rrp_r() { return m_rrp; }
u16 rwp_r() { return m_rwp; }
u16 isr_r() { return m_isr; }
u16 ce_r() { return m_ce; }
u16 wt0_r() { return m_wt0; }
u16 wt1_r() { return m_wt1; }
u16 rsc_r() { return m_rsc; }
u16 faet_r() { return m_faet; }
void cr_w(u16 data) { m_cr = (data & CR_WMASK) | (m_cr & ~CR_WMASK); }
void tcr_w(u16 data) { m_tcr = (data & TCR_WMASK) | (m_tcr & ~TCR_WMASK); }
void utda_w(u16 data) { m_utda = data; }
void crda_w(u16 data) { m_crda = data; }
void rrp_w(u16 data) { m_rrp = data; }
void rwp_w(u16 data) { m_rwp = data; }
void isr_w(u16 data) { m_isr = data; }
void ce_w(u16 data) { m_ce = data; }
void wt0_w(u16 data) { m_wt0 = data; }
void wt1_w(u16 data) { m_wt1 = data; }
void rsc_w(u16 data) { m_rsc = data; }
void faet_w(u16 data) { m_faet = ~data; }
private: private:
// device_memory_interface members required_device<ram_device> m_ram;
const address_space_config m_space_config;
address_space *m_space;
devcb_write_line m_out_int; devcb_write_line m_out_int;
u16 m_cr;
u16 m_tcr;
u16 m_utda;
u16 m_crda;
u16 m_rrp;
u16 m_rwp;
u16 m_isr;
u16 m_ce;
u16 m_wt0;
u16 m_wt1;
u16 m_rsc;
u16 m_faet;
}; };
class dp83932c_be_device : public dp83932c_device DECLARE_DEVICE_TYPE(DP83932C, dp83932c_device)
{
public:
dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class dp83932c_le_device : public dp83932c_device
{
public:
dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device)
DECLARE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device)
#endif // MAME_MACHINE_DP83932C_H #endif // MAME_MACHINE_DP83932C_H

6
src/mame/drivers/jazz.cpp
View File

@ -169,6 +169,8 @@ void jazz_state::jazz(machine_config &config)
m_kbdc->kbd_data().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb)); m_kbdc->kbd_data().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb));
G364(config, m_ramdac, 0); G364(config, m_ramdac, 0);
DP83932C(config, m_network, 20_MHz_XTAL);
} }
void jazz_state::mmr4000be(machine_config &config) void jazz_state::mmr4000be(machine_config &config)
@ -176,8 +178,6 @@ void jazz_state::mmr4000be(machine_config &config)
R4000BE(config, m_maincpu, 50_MHz_XTAL); R4000BE(config, m_maincpu, 50_MHz_XTAL);
jazz(config); jazz(config);
DP83932C_BE(config, m_network, 20_MHz_XTAL);
} }
void jazz_state::mmr4000le(machine_config &config) void jazz_state::mmr4000le(machine_config &config)
@ -185,8 +185,6 @@ void jazz_state::mmr4000le(machine_config &config)
R4000LE(config, m_maincpu, 50_MHz_XTAL); R4000LE(config, m_maincpu, 50_MHz_XTAL);
jazz(config); jazz(config);
DP83932C_LE(config, m_network, 20_MHz_XTAL);
} }
ROM_START(mmr4000be) ROM_START(mmr4000be)