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https://github.com/holub/mame
synced 2025-07-05 01:48:29 +03:00
stopped div 0x80000000, 0xffffffff from causing an overflow exception. All loads cancel an outstanding load to the same register, not just lwl/lwr [smf]
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@ -1183,12 +1183,12 @@ void psxcpu_device::multiplier_update()
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break;
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break;
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case MULTIPLIER_OPERATION_DIV:
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case MULTIPLIER_OPERATION_DIV:
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if( m_multiplier_operand2 != 0 )
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if( m_multiplier_operand1 == 0x80000000 && m_multiplier_operand2 == 0xffffffff)
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{
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{
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m_lo = (INT32)m_multiplier_operand1 / (INT32)m_multiplier_operand2;
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m_hi = 0x00000000;
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m_hi = (INT32)m_multiplier_operand1 % (INT32)m_multiplier_operand2;
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m_lo = 0x80000000;
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}
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}
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else
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else if( m_multiplier_operand2 == 0 )
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{
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{
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if( (INT32)m_multiplier_operand1 < 0 )
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if( (INT32)m_multiplier_operand1 < 0 )
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{
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{
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@ -1201,19 +1201,24 @@ void psxcpu_device::multiplier_update()
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m_hi = m_multiplier_operand1;
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m_hi = m_multiplier_operand1;
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}
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}
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else
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{
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m_lo = (INT32)m_multiplier_operand1 / (INT32)m_multiplier_operand2;
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m_hi = (INT32)m_multiplier_operand1 % (INT32)m_multiplier_operand2;
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}
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break;
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break;
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case MULTIPLIER_OPERATION_DIVU:
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case MULTIPLIER_OPERATION_DIVU:
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if( m_multiplier_operand2 != 0 )
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if( m_multiplier_operand2 == 0 )
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{
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m_lo = m_multiplier_operand1 / m_multiplier_operand2;
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m_hi = m_multiplier_operand1 % m_multiplier_operand2;
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}
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else
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{
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{
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m_lo = 0xffffffff;
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m_lo = 0xffffffff;
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m_hi = m_multiplier_operand1;
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m_hi = m_multiplier_operand1;
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}
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}
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else
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{
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m_lo = m_multiplier_operand1 / m_multiplier_operand2;
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m_hi = m_multiplier_operand1 % m_multiplier_operand2;
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}
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break;
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break;
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}
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}
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@ -1512,6 +1517,12 @@ void psxcpu_device::load( UINT32 reg, UINT32 value )
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void psxcpu_device::delayed_load( UINT32 reg, UINT32 value )
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void psxcpu_device::delayed_load( UINT32 reg, UINT32 value )
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{
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{
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if( m_delayr == reg )
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{
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m_delayr = 0;
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m_delayv = 0;
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}
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advance_pc();
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advance_pc();
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m_delayr = reg;
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m_delayr = reg;
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@ -2052,12 +2063,7 @@ UINT32 psxcpu_device::get_register_from_pipeline( int reg )
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{
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{
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if( m_delayr == reg )
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if( m_delayr == reg )
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{
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{
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UINT32 data = m_delayv;
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return m_delayv;
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m_delayr = 0;
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m_delayv = 0;
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return data;
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}
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}
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return m_r[ reg ];
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return m_r[ reg ];
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