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https://github.com/holub/mame
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Major Havoc: Updated Gamma CPU address decoding/mirroring from the schematic [Lord Nightmare]
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Lord-Nightmare
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@ -195,13 +195,21 @@
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#include "machine/nvram.h"
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#include "includes/mhavoc.h"
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/* Quad pokey hookup (based on schematics):
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Address: 543210
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|||||\- pokey A0
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||||\-- pokey A1
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|||\--- pokey A2
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||\---- pokey chip number LSB
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|\----- pokey chip number MSB
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\------ pokey A3
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*/
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READ8_MEMBER(mhavoc_state::quad_pokeyn_r)
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{
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static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" };
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int pokey_num = (offset >> 3) & ~0x04;
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int control = (offset & 0x20) >> 2;
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int pokey_reg = (offset % 8) | control;
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int pokey_reg = (offset & 0x7) | control;
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pokey_device *pokey = machine().device<pokey_device>(devname[pokey_num]);
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return pokey->read(pokey_reg);
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@ -212,7 +220,7 @@ WRITE8_MEMBER(mhavoc_state::quad_pokeyn_w)
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static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" };
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int pokey_num = (offset >> 3) & ~0x04;
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int control = (offset & 0x20) >> 2;
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int pokey_reg = (offset % 8) | control;
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int pokey_reg = (offset & 0x7) | control;
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pokey_device *pokey = machine().device<pokey_device>(devname[pokey_num]);
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pokey->write(pokey_reg, data);
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@ -224,12 +232,19 @@ WRITE8_MEMBER(mhavoc_state::quad_pokeyn_w)
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* Alpha One: dual POKEY?
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*
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*************************************/
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/* dual pokey hookup (presumably, based on the prototype code):
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Address: 43210
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||||\- pokey A0
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|||\-- pokey A1
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||\--- pokey A2
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|\---- pokey chip number
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\----- pokey A3
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*/
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READ8_MEMBER(mhavoc_state::dual_pokey_r)
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{
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int pokey_num = (offset >> 3) & 0x01;
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int control = (offset & 0x10) >> 1;
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int pokey_reg = (offset % 8) | control;
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int pokey_reg = (offset & 0x7) | control;
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if (pokey_num == 0)
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return machine().device<pokey_device>("pokey1")->read(pokey_reg);
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@ -242,7 +257,7 @@ WRITE8_MEMBER(mhavoc_state::dual_pokey_w)
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{
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int pokey_num = (offset >> 3) & 0x01;
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int control = (offset & 0x10) >> 1;
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int pokey_reg = (offset % 8) | control;
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int pokey_reg = (offset & 0x7) | control;
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if (pokey_num == 0)
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machine().device<pokey_device>("pokey1")->write(pokey_reg, data);
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@ -287,19 +302,41 @@ ADDRESS_MAP_END
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* Gamma CPU memory handlers
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*
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*************************************/
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/*
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a15 a14 a13 a12 a11 a10 a09 a08 a07 a06 a05 a04 a03 a02 a01 a00
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0 0 0 x x * * * * * * * * * * * RW ZRAM (6116 SRAM@9PQ)
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0 0 1 0 0 x x x x x * * * * * * RW INPUTS: QCI/O (Quad Pokey)
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0 0 1 0 1 x x x x x x x x x x x R INPUTS: SWITCHES
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0 0 1 1 0 x x x x x x x x x x x R INPUTS: PORTRD_gamma
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0 0 1 1 1 x x x x x x x x x * * R INPUTS: ROLLER (CCI(LETA?), with A2 grounded so only 4 ports are readable)
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0 1 0 x x x x x x x x x x x x x R OUTPUTS: read of dipswitches @8S encompasses the entire OUTPUTS area
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0 1 0 0 0 x x x x x x x x x x x W OUTPUTS: IRQACK
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0 1 0 0 1 x x x x x x x x x x x W OUTPUTS: STROBES
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0 1 0 1 0 x x x x x x x x x x x W OUTPUTS: PORTWR_gamma
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0 1 0 1 1 ? ? ? ? ? ? ? ? ? ? ? W OUTPUTS: TISND, unused tms5220 write
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( supposedly, but the /WS hookup is not traced on pcb yet:
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0 1 0 1 1 x? x? 0 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: Gamma CPU write to octal latch??
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0 1 0 1 1 x? x? 1 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: octal latch output enable to tms5220 and pulse /WS on 5220??
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Is there a way to activate /RS on the TMS5220 to read the status register? is the TMS5220 /INT line connected to the 6502 somehow?
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)
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0 1 1 x x x x * * * * * * * * * RW EEROM: (2804 EEPROM@9QR, pins 22(A9) and 19(A10) are N/C inside the chip)
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1 x * * * * * * * * * * * * * * R ROM 27128 @9S
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*/
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static ADDRESS_MAP_START( gamma_map, AS_PROGRAM, 8, mhavoc_state )
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AM_RANGE(0x0000, 0x07ff) AM_RAM /* Program RAM (2K) */
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AM_RANGE(0x0800, 0x0fff) AM_RAM AM_MIRROR (0x1800)
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AM_RANGE(0x2000, 0x203f) AM_READWRITE(quad_pokeyn_r, quad_pokeyn_w) /* Quad Pokey read */
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AM_RANGE(0x2800, 0x2800) AM_READ_PORT("IN1") /* Gamma Input Port */
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AM_RANGE(0x3000, 0x3000) AM_READ(mhavoc_alpha_r) /* Alpha Comm. Read Port*/
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AM_RANGE(0x3800, 0x3803) AM_READ_PORT("DIAL") /* Roller Controller Input*/
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AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW2") AM_WRITE(mhavoc_gamma_irq_ack_w) /* DSW at 8S, IRQ Acknowledge*/
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AM_RANGE(0x4800, 0x4800) AM_WRITE(mhavoc_out_1_w) /* Coin Counters */
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AM_RANGE(0x5000, 0x5000) AM_WRITE(mhavoc_alpha_w) /* Alpha Comm. Write Port */
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AM_RANGE(0x6000, 0x61ff) AM_RAM AM_SHARE("nvram") /* EEROM */
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AM_RANGE(0x8000, 0xffff) AM_ROM /* Program ROM (16K) */
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AM_RANGE(0x0000, 0x07ff) AM_RAM AM_MIRROR(0x1800) /* Program RAM (2K) */
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AM_RANGE(0x2000, 0x203f) AM_READWRITE(quad_pokeyn_r, quad_pokeyn_w) AM_MIRROR(0x07C0) /* Quad Pokey read/write */
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AM_RANGE(0x2800, 0x2800) AM_READ_PORT("IN1") AM_MIRROR(0x07ff) /* Gamma Input Port */
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AM_RANGE(0x3000, 0x3000) AM_READ(mhavoc_alpha_r) AM_MIRROR(0x07ff) /* Alpha Comm. Read Port */
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AM_RANGE(0x3800, 0x3803) AM_READ_PORT("DIAL") AM_MIRROR(0x07fc) /* Roller Controller Input */
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AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW2") AM_WRITE(mhavoc_gamma_irq_ack_w) AM_MIRROR(0x07ff) /* DSW at 8S, IRQ Acknowledge */
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AM_RANGE(0x4800, 0x4800) AM_WRITE(mhavoc_out_1_w) AM_MIRROR(0x07ff) /* Coin Counters */
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AM_RANGE(0x5000, 0x5000) AM_WRITE(mhavoc_alpha_w) AM_MIRROR(0x07ff) /* Alpha Comm. Write Port */
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//AM_RANGE(0x5800, 0x5800) AM_WRITE(mhavocrv_speech_data_w) AM_MIRROR(0x06ff) /* TMS5220 data write */
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//AM_RANGE(0x5900, 0x5900) AM_WRITE(mhavocrv_speech_strobe_w) AM_MIRROR(0x06ff) /* TMS5220 /WS strobe write */
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AM_RANGE(0x6000, 0x61ff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x1e00) /* EEROM */
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AM_RANGE(0x8000, 0xbfff) AM_ROM AM_MIRROR(0x4000) /* Program ROM (16K) */
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ADDRESS_MAP_END
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@ -602,8 +639,7 @@ ROM_START( mhavoc )
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/* Gamma Processor ROM */
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ROM_REGION( 0x10000, "gamma", 0 )
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ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) )
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ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */
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ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */
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/* AVG PROM */
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ROM_REGION( 0x100, "user1", 0 )
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@ -633,8 +669,7 @@ ROM_START( mhavoc2 )
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/* Gamma Processor ROM */
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ROM_REGION( 0x10000, "gamma", 0 )
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ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) )
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ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */
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ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */
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/* AVG PROM */
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ROM_REGION( 0x100, "user1", 0 )
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@ -662,8 +697,7 @@ ROM_START( mhavocrv )
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/* Gamma Processor ROM */
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ROM_REGION( 0x10000, "gamma", 0 )
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ROM_LOAD( "136025.908", 0x08000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) )
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ROM_RELOAD( 0x0c000, 0x4000 ) /* reset+interrupt vectors */
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ROM_LOAD( "136025.908", 0x08000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) /* mirrored to c000-ffff for reset+interrupt vectors */
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/* AVG PROM */
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ROM_REGION( 0x100, "user1", 0 )
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@ -693,8 +727,7 @@ ROM_START( mhavocp )
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/* Gamma Processor ROM */
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ROM_REGION( 0x10000, "gamma", 0 )
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ROM_LOAD( "136025.008", 0x8000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) )
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ROM_RELOAD( 0xc000, 0x4000 )/* reset+interrupt vectors */
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ROM_LOAD( "136025.008", 0x8000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) /* mirrored to c000-ffff for reset+interrupt vectors */
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/* AVG PROM */
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ROM_REGION( 0x100, "user1", 0 )
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@ -265,6 +265,9 @@ WRITE8_MEMBER(mhavoc_state::mhavoc_out_0_w)
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m_gamma_xmtd = 0;
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}
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/* Bit 2 = Beta reset */
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/* this is the unpopulated processor in the corner of the pcb farthest from the quad pokey, not used on shipping boards */
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/* Bit 0 = Roller light (Blinks on fatal errors) */
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output().set_led_value(0, data & 0x01);
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}
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