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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
PowerVR2: Added preliminary YUV converter [Angelo Salese]
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d2bb45c278
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85ed8d9061
@ -187,12 +187,6 @@ TIMER_CALLBACK_MEMBER(dc_state::ch2_dma_irq)
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dc_update_interrupt_status();
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}
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TIMER_CALLBACK_MEMBER(dc_state::yuv_fifo_irq)
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{
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dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
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dc_update_interrupt_status();
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}
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void dc_state::wave_dma_execute(address_space &space)
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{
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UINT32 src,dst,size;
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@ -437,9 +431,6 @@ WRITE64_MEMBER(dc_state::dc_sysctrl_w )
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/* TODO: timing is a guess */
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machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(ddtdata.length/4), timer_expired_delegate(FUNC(dc_state::ch2_dma_irq),this));
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/* simulate YUV FIFO processing here (HACK! should go inside the YUV FIFO itself) */
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if((address & 0x1800000) == 0x0800000)
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machine().scheduler().timer_set(attotime::from_usec(500), timer_expired_delegate(FUNC(dc_state::yuv_fifo_irq),this));
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}
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break;
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@ -632,7 +632,7 @@ void powervr2_device::tex_get_info(texinfo *t)
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t->vqbase = t->address;
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t->blend = use_alpha ? blend_functions[t->blend_mode] : bl10;
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// fprintf(stderr, "tex %d %d %d %d\n", t->pf, t->mode, pal_ram_ctrl, t->mipmapped);
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//fprintf(stderr, "tex %d %d %d %d\n", t->pf, t->mode, pal_ram_ctrl, t->mipmapped);
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switch(t->pf) {
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case 0: // 1555
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@ -1407,8 +1407,10 @@ WRITE32_MEMBER( powervr2_device::ta_yuv_tex_base_w )
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COMBINE_DATA(&ta_yuv_tex_base);
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logerror("%s: ta_yuv_tex_base = %08x\n", tag(), ta_yuv_tex_base);
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// hack, this interrupt is generated after transfering a set amount of data
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//irq_cb(EOXFER_YUV_IRQ);
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ta_yuv_index = 0;
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ta_yuv_x = 0;
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ta_yuv_y = 0;
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}
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READ32_MEMBER( powervr2_device::ta_yuv_tex_ctrl_r )
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@ -1419,9 +1421,12 @@ READ32_MEMBER( powervr2_device::ta_yuv_tex_ctrl_r )
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WRITE32_MEMBER( powervr2_device::ta_yuv_tex_ctrl_w )
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{
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COMBINE_DATA(&ta_yuv_tex_ctrl);
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ta_yuv_x_size = ((ta_yuv_tex_ctrl & 0x3f)+1)*16;
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ta_yuv_y_size = (((ta_yuv_tex_ctrl>>8) & 0x3f)+1)*16;
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logerror("%s: ta_yuv_tex_ctrl = %08x\n", tag(), ta_yuv_tex_ctrl);
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}
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/* TODO */
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READ32_MEMBER( powervr2_device::ta_yuv_tex_cnt_r )
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{
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return ta_yuv_tex_cnt;
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@ -1943,8 +1948,54 @@ WRITE64_MEMBER( powervr2_device::ta_fifo_poly_w )
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}
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WRITE64_MEMBER( powervr2_device::ta_fifo_yuv_w )
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WRITE8_MEMBER( powervr2_device::ta_fifo_yuv_w )
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{
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//printf("%08x %08x\n",ta_yuv_index++,ta_yuv_tex_ctrl);
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//popmessage("YUV fifo write %08x %08x",ta_yuv_index,ta_yuv_tex_ctrl);
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yuv_fifo[ta_yuv_index] = data;
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ta_yuv_index++;
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if(ta_yuv_index == 0x180)
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{
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ta_yuv_index = 0;
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for(int y=0;y<16;y++)
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{
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for(int x=0;x<16;x+=2)
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{
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int dst_addr;
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int u,v,y0,y1;
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dst_addr = ta_yuv_tex_base;
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dst_addr+= (ta_yuv_x+x)*2;
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dst_addr+= ((ta_yuv_y+y)*320*2);
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u = yuv_fifo[0x00+(x>>1)+((y>>1)*8)];
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v = yuv_fifo[0x40+(x>>1)+((y>>1)*8)];
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y0 = yuv_fifo[0x80+((x&8) ? 0x40 : 0x00)+((y&8) ? 0x80 : 0x00)+(x&6)+((y&7)*8)];
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y1 = yuv_fifo[0x80+((x&8) ? 0x40 : 0x00)+((y&8) ? 0x80 : 0x00)+(x&6)+((y&7)*8)+1];
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*(UINT16 *)((reinterpret_cast<UINT8 *>(dc_texture_ram)) + WORD_XOR_LE(dst_addr)) = u;
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*(UINT16 *)((reinterpret_cast<UINT8 *>(dc_texture_ram)) + WORD_XOR_LE(dst_addr+1)) = y0;
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*(UINT16 *)((reinterpret_cast<UINT8 *>(dc_texture_ram)) + WORD_XOR_LE(dst_addr+2)) = v;
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*(UINT16 *)((reinterpret_cast<UINT8 *>(dc_texture_ram)) + WORD_XOR_LE(dst_addr+3)) = y1;
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}
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}
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ta_yuv_x+=16;
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if(ta_yuv_x == ta_yuv_x_size)
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{
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ta_yuv_x = 0;
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ta_yuv_y+=16;
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if(ta_yuv_y == ta_yuv_y_size)
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{
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ta_yuv_y = 0;
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/* TODO: timing */
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irq_cb(EOXFER_YUV_IRQ);
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}
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}
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}
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}
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// SB_LMMODE0
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@ -249,7 +249,7 @@ public:
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DECLARE_READ32_MEMBER( elan_regs_r );
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DECLARE_WRITE32_MEMBER( elan_regs_w );
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DECLARE_WRITE64_MEMBER( ta_fifo_poly_w );
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DECLARE_WRITE64_MEMBER( ta_fifo_yuv_w );
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DECLARE_WRITE8_MEMBER( ta_fifo_yuv_w );
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DECLARE_WRITE64_MEMBER( ta_texture_directpath0_w );
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DECLARE_WRITE64_MEMBER( ta_texture_directpath1_w );
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@ -293,6 +293,10 @@ private:
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UINT32 ta_ol_base, ta_ol_limit, ta_isp_base, ta_isp_limit;
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UINT32 ta_next_opb, ta_itp_current, ta_alloc_ctrl, ta_next_opb_init;
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UINT32 ta_yuv_tex_base, ta_yuv_tex_ctrl, ta_yuv_tex_cnt;
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UINT32 ta_yuv_index;
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int ta_yuv_x,ta_yuv_y;
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int ta_yuv_x_size,ta_yuv_y_size;
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UINT8 yuv_fifo[384];
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// Other registers
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UINT32 fog_table[0x80];
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@ -387,11 +387,11 @@ static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state )
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/* Area 4 */
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AM_RANGE(0x10000000, 0x107fffff) AM_DEVWRITE("powervr2", powervr2_device, ta_fifo_poly_w)
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AM_RANGE(0x10800000, 0x10ffffff) AM_DEVWRITE("powervr2", powervr2_device, ta_fifo_yuv_w)
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AM_RANGE(0x10800000, 0x10ffffff) AM_DEVWRITE8("powervr2", powervr2_device, ta_fifo_yuv_w, U64(0xffffffffffffffff))
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AM_RANGE(0x11000000, 0x117fffff) AM_DEVWRITE("powervr2", powervr2_device, ta_texture_directpath0_w) AM_MIRROR(0x00800000) // access to texture / framebuffer memory (either 32-bit or 64-bit area depending on SB_LMMODE0 register - cannot be written directly, only through dma / store queue
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AM_RANGE(0x12000000, 0x127fffff) AM_DEVWRITE("powervr2", powervr2_device, ta_fifo_poly_w)
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AM_RANGE(0x12800000, 0x12ffffff) AM_DEVWRITE("powervr2", powervr2_device, ta_fifo_yuv_w)
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AM_RANGE(0x12800000, 0x12ffffff) AM_DEVWRITE8("powervr2", powervr2_device, ta_fifo_yuv_w, U64(0xffffffffffffffff))
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AM_RANGE(0x13000000, 0x137fffff) AM_DEVWRITE("powervr2", powervr2_device, ta_texture_directpath1_w) AM_MIRROR(0x00800000) // access to texture / framebuffer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue
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AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE("dc_ram") // another RAM mirror
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