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Add safe_pc() and safe_pcbase() methods to device_t.

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Convert all cpu_get_pc() to safe_pc() and
cpu_getpreviouspc() to safe_basepc(). Removed the
old macros.
This commit is contained in:
Aaron Giles 2012-09-11 05:50:50 +00:00
parent e5bbf53153
commit 8669a28810
589 changed files with 3228 additions and 3207 deletions
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2
src/emu/cpu/m6502/opsce02.h
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@ -291,7 +291,7 @@
t1=RDOPARG(); \
t2=RDOPARG(); \
t3=RDOPARG(); \
logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpu_get_pc(cpustate->device),t1,t2,t3);
logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpustate->device->safe_pc(),t1,t2,t3);
/* 65ce02 ******************************************************
* BBR Branch if bit is reset

8
src/emu/cpu/m6800/m6800.c
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@ -1601,7 +1601,7 @@ READ8_HANDLER( m6801_io_r )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),offset);
logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),offset);
}
return data;
@ -1635,7 +1635,7 @@ WRITE8_HANDLER( m6801_io_w )
write_port2(cpustate);
if (cpustate->port2_ddr & 2)
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),cpu_get_pc(&space->device()));
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),space->device().safe_pc());
}
break;
@ -1770,7 +1770,7 @@ WRITE8_HANDLER( m6801_io_w )
case IO_ICRH:
case IO_ICRL:
case IO_RDR:
//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),data,offset);
//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
break;
case IO_P3CSR:
@ -1832,7 +1832,7 @@ WRITE8_HANDLER( m6801_io_w )
case IO_ICR2H:
case IO_ICR2L:
default:
logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),data,offset);
logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
break;
}
}

4
src/emu/cpu/m68000/68307bus.c
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@ -14,7 +14,7 @@ READ8_HANDLER( m68307_internal_mbus_r )
if (mbus)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset)
@ -61,7 +61,7 @@ WRITE8_HANDLER( m68307_internal_mbus_w )
if (mbus)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset)
{

4
src/emu/cpu/m68000/68307ser.c
View File

@ -29,7 +29,7 @@ READ8_HANDLER( m68307_internal_serial_r )
else
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset)
{
@ -97,7 +97,7 @@ WRITE8_HANDLER( m68307_internal_serial_w )
m68307_serial* serial = m68k->m68307SERIAL;
assert(serial != NULL);
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
if (serial)
{

12
src/emu/cpu/m68000/68307sim.c
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@ -10,7 +10,7 @@ READ16_HANDLER( m68307_internal_sim_r )
m68307_sim* sim = m68k->m68307SIM;
assert(sim != NULL);
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
if (sim)
{
@ -47,7 +47,7 @@ WRITE16_HANDLER( m68307_internal_sim_w )
m68307_sim* sim = m68k->m68307SIM;
assert(sim != NULL);
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
if (sim)
{
@ -152,7 +152,7 @@ void m68307_sim::write_paddr(UINT16 data, UINT16 mem_mask)
UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
if (m68k->m_m68307_porta_r)
@ -179,7 +179,7 @@ UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
void m68307_sim::write_padat(address_space *space, UINT16 data, UINT16 mem_mask)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
COMBINE_DATA(&m_padat);
@ -205,7 +205,7 @@ void m68307_sim::write_pbddr(UINT16 data, UINT16 mem_mask)
UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
if (m68k->m_m68307_portb_r)
@ -232,7 +232,7 @@ UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
void m68307_sim::write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
COMBINE_DATA(&m_pbdat);

4
src/emu/cpu/m68000/68307tmu.c
View File

@ -12,7 +12,7 @@ READ16_HANDLER( m68307_internal_timer_r )
if (timer)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
int which = offset & 0x8;
switch (offset&0x7)
@ -40,7 +40,7 @@ WRITE16_HANDLER( m68307_internal_timer_w )
if (timer)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
int which = offset & 0x8;
switch (offset&0x7)

4
src/emu/cpu/m68000/68340dma.c
View File

@ -12,7 +12,7 @@ READ32_HANDLER( m68340_internal_dma_r )
if (dma)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -27,7 +27,7 @@ WRITE32_HANDLER( m68340_internal_dma_w )
if (dma)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}
}

4
src/emu/cpu/m68000/68340ser.c
View File

@ -12,7 +12,7 @@ READ32_HANDLER( m68340_internal_serial_r )
if (serial)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_serial_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -27,7 +27,7 @@ WRITE32_HANDLER( m68340_internal_serial_w )
if (serial)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_serial_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}

12
src/emu/cpu/m68000/68340sim.c
View File

@ -12,7 +12,7 @@ READ16_HANDLER( m68340_internal_sim_r )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset<<1)
{
@ -63,7 +63,7 @@ READ8_HANDLER( m68340_internal_sim_ports_r )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset)
{
@ -119,7 +119,7 @@ READ32_HANDLER( m68340_internal_sim_cs_r )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset<<2)
{
@ -149,7 +149,7 @@ WRITE16_HANDLER( m68340_internal_sim_w )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset<<1)
{
@ -199,7 +199,7 @@ WRITE8_HANDLER( m68340_internal_sim_ports_w )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset)
{
@ -252,7 +252,7 @@ WRITE32_HANDLER( m68340_internal_sim_cs_w )
if (sim)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
switch (offset<<2)
{

4
src/emu/cpu/m68000/68340tmu.c
View File

@ -13,7 +13,7 @@ READ32_HANDLER( m68340_internal_timer_r )
if (timer)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_timer_r %08x, (%08x)\n", pc, offset*4,mem_mask);
}
@ -28,7 +28,7 @@ WRITE32_HANDLER( m68340_internal_timer_w )
if (timer)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_timer_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
}
}

8
src/emu/cpu/m68000/m68kcpu.c
View File

@ -2077,7 +2077,7 @@ static READ16_HANDLER( m68307_internal_base_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask);
switch (offset<<1)
@ -2096,7 +2096,7 @@ static WRITE16_HANDLER( m68307_internal_base_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask);
int base = 0;
//int mask = 0;
@ -2764,7 +2764,7 @@ CPU_GET_INFO( scc68070 )
static READ32_HANDLER( m68340_internal_base_r )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
return m68k->m68340_base;
}
@ -2773,7 +2773,7 @@ static WRITE32_HANDLER( m68340_internal_base_w )
{
m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
// other conditions?

2
src/emu/cpu/sh2/sh2comn.c
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@ -522,7 +522,7 @@ WRITE32_HANDLER( sh2_internal_w )
// logerror("sh2_internal_w: Write %08x (%x), %08x @ %08x\n", 0xfffffe00+offset*4, offset, data, mem_mask);
// if(offset != 0x20)
// printf("sh2_internal_w: Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, cpu_get_pc(&space->device()));
// printf("sh2_internal_w: Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space->device().safe_pc());
switch( offset )
{

2
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -1967,7 +1967,7 @@ static CPU_EXECUTE( t90 )
break;
default:
fatalerror("%04x: unimplemented opcode, op=%02x\n",cpu_get_pc(device),cpustate->op);
fatalerror("%04x: unimplemented opcode, op=%02x\n",device->safe_pc(),cpustate->op);
}
if ( cpustate->op != EI )

2
src/emu/cpu/tms34010/34010gfx.c
View File

@ -84,7 +84,7 @@ static int apply_window(tms34010_state *tms, const char *inst_name,int srcbpp, U
int diff, cycles = 3;
if (WINDOW_CHECKING(tms) == 2)
logerror("%08x: %s apply_window window mode %d not supported!\n", cpu_get_pc(tms->device), inst_name, WINDOW_CHECKING(tms));
logerror("%08x: %s apply_window window mode %d not supported!\n", tms->device->safe_pc(), inst_name, WINDOW_CHECKING(tms));
CLR_V(tms);
if (WINDOW_CHECKING(tms) == 1)

4
src/emu/cpu/tms34010/tms34010.c
View File

@ -1224,7 +1224,7 @@ WRITE16_HANDLER( tms34010_io_register_w )
break;
case REG_PMASK:
if (data) logerror("Plane masking not supported. PC=%08X\n", cpu_get_pc(&space->device()));
if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
break;
case REG_DPYCTL:
@ -1375,7 +1375,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
case REG020_PMASKL:
case REG020_PMASKH:
if (data) logerror("Plane masking not supported. PC=%08X\n", cpu_get_pc(&space->device()));
if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
break;
case REG020_DPYCTL:

4
src/emu/debug/dvdisasm.c
View File

@ -202,7 +202,7 @@ void debug_view_disasm::view_char(int chval)
case DCH_HOME: // set the active column to the PC
{
const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source);
offs_t pc = source.m_space->address_to_byte(cpu_get_pc(&source.m_device)) & source.m_space->logbytemask();
offs_t pc = source.m_space->address_to_byte(source.m_device.safe_pc()) & source.m_space->logbytemask();
// figure out which row the pc is on
for (int curline = 0; curline < m_allocated.y; curline++)
@ -468,7 +468,7 @@ void debug_view_disasm::view_update()
{
const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source);
offs_t pc = cpu_get_pc(&source.m_device);
offs_t pc = source.m_device.safe_pc();
offs_t pcbyte = source.m_space->address_to_byte(pc) & source.m_space->logbytemask();
// update our context; if the expression is dirty, recompute

3
src/emu/devcpu.h
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@ -294,9 +294,6 @@ const device_type name = &legacy_device_creator<basename##_device>
// CPU timing
#define cpu_get_reg(cpu, _reg) device_state(cpu)->state(_reg)
#define cpu_get_previouspc(cpu) ((offs_t)device_state(cpu)->state(STATE_GENPCBASE))
#define cpu_get_pc(cpu) ((offs_t)device_state(cpu)->state(STATE_GENPC))
#define cpu_set_reg(cpu, _reg, val) device_state(cpu)->set_state(_reg, val)
// helpers for using machine/cputag instead of cpu objects

2
src/emu/device.h
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@ -230,6 +230,8 @@ public:
// debugging
device_debug *debug() const { return m_debug; }
offs_t safe_pc();
offs_t safe_pcbase();
void set_default_bios(UINT8 bios) { m_default_bios = bios; }
void set_system_bios(UINT8 bios) { m_system_bios = bios; }

8
src/emu/distate.c
View File

@ -523,8 +523,8 @@ device_state_entry &device_state_interface::state_add(int index, const char *sym
m_state_list.append(*entry);
// set the fast entry if applicable
if (index >= k_fast_state_min && index <= k_fast_state_max)
m_fast_state[index - k_fast_state_min] = entry;
if (index >= FAST_STATE_MIN && index <= FAST_STATE_MAX)
m_fast_state[index - FAST_STATE_MIN] = entry;
return *entry;
}
@ -595,8 +595,8 @@ void device_state_interface::interface_post_start()
const device_state_entry *device_state_interface::state_find_entry(int index)
{
// use fast lookup if possible
if (index >= k_fast_state_min && index <= k_fast_state_max)
return m_fast_state[index - k_fast_state_min];
if (index >= FAST_STATE_MIN && index <= FAST_STATE_MAX)
return m_fast_state[index - FAST_STATE_MIN];
// otherwise, scan the first
for (const device_state_entry *entry = m_state_list.first(); entry != NULL; entry = entry->m_next)

28
src/emu/distate.h
View File

@ -186,12 +186,12 @@ protected:
const device_state_entry *state_find_entry(int index);
// constants
static const int k_fast_state_min = -4; // range for fast state
static const int k_fast_state_max = 256; // lookups
static const int FAST_STATE_MIN = -4; // range for fast state
static const int FAST_STATE_MAX = 256; // lookups
// state
simple_list<device_state_entry> m_state_list; // head of state list
device_state_entry * m_fast_state[k_fast_state_max + 1 - k_fast_state_min];
device_state_entry * m_fast_state[FAST_STATE_MAX + 1 - FAST_STATE_MIN];
// fast access to common entries
};
@ -204,6 +204,28 @@ typedef device_interface_iterator<device_state_interface> state_interface_iterat
// INLINE HELPERS
//**************************************************************************
//-------------------------------------------------
// device_t::safe_pc - return the current PC
// or 0 if no state object exists
//-------------------------------------------------
inline offs_t device_t::safe_pc()
{
return (m_state != NULL) ? m_state->pc() : 0;
}
//-------------------------------------------------
// device_t::safe_pcbase - return the current PC
// base or 0 if no state object exists
//-------------------------------------------------
inline offs_t device_t::safe_pcbase()
{
return (m_state != NULL) ? m_state->pcbase() : 0;
}
//-------------------------------------------------
// device_state - return a pointer to the device
// state interface for this device

4
src/emu/machine/53c810.c
View File

@ -393,7 +393,7 @@ void lsi53c810_device::dma_exec()
UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
{
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device()));
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */
@ -476,7 +476,7 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
{
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device()));
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */

10
src/emu/machine/am53cf96.c
View File

@ -32,11 +32,11 @@ READ8_MEMBER( am53cf96_device::read )
if (offset == REG_FIFO)
{
// mame_printf_debug("53cf96: read FIFO PC=%x\n", cpu_get_pc(&space.device()));
// mame_printf_debug("53cf96: read FIFO PC=%x\n", space.device().safe_pc());
return 0;
}
// logerror("53cf96: read reg %d = %x (PC=%x)\n", reg, rv>>shift, cpu_get_pc(&space.device()));
// logerror("53cf96: read reg %d = %x (PC=%x)\n", reg, rv>>shift, space.device().safe_pc());
if (offset == REG_IRQSTATE)
{
@ -55,7 +55,7 @@ void am53cf96_device::device_timer(emu_timer &timer, device_timer_id tid, int pa
WRITE8_MEMBER( am53cf96_device::write )
{
// logerror("53cf96: w %x to reg %d (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
// logerror("53cf96: w %x to reg %d (PC=%x)\n", data, offset, space.device().safe_pc());
// if writing to the target ID, cache it off for later
if (offset == REG_STATUS)
@ -93,7 +93,7 @@ WRITE8_MEMBER( am53cf96_device::write )
case 2: // reset device
scsi_regs[REG_IRQSTATE] = 8; // indicate success
logerror("53cf96: reset target ID = %d (PC = %x)\n", last_id, cpu_get_pc(&space.device()));
logerror("53cf96: reset target ID = %d (PC = %x)\n", last_id, space.device().safe_pc());
if (devices[last_id])
{
devices[last_id]->reset();
@ -121,7 +121,7 @@ WRITE8_MEMBER( am53cf96_device::write )
scsi_regs[REG_INTSTATE] = 4;
}
logerror("53cf96: command %x exec. target ID = %d (PC = %x)\n", fifo[1], last_id, cpu_get_pc(&space.device()));
logerror("53cf96: command %x exec. target ID = %d (PC = %x)\n", fifo[1], last_id, space.device().safe_pc());
if (devices[last_id])
{
int length;

8
src/emu/machine/k056230.c
View File

@ -82,7 +82,7 @@ READ8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_r)
}
}
// mame_printf_debug("k056230_r: %d at %08X\n", offset, cpu_get_pc(&space->device()));
// mame_printf_debug("k056230_r: %d at %08X\n", offset, space->device().safe_pc());
return 0;
}
@ -132,17 +132,17 @@ WRITE8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_w)
break;
}
}
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, cpu_get_pc(&space->device()));
// mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space->device().safe_pc());
}
READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
{
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space->device()));
//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
return m_ram[offset & 0x7ff];
}
WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
{
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
COMBINE_DATA(m_ram + (offset & 0x7ff));
}

8
src/emu/machine/ldpr8210.c
View File

@ -544,7 +544,7 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_pia_r )
break;
default:
mame_printf_debug("%03X:Unknown PR-8210 PIA read from offset %02X\n", cpu_get_pc(&space.device()), offset);
mame_printf_debug("%03X:Unknown PR-8210 PIA read from offset %02X\n", space.device().safe_pc(), offset);
break;
}
return result;
@ -616,7 +616,7 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_pia_w )
// no other writes known
default:
mame_printf_debug("%03X:Unknown PR-8210 PIA write to offset %02X = %02X\n", cpu_get_pc(&space.device()), offset, data);
mame_printf_debug("%03X:Unknown PR-8210 PIA write to offset %02X = %02X\n", space.device().safe_pc(), offset, data);
break;
}
}
@ -1097,13 +1097,13 @@ WRITE8_MEMBER( simutrek_special_device::i8748_port2_w )
{
int direction = (data & 0x08) ? 1 : -1;
if (LOG_SIMUTREK)
printf("%3d:JUMP TRG (Simutrek PC=%03X)\n", screen().vpos(), cpu_get_pc(&space.device()));
printf("%3d:JUMP TRG (Simutrek PC=%03X)\n", screen().vpos(), space.device().safe_pc());
advance_slider(direction);
}
// bit $04 controls who owns the JUMP TRG command
if (LOG_SIMUTREK && ((data ^ prev) & 0x04))
printf("%3d:Simutrek ownership line = %d (Simutrek PC=%03X)\n", screen().vpos(), (data >> 2) & 1, cpu_get_pc(&space.device()));
printf("%3d:Simutrek ownership line = %d (Simutrek PC=%03X)\n", screen().vpos(), (data >> 2) & 1, space.device().safe_pc());
m_controlnext = (~data >> 2) & 1;
// bits $03 control something (status?)

2
src/emu/machine/ldv1000.c
View File

@ -469,7 +469,7 @@ READ8_MEMBER( pioneer_ldv1000_device::z80_controller_r )
WRITE8_MEMBER( pioneer_ldv1000_device::z80_controller_w )
{
if (LOG_STATUS_CHANGES && data != m_status)
printf("%04X:CONTROLLER.W=%02X\n", cpu_get_pc(&space.device()), data);
printf("%04X:CONTROLLER.W=%02X\n", space.device().safe_pc(), data);
m_status = data;
}

6
src/emu/machine/ldvp931.c
View File

@ -382,7 +382,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
if (LOG_PORTS && (m_i8049_out0 ^ data) & 0xff)
{
printf("%03X:out0:", cpu_get_pc(&space.device()));
printf("%03X:out0:", space.device().safe_pc());
if ( (data & 0x80)) printf(" ???");
if ( (data & 0x40)) printf(" LED1");
if ( (data & 0x20)) printf(" LED2");
@ -422,7 +422,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
if (LOG_PORTS && (m_i8049_out1 ^ data) & 0x08)
{
mame_printf_debug("%03X:out1:", cpu_get_pc(&space.device()));
mame_printf_debug("%03X:out1:", space.device().safe_pc());
if (!(data & 0x08)) mame_printf_debug(" SMS");
mame_printf_debug("\n");
m_i8049_out1 = data;
@ -570,7 +570,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
if (LOG_PORTS && (m_i8049_port1 ^ data) & 0x1f)
{
printf("%03X:port1:", cpu_get_pc(&space.device()));
printf("%03X:port1:", space.device().safe_pc());
if (!(data & 0x10)) printf(" SPEED");
if (!(data & 0x08)) printf(" TIMENABLE");
if (!(data & 0x04)) printf(" REV");

6
src/emu/machine/ncr539x.c
View File

@ -346,7 +346,7 @@ READ8_MEMBER( ncr539x_device::read )
#if VERBOSE
#if VERBOSE_READS
printf("539x: Read @ %s (%02x) (PC=%x) (status %02x irq_status %02x)\n", rdregs[offset], offset, cpu_get_pc(&space.device()), m_status, m_irq_status);
printf("539x: Read @ %s (%02x) (PC=%x) (status %02x irq_status %02x)\n", rdregs[offset], offset, space.device().safe_pc(), m_status, m_irq_status);
#endif
#endif
@ -377,7 +377,7 @@ READ8_MEMBER( ncr539x_device::read )
update_fifo_internal_state(fifo_bytes);
#if VERBOSE
printf("Read %02x from FIFO[%d], FIFO now contains %d bytes (PC=%x, m_buffer_remaining %x)\n", rv, m_fifo_ptr-1, fifo_bytes, cpu_get_pc(&space.device()), m_buffer_remaining);
printf("Read %02x from FIFO[%d], FIFO now contains %d bytes (PC=%x, m_buffer_remaining %x)\n", rv, m_fifo_ptr-1, fifo_bytes, space.device().safe_pc(), m_buffer_remaining);
#endif
if (fifo_bytes == 0)
@ -484,7 +484,7 @@ READ8_MEMBER( ncr539x_device::read )
WRITE8_MEMBER( ncr539x_device::write )
{
#if VERBOSE
if (offset != 2) printf("539x: Write %02x @ %s (%02x) (PC=%x)\n", data, wrregs[offset], offset, cpu_get_pc(&space.device()));
if (offset != 2) printf("539x: Write %02x @ %s (%02x) (PC=%x)\n", data, wrregs[offset], offset, space.device().safe_pc());
#endif
switch (offset)

2
src/emu/machine/tmp68301.c
View File

@ -166,7 +166,7 @@ WRITE16_HANDLER( tmp68301_regs_w )
if (!ACCESSING_BITS_0_7) return;
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",cpu_get_pc(&space->device()),offset*2,data,mem_mask^0xffff);
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space->device().safe_pc(),offset*2,data,mem_mask^0xffff);
switch( offset * 2 )
{

8
src/emu/machine/wd33c93.c
View File

@ -487,7 +487,7 @@ WRITE8_MEMBER(wd33c93_device::write)
case 1:
{
LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", cpu_get_pc(&space.device()), sasr, data ));
LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", space.device().safe_pc(), sasr, data ));
/* update the register */
regs[sasr] = data;
@ -495,7 +495,7 @@ WRITE8_MEMBER(wd33c93_device::write)
/* if we receive a command, schedule to process it */
if ( sasr == WD_COMMAND )
{
LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", cpu_get_pc(&space.device()), data, getunit() ));
LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", space.device().safe_pc(), data, getunit() ));
/* signal we're processing it */
regs[WD_AUXILIARY_STATUS] |= ASR_CIP;
@ -646,7 +646,7 @@ READ8_MEMBER(wd33c93_device::read)
irq_callback(machine(), 0);
}
LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", cpu_get_pc(&space.device()), regs[WD_SCSI_STATUS] ));
LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", space.device().safe_pc(), regs[WD_SCSI_STATUS] ));
}
else if ( sasr == WD_DATA )
{
@ -715,7 +715,7 @@ READ8_MEMBER(wd33c93_device::read)
}
}
LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", cpu_get_pc(&space.device()), regs[WD_DATA] ));
LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", space.device().safe_pc(), regs[WD_DATA] ));
/* get the register value */
ret = regs[sasr];

4
src/emu/sound/nile.c
View File

@ -78,7 +78,7 @@ WRITE16_DEVICE_HANDLER( nile_sndctrl_w )
COMBINE_DATA(&info->ctrl);
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, cpu_get_pc(&space->device()));
// printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space->device().safe_pc());
ctrl^=info->ctrl;
}
@ -133,7 +133,7 @@ WRITE16_DEVICE_HANDLER( nile_snd_w )
info->vpos[v] = info->frac[v] = info->lponce[v] = 0;
}
//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, cpu_get_pc(&space->device()));
//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space->device().safe_pc());
}
static STREAM_UPDATE( nile_update )

10
src/emu/video/hd63484.c
View File

@ -1468,8 +1468,8 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
READ16_DEVICE_HANDLER( hd63484_status_r )
{
// if (cpu_get_pc(&space->device()) != 0xfced6 && cpu_get_pc(&space->device()) != 0xfe1d6)
// logerror("%05x: HD63484 status read\n",cpu_get_pc(&space->device()));
// if (space->device().safe_pc() != 0xfced6 && space->device().safe_pc() != 0xfe1d6)
// logerror("%05x: HD63484 status read\n",space->device().safe_pc());
return 0xff22 | (device->machine().rand() & 0x0004); /* write FIFO ready + command end + (read FIFO ready or read FIFO not ready) */
}
@ -1496,7 +1496,7 @@ WRITE16_DEVICE_HANDLER( hd63484_data_w )
hd63484->regno += 2; /* autoincrement */
#if LOG_COMMANDS
// logerror("PC %05x: HD63484 register %02x write %04x\n", cpu_get_pc(&space->device()), hd63484->regno, hd63484->reg[hd63484->regno/2]);
// logerror("PC %05x: HD63484 register %02x write %04x\n", space->device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
#endif
if (hd63484->regno == 0) /* FIFO */
@ -1513,14 +1513,14 @@ READ16_DEVICE_HANDLER( hd63484_data_r )
else if (hd63484->regno == 0)
{
#if LOG_COMMANDS
// logerror("%05x: HD63484 read FIFO\n", cpu_get_pc(&space->device()));
// logerror("%05x: HD63484 read FIFO\n", space->device().safe_pc());
#endif
res = hd63484->readfifo;
}
else
{
#if LOG_COMMANDS
// logerror("%05x: HD63484 read register %02x\n", cpu_get_pc(&space->device()), hd63484->regno);
// logerror("%05x: HD63484 read register %02x\n", space->device().safe_pc(), hd63484->regno);
#endif
res = 0;
}

2
src/emu/video/pc_vga.c
View File

@ -1667,7 +1667,7 @@ READ8_HANDLER(vga_port_03d0_r)
data = vga_crtc_r(space, offset);
if(offset == 8)
{
logerror("VGA: 0x3d8 read at %08x\n",cpu_get_pc(&space->device()));
logerror("VGA: 0x3d8 read at %08x\n",space->device().safe_pc());
data = 0; // TODO: PC-200 reads back CGA register here, everything else returns open bus OR CGA emulation of register 0x3d8
}

2
src/emu/video/voodoo.c
View File

@ -3866,7 +3866,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
/* don't log multiple identical status reads from the same address */
if (regnum == status)
{
offs_t pc = cpu_get_pc(v->cpu);
offs_t pc = v->cpu->safe_pc();
if (pc == v->last_status_pc && result == v->last_status_value)
logit = FALSE;
v->last_status_pc = pc;

2
src/mame/audio/beezer.c
View File

@ -499,7 +499,7 @@ READ8_DEVICE_HANDLER( beezer_sh6840_r )
return 0;
/* offset 1 reads the status register: bits 2 1 0 correspond to ints on channels 2,1,0, and bit 7 is an 'OR' of bits 2,1,0 */
case 1:
logerror("%04X:beezer_sh6840_r - unexpected read, status register is TODO!\n", cpu_get_pc(state->m_maincpu));
logerror("%04X:beezer_sh6840_r - unexpected read, status register is TODO!\n", state->m_maincpu->safe_pc());
return 0;
/* offsets 2,4,6 read channel 0,1,2 MSBs and latch the LSB*/
case 2: case 4: case 6:

10
src/mame/audio/cage.c
View File

@ -410,7 +410,7 @@ static READ32_HANDLER( tms32031_io_r )
}
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s read -> %08X\n", cpu_get_pc(&space->device()), register_names[offset & 0x7f], result);
logerror("CAGE:%06X:%s read -> %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], result);
return result;
}
@ -423,7 +423,7 @@ static WRITE32_HANDLER( tms32031_io_w )
COMBINE_DATA(&tms32031_io_regs[offset]);
if (LOG_32031_IOPORTS)
logerror("CAGE:%06X:%s write = %08X\n", cpu_get_pc(&space->device()), register_names[offset & 0x7f], tms32031_io_regs[offset]);
logerror("CAGE:%06X:%s write = %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
switch (offset)
{
@ -506,7 +506,7 @@ static READ32_HANDLER( cage_from_main_r )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
logerror("%06X:CAGE read command = %04X\n", space->device().safe_pc(), state->from_main);
state->cpu_to_cage_ready = 0;
update_control_lines(space->machine());
device_set_input_line(state->cpu, TMS3203X_IRQ0, CLEAR_LINE);
@ -519,7 +519,7 @@ static WRITE32_HANDLER( cage_from_main_ack_w )
if (LOG_COMM)
{
cage_t *state = &cage;
logerror("%06X:CAGE ack command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
logerror("%06X:CAGE ack command = %04X\n", space->device().safe_pc(), state->from_main);
}
}
@ -528,7 +528,7 @@ static WRITE32_HANDLER( cage_to_main_w )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:Data from CAGE = %04X\n", cpu_get_pc(&space->device()), data);
logerror("%06X:Data from CAGE = %04X\n", space->device().safe_pc(), data);
driver_device *drvstate = space->machine().driver_data<driver_device>();
drvstate->soundlatch_word_w(*space, 0, data, mem_mask);
state->cage_to_cpu_ready = 1;

14
src/mame/audio/dcs.c
View File

@ -1451,7 +1451,7 @@ WRITE32_HANDLER( dsio_idma_addr_w )
{
dsio_state &dsio = dcs.dsio;
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_addr = %04X\n", cpu_get_pc(&space->device()), data);
logerror("%08X:IDMA_addr = %04X\n", space->device().safe_pc(), data);
downcast<adsp2181_device *>(dcs.cpu)->idma_addr_w(data);
if (data == 0)
dsio.start_on_next_write = 2;
@ -1461,7 +1461,7 @@ WRITE32_HANDLER( dsio_idma_addr_w )
WRITE32_HANDLER( dsio_idma_data_w )
{
dsio_state &dsio = dcs.dsio;
UINT32 pc = cpu_get_pc(&space->device());
UINT32 pc = space->device().safe_pc();
if (ACCESSING_BITS_0_15)
{
if (LOG_DCS_TRANSFERS)
@ -1487,7 +1487,7 @@ READ32_HANDLER( dsio_idma_data_r )
UINT32 result;
result = downcast<adsp2181_device *>(dcs.cpu)->idma_data_r();
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_data_r(%04X) = %04X\n", cpu_get_pc(&space->device()), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
logerror("%08X:IDMA_data_r(%04X) = %04X\n", space->device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
return result;
}
@ -1622,7 +1622,7 @@ static READ16_HANDLER( input_latch_r )
if (dcs.auto_ack)
input_latch_ack_w(space,0,0,0xffff);
if (LOG_DCS_IO)
logerror("%08X:input_latch_r(%04X)\n", cpu_get_pc(&space->device()), dcs.input_data);
logerror("%08X:input_latch_r(%04X)\n", space->device().safe_pc(), dcs.input_data);
return dcs.input_data;
}
@ -1644,7 +1644,7 @@ static TIMER_CALLBACK( latch_delayed_w )
static WRITE16_HANDLER( output_latch_w )
{
if (LOG_DCS_IO)
logerror("%08X:output_latch_w(%04X) (empty=%d)\n", cpu_get_pc(&space->device()), data, IS_OUTPUT_EMPTY());
logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space->device().safe_pc(), data, IS_OUTPUT_EMPTY());
space->machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
}
@ -1698,7 +1698,7 @@ static TIMER_CALLBACK( output_control_delayed_w )
static WRITE16_HANDLER( output_control_w )
{
if (LOG_DCS_IO)
logerror("%04X:output_control = %04X\n", cpu_get_pc(&space->device()), data);
logerror("%04X:output_control = %04X\n", space->device().safe_pc(), data);
space->machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
}
@ -1884,7 +1884,7 @@ static WRITE16_HANDLER( adsp_control_w )
/* bit 9 forces a reset */
if (data & 0x0200)
{
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", cpu_get_pc(&space->device()));
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space->device().safe_pc());
device_set_input_line(dcs.cpu, INPUT_LINE_RESET, PULSE_LINE);
dcs_boot(space->machine());
dcs.control_regs[SYSCONTROL_REG] = 0;

8
src/mame/audio/exidy.c
View File

@ -686,7 +686,7 @@ READ8_DEVICE_HANDLER( exidy_sh6840_r )
return 0;
/* offset 1 reads the status register: bits 2 1 0 correspond to ints on channels 2,1,0, and bit 7 is an 'OR' of bits 2,1,0 */
case 1:
logerror("%04X:exidy_sh6840_r - unexpected read, status register is TODO!\n", cpu_get_pc(state->m_maincpu));
logerror("%04X:exidy_sh6840_r - unexpected read, status register is TODO!\n", state->m_maincpu->safe_pc());
return 0;
/* offsets 2,4,6 read channel 0,1,2 MSBs and latch the LSB*/
case 2: case 4: case 6:
@ -1043,7 +1043,7 @@ READ8_DEVICE_HANDLER( victory_sound_response_r )
exidy_sound_state *state = get_safe_token(device);
UINT8 ret = state->m_pia1->b_output();
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound response read = %02X\n", cpu_get_previouspc(state->m_maincpu), ret);
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound response read = %02X\n", state->m_maincpu->safe_pcbase(), ret);
state->m_pia1->cb1_w(0);
@ -1056,7 +1056,7 @@ READ8_DEVICE_HANDLER( victory_sound_status_r )
exidy_sound_state *state = get_safe_token(device);
UINT8 ret = (state->m_pia1->ca1_r() << 7) | (state->m_pia1->cb1_r() << 6);
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound status read = %02X\n", cpu_get_previouspc(state->m_maincpu), ret);
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound status read = %02X\n", state->m_maincpu->safe_pcbase(), ret);
return ret;
}
@ -1073,7 +1073,7 @@ WRITE8_DEVICE_HANDLER( victory_sound_command_w )
{
exidy_sound_state *state = get_safe_token(device);
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound command = %02X\n", cpu_get_previouspc(state->m_maincpu), data);
if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound command = %02X\n", state->m_maincpu->safe_pcbase(), data);
device->machine().scheduler().synchronize(FUNC(delayed_command_w), data, state->m_pia1);
}

36
src/mame/audio/harddriv.c
View File

@ -54,7 +54,7 @@ static void update_68k_interrupts(running_machine &machine)
READ16_MEMBER(harddriv_state::hd68k_snd_data_r)
{
m_soundflag = 0;
logerror("%06X:main read from sound=%04X\n", cpu_get_previouspc(&space.device()), m_sounddata);
logerror("%06X:main read from sound=%04X\n", space.device().safe_pcbase(), m_sounddata);
return m_sounddata;
}
@ -77,7 +77,7 @@ static TIMER_CALLBACK( delayed_68k_w )
WRITE16_MEMBER(harddriv_state::hd68k_snd_data_w)
{
machine().scheduler().synchronize(FUNC(delayed_68k_w), data);
logerror("%06X:main write to sound=%04X\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:main write to sound=%04X\n", space.device().safe_pcbase(), data);
}
@ -87,7 +87,7 @@ WRITE16_MEMBER(harddriv_state::hd68k_snd_reset_w)
device_set_input_line(m_soundcpu, INPUT_LINE_RESET, CLEAR_LINE);
m_mainflag = m_soundflag = 0;
update_68k_interrupts(machine());
logerror("%06X:Reset sound\n", cpu_get_previouspc(&space.device()));
logerror("%06X:Reset sound\n", space.device().safe_pcbase());
}
@ -102,7 +102,7 @@ READ16_MEMBER(harddriv_state::hdsnd68k_data_r)
{
m_mainflag = 0;
update_68k_interrupts(machine());
logerror("%06X:sound read from main=%04X\n", cpu_get_previouspc(&space.device()), m_maindata);
logerror("%06X:sound read from main=%04X\n", space.device().safe_pcbase(), m_maindata);
return m_maindata;
}
@ -111,7 +111,7 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_data_w)
{
COMBINE_DATA(&m_sounddata);
m_soundflag = 1;
logerror("%06X:sound write to main=%04X\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:sound write to main=%04X\n", space.device().safe_pcbase(), data);
}
@ -124,14 +124,14 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_data_w)
READ16_MEMBER(harddriv_state::hdsnd68k_switches_r)
{
logerror("%06X:hdsnd68k_switches_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
logerror("%06X:hdsnd68k_switches_r(%04X)\n", space.device().safe_pcbase(), offset);
return 0;
}
READ16_MEMBER(harddriv_state::hdsnd68k_320port_r)
{
logerror("%06X:hdsnd68k_320port_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
logerror("%06X:hdsnd68k_320port_r(%04X)\n", space.device().safe_pcbase(), offset);
return 0;
}
@ -143,7 +143,7 @@ READ16_MEMBER(harddriv_state::hdsnd68k_status_r)
// D14 = 'Sound Flag'
// D13 = Test Switch
// D12 = 5220 Ready Flag (0=Ready)
logerror("%06X:hdsnd68k_status_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
logerror("%06X:hdsnd68k_status_r(%04X)\n", space.device().safe_pcbase(), offset);
return (m_mainflag << 15) | (m_soundflag << 14) | 0x2000 | 0;//((ioport("IN0")->read() & 0x0020) << 8) | 0;
}
@ -167,17 +167,17 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_latches_w)
{
case 0: /* SPWR - 5220 write strobe */
/* data == 0 means high, 1 means low */
logerror("%06X:SPWR=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:SPWR=%d\n", space.device().safe_pcbase(), data);
break;
case 1: /* SPRES - 5220 hard reset */
/* data == 0 means low, 1 means high */
logerror("%06X:SPRES=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:SPRES=%d\n", space.device().safe_pcbase(), data);
break;
case 2: /* SPRATE */
/* data == 0 means 8kHz, 1 means 10kHz */
logerror("%06X:SPRATE=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:SPRATE=%d\n", space.device().safe_pcbase(), data);
break;
case 3: /* CRAMEN */
@ -186,7 +186,7 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_latches_w)
break;
case 4: /* RES320 */
logerror("%06X:RES320=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:RES320=%d\n", space.device().safe_pcbase(), data);
if (m_sounddsp != NULL)
device_set_input_line(m_sounddsp, INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
break;
@ -199,7 +199,7 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_latches_w)
WRITE16_MEMBER(harddriv_state::hdsnd68k_speech_w)
{
logerror("%06X:hdsnd68k_speech_w(%04X)=%04X\n", cpu_get_previouspc(&space.device()), offset, data);
logerror("%06X:hdsnd68k_speech_w(%04X)=%04X\n", space.device().safe_pcbase(), offset, data);
}
@ -249,7 +249,7 @@ READ16_MEMBER(harddriv_state::hdsnd68k_320com_r)
if (m_cramen)
return m_comram[offset & 0x1ff];
logerror("%06X:hdsnd68k_320com_r(%04X) -- not allowed\n", cpu_get_previouspc(&space.device()), offset);
logerror("%06X:hdsnd68k_320com_r(%04X) -- not allowed\n", space.device().safe_pcbase(), offset);
return 0xffff;
}
@ -260,7 +260,7 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_320com_w)
if (m_cramen)
COMBINE_DATA(&m_comram[offset & 0x1ff]);
else
logerror("%06X:hdsnd68k_320com_w(%04X)=%04X -- not allowed\n", cpu_get_previouspc(&space.device()), offset, data);
logerror("%06X:hdsnd68k_320com_w(%04X)=%04X -- not allowed\n", space.device().safe_pcbase(), offset, data);
}
@ -308,7 +308,7 @@ WRITE16_DEVICE_HANDLER( hdsnddsp_dac_w )
WRITE16_MEMBER(harddriv_state::hdsnddsp_comport_w)
{
/* COM port TD0-7 */
logerror("%06X:hdsnddsp_comport_w=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:hdsnddsp_comport_w=%d\n", space.device().safe_pcbase(), data);
}
@ -316,7 +316,7 @@ WRITE16_MEMBER(harddriv_state::hdsnddsp_mute_w)
{
/* mute DAC audio, D0=1 */
/* m_dacmute = data & 1; -- NOT STUFFED */
logerror("%06X:mute DAC=%d\n", cpu_get_previouspc(&space.device()), data);
logerror("%06X:mute DAC=%d\n", space.device().safe_pcbase(), data);
}
@ -360,6 +360,6 @@ READ16_MEMBER(harddriv_state::hdsnddsp_comram_r)
READ16_MEMBER(harddriv_state::hdsnddsp_compare_r)
{
logerror("%06X:hdsnddsp_compare_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
logerror("%06X:hdsnddsp_compare_r(%04X)\n", space.device().safe_pcbase(), offset);
return 0;
}

2
src/mame/audio/invinco.c
View File

@ -108,6 +108,6 @@ WRITE8_HANDLER( invinco_audio_w )
}
#if 0
logerror("Went LO: %02X %04X\n", bitsGoneLow, cpu_get_pc(&space->device()));
logerror("Went LO: %02X %04X\n", bitsGoneLow, space->device().safe_pc());
#endif
}

8
src/mame/audio/jaguar.c
View File

@ -217,7 +217,7 @@ void jaguar_state::sound_start()
READ16_MEMBER( jaguar_state::jerry_regs_r )
{
if (offset != JINTCTRL && offset != JINTCTRL+2)
logerror("%08X:jerry read register @ F10%03X\n", cpu_get_previouspc(&space.device()), offset * 2);
logerror("%08X:jerry read register @ F10%03X\n", space.device().safe_pcbase(), offset * 2);
switch (offset)
{
@ -244,7 +244,7 @@ WRITE16_MEMBER( jaguar_state::jerry_regs_w )
}
if (offset != JINTCTRL && offset != JINTCTRL+2 && offset != ASICTRL)
logerror("%08X:jerry write register @ F10%03X = %04X\n", cpu_get_previouspc(&space.device()), offset * 2, data);
logerror("%08X:jerry write register @ F10%03X = %04X\n", space.device().safe_pcbase(), offset * 2, data);
}
@ -322,7 +322,7 @@ void jaguar_state::serial_update()
READ32_MEMBER( jaguar_state::serial_r )
{
logerror("%08X:jaguar_serial_r(%X)\n", cpu_get_previouspc(&space.device()), offset);
logerror("%08X:jaguar_serial_r(%X)\n", space.device().safe_pcbase(), offset);
return 0;
}
@ -358,7 +358,7 @@ WRITE32_MEMBER( jaguar_state::serial_w )
break;
default:
logerror("%08X:jaguar_serial_w(%X,%X)\n", cpu_get_previouspc(&space.device()), offset, data);
logerror("%08X:jaguar_serial_w(%X,%X)\n", space.device().safe_pcbase(), offset, data);
break;
}
}

152
src/mame/audio/leland.c
View File

@ -1258,21 +1258,21 @@ static READ16_DEVICE_HANDLER( i80186_internal_port_r )
switch (offset)
{
case 0x22/2:
logerror("%05X:ERROR - read from 80186 EOI\n", cpu_get_pc(state->m_i80186.cpu));
logerror("%05X:ERROR - read from 80186 EOI\n", state->m_i80186.cpu->safe_pc());
break;
case 0x24/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", state->m_i80186.cpu->safe_pc());
if (state->m_i80186.intr.poll_status & 0x8000)
int_callback(state->m_i80186.cpu, 0);
return state->m_i80186.intr.poll_status;
case 0x26/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.poll_status;
case 0x28/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", state->m_i80186.cpu->safe_pc());
temp = (state->m_i80186.intr.timer >> 3) & 0x01;
temp |= (state->m_i80186.intr.dma[0] >> 1) & 0x04;
temp |= (state->m_i80186.intr.dma[1] >> 0) & 0x08;
@ -1283,56 +1283,56 @@ static READ16_DEVICE_HANDLER( i80186_internal_port_r )
return temp;
case 0x2a/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.priority_mask;
case 0x2c/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.in_service;
case 0x2e/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", state->m_i80186.cpu->safe_pc());
temp = state->m_i80186.intr.request & ~0x0001;
if (state->m_i80186.intr.status & 0x0007)
temp |= 1;
return temp;
case 0x30/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.status;
case 0x32/2:
if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.timer;
case 0x34/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.dma[0];
case 0x36/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.dma[1];
case 0x38/2:
if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.ext[0];
case 0x3a/2:
if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.ext[1];
case 0x3c/2:
if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.ext[2];
case 0x3e/2:
if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.intr.ext[3];
case 0x50/2:
case 0x58/2:
case 0x60/2:
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
which = (offset - 0x50/2) / 4;
if (ACCESSING_BITS_0_7)
internal_timer_sync(state, which);
@ -1341,87 +1341,87 @@ static READ16_DEVICE_HANDLER( i80186_internal_port_r )
case 0x52/2:
case 0x5a/2:
case 0x62/2:
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
which = (offset - 0x50/2) / 4;
return state->m_i80186.timer[which].maxA;
case 0x54/2:
case 0x5c/2:
logerror("%05X:read 80186 Timer %d max B\n", cpu_get_pc(state->m_i80186.cpu), (offset/2 - 0x50) / 4);
logerror("%05X:read 80186 Timer %d max B\n", state->m_i80186.cpu->safe_pc(), (offset/2 - 0x50) / 4);
which = (offset - 0x50/2) / 4;
return state->m_i80186.timer[which].maxB;
case 0x56/2:
case 0x5e/2:
case 0x66/2:
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
which = (offset - 0x50/2) / 4;
return state->m_i80186.timer[which].control;
case 0xa0/2:
if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.mem.upper;
case 0xa2/2:
if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.mem.lower;
case 0xa4/2:
if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.mem.peripheral;
case 0xa6/2:
if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.mem.middle;
case 0xa8/2:
if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", cpu_get_pc(state->m_i80186.cpu));
if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", state->m_i80186.cpu->safe_pc());
return state->m_i80186.mem.middle_size;
case 0xc0/2:
case 0xd0/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].source;
case 0xc2/2:
case 0xd2/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].source >> 16;
case 0xc4/2:
case 0xd4/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].dest;
case 0xc6/2:
case 0xd6/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].dest >> 16;
case 0xc8/2:
case 0xd8/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].count;
case 0xca/2:
case 0xda/2:
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
return state->m_i80186.dma[which].control;
default:
logerror("%05X:read 80186 port %02X\n", cpu_get_pc(state->m_i80186.cpu), offset*2);
logerror("%05X:read 80186 port %02X\n", state->m_i80186.cpu->safe_pc(), offset*2);
break;
}
return 0x00;
@ -1449,21 +1449,21 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
switch (offset)
{
case 0x22/2:
if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
handle_eoi(device, 0x8000);
update_interrupt_state(device);
break;
case 0x24/2:
logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
break;
case 0x26/2:
logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
break;
case 0x28/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.timer = (state->m_i80186.intr.timer & ~0x08) | ((data << 3) & 0x08);
state->m_i80186.intr.dma[0] = (state->m_i80186.intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
state->m_i80186.intr.dma[1] = (state->m_i80186.intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
@ -1475,69 +1475,69 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
break;
case 0x2a/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.priority_mask = data & 0x0007;
update_interrupt_state(device);
break;
case 0x2c/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.in_service = data & 0x00ff;
update_interrupt_state(device);
break;
case 0x2e/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.request = (state->m_i80186.intr.request & ~0x00c0) | (data & 0x00c0);
update_interrupt_state(device);
break;
case 0x30/2:
if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.status = (state->m_i80186.intr.status & ~0x8000) | (data & 0x8000);
state->m_i80186.intr.status = (state->m_i80186.intr.status & ~0x0007) | (data & 0x0007);
update_interrupt_state(device);
break;
case 0x32/2:
if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.timer = data & 0x000f;
break;
case 0x34/2:
if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.dma[0] = data & 0x000f;
break;
case 0x36/2:
if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.dma[1] = data & 0x000f;
break;
case 0x38/2:
if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.ext[0] = data & 0x007f;
break;
case 0x3a/2:
if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.ext[1] = data & 0x007f;
break;
case 0x3c/2:
if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.ext[2] = data & 0x001f;
break;
case 0x3e/2:
if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.intr.ext[3] = data & 0x001f;
break;
case 0x50/2:
case 0x58/2:
case 0x60/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4;
internal_timer_update(state, which, data, -1, -1, -1);
break;
@ -1545,14 +1545,14 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0x52/2:
case 0x5a/2:
case 0x62/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4;
internal_timer_update(state, which, -1, data, -1, -1);
break;
case 0x54/2:
case 0x5c/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4;
internal_timer_update(state, which, -1, -1, data, -1);
break;
@ -1560,33 +1560,33 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0x56/2:
case 0x5e/2:
case 0x66/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4;
internal_timer_update(state, which, -1, -1, -1, data);
break;
case 0xa0/2:
if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.mem.upper = data | 0xc038;
break;
case 0xa2/2:
if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.mem.lower = (data & 0x3fff) | 0x0038;
break;
case 0xa4/2:
if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.mem.peripheral = data | 0x0038;
break;
case 0xa6/2:
if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.mem.middle = data | 0x01f8;
break;
case 0xa8/2:
if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
state->m_i80186.mem.middle_size = data | 0x8038;
temp = (state->m_i80186.mem.peripheral & 0xffc0) << 4;
@ -1608,7 +1608,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xc0/2:
case 0xd0/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
state->m_i80186.dma[which].source = (state->m_i80186.dma[which].source & ~0x0ffff) | (data & 0x0ffff);
@ -1616,7 +1616,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xc2/2:
case 0xd2/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
state->m_i80186.dma[which].source = (state->m_i80186.dma[which].source & ~0xf0000) | ((data << 16) & 0xf0000);
@ -1624,7 +1624,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xc4/2:
case 0xd4/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
state->m_i80186.dma[which].dest = (state->m_i80186.dma[which].dest & ~0x0ffff) | (data & 0x0ffff);
@ -1632,7 +1632,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xc6/2:
case 0xd6/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
state->m_i80186.dma[which].dest = (state->m_i80186.dma[which].dest & ~0xf0000) | ((data << 16) & 0xf0000);
@ -1640,7 +1640,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xc8/2:
case 0xd8/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
state->m_i80186.dma[which].count = data;
@ -1648,14 +1648,14 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
case 0xca/2:
case 0xda/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8;
state->m_dma_stream->update();
update_dma_control(state, which, data);
break;
case 0xfe/2:
if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
/* we assume here there that this doesn't happen too often */
/* plus, we can't really remove the old memory range, so we also assume that it's */
@ -1674,7 +1674,7 @@ static WRITE16_DEVICE_HANDLER( i80186_internal_port_w )
break;
default:
logerror("%05X:80186 port %02X = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), offset*2, data, mem_mask);
logerror("%05X:80186 port %02X = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), offset*2, data, mem_mask);
break;
}
}
@ -1830,7 +1830,7 @@ WRITE8_DEVICE_HANDLER( leland_80186_control_w )
if (LOG_COMM)
{
logerror("%04X:80186 control = %02X", cpu_get_previouspc(state->m_i80186.cpu), data);
logerror("%04X:80186 control = %02X", state->m_i80186.cpu->safe_pcbase(), data);
if (!(data & 0x80)) logerror(" /RESET");
if (!(data & 0x40)) logerror(" ZNMI");
if (!(data & 0x20)) logerror(" INT0");
@ -1902,7 +1902,7 @@ WRITE8_DEVICE_HANDLER( leland_80186_command_lo_w )
WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w )
{
leland_sound_state *state = get_safe_token(device);
if (LOG_COMM) logerror("%04X:Write sound command latch hi = %02X\n", cpu_get_previouspc(state->m_i80186.cpu), data);
if (LOG_COMM) logerror("%04X:Write sound command latch hi = %02X\n", state->m_i80186.cpu->safe_pcbase(), data);
state->m_sound_command = (state->m_sound_command & 0x00ff) | (data << 8);
}
@ -1910,7 +1910,7 @@ WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w )
static READ16_DEVICE_HANDLER( main_to_sound_comm_r )
{
leland_sound_state *state = get_safe_token(device);
if (LOG_COMM) logerror("%05X:Read sound command latch = %02X\n", cpu_get_pc(state->m_i80186.cpu), state->m_sound_command);
if (LOG_COMM) logerror("%05X:Read sound command latch = %02X\n", state->m_i80186.cpu->safe_pc(), state->m_sound_command);
return state->m_sound_command;
}
@ -1953,7 +1953,7 @@ static TIMER_CALLBACK( delayed_response_r )
READ8_DEVICE_HANDLER( leland_80186_response_r )
{
leland_sound_state *state = get_safe_token(device);
offs_t pc = cpu_get_previouspc(state->m_i80186.cpu);
offs_t pc = state->m_i80186.cpu->safe_pcbase();
if (LOG_COMM) logerror("%04X:Read sound response latch = %02X\n", pc, state->m_sound_response);
@ -1966,7 +1966,7 @@ READ8_DEVICE_HANDLER( leland_80186_response_r )
static WRITE16_DEVICE_HANDLER( sound_to_main_comm_w )
{
leland_sound_state *state = get_safe_token(device);
if (LOG_COMM) logerror("%05X:Write sound response latch = %02X\n", cpu_get_pc(state->m_i80186.cpu), data);
if (LOG_COMM) logerror("%05X:Write sound response latch = %02X\n", state->m_i80186.cpu->safe_pc(), data);
state->m_sound_response = data;
}
@ -2015,7 +2015,7 @@ static WRITE16_DEVICE_HANDLER( dac_w )
/* set the new value */
d->value = (INT16)(UINT8)data - 0x80;
if (LOG_DAC) logerror("%05X:DAC %d value = %02X\n", cpu_get_pc(state->m_i80186.cpu), offset, (UINT8)data);
if (LOG_DAC) logerror("%05X:DAC %d value = %02X\n", state->m_i80186.cpu->safe_pc(), offset, (UINT8)data);
/* if we haven't overflowed the buffer, add the value value to it */
if (count < DAC_BUFFER_SIZE - 1)
@ -2038,7 +2038,7 @@ static WRITE16_DEVICE_HANDLER( dac_w )
if (ACCESSING_BITS_8_15)
{
d->volume = ((data >> 8) ^ 0x00) / DAC_VOLUME_SCALE;
if (LOG_DAC) logerror("%05X:DAC %d volume = %02X\n", cpu_get_pc(state->m_i80186.cpu), offset, data);
if (LOG_DAC) logerror("%05X:DAC %d volume = %02X\n", state->m_i80186.cpu->safe_pc(), offset, data);
}
}
@ -2071,7 +2071,7 @@ static WRITE16_DEVICE_HANDLER( redline_dac_w )
/* update the volume */
d->volume = (offset & 0xff) / DAC_VOLUME_SCALE;
if (LOG_DAC) logerror("%05X:DAC %d value = %02X, volume = %02X\n", cpu_get_pc(state->m_i80186.cpu), which, data, (offset & 0x1fe) / 2);
if (LOG_DAC) logerror("%05X:DAC %d value = %02X, volume = %02X\n", state->m_i80186.cpu->safe_pc(), which, data, (offset & 0x1fe) / 2);
}
@ -2088,7 +2088,7 @@ static WRITE16_DEVICE_HANDLER( dac_10bit_w )
/* set the new value */
d->value = (INT16)data16 - 0x200;
if (LOG_DAC) logerror("%05X:DAC 10-bit value = %02X\n", cpu_get_pc(state->m_i80186.cpu), data16);
if (LOG_DAC) logerror("%05X:DAC 10-bit value = %02X\n", state->m_i80186.cpu->safe_pc(), data16);
/* if we haven't overflowed the buffer, add the value value to it */
if (count < DAC_BUFFER_SIZE - 1)
@ -2164,7 +2164,7 @@ static WRITE16_DEVICE_HANDLER( ataxx_dac_control )
return;
}
}
logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", cpu_get_pc(state->m_i80186.cpu), 5, offset, data);
logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", state->m_i80186.cpu->safe_pc(), 5, offset, data);
}
@ -2211,11 +2211,11 @@ static READ16_DEVICE_HANDLER( peripheral_r )
if (state->m_is_redline)
return pit8254_r(device, offset | 0x80, mem_mask);
else
logerror("%05X:Unexpected peripheral read %d/%02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset*2);
logerror("%05X:Unexpected peripheral read %d/%02X\n", state->m_i80186.cpu->safe_pc(), select, offset*2);
break;
default:
logerror("%05X:Unexpected peripheral read %d/%02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset*2);
logerror("%05X:Unexpected peripheral read %d/%02X\n", state->m_i80186.cpu->safe_pc(), select, offset*2);
break;
}
return 0xffff;
@ -2257,7 +2257,7 @@ static WRITE16_DEVICE_HANDLER( peripheral_w )
break;
default:
logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset, data);
logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", state->m_i80186.cpu->safe_pc(), select, offset, data);
break;
}
}

2
src/mame/audio/mw8080bw.c
View File

@ -259,7 +259,7 @@ WRITE8_MEMBER(mw8080bw_state::gunfight_audio_w)
break;
default:
logerror("%04x: Unknown sh port write %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: Unknown sh port write %02x\n", space.device().safe_pc(), data);
break;
}
}

12
src/mame/audio/segasnd.c
View File

@ -465,7 +465,7 @@ READ8_DEVICE_HANDLER( sega_usb_status_r )
{
usb_state *usb = get_safe_token(device);
LOG(("%04X:usb_data_r = %02X\n", cpu_get_pc(usb->maincpu), (usb->out_latch & 0x81) | (usb->in_latch & 0x7e)));
LOG(("%04X:usb_data_r = %02X\n", usb->maincpu->safe_pc(), (usb->out_latch & 0x81) | (usb->in_latch & 0x7e)));
device_adjust_icount(usb->maincpu, -200);
@ -496,7 +496,7 @@ WRITE8_DEVICE_HANDLER( sega_usb_data_w )
{
usb_state *usb = get_safe_token(device);
LOG(("%04X:usb_data_w = %02X\n", cpu_get_pc(usb->maincpu), data));
LOG(("%04X:usb_data_w = %02X\n", usb->maincpu->safe_pc(), data));
device->machine().scheduler().synchronize(FUNC(delayed_usb_data_w), data, usb);
/* boost the interleave so that sequences can be sent */
@ -519,7 +519,7 @@ WRITE8_DEVICE_HANDLER( sega_usb_ram_w )
if (usb->in_latch & 0x80)
usb->program_ram[offset] = data;
else
LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", cpu_get_pc(usb->maincpu), offset, data));
LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", usb->maincpu->safe_pc(), offset, data));
}
@ -536,7 +536,7 @@ static READ8_DEVICE_HANDLER( usb_p1_r )
/* bits 0-6 are inputs and map to bits 0-6 of the input latch */
if ((usb->in_latch & 0x7f) != 0)
LOG(("%03X: P1 read = %02X\n", cpu_get_pc(usb->maincpu), usb->in_latch & 0x7f));
LOG(("%03X: P1 read = %02X\n", usb->maincpu->safe_pc(), usb->in_latch & 0x7f));
return usb->in_latch & 0x7f;
}
@ -547,7 +547,7 @@ static WRITE8_DEVICE_HANDLER( usb_p1_w )
/* bit 7 maps to bit 0 on the output latch */
usb->out_latch = (usb->out_latch & 0xfe) | (data >> 7);
LOG(("%03X: P1 write = %02X\n", cpu_get_pc(usb->maincpu), data));
LOG(("%03X: P1 write = %02X\n", usb->maincpu->safe_pc(), data));
}
@ -570,7 +570,7 @@ static WRITE8_DEVICE_HANDLER( usb_p2_w )
if ((old & 0x80) && !(data & 0x80))
usb->t1_clock = 0;
LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", cpu_get_pc(usb->maincpu), data & 3, (data >> 6) & 1, (data >> 7) & 1));
LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", usb->maincpu->safe_pc(), data & 3, (data >> 6) & 1, (data >> 7) & 1));
}

8
src/mame/audio/seibu.c
View File

@ -383,7 +383,7 @@ static WRITE8_HANDLER( seibu_pending_w )
READ16_HANDLER( seibu_main_word_r )
{
//logerror("%06x: seibu_main_word_r(%x)\n",cpu_get_pc(&space->device()),offset);
//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
switch (offset)
{
case 2:
@ -392,14 +392,14 @@ READ16_HANDLER( seibu_main_word_r )
case 5:
return main2sub_pending ? 1 : 0;
default:
//logerror("%06x: seibu_main_word_r(%x)\n",cpu_get_pc(&space->device()),offset);
//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
return 0xffff;
}
}
WRITE16_HANDLER( seibu_main_word_w )
{
//printf("%06x: seibu_main_word_w(%x,%02x)\n",cpu_get_pc(&space->device()),offset,data);
//printf("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
if (ACCESSING_BITS_0_7)
{
switch (offset)
@ -418,7 +418,7 @@ WRITE16_HANDLER( seibu_main_word_w )
main2sub_pending = 1;
break;
default:
//logerror("%06x: seibu_main_word_w(%x,%02x)\n",cpu_get_pc(&space->device()),offset,data);
//logerror("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
break;
}
}

4
src/mame/audio/snes_snd.c
View File

@ -1124,7 +1124,7 @@ READ8_DEVICE_HANDLER( spc_io_r )
case 0x5: /* Port 1 */
case 0x6: /* Port 2 */
case 0x7: /* Port 3 */
// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, cpu_get_pc(&space->device()));
// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space->device().safe_pc());
return spc700->port_in[offset - 4];
case 0x8: //normal RAM, can be read even if the ram disabled flag ($f0 bit 1) is active
case 0x9:
@ -1193,7 +1193,7 @@ WRITE8_DEVICE_HANDLER( spc_io_w )
case 0x5: /* Port 1 */
case 0x6: /* Port 2 */
case 0x7: /* Port 3 */
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, cpu_get_pc(&space->device()));
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space->device().safe_pc());
spc700->port_out[offset - 4] = data;
device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
break;

4
src/mame/audio/taito_en.c
View File

@ -94,7 +94,7 @@ static WRITE16_HANDLER( en_volume_w )
static READ16_HANDLER( es5510_dsp_r )
{
// logerror("%06x: DSP read offset %04x (data is %04x)\n",cpu_get_pc(&space->device()),offset,es5510_dsp_ram[offset]);
// logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
// if (es_tmp) return es5510_dsp_ram[offset];
/*
switch (offset) {
@ -128,7 +128,7 @@ static WRITE16_HANDLER( es5510_dsp_w )
UINT8 *snd_mem = (UINT8 *)space->machine().root_device().memregion("ensoniq.0")->base();
// if (offset>4 && offset!=0x80 && offset!=0xa0 && offset!=0xc0 && offset!=0xe0)
// logerror("%06x: DSP write offset %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
// logerror("%06x: DSP write offset %04x %04x\n",space->device().safe_pc(),offset,data);
COMBINE_DATA(&es5510_dsp_ram[offset]);

4
src/mame/audio/taitosnd.c
View File

@ -110,7 +110,7 @@ WRITE8_DEVICE_HANDLER( tc0140syt_comm_w )
break;
case 0x04: // port status
//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, cpu_get_pc(&space->device()) );
//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space->device().safe_pc() );
/* this does a hi-lo transition to reset the sound cpu */
if (data)
device_set_input_line(tc0140syt->slavecpu, INPUT_LINE_RESET, ASSERT_LINE);
@ -241,7 +241,7 @@ READ8_DEVICE_HANDLER( tc0140syt_slave_comm_r )
break;
case 0x01: // mode #1
//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],cpu_get_pc(&space->device()));
//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space->device().safe_pc());
tc0140syt->status &= ~TC0140SYT_PORT01_FULL;
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;

2
src/mame/drivers/1943.c
View File

@ -44,7 +44,7 @@ READ8_MEMBER(_1943_state::c1943_protection_r)
*/
int data = cpu_get_reg(&space.device(), Z80_BC) >> 8;
// logerror("protection read, PC: %04x Result:%02x\n", cpu_get_pc(&space.device()), data);
// logerror("protection read, PC: %04x Result:%02x\n", space.device().safe_pc(), data);
return data;
}

8
src/mame/drivers/2mindril.c
View File

@ -69,7 +69,7 @@ READ16_MEMBER(_2mindril_state::drill_io_r)
// if (offset * 2 == 0x4)
/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", cpu_get_pc(&space.device()), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", space.device().safe_pc(), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
m_iodata[8/2], m_iodata[0xa/2], m_iodata[0xc/2], m_iodata[0xe/2]);*/
switch(offset)
@ -78,7 +78,7 @@ READ16_MEMBER(_2mindril_state::drill_io_r)
case 0x2/2:
{
int arm_pwr = ioport("IN0")->read();//throw
//popmessage("PC=%08x %02x",cpu_get_pc(&space.device()),arm_pwr);
//popmessage("PC=%08x %02x",space.device().safe_pc(),arm_pwr);
if(arm_pwr > 0xe0) return ~0x1800;
if(arm_pwr > 0xc0) return ~0x1400;
@ -88,7 +88,7 @@ READ16_MEMBER(_2mindril_state::drill_io_r)
}
case 0x4/2: return (m_defender_sensor) | (m_shutter_sensor);
case 0xe/2: return ioport("IN2")->read();//coins
// default: printf("PC=%08x [%04x] -> %04x R\n", cpu_get_pc(&space.device()), offset * 2, m_iodata[offset]);
// default: printf("PC=%08x [%04x] -> %04x R\n", space.device().safe_pc(), offset * 2, m_iodata[offset]);
}
return 0xffff;
@ -110,7 +110,7 @@ WRITE16_MEMBER(_2mindril_state::drill_io_w)
}
// if(data != 0 && offset != 8)
// printf("PC=%08x [%04x] <- %04x W\n", cpu_get_pc(&space.device()), offset * 2, data);
// printf("PC=%08x [%04x] <- %04x W\n", space.device().safe_pc(), offset * 2, data);
}
/*

12
src/mame/drivers/39in1.c
View File

@ -1370,13 +1370,13 @@ READ32_MEMBER(_39in1_state::unknown_r)
READ32_MEMBER(_39in1_state::cpld_r)
{
//if (cpu_get_pc(&space.device()) != 0xe3af4) printf("CPLD read @ %x (PC %x state %d)\n", offset, cpu_get_pc(&space.device()), state);
//if (space.device().safe_pc() != 0xe3af4) printf("CPLD read @ %x (PC %x state %d)\n", offset, space.device().safe_pc(), state);
if (cpu_get_pc(&space.device()) == 0x3f04)
if (space.device().safe_pc() == 0x3f04)
{
return 0xf0; // any non-zero value works here
}
else if (cpu_get_pc(&space.device()) == 0xe3af4)
else if (space.device().safe_pc() == 0xe3af4)
{
return ioport("MCUIPT")->read();
}
@ -1431,11 +1431,11 @@ WRITE32_MEMBER(_39in1_state::cpld_w)
m_seed = data<<16;
}
if (cpu_get_pc(&space.device()) == 0x280c)
if (space.device().safe_pc() == 0x280c)
{
m_state = 1;
}
if (cpu_get_pc(&space.device()) == 0x2874)
if (space.device().safe_pc() == 0x2874)
{
m_state = 2;
m_magic = space.read_byte(0xa02d4ff0);
@ -1446,7 +1446,7 @@ WRITE32_MEMBER(_39in1_state::cpld_w)
#if 0
else
{
printf("%08x: CPLD_W: %08x = %08x & %08x\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
printf("%08x: CPLD_W: %08x = %08x & %08x\n", space.device().safe_pc(), offset, data, mem_mask);
}
#endif
}

4
src/mame/drivers/8080bw.c
View File

@ -1731,12 +1731,12 @@ INPUT_PORTS_END
READ8_MEMBER(_8080bw_state::indianbt_r)
{
switch(cpu_get_pc(&space.device()))
switch(space.device().safe_pc())
{
case 0x5fed: return 0x10;
case 0x5ffc: return 0;
}
logerror("unknown port 0 read @ %x\n",cpu_get_pc(&space.device()));
logerror("unknown port 0 read @ %x\n",space.device().safe_pc());
return machine().rand();
}

2
src/mame/drivers/88games.c
View File

@ -269,7 +269,7 @@ static KONAMI_SETLINES_CALLBACK( k88games_banking )
UINT8 *RAM = state->memregion("maincpu")->base();
int offs;
logerror("%04x: bank select %02x\n", cpu_get_pc(device), lines);
logerror("%04x: bank select %02x\n", device->safe_pc(), lines);
/* bits 0-2 select ROM bank for 0000-1fff */
/* bit 3: when 1, palette RAM at 1000-1fff */

2
src/mame/drivers/acommand.c
View File

@ -305,7 +305,7 @@ WRITE16_MEMBER(acommand_state::ac_txscroll_w)
READ16_MEMBER(acommand_state::ac_devices_r)
{
logerror("(PC=%06x) read at %04x\n",cpu_get_pc(&space.device()),offset*2);
logerror("(PC=%06x) read at %04x\n",space.device().safe_pc(),offset*2);
switch(offset)
{

2
src/mame/drivers/aeroboto.c
View File

@ -34,7 +34,7 @@ READ8_MEMBER(aeroboto_state::aeroboto_201_r)
/* serie of values to be returned from 3004, and display "PASS 201" if it is */
static const UINT8 res[4] = { 0xff, 0x9f, 0x1b, 0x03 };
logerror("PC %04x: read 3004\n", cpu_get_pc(&space.device()));
logerror("PC %04x: read 3004\n", space.device().safe_pc());
return res[(m_count++) & 3];
}

6
src/mame/drivers/albazg.c
View File

@ -134,13 +134,13 @@ WRITE8_MEMBER(albazg_state::yumefuda_cram_w)
/*Custom RAM (Thrash Protection)*/
READ8_MEMBER(albazg_state::custom_ram_r)
{
// logerror("Custom RAM read at %02x PC = %x\n", offset + 0xaf80, cpu_get_pc(&space.device()));
// logerror("Custom RAM read at %02x PC = %x\n", offset + 0xaf80, space.device().safe_pc());
return m_cus_ram[offset];// ^ 0x55;
}
WRITE8_MEMBER(albazg_state::custom_ram_w)
{
// logerror("Custom RAM write at %02x : %02x PC = %x\n", offset + 0xaf80, data, cpu_get_pc(&space.device()));
// logerror("Custom RAM write at %02x : %02x PC = %x\n", offset + 0xaf80, data, space.device().safe_pc());
if(m_prot_lock)
m_cus_ram[offset] = data;
}
@ -148,7 +148,7 @@ WRITE8_MEMBER(albazg_state::custom_ram_w)
/*this might be used as NVRAM commands btw*/
WRITE8_MEMBER(albazg_state::prot_lock_w)
{
// logerror("PC %04x Prot lock value written %02x\n", cpu_get_pc(&space.device()), data);
// logerror("PC %04x Prot lock value written %02x\n", space.device().safe_pc(), data);
m_prot_lock = data;
}

4
src/mame/drivers/aleck64.c
View File

@ -188,7 +188,7 @@ static WRITE32_HANDLER( aleck_dips_w )
break;
default:
logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, cpu_get_pc(&space->device()));
logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, space->device().safe_pc());
}
}
@ -227,7 +227,7 @@ static READ32_HANDLER( aleck_dips_r )
}
default:
{
logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, cpu_get_pc(&space->device()));
logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, space->device().safe_pc());
return 0;
}
}

10
src/mame/drivers/alpha68k.c
View File

@ -216,14 +216,14 @@ WRITE16_MEMBER(alpha68k_state::tnextspc_coin_counters_w)
WRITE16_MEMBER(alpha68k_state::tnextspc_unknown_w)
{
logerror("tnextspc_unknown_w : PC = %04x - offset = %04x - data = %04x\n", cpu_get_pc(&space.device()), offset, data);
logerror("tnextspc_unknown_w : PC = %04x - offset = %04x - data = %04x\n", space.device().safe_pc(), offset, data);
if (offset == 0)
alpha68k_flipscreen_w(machine(), data & 0x100);
}
WRITE16_MEMBER(alpha68k_state::alpha_microcontroller_w)
{
logerror("%04x: Alpha write trigger at %04x (%04x)\n", cpu_get_pc(&space.device()), offset, data);
logerror("%04x: Alpha write trigger at %04x (%04x)\n", space.device().safe_pc(), offset, data);
/* 0x44 = coin clear signal to microcontroller? */
if (offset == 0x2d && ACCESSING_BITS_0_7)
alpha68k_flipscreen_w(machine(), data & 1);
@ -404,7 +404,7 @@ READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
break;
}
logerror("%04x: Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
logerror("%04x: Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
return 0; /* Values returned don't matter */
}
@ -498,7 +498,7 @@ READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
break;
}
logerror("%04x: Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
logerror("%04x: Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
return 0; /* Values returned don't matter */
}
@ -643,7 +643,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
break;
}
logerror("%04x: Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
logerror("%04x: Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
return 0; /* Values returned don't matter */
}

4
src/mame/drivers/artmagic.c
View File

@ -124,7 +124,7 @@ WRITE16_MEMBER(artmagic_state::control_w)
oki->set_bank_base((((data >> 4) & 1) * 0x40000) % oki->region()->bytes());
}
logerror("%06X:control_w(%d) = %04X\n", cpu_get_pc(&space.device()), offset, data);
logerror("%06X:control_w(%d) = %04X\n", space.device().safe_pc(), offset, data);
}
@ -145,7 +145,7 @@ static TIMER_CALLBACK( irq_off )
READ16_MEMBER(artmagic_state::ultennis_hack_r)
{
/* IRQ5 points to: jsr (a5); rte */
UINT32 pc = cpu_get_pc(&space.device());
UINT32 pc = space.device().safe_pc();
if (pc == 0x18c2 || pc == 0x18e4)
{
m_hack_irq = 1;

16
src/mame/drivers/astrafr.c
View File

@ -53,7 +53,7 @@ public:
DECLARE_READ8_MEMBER( astra_fgpa_r )
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
if (offset==fgpa_first_read_addr)
{
@ -68,7 +68,7 @@ public:
DECLARE_WRITE8_MEMBER( astra_fgpa_w )
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
if (offset==fgpa_rom_write_addr)
{
@ -84,7 +84,7 @@ public:
/* 2nd copy for the 2nd board (assume same addresses for now */
DECLARE_READ8_MEMBER( astra_fgpa_slave_r )
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
if (offset==fgpa_first_read_addr)
{
@ -99,7 +99,7 @@ public:
DECLARE_WRITE8_MEMBER( astra_fgpa_slave_w )
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
if (offset==fgpa_rom_write_addr)
{
@ -126,7 +126,7 @@ public:
READ32_MEMBER(astrafr_state::astrafr_mem_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_maincpu, offset * 4);
switch ( cs )
@ -153,7 +153,7 @@ READ32_MEMBER(astrafr_state::astrafr_mem_r)
WRITE32_MEMBER(astrafr_state::astrafr_mem_w)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int address = offset * 4;
int cs = m68340_get_cs(m_maincpu, address);
@ -183,7 +183,7 @@ WRITE32_MEMBER(astrafr_state::astrafr_mem_w)
READ32_MEMBER(astrafr_state::astrafr_slave_mem_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_slavecpu, offset * 4);
switch ( cs )
@ -208,7 +208,7 @@ READ32_MEMBER(astrafr_state::astrafr_slave_mem_r)
WRITE32_MEMBER(astrafr_state::astrafr_slave_mem_w)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int address = offset * 4;
int cs = m68340_get_cs(m_slavecpu, address);

6
src/mame/drivers/astrocorp.c
View File

@ -192,7 +192,7 @@ WRITE16_MEMBER(astrocorp_state::astrocorp_sound_bank_w)
{
okim6295_device *oki = downcast<okim6295_device *>(device);
oki->set_bank_base(0x40000 * ((data >> 8) & 1));
// logerror("CPU #0 PC %06X: OKI bank %08X\n", cpu_get_pc(&space->device()), data);
// logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
}
}
@ -203,7 +203,7 @@ WRITE16_MEMBER(astrocorp_state::skilldrp_sound_bank_w)
{
okim6295_device *oki = downcast<okim6295_device *>(device);
oki->set_bank_base(0x40000 * (data & 1));
// logerror("CPU #0 PC %06X: OKI bank %08X\n", cpu_get_pc(&space->device()), data);
// logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
}
}
@ -274,7 +274,7 @@ WRITE16_MEMBER(astrocorp_state::astrocorp_screen_enable_w)
COMBINE_DATA(&m_screen_enable);
// popmessage("%04X",data);
if (m_screen_enable & (~1))
logerror("CPU #0 PC %06X: screen enable = %04X\n", cpu_get_pc(&space.device()), m_screen_enable);
logerror("CPU #0 PC %06X: screen enable = %04X\n", space.device().safe_pc(), m_screen_enable);
}
READ16_MEMBER(astrocorp_state::astrocorp_unk_r)

18
src/mame/drivers/atarigt.c
View File

@ -283,7 +283,7 @@ static void tmek_protection_w(address_space *space, offs_t offset, UINT16 data)
Read ($38488)
*/
if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", cpu_get_previouspc(&space->device()), offset, data);
if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
/* track accesses */
tmek_update_mode(state, offset);
@ -299,7 +299,7 @@ static void tmek_protection_w(address_space *space, offs_t offset, UINT16 data)
static void tmek_protection_r(address_space *space, offs_t offset, UINT16 *data)
{
atarigt_state *state = space->machine().driver_data<atarigt_state>();
if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", cpu_get_previouspc(&space->device()), offset);
if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", space->device().safe_pcbase(), offset);
/* track accesses */
tmek_update_mode(state, offset);
@ -368,7 +368,7 @@ static void primrage_protection_w(address_space *space, offs_t offset, UINT16 da
atarigt_state *state = space->machine().driver_data<atarigt_state>();
if (LOG_PROTECTION)
{
UINT32 pc = cpu_get_previouspc(&space->device());
UINT32 pc = space->device().safe_pcbase();
switch (pc)
{
/* protection code from 20f90 - 21000 */
@ -401,7 +401,7 @@ static void primrage_protection_w(address_space *space, offs_t offset, UINT16 da
/* catch anything else */
default:
logerror("%06X:Unknown protection W@%06X = %04X\n", cpu_get_previouspc(&space->device()), offset, data);
logerror("%06X:Unknown protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
break;
}
}
@ -442,7 +442,7 @@ static void primrage_protection_r(address_space *space, offs_t offset, UINT16 *d
if (LOG_PROTECTION)
{
UINT32 pc = cpu_get_previouspc(&space->device());
UINT32 pc = space->device().safe_pcbase();
UINT32 p1, p2, a6;
switch (pc)
{
@ -505,7 +505,7 @@ if (LOG_PROTECTION)
/* catch anything else */
default:
logerror("%06X:Unknown protection R@%06X\n", cpu_get_previouspc(&space->device()), offset);
logerror("%06X:Unknown protection R@%06X\n", space->device().safe_pcbase(), offset);
break;
}
}
@ -1244,19 +1244,19 @@ ROM_END
WRITE32_MEMBER(atarigt_state::tmek_pf_w)
{
offs_t pc = cpu_get_pc(&space.device());
offs_t pc = space.device().safe_pc();
/* protected version */
if (pc == 0x2EB3C || pc == 0x2EB48)
{
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space.device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A4) - 2);
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A4) - 2);
/* skip these writes to make more stuff visible */
return;
}
/* unprotected version */
if (pc == 0x25834 || pc == 0x25860)
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space.device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A3) - 2);
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A3) - 2);
atarigen_playfield32_w(&space, offset, data, mem_mask);
}

8
src/mame/drivers/atarigx2.c
View File

@ -146,7 +146,7 @@ WRITE32_MEMBER(atarigx2_state::mo_command_w)
WRITE32_MEMBER(atarigx2_state::atarigx2_protection_w)
{
{
int pc = cpu_get_previouspc(&space.device());
int pc = space.device().safe_pcbase();
// if (pc == 0x11cbe || pc == 0x11c30)
// logerror("%06X:Protection W@%04X = %04X (result to %06X)\n", pc, offset, data, cpu_get_reg(&space.device(), M68K_A2));
// else
@ -1126,14 +1126,14 @@ READ32_MEMBER(atarigx2_state::atarigx2_protection_r)
result = machine().rand() << 16;
else
result = 0xffff << 16;
logerror("%06X:Unhandled protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset, result);
logerror("%06X:Unhandled protection R@%04X = %04X\n", space.device().safe_pcbase(), offset, result);
}
}
if (ACCESSING_BITS_16_31)
logerror("%06X:Protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset * 4, result >> 16);
logerror("%06X:Protection R@%04X = %04X\n", space.device().safe_pcbase(), offset * 4, result >> 16);
else
logerror("%06X:Protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset * 4 + 2, result);
logerror("%06X:Protection R@%04X = %04X\n", space.device().safe_pcbase(), offset * 4 + 2, result);
return result;
}

10
src/mame/drivers/backfire.c
View File

@ -189,7 +189,7 @@ READ32_MEMBER(backfire_state::backfire_eeprom_r)
READ32_MEMBER(backfire_state::backfire_control2_r)
{
// logerror("%08x:Read eprom %08x (%08x)\n", cpu_get_pc(&space.device()), offset << 1, mem_mask);
// logerror("%08x:Read eprom %08x (%08x)\n", space.device().safe_pc(), offset << 1, mem_mask);
return (m_eeprom->read_bit() << 24) | ioport("IN1")->read() | (ioport("IN1")->read() << 16);
}
@ -197,7 +197,7 @@ READ32_MEMBER(backfire_state::backfire_control2_r)
READ32_MEMBER(backfire_state::backfire_control3_r)
{
// logerror("%08x:Read eprom %08x (%08x)\n", cpu_get_pc(&space.device()), offset << 1, mem_mask);
// logerror("%08x:Read eprom %08x (%08x)\n", space.device().safe_pc(), offset << 1, mem_mask);
return (m_eeprom->read_bit() << 24) | ioport("IN2")->read() | (ioport("IN2")->read() << 16);
}
#endif
@ -699,10 +699,10 @@ static void descramble_sound( running_machine &machine )
READ32_MEMBER(backfire_state::backfire_speedup_r)
{
//mame_printf_debug( "%08x\n",cpu_get_pc(&space.device()));
//mame_printf_debug( "%08x\n",space.device().safe_pc());
if (cpu_get_pc(&space.device() )== 0xce44) device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfire
if (cpu_get_pc(&space.device()) == 0xcee4) device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfirea
if (space.device() .safe_pc()== 0xce44) device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfire
if (space.device().safe_pc() == 0xcee4) device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfirea
return m_mainram[0x18/4];
}

2
src/mame/drivers/bbusters.c
View File

@ -279,7 +279,7 @@ READ16_MEMBER(bbusters_state::control_3_r)
WRITE16_MEMBER(bbusters_state::gun_select_w)
{
logerror("%08x: gun r\n",cpu_get_pc(&space.device()));
logerror("%08x: gun r\n",space.device().safe_pc());
device_set_input_line(&space.device(), 2, HOLD_LINE);

4
src/mame/drivers/beathead.c
View File

@ -498,7 +498,7 @@ ROM_END
READ32_MEMBER( beathead_state::speedup_r )
{
int result = *m_speedup_data;
if ((cpu_get_previouspc(&space.device()) & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
if ((space.device().safe_pcbase() & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
device_spin_until_interrupt(&space.device());
return result;
}
@ -507,7 +507,7 @@ READ32_MEMBER( beathead_state::speedup_r )
READ32_MEMBER( beathead_state::movie_speedup_r )
{
int result = *m_movie_speedup_data;
if ((cpu_get_previouspc(&space.device()) & 0xfffff) == 0x00a88 && (cpu_get_reg(&space.device(), ASAP_R28) & 0xfffff) == 0x397c0 &&
if ((space.device().safe_pcbase() & 0xfffff) == 0x00a88 && (cpu_get_reg(&space.device(), ASAP_R28) & 0xfffff) == 0x397c0 &&
m_movie_speedup_data[4] == cpu_get_reg(&space.device(), ASAP_R1))
{
UINT32 temp = (INT16)result + m_movie_speedup_data[4] * 262;

8
src/mame/drivers/bfcobra.c
View File

@ -779,7 +779,7 @@ READ8_MEMBER(bfcobra_state::ramdac_r)
}
default:
{
mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", cpu_get_previouspc(&space.device()));
mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", space.device().safe_pcbase());
}
}
@ -930,7 +930,7 @@ READ8_MEMBER(bfcobra_state::chipset_r)
}
default:
{
mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, cpu_get_previouspc(&space.device()));
mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, space.device().safe_pcbase());
}
}
@ -946,7 +946,7 @@ WRITE8_MEMBER(bfcobra_state::chipset_w)
case 0x03:
{
if (data > 0x3f)
popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(&space.device()), data);
popmessage("%x: Unusual bank access (%x)\n", space.device().safe_pcbase(), data);
data &= 0x3f;
m_bank_data[offset] = data;
@ -1020,7 +1020,7 @@ WRITE8_MEMBER(bfcobra_state::chipset_w)
}
default:
{
mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, cpu_get_previouspc(&space.device()));
mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, space.device().safe_pcbase());
}
}
}

14
src/mame/drivers/bfm_sc4h.c
View File

@ -64,7 +64,7 @@ UINT8 read_input_matrix(running_machine &machine, int row)
READ16_MEMBER(sc4_state::sc4_cs1_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
if (offset<0x100000/2)
{
@ -113,7 +113,7 @@ READ16_MEMBER(sc4_state::sc4_cs1_r)
READ16_MEMBER(sc4_state::sc4_mem_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68307_get_cs(m_maincpu, offset * 2);
int base = 0, end = 0, base2 = 0, end2 = 0;
// if (!(debugger_access())) printf("cs is %d\n", cs);
@ -269,7 +269,7 @@ WRITE8_MEMBER(sc4_state::mux_output2_w)
WRITE16_MEMBER(sc4_state::sc4_mem_w)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68307_get_cs(m_maincpu, offset * 2);
int base = 0, end = 0, base2 = 0, end2 = 0;
@ -395,7 +395,7 @@ ADDRESS_MAP_END
READ32_MEMBER(sc4_adder4_state::adder4_mem_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_adder4cpu, offset * 4);
switch ( cs )
@ -417,7 +417,7 @@ READ32_MEMBER(sc4_adder4_state::adder4_mem_r)
WRITE32_MEMBER(sc4_adder4_state::adder4_mem_w)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_adder4cpu, offset * 4);
switch ( cs )
@ -554,7 +554,7 @@ void bfm_sc4_68307_portb_w(address_space *space, bool dedicated, UINT16 data, UI
{
// if (dedicated == false)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
//m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
// serial output to the VFD at least..
logerror("%08x bfm_sc4_68307_portb_w %04x %04x\n", pc, data, line_mask);
@ -567,7 +567,7 @@ void bfm_sc4_68307_portb_w(address_space *space, bool dedicated, UINT16 data, UI
}
UINT8 bfm_sc4_68307_porta_r(address_space *space, bool dedicated, UINT8 line_mask)
{
int pc = cpu_get_pc(&space->device());
int pc = space->device().safe_pc();
logerror("%08x bfm_sc4_68307_porta_r\n", pc);
return space->machine().rand();
}

4
src/mame/drivers/bfm_swp.c
View File

@ -146,7 +146,7 @@ protected:
READ32_MEMBER(bfm_swp_state::bfm_swp_mem_r)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_maincpu, offset * 4);
switch ( cs )
@ -168,7 +168,7 @@ READ32_MEMBER(bfm_swp_state::bfm_swp_mem_r)
WRITE32_MEMBER(bfm_swp_state::bfm_swp_mem_w)
{
int pc = cpu_get_pc(&space.device());
int pc = space.device().safe_pc();
int cs = m68340_get_cs(m_maincpu, offset * 4);
switch ( cs )

2
src/mame/drivers/bigevglf.c
View File

@ -81,7 +81,7 @@ static TIMER_CALLBACK( from_sound_latch_callback )
}
WRITE8_MEMBER(bigevglf_state::beg_fromsound_w)/* write to D800 sets bit 1 in status */
{
machine().scheduler().synchronize(FUNC(from_sound_latch_callback), (cpu_get_pc(&space.device()) << 16) | data);
machine().scheduler().synchronize(FUNC(from_sound_latch_callback), (space.device().safe_pc() << 16) | data);
}
READ8_MEMBER(bigevglf_state::beg_fromsound_r)

4
src/mame/drivers/bionicc.c
View File

@ -73,14 +73,14 @@
WRITE16_MEMBER(bionicc_state::hacked_controls_w)
{
logerror("%06x: hacked_controls_w %04x %02x\n", cpu_get_pc(&space.device()), offset, data);
logerror("%06x: hacked_controls_w %04x %02x\n", space.device().safe_pc(), offset, data);
COMBINE_DATA(&m_inp[offset]);
}
READ16_MEMBER(bionicc_state::hacked_controls_r)
{
logerror("%06x: hacked_controls_r %04x %04x\n", cpu_get_pc(&space.device()), offset, m_inp[offset]);
logerror("%06x: hacked_controls_r %04x %04x\n", space.device().safe_pc(), offset, m_inp[offset]);
return m_inp[offset];
}

2
src/mame/drivers/bking.c
View File

@ -196,7 +196,7 @@ READ8_MEMBER(bking_state::bking3_68705_port_c_r)
int port_c_in = 0;
if (main_sent) port_c_in |= 0x01;
if (!mcu_sent) port_c_in |= 0x02;
//logerror("%04x: 68705 port C read %02x\n",cpu_get_pc(&space.device()),port_c_in);
//logerror("%04x: 68705 port C read %02x\n",space.device().safe_pc(),port_c_in);
return port_c_in;
}
#endif

2
src/mame/drivers/blockhl.c
View File

@ -335,7 +335,7 @@ static KONAMI_SETLINES_CALLBACK( blockhl_banking )
/* other bits unknown */
if ((lines & 0x84) != 0x80)
logerror("%04x: setlines %02x\n", cpu_get_pc(device), lines);
logerror("%04x: setlines %02x\n", device->safe_pc(), lines);
}

4
src/mame/drivers/bmcbowl.c
View File

@ -203,7 +203,7 @@ READ16_MEMBER(bmcbowl_state::bmc_random_read)
READ16_MEMBER(bmcbowl_state::bmc_protection_r)
{
switch(cpu_get_previouspc(&space.device()))
switch(space.device().safe_pcbase())
{
case 0xca68:
switch(cpu_get_reg(&space.device(), M68K_D2))
@ -214,7 +214,7 @@ READ16_MEMBER(bmcbowl_state::bmc_protection_r)
}
break;
}
logerror("Protection read @ %X\n",cpu_get_previouspc(&space.device()));
logerror("Protection read @ %X\n",space.device().safe_pcbase());
return machine().rand();
}

16
src/mame/drivers/btime.c
View File

@ -211,11 +211,11 @@ static void btime_decrypt( address_space *space )
/* xxxx xxx1 xxxx x1xx are encrypted. */
/* get the address of the next opcode */
addr = cpu_get_pc(&space->device());
addr = space->device().safe_pc();
/* however if the previous instruction was JSR (which caused a write to */
/* the stack), fetch the address of the next instruction. */
addr1 = cpu_get_previouspc(&space->device());
addr1 = space->device().safe_pcbase();
src1 = (addr1 < 0x9000) ? state->m_rambase : state->memregion("maincpu")->base();
if (decrypted[addr1] == 0x20) /* JSR $xxxx */
addr = src1[addr1 + 1] + 256 * src1[addr1 + 2];
@ -240,7 +240,7 @@ WRITE8_MEMBER(btime_state::lnc_w)
else if (offset == 0x9000) { return; } /* AM_NOP */
else if (offset == 0x9002) { audio_command_w(space, 0, data); return; }
else if (offset >= 0xb000 && offset <= 0xb1ff) ;
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;
@ -258,7 +258,7 @@ WRITE8_MEMBER(btime_state::mmonkey_w)
else if (offset == 0x9000) { return; } /* AM_NOP */
else if (offset == 0x9002) { audio_command_w(space, 0, data); return; }
else if (offset >= 0xb000 && offset <= 0xbfff) { mmonkey_protection_w(space, offset - 0xb000, data); return; }
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;
@ -276,7 +276,7 @@ WRITE8_MEMBER(btime_state::btime_w)
else if (offset == 0x4002) btime_video_control_w(space, 0, data);
else if (offset == 0x4003) audio_command_w(space, 0, data);
else if (offset == 0x4004) bnj_scroll1_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;
@ -295,7 +295,7 @@ WRITE8_MEMBER(btime_state::tisland_w)
else if (offset == 0x4004) bnj_scroll1_w(space, 0, data);
else if (offset == 0x4005) bnj_scroll2_w(space, 0, data);
// else if (offset == 0x8000) btime_video_control_w(space,0,data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;
@ -313,7 +313,7 @@ WRITE8_MEMBER(btime_state::zoar_w)
else if (offset == 0x9804) bnj_scroll2_w(space, 0, data);
else if (offset == 0x9805) bnj_scroll1_w(space, 0, data);
else if (offset == 0x9806) audio_command_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;
@ -327,7 +327,7 @@ WRITE8_MEMBER(btime_state::disco_w)
else if (offset >= 0x8000 && offset <= 0x881f) ;
else if (offset == 0x9a00) audio_command_w(space, 0, data);
else if (offset == 0x9c00) disco_video_control_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
m_rambase[offset] = data;

2
src/mame/drivers/cabaret.c
View File

@ -140,7 +140,7 @@ WRITE8_MEMBER(cabaret_state::cabaret_nmi_and_coins_w)
{
if ((m_nmi_enable ^ data) & (~0xdd))
{
logerror("PC %06X: nmi_and_coins = %02x\n",cpu_get_pc(&space.device()),data);
logerror("PC %06X: nmi_and_coins = %02x\n",space.device().safe_pc(),data);
// popmessage("%02x",data);
}

4
src/mame/drivers/calchase.c
View File

@ -356,7 +356,7 @@ static void mxtc_config_w(device_t *busdevice, device_t *device, int function, i
#if 0
if ((state->m_mxtc_config_reg[0x63] & 0x50) | ( state->m_mxtc_config_reg[0x63] & 0xA0)) // Only DO if comes a change to disable ROM.
{
if ( cpu_get_pc(busdevice->machine().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
}
#endif
@ -961,7 +961,7 @@ MACHINE_CONFIG_END
READ32_MEMBER(calchase_state::calchase_idle_skip_r)
{
if(cpu_get_pc(&space.device())==0x1406f48)
if(space.device().safe_pc()==0x1406f48)
device_spin_until_interrupt(m_maincpu);
return m_idle_skip_ram;

14
src/mame/drivers/cave.c
View File

@ -263,7 +263,7 @@ READ16_MEMBER(cave_state::soundlatch_ack_r)
}
else
{
logerror("CPU #1 - PC %04X: Sound Buffer 2 Underflow Error\n", cpu_get_pc(&space.device()));
logerror("CPU #1 - PC %04X: Sound Buffer 2 Underflow Error\n", space.device().safe_pc());
return 0xff;
}
}
@ -276,7 +276,7 @@ WRITE8_MEMBER(cave_state::soundlatch_ack_w)
if (m_soundbuf_len < 32)
m_soundbuf_len++;
else
logerror("CPU #1 - PC %04X: Sound Buffer 2 Overflow Error\n", cpu_get_pc(&space.device()));
logerror("CPU #1 - PC %04X: Sound Buffer 2 Overflow Error\n", space.device().safe_pc());
}
@ -1051,7 +1051,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(cave_state::hotdogst_rombank_w)
{
if (data & ~0x0f)
logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
membank("bank2")->set_entry(data & 0x0f);
}
@ -1088,7 +1088,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(cave_state::mazinger_rombank_w)
{
if (data & ~0x07)
logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
membank("bank2")->set_entry(data & 0x07);
}
@ -1119,7 +1119,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(cave_state::metmqstr_rombank_w)
{
if (data & ~0x0f)
logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
membank("bank1")->set_entry(data & 0x0f);
}
@ -1167,7 +1167,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(cave_state::pwrinst2_rombank_w)
{
if (data & ~0x07)
logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
membank("bank1")->set_entry(data & 0x07);
}
@ -1209,7 +1209,7 @@ WRITE8_MEMBER(cave_state::mirror_ram_w)
WRITE8_MEMBER(cave_state::sailormn_rombank_w)
{
if (data & ~0x1f)
logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
membank("bank1")->set_entry(data & 0x1f);
}

2
src/mame/drivers/cbasebal.c
View File

@ -31,7 +31,7 @@ WRITE8_MEMBER(cbasebal_state::cbasebal_bankswitch_w)
{
/* bits 0-4 select ROM bank */
//logerror("%04x: bankswitch %02x\n", cpu_get_pc(&space.device()), data);
//logerror("%04x: bankswitch %02x\n", space.device().safe_pc(), data);
membank("bank1")->set_entry(data & 0x1f);
/* bit 5 used but unknown */

4
src/mame/drivers/cbuster.c
View File

@ -75,7 +75,7 @@ WRITE16_MEMBER(cbuster_state::twocrude_control_w)
break;
}
logerror("Warning %04x- %02x written to control %02x\n", cpu_get_pc(&space.device()), data, offset);
logerror("Warning %04x- %02x written to control %02x\n", space.device().safe_pc(), data, offset);
}
READ16_MEMBER(cbuster_state::twocrude_control_r)
@ -90,7 +90,7 @@ READ16_MEMBER(cbuster_state::twocrude_control_r)
return ioport("DSW")->read();
case 4: /* Protection */
logerror("%04x : protection control read at 30c000 %d\n", cpu_get_pc(&space.device()), offset);
logerror("%04x : protection control read at 30c000 %d\n", space.device().safe_pc(), offset);
return m_prot;
case 6: /* Credits, VBL in byte 7 */

14
src/mame/drivers/cd32.c
View File

@ -1236,7 +1236,7 @@ static void cndypuzl_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//(*state->m_chip_ram_w)(0x051c02, 0x0000);
@ -1255,7 +1255,7 @@ static void haremchl_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//amiga_chip_ram_w8(state, 0x002907, 0x00);
@ -1275,7 +1275,7 @@ static void lsrquiz_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//amiga_chip_ram_w8(state, 0x001e1b, 0x00);
@ -1296,7 +1296,7 @@ static void lsrquiz2_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//amiga_chip_ram_w8(state, 0x046107, 0x00);
@ -1316,7 +1316,7 @@ static void lasstixx_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//amiga_chip_ram_w8(state, 0x00281c, 0x00);
@ -1336,7 +1336,7 @@ static void mgnumber_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//(*state->m_chip_ram_w)(0x04bfa0, 0x0000);
@ -1355,7 +1355,7 @@ static void mgprem11_input_hack(running_machine &machine)
{
cd32_state *state = machine.driver_data<cd32_state>();
if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
{
//amiga_chip_ram_w8(state, 0x044f7e, 0x00);

2
src/mame/drivers/cdi.c
View File

@ -44,7 +44,7 @@ INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt,
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
}
}
#else

2
src/mame/drivers/centiped.c
View File

@ -612,7 +612,7 @@ WRITE8_MEMBER(centiped_state::mazeinv_input_select_w)
READ8_MEMBER(centiped_state::bullsdrt_data_port_r)
{
switch (cpu_get_pc(&space.device()))
switch (space.device().safe_pc())
{
case 0x0033:
case 0x6b19:

2
src/mame/drivers/chaknpop.c
View File

@ -130,7 +130,7 @@ WRITE8_MEMBER(chaknpop_state::unknown_port_2_w)
WRITE8_MEMBER(chaknpop_state::coinlock_w)
{
logerror("%04x: coin lock %sable\n", cpu_get_pc(&space.device()), data ? "dis" : "en");
logerror("%04x: coin lock %sable\n", space.device().safe_pc(), data ? "dis" : "en");
}

10
src/mame/drivers/cninja.c
View File

@ -91,7 +91,7 @@ READ16_MEMBER(cninja_state::cninja_irq_r)
return 0;
}
logerror("%08x: Unmapped IRQ read %d\n", cpu_get_pc(&space.device()), offset);
logerror("%08x: Unmapped IRQ read %d\n", space.device().safe_pc(), offset);
return 0;
}
@ -106,7 +106,7 @@ WRITE16_MEMBER(cninja_state::cninja_irq_w)
0xc8: Raster IRQ turned on (68k IRQ level 4)
0xd8: Raster IRQ turned on (68k IRQ level 3)
*/
logerror("%08x: IRQ write %d %08x\n", cpu_get_pc(&space.device()), offset, data);
logerror("%08x: IRQ write %d %08x\n", space.device().safe_pc(), offset, data);
m_irq_mask = data & 0xff;
return;
@ -123,7 +123,7 @@ WRITE16_MEMBER(cninja_state::cninja_irq_w)
return;
}
logerror("%08x: Unmapped IRQ write %d %04x\n", cpu_get_pc(&space.device()), offset, data);
logerror("%08x: Unmapped IRQ write %d %04x\n", space.device().safe_pc(), offset, data);
}
READ16_MEMBER(cninja_state::robocop2_prot_r)
@ -137,10 +137,10 @@ READ16_MEMBER(cninja_state::robocop2_prot_r)
case 0x4e6: /* Dip switches */
return ioport("DSW")->read();
case 0x504: /* PC: 6b6. b4, 2c, 36 written before read */
logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space.device()), offset);
logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset);
return 0x84;
}
logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space.device()), offset);
logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset);
return 0;
}

2
src/mame/drivers/cntsteer.c
View File

@ -472,7 +472,7 @@ WRITE8_MEMBER(cntsteer_state::cntsteer_sound_w)
WRITE8_MEMBER(cntsteer_state::zerotrgt_ctrl_w)
{
/*TODO: check this.*/
logerror("CTRL: %04x: %04x: %04x\n", cpu_get_pc(&space.device()), offset, data);
logerror("CTRL: %04x: %04x: %04x\n", space.device().safe_pc(), offset, data);
// if (offset == 0) device_set_input_line(m_subcpu, INPUT_LINE_RESET, ASSERT_LINE);
// Wrong - bits 0 & 1 used on this

8
src/mame/drivers/cobra.c
View File

@ -1052,7 +1052,7 @@ void cobra_fifo::push(const device_t *cpu, UINT64 data)
if (cpu != NULL)
{
// cpu has a name and a PC
sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
}
else
{
@ -1072,7 +1072,7 @@ void cobra_fifo::push(const device_t *cpu, UINT64 data)
if (cpu != NULL)
{
// cpu has a name and a PC
sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
}
else
{
@ -1129,7 +1129,7 @@ bool cobra_fifo::pop(const device_t *cpu, UINT64 *result)
if (cpu != NULL)
{
// cpu has a name and a PC
sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
}
else
{
@ -1150,7 +1150,7 @@ bool cobra_fifo::pop(const device_t *cpu, UINT64 *result)
if (cpu != NULL)
{
// cpu has a name and a PC
sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
}
else
{

24
src/mame/drivers/coolpool.c
View File

@ -218,7 +218,7 @@ static TIMER_DEVICE_CALLBACK( amerdart_audio_int_gen )
WRITE16_MEMBER(coolpool_state::amerdart_misc_w)
{
logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(&space.device()),data);
logerror("%08x:IOP_system_w %04x\n",space.device().safe_pc(),data);
coin_counter_w(machine(), 0, ~data & 0x0001);
coin_counter_w(machine(), 1, ~data & 0x0002);
@ -250,7 +250,7 @@ READ16_MEMBER(coolpool_state::amerdart_dsp_bio_line_r)
READ16_MEMBER(coolpool_state::amerdart_iop_r)
{
// logerror("%08x:IOP read %04x\n",cpu_get_pc(&space.device()),m_iop_answer);
// logerror("%08x:IOP read %04x\n",space.device().safe_pc(),m_iop_answer);
cputag_set_input_line(machine(), "maincpu", 1, CLEAR_LINE);
return m_iop_answer;
@ -259,7 +259,7 @@ READ16_MEMBER(coolpool_state::amerdart_iop_r)
WRITE16_MEMBER(coolpool_state::amerdart_iop_w)
{
// logerror("%08x:IOP write %04x\n", cpu_get_pc(&space.device()), data);
// logerror("%08x:IOP write %04x\n", space.device().safe_pc(), data);
COMBINE_DATA(&m_iop_cmd);
m_cmd_pending = 1;
}
@ -267,7 +267,7 @@ WRITE16_MEMBER(coolpool_state::amerdart_iop_w)
READ16_MEMBER(coolpool_state::amerdart_dsp_cmd_r)
{
// logerror("%08x:DSP cmd_r %04x\n", cpu_get_pc(&space.device()), m_iop_cmd);
// logerror("%08x:DSP cmd_r %04x\n", space.device().safe_pc(), m_iop_cmd);
m_cmd_pending = 0;
return m_iop_cmd;
}
@ -275,7 +275,7 @@ READ16_MEMBER(coolpool_state::amerdart_dsp_cmd_r)
WRITE16_MEMBER(coolpool_state::amerdart_dsp_answer_w)
{
// logerror("%08x:DSP answer %04x\n", cpu_get_pc(&space.device()), data);
// logerror("%08x:DSP answer %04x\n", space.device().safe_pc(), data);
m_iop_answer = data;
cputag_set_input_line(machine(), "maincpu", 1, ASSERT_LINE);
}
@ -423,7 +423,7 @@ READ16_MEMBER(coolpool_state::amerdart_trackball_r)
m_result = (m_result & 0x0fff) | (amerdart_trackball_direction(&space, 2, ((m_result >> 12) & 0xf)) << 12);
// logerror("%08X:read port 6 (X=%02X Y=%02X oldX=%02X oldY=%02X oldRes=%04X Res=%04X)\n", cpu_get_pc(&space.device()), m_newx, m_newy, m_oldx, m_oldy, m_lastresult, m_result);
// logerror("%08X:read port 6 (X=%02X Y=%02X oldX=%02X oldY=%02X oldRes=%04X Res=%04X)\n", space.device().safe_pc(), m_newx, m_newy, m_oldx, m_oldy, m_lastresult, m_result);
m_lastresult = m_result;
@ -439,7 +439,7 @@ READ16_MEMBER(coolpool_state::amerdart_trackball_r)
WRITE16_MEMBER(coolpool_state::coolpool_misc_w)
{
logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(&space.device()),data);
logerror("%08x:IOP_system_w %04x\n",space.device().safe_pc(),data);
coin_counter_w(machine(), 0, ~data & 0x0001);
coin_counter_w(machine(), 1, ~data & 0x0002);
@ -471,7 +471,7 @@ static TIMER_CALLBACK( deferred_iop_w )
WRITE16_MEMBER(coolpool_state::coolpool_iop_w)
{
logerror("%08x:IOP write %04x\n", cpu_get_pc(&space.device()), data);
logerror("%08x:IOP write %04x\n", space.device().safe_pc(), data);
machine().scheduler().synchronize(FUNC(deferred_iop_w), data);
}
@ -479,7 +479,7 @@ WRITE16_MEMBER(coolpool_state::coolpool_iop_w)
READ16_MEMBER(coolpool_state::coolpool_iop_r)
{
logerror("%08x:IOP read %04x\n",cpu_get_pc(&space.device()),m_iop_answer);
logerror("%08x:IOP read %04x\n",space.device().safe_pc(),m_iop_answer);
cputag_set_input_line(machine(), "maincpu", 1, CLEAR_LINE);
return m_iop_answer;
@ -498,7 +498,7 @@ READ16_MEMBER(coolpool_state::dsp_cmd_r)
{
m_cmd_pending = 0;
logerror("%08x:IOP cmd_r %04x\n", cpu_get_pc(&space.device()), m_iop_cmd);
logerror("%08x:IOP cmd_r %04x\n", space.device().safe_pc(), m_iop_cmd);
return m_iop_cmd;
}
@ -506,7 +506,7 @@ READ16_MEMBER(coolpool_state::dsp_cmd_r)
WRITE16_MEMBER(coolpool_state::dsp_answer_w)
{
logerror("%08x:IOP answer %04x\n", cpu_get_pc(&space.device()), data);
logerror("%08x:IOP answer %04x\n", space.device().safe_pc(), data);
m_iop_answer = data;
cputag_set_input_line(machine(), "maincpu", 1, ASSERT_LINE);
}
@ -625,7 +625,7 @@ READ16_MEMBER(coolpool_state::coolpool_input_r)
}
}
// logerror("%08X:read port 7 (X=%02X Y=%02X oldX=%02X oldY=%02X res=%04X)\n", cpu_get_pc(&space.device()),
// logerror("%08X:read port 7 (X=%02X Y=%02X oldX=%02X oldY=%02X res=%04X)\n", space.device().safe_pc(),
// m_newx[1], m_newy[1], m_oldx[1], m_oldy[1], m_result);
m_lastresult = m_result;
return m_result;

2
src/mame/drivers/cps1.c
View File

@ -355,7 +355,7 @@ READ16_MEMBER(cps_state::qsound_rom_r)
return rom[offset] | 0xff00;
else
{
popmessage("%06x: read sound ROM byte %04x", cpu_get_pc(&space.device()), offset);
popmessage("%06x: read sound ROM byte %04x", space.device().safe_pc(), offset);
return 0;
}
}

4
src/mame/drivers/crbaloon.c
View File

@ -61,7 +61,7 @@ WRITE8_MEMBER(crbaloon_state::pc3092_w)
{
m_pc3092_data[offset] = data & 0x0f;
if (LOG_PC3092) logerror("%04X: write PC3092 #%d = 0x%02x\n", cpu_get_pc(&space.device()), offset, m_pc3092_data[offset]);
if (LOG_PC3092) logerror("%04X: write PC3092 #%d = 0x%02x\n", space.device().safe_pc(), offset, m_pc3092_data[offset]);
pc3092_update(machine());
}
@ -141,7 +141,7 @@ READ8_MEMBER(crbaloon_state::pc3259_r)
break;
}
if (LOG_PC3259) logerror("%04X: read PC3259 #%d = 0x%02x\n", cpu_get_pc(&space.device()), reg, ret);
if (LOG_PC3259) logerror("%04X: read PC3259 #%d = 0x%02x\n", space.device().safe_pc(), reg, ret);
return ret | (ioport("DSW1")->read() & 0xf0);
}

2
src/mame/drivers/crgolf.c
View File

@ -138,7 +138,7 @@ WRITE8_MEMBER(crgolf_state::switch_input_select_w)
WRITE8_MEMBER(crgolf_state::unknown_w)
{
logerror("%04X:unknown_w = %02X\n", cpu_get_pc(&space.device()), data);
logerror("%04X:unknown_w = %02X\n", space.device().safe_pc(), data);
}

6
src/mame/drivers/cvs.c
View File

@ -267,7 +267,7 @@ READ8_MEMBER(cvs_state::cvs_input_r)
case 0x04: ret = ioport("IN3")->read(); break;
case 0x06: ret = ioport("DSW3")->read(); break;
case 0x07: ret = ioport("DSW2")->read(); break;
default: logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", cpu_get_pc(&space.device()), offset & 0x0f); break;
default: logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", space.device().safe_pc(), offset & 0x0f); break;
}
return ret;
@ -375,13 +375,13 @@ WRITE8_MEMBER(cvs_state::cvs_speech_rom_address_lo_w)
/* assuming that d0-d2 are cleared here */
m_speech_rom_bit_address = (m_speech_rom_bit_address & 0xf800) | (data << 3);
LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", cpu_get_pc(&space.device()), data, m_speech_rom_bit_address >> 3));
LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", space.device().safe_pc(), data, m_speech_rom_bit_address >> 3));
}
WRITE8_MEMBER(cvs_state::cvs_speech_rom_address_hi_w)
{
m_speech_rom_bit_address = (m_speech_rom_bit_address & 0x07ff) | (data << 11);
LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", cpu_get_pc(&space.device()), data, m_speech_rom_bit_address >> 3));
LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", space.device().safe_pc(), data, m_speech_rom_bit_address >> 3));
}

12
src/mame/drivers/cyclemb.c
View File

@ -419,7 +419,7 @@ READ8_MEMBER( cyclemb_state::skydest_i8741_0_r )
{
if(offset == 1) //status port
{
//printf("STATUS PC=%04x\n",cpu_get_pc(m_maincpu));
//printf("STATUS PC=%04x\n",m_maincpu->safe_pc());
return 1;
}
@ -427,14 +427,14 @@ READ8_MEMBER( cyclemb_state::skydest_i8741_0_r )
{
UINT8 i,pt;
//printf("%04x\n",cpu_get_pc(m_maincpu));
//printf("%04x\n",m_maincpu->safe_pc());
/* TODO: internal state of this */
if(cpu_get_pc(m_maincpu) == m_dsw_pc_hack)
if(m_maincpu->safe_pc() == m_dsw_pc_hack)
m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;
else if(m_mcu[0].rst)
{
//printf("READ PC=%04x\n",cpu_get_pc(m_maincpu));
//printf("READ PC=%04x\n",m_maincpu->safe_pc());
{
switch(m_mcu[0].state)
@ -500,7 +500,7 @@ WRITE8_MEMBER( cyclemb_state::skydest_i8741_0_w )
{
if(offset == 1) //command port
{
//printf("%02x CMD PC=%04x\n",data,cpu_get_pc(m_maincpu));
//printf("%02x CMD PC=%04x\n",data,m_maincpu->safe_pc());
switch(data)
{
case 0:
@ -535,7 +535,7 @@ WRITE8_MEMBER( cyclemb_state::skydest_i8741_0_w )
}
else
{
//printf("%02x DATA PC=%04x\n",data,cpu_get_pc(m_maincpu));
//printf("%02x DATA PC=%04x\n",data,m_maincpu->safe_pc());
m_mcu[0].txd = data;

2
src/mame/drivers/d9final.c
View File

@ -102,7 +102,7 @@ WRITE8_MEMBER(d9final_state::d9final_bank_w)
/* game checks this after three attract cycles, otherwise coin inputs stop to work. */
READ8_MEMBER(d9final_state::prot_latch_r)
{
// printf("PC=%06x\n",cpu_get_pc(&space.device()));
// printf("PC=%06x\n",space.device().safe_pc());
return 0x04;
}

12
src/mame/drivers/darius.c
View File

@ -158,7 +158,7 @@ WRITE16_MEMBER(darius_state::cpua_ctrl_w)
parse_control(machine());
logerror("CPU #0 PC %06x: write %04x to cpu control\n", cpu_get_pc(&space.device()), data);
logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
}
WRITE16_MEMBER(darius_state::darius_watchdog_w)
@ -195,7 +195,7 @@ READ16_MEMBER(darius_state::darius_ioc_r)
return ioport("DSW")->read();
}
logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",cpu_get_pc(&space.device()),offset);
logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",space.device().safe_pc(),offset);
return 0xff;
}
@ -231,7 +231,7 @@ WRITE16_MEMBER(darius_state::darius_ioc_w)
return;
}
logerror("CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",cpu_get_pc(&space.device()),offset,data);
logerror("CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",space.device().safe_pc(),offset,data);
}
@ -516,7 +516,7 @@ static const msm5205_interface msm5205_config =
READ8_MEMBER(darius_state::adpcm_command_read)
{
/* logerror("read port 0: %02x PC=%4x\n",adpcm_command, cpu_get_pc(&space.device()) ); */
/* logerror("read port 0: %02x PC=%4x\n",adpcm_command, space.device().safe_pc() ); */
return m_adpcm_command;
}
@ -534,13 +534,13 @@ WRITE8_MEMBER(darius_state::adpcm_nmi_disable)
{
m_nmi_enable = 0;
/* logerror("write port 0: NMI DISABLE PC=%4x\n", data, cpu_get_pc(&space.device()) ); */
/* logerror("write port 0: NMI DISABLE PC=%4x\n", data, space.device().safe_pc() ); */
}
WRITE8_MEMBER(darius_state::adpcm_nmi_enable)
{
m_nmi_enable = 1;
/* logerror("write port 1: NMI ENABLE PC=%4x\n", cpu_get_pc(&space.device()) ); */
/* logerror("write port 1: NMI ENABLE PC=%4x\n", space.device().safe_pc() ); */
}
WRITE8_MEMBER(darius_state::adpcm_data_w)

8
src/mame/drivers/dblewing.c
View File

@ -172,7 +172,7 @@ READ16_MEMBER(dblewing_state::dblewing_prot_r)
case 0x532: return m_580_data;
}
// printf("dblewing prot r %08x, %04x, %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask);
// printf("dblewing prot r %08x, %04x, %04x\n", space.device().safe_pc(), offset * 2, mem_mask);
if ((offset*2) == 0x0f8) return 0; // m_080_data;
if ((offset*2) == 0x104) return 0;
@ -184,7 +184,7 @@ READ16_MEMBER(dblewing_state::dblewing_prot_r)
if ((offset*2) == 0x54a) return 0; // 3rd player 2nd boss
if ((offset*2) == 0x786) return 0;
mame_printf_debug("dblewing prot r %08x, %04x, %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask);
mame_printf_debug("dblewing prot r %08x, %04x, %04x\n", space.device().safe_pc(), offset * 2, mem_mask);
return 0;//machine().rand();
}
@ -193,7 +193,7 @@ WRITE16_MEMBER(dblewing_state::dblewing_prot_w)
{
// if (offset * 2 != 0x380)
// printf("dblewing prot w %08x, %04x, %04x %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask, data);
// printf("dblewing prot w %08x, %04x, %04x %04x\n", space.device().safe_pc(), offset * 2, mem_mask, data);
switch (offset * 2)
{
@ -295,7 +295,7 @@ WRITE16_MEMBER(dblewing_state::dblewing_prot_w)
return; // p2 inputs select screen OK
}
// printf("dblewing prot w %08x, %04x, %04x %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask, data);
// printf("dblewing prot w %08x, %04x, %04x %04x\n", space.device().safe_pc(), offset * 2, mem_mask, data);
if ((offset * 2) == 0x008) { m_008_data = data; return; }
if ((offset * 2) == 0x080) { m_080_data = data; return; } // p3 3rd boss?

2
src/mame/drivers/dcheese.c
View File

@ -183,7 +183,7 @@ WRITE8_MEMBER(dcheese_state::sound_control_w)
if ((diff & 0x40) && (data & 0x40))
m_bsmt->reset();
if (data != 0x40 && data != 0x60)
logerror("%04X:sound_control_w = %02X\n", cpu_get_pc(&space.device()), data);
logerror("%04X:sound_control_w = %02X\n", space.device().safe_pc(), data);
}

72
src/mame/drivers/ddenlovr.c
View File

@ -824,7 +824,7 @@ g_profiler.start(PROFILER_VIDEO);
;
#ifdef MAME_DEBUG
popmessage("unknown blitter command %02x", data);
logerror("%06x: unknown blitter command %02x\n", cpu_get_pc(&space->device()), data);
logerror("%06x: unknown blitter command %02x\n", space->device().safe_pc(), data);
#endif
}
@ -843,7 +843,7 @@ g_profiler.start(PROFILER_VIDEO);
break;
default:
logerror("%06x: Blitter %d reg %02x = %02x\n", cpu_get_pc(&space->device()), blitter, state->m_ddenlovr_blit_regs[blitter], data);
logerror("%06x: Blitter %d reg %02x = %02x\n", space->device().safe_pc(), blitter, state->m_ddenlovr_blit_regs[blitter], data);
break;
}
}
@ -1190,7 +1190,7 @@ g_profiler.start(PROFILER_VIDEO);
;
#ifdef MAME_DEBUG
popmessage("unknown blitter command %02x", data);
logerror("%06x: unknown blitter command %02x\n", cpu_get_pc(&space.device()), data);
logerror("%06x: unknown blitter command %02x\n", space.device().safe_pc(), data);
#endif
}
@ -1199,7 +1199,7 @@ g_profiler.start(PROFILER_VIDEO);
break;
default:
logerror("%06x: Blitter 0 reg %02x = %02x\n", cpu_get_pc(&space.device()), m_ddenlovr_blit_latch, data);
logerror("%06x: Blitter 0 reg %02x = %02x\n", space.device().safe_pc(), m_ddenlovr_blit_latch, data);
break;
}
@ -1244,7 +1244,7 @@ READ8_MEMBER(dynax_state::rongrong_gfxrom_r)
if (address >= size)
{
logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", cpu_get_pc(&space.device()), address);
logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", space.device().safe_pc(), address);
address %= size;
}
@ -1589,7 +1589,7 @@ WRITE16_MEMBER(dynax_state::ddenlovr_select2_16_w)
READ8_MEMBER(dynax_state::rongrong_input2_r)
{
// logerror("%04x: input2_r offset %d select %x\n", cpu_get_pc(&space.device()), offset, m_input_sel);
// logerror("%04x: input2_r offset %d select %x\n", space.device().safe_pc(), offset, m_input_sel);
/* 0 and 1 are read from offset 1, 2 from offset 0... */
switch (m_input_sel)
{
@ -1615,7 +1615,7 @@ static READ8_DEVICE_HANDLER( quiz365_input_r )
READ16_MEMBER(dynax_state::quiz365_input2_r)
{
// logerror("%04x: input2_r offset %d select %x\n",cpu_get_pc(&space.device()), offset, m_input_sel);
// logerror("%04x: input2_r offset %d select %x\n",space.device().safe_pc(), offset, m_input_sel);
/* 0 and 1 are read from offset 1, 2 from offset 0... */
switch (m_input_sel)
{
@ -1632,7 +1632,7 @@ WRITE8_MEMBER(dynax_state::rongrong_blitter_busy_w)
m_rongrong_blitter_busy_select = data;
if (data != 0x18)
logerror("%04x: rongrong_blitter_busy_w data = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: rongrong_blitter_busy_w data = %02x\n", space.device().safe_pc(), data);
}
READ8_MEMBER(dynax_state::rongrong_blitter_busy_r)
@ -1642,7 +1642,7 @@ READ8_MEMBER(dynax_state::rongrong_blitter_busy_r)
case 0x18: return 0; // bit 5 = blitter busy
default:
logerror("%04x: rongrong_blitter_busy_r with select = %02x\n", cpu_get_pc(&space.device()), m_rongrong_blitter_busy_select);
logerror("%04x: rongrong_blitter_busy_r with select = %02x\n", space.device().safe_pc(), m_rongrong_blitter_busy_select);
}
return 0xff;
}
@ -1969,7 +1969,7 @@ READ8_MEMBER(dynax_state::rongrong_input_r)
WRITE8_MEMBER(dynax_state::rongrong_select_w)
{
//logerror("%04x: rongrong_select_w %02x\n",cpu_get_pc(&space.device()),data);
//logerror("%04x: rongrong_select_w %02x\n",space.device().safe_pc(),data);
/* bits 0-4 = **both** ROM bank **AND** input select */
membank("bank1")->set_entry(data & 0x1f);
@ -2238,7 +2238,7 @@ READ8_MEMBER(dynax_state::funkyfig_dsw_r)
if (!BIT(m_dsw_sel, 0)) return ioport("DSW1")->read();
if (!BIT(m_dsw_sel, 1)) return ioport("DSW2")->read();
if (!BIT(m_dsw_sel, 2)) return ioport("DSW3")->read();
logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", space.device().safe_pc(), m_dsw_sel);
return 0xff;
}
@ -2249,7 +2249,7 @@ READ8_MEMBER(dynax_state::funkyfig_coin_r)
case 0x22: return ioport("IN2")->read();
case 0x23: return m_funkyfig_lockout;
}
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -2260,7 +2260,7 @@ READ8_MEMBER(dynax_state::funkyfig_key_r)
case 0x20: return ioport("IN0")->read();
case 0x21: return ioport("IN1")->read();
}
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -2273,13 +2273,13 @@ WRITE8_MEMBER(dynax_state::funkyfig_lockout_w)
coin_counter_w(machine(), 0, data & 0x01);
coin_lockout_w(machine(), 0, (~data) & 0x02);
if (data & ~0x03)
logerror("%06x: warning, unknown bits written, lockout = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%06x: warning, unknown bits written, lockout = %02x\n", space.device().safe_pc(), data);
break;
// case 0xef: 16 bytes on startup
default:
logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
}
}
@ -2391,7 +2391,7 @@ READ8_MEMBER(dynax_state::hanakanz_gfxrom_r)
if (address >= size)
{
logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", cpu_get_pc(&space.device()), address);
logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", space.device().safe_pc(), address);
address %= size;
}
@ -2422,7 +2422,7 @@ WRITE8_MEMBER(dynax_state::hanakanz_coincounter_w)
coin_counter_w(machine(), 1, data & 2);
if (data & 0xf0)
logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
#ifdef MAME_DEBUG
// popmessage("93 = %02x", data);
@ -2620,7 +2620,7 @@ WRITE8_MEMBER(dynax_state::mjchuuka_coincounter_w)
coin_lockout_w(machine(), 0, (~data) & 0x08);
if (data & 0x74)
logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
#ifdef MAME_DEBUG
// popmessage("40 = %02x",data);
@ -2678,7 +2678,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(dynax_state::mjmyster_rambank_w)
{
membank("bank2")->set_entry(data & 0x07);
//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
//logerror("%04x: rambank = %02x\n", space.device().safe_pc(), data);
}
WRITE8_MEMBER(dynax_state::mjmyster_select2_w)
@ -2699,7 +2699,7 @@ READ8_MEMBER(dynax_state::mjmyster_coins_r)
case 0x03: return 0xff;
}
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -2713,7 +2713,7 @@ READ8_MEMBER(dynax_state::mjmyster_keyb_r)
else if (BIT(m_keyb, 2)) ret = ioport("KEY2")->read();
else if (BIT(m_keyb, 3)) ret = ioport("KEY3")->read();
else if (BIT(m_keyb, 4)) ret = ioport("KEY4")->read();
else logerror("%06x: warning, unknown bits read, keyb = %02x\n", cpu_get_pc(&space.device()), m_keyb);
else logerror("%06x: warning, unknown bits read, keyb = %02x\n", space.device().safe_pc(), m_keyb);
m_keyb <<= 1;
@ -2727,7 +2727,7 @@ READ8_MEMBER(dynax_state::mjmyster_dsw_r)
if (!BIT(m_dsw_sel, 2)) return ioport("DSW2")->read();
if (!BIT(m_dsw_sel, 3)) return ioport("DSW1")->read();
if (!BIT(m_dsw_sel, 4)) return ioport("DSW5")->read();
logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", space.device().safe_pc(), m_dsw_sel);
return 0xff;
}
@ -2745,7 +2745,7 @@ WRITE8_MEMBER(dynax_state::mjmyster_coincounter_w)
break;
default:
logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
}
}
@ -2841,7 +2841,7 @@ READ8_MEMBER(dynax_state::hginga_coins_r)
case 0x22: return 0x7f; // bit 7 = blitter busy, bit 6 = hopper
case 0x23: return m_coins;
}
logerror("%04x: coins_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%04x: coins_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -2870,7 +2870,7 @@ WRITE8_MEMBER(dynax_state::hginga_coins_w)
m_coins = data;
break;
default:
logerror("%04x: coins_w with select = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
logerror("%04x: coins_w with select = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
}
}
@ -2892,7 +2892,7 @@ READ8_MEMBER(dynax_state::hginga_input_r)
case 0xa2:
return ioport(keynames1[m_keyb++])->read();
}
logerror("%04x: input_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%04x: input_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -2985,7 +2985,7 @@ READ8_MEMBER(dynax_state::hgokou_input_r)
case 0x22: return hgokou_player_r(&space, 0);
case 0x23: return m_coins;
}
logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", space.device().safe_pc(), m_dsw_sel);
return 0xff;
}
@ -3012,7 +3012,7 @@ WRITE8_MEMBER(dynax_state::hgokou_input_w)
case 0x2f: break; // ? written with 2f (hgokou)
default:
logerror("%04x: input_w with select = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel, data);
logerror("%04x: input_w with select = %02x, data = %02x\n", space.device().safe_pc(), m_dsw_sel, data);
}
}
@ -3088,7 +3088,7 @@ READ8_MEMBER(dynax_state::hgokbang_input_r)
m_input_sel |= 1;
return ret;
}
logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", space.device().safe_pc(), m_dsw_sel);
return 0xff;
}
@ -3148,7 +3148,7 @@ READ8_MEMBER(dynax_state::hparadis_input_r)
case 0x80: return ioport(keynames0[m_keyb++])->read(); // P1 (Keys)
case 0x81: return ioport(keynames1[m_keyb++])->read(); // P2 (Keys)
}
logerror("%06x: warning, unknown bits read, input_sel = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%06x: warning, unknown bits read, input_sel = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -3169,7 +3169,7 @@ WRITE8_MEMBER(dynax_state::hparadis_coin_w)
case 0x0c: coin_counter_w(machine(), 0, data & 1); break;
case 0x0d: break;
default:
logerror("%04x: coins_w with select = %02x, data = %02x\n",cpu_get_pc(&space.device()), m_input_sel, data);
logerror("%04x: coins_w with select = %02x, data = %02x\n",space.device().safe_pc(), m_input_sel, data);
}
}
@ -3220,7 +3220,7 @@ READ8_MEMBER(dynax_state::mjmywrld_coins_r)
case 0x83: return 0x00;
}
logerror("%06x: warning, unknown bits read, input_sel = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
logerror("%06x: warning, unknown bits read, input_sel = %02x\n", space.device().safe_pc(), m_input_sel);
return 0xff;
}
@ -3400,7 +3400,7 @@ WRITE8_MEMBER(dynax_state::mjflove_coincounter_w)
if (data & 0xfe)
{
logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
// popmessage("COIN = %02x", data);
}
}
@ -3517,7 +3517,7 @@ WRITE8_MEMBER(dynax_state::sryudens_coincounter_w)
m_hopper = data & 0x04;
if (data & 0x68)
logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
#ifdef MAME_DEBUG
// popmessage("COIN = %02x", data);
@ -3527,7 +3527,7 @@ WRITE8_MEMBER(dynax_state::sryudens_coincounter_w)
WRITE8_MEMBER(dynax_state::sryudens_rambank_w)
{
membank("bank2")->set_entry(data & 0x0f);
//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
//logerror("%04x: rambank = %02x\n", space.device().safe_pc(), data);
}
static ADDRESS_MAP_START( sryudens_portmap, AS_IO, 8, dynax_state )
@ -3577,7 +3577,7 @@ WRITE8_MEMBER(dynax_state::janshinp_coincounter_w)
coin_counter_w(machine(), 1, data & 2);
if (data & ~0x8b)
logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
#ifdef MAME_DEBUG
// popmessage("COIN = %02x", data);

14
src/mame/drivers/ddragon.c
View File

@ -223,7 +223,7 @@ WRITE8_MEMBER(ddragon_state::toffy_bankswitch_w)
READ8_MEMBER(ddragon_state::darktowr_mcu_bank_r)
{
// logerror("BankRead %05x %08x\n",cpu_get_pc(&space.device()),offset);
// logerror("BankRead %05x %08x\n",space.device().safe_pc(),offset);
/* Horrible hack - the alternate TStrike set is mismatched against the MCU,
so just hack around the protection here. (The hacks are 'right' as I have
@ -232,9 +232,9 @@ READ8_MEMBER(ddragon_state::darktowr_mcu_bank_r)
if (!strcmp(machine().system().name, "tstrike"))
{
/* Static protection checks at boot-up */
if (cpu_get_pc(&space.device()) == 0x9ace)
if (space.device().safe_pc() == 0x9ace)
return 0;
if (cpu_get_pc(&space.device()) == 0x9ae4)
if (space.device().safe_pc() == 0x9ae4)
return 0x63;
/* Just return whatever the code is expecting */
@ -251,7 +251,7 @@ READ8_MEMBER(ddragon_state::darktowr_mcu_bank_r)
WRITE8_MEMBER(ddragon_state::darktowr_mcu_bank_w)
{
logerror("BankWrite %05x %08x %08x\n", cpu_get_pc(&space.device()), offset, data);
logerror("BankWrite %05x %08x %08x\n", space.device().safe_pc(), offset, data);
if (offset == 0x1400 || offset == 0)
{
@ -355,14 +355,14 @@ CUSTOM_INPUT_MEMBER(ddragon_state::sub_cpu_busy)
WRITE8_MEMBER(ddragon_state::darktowr_mcu_w)
{
logerror("McuWrite %05x %08x %08x\n",cpu_get_pc(&space.device()), offset, data);
logerror("McuWrite %05x %08x %08x\n",space.device().safe_pc(), offset, data);
m_darktowr_mcu_ports[offset] = data;
}
READ8_MEMBER(ddragon_state::ddragon_hd63701_internal_registers_r)
{
logerror("%04x: read %d\n", cpu_get_pc(&space.device()), offset);
logerror("%04x: read %d\n", space.device().safe_pc(), offset);
return 0;
}
@ -396,7 +396,7 @@ READ8_MEMBER(ddragon_state::ddragon_spriteram_r)
{
/* Double Dragon crash fix - see notes above */
if (offset == 0x49 && cpu_get_pc(&space.device()) == 0x6261 && m_spriteram[offset] == 0x1f)
if (offset == 0x49 && space.device().safe_pc() == 0x6261 && m_spriteram[offset] == 0x1f)
return 0x1;
return m_spriteram[offset];

2
src/mame/drivers/ddragon3.c
View File

@ -196,7 +196,7 @@ WRITE16_MEMBER(ddragon3_state::ddragon3_io_w)
break;
default:
logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, cpu_get_pc(&space.device()) );
logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, space.device().safe_pc() );
break;
}
}

12
src/mame/drivers/dec0.c
View File

@ -200,7 +200,7 @@ WRITE16_MEMBER(dec0_state::dec0_control_w)
break;
case 0xa: /* Mix Psel(?). */
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
break;
case 0xc: /* Cblk - coin blockout. Seems to be unused by the games */
@ -208,11 +208,11 @@ WRITE16_MEMBER(dec0_state::dec0_control_w)
case 0xe: /* Reset Intel 8751? - not sure, all the games write here at startup */
dec0_i8751_reset(machine());
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
break;
default:
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
break;
}
}
@ -238,7 +238,7 @@ WRITE16_MEMBER(dec0_automat_state::automat_control_w)
break;
case 0xa: /* Mix Psel(?). */
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
break;
case 0xc: /* Cblk - coin blockout. Seems to be unused by the games */
@ -246,7 +246,7 @@ WRITE16_MEMBER(dec0_automat_state::automat_control_w)
#endif
default:
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
break;
}
}
@ -358,7 +358,7 @@ READ16_MEMBER(dec0_state::slyspy_protection_r)
case 6: return 0x2;
}
logerror("%04x, Unknown protection read at 30c000 %d\n", cpu_get_pc(&space.device()), offset);
logerror("%04x, Unknown protection read at 30c000 %d\n", space.device().safe_pc(), offset);
return 0;
}

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