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(mess) pc9801: fix egc shifter (nw)
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cracyc
parent
62ecdbcbf9
commit
86cadf5f71
@ -59,7 +59,7 @@ const pc98_format::format pc98_format::formats[] = {
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},
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{ /* 1200K 5 1/4 inch high density */
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floppy_image::FF_525, floppy_image::DSHD, floppy_image::MFM,
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1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
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1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84
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},
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{ /* 720K 3 1/2 inch double density */
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floppy_image::FF_35, floppy_image::DSDD, floppy_image::MFM,
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@ -67,7 +67,7 @@ const pc98_format::format pc98_format::formats[] = {
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},
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{ /* 1200K 3 1/2 inch high density (japanese variant) - gaps unverified */
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floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM,
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1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
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1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84
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},
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{ /* 1440K 3 1/2 inch high density */
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floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM,
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@ -13,7 +13,6 @@
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- Finish DIP-Switches support
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- text scrolling
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- GRCG+
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- EGC
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- rewrite using slot devices
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- some later SWs put "Invalid command byte 05" (Absolutely Mahjong on Epson logo)
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- investigate on POR bit
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@ -78,7 +77,6 @@
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- Armored Flagship Atragon: needs HDD install
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- Arquephos: needs extra sound board(s)?
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- Asoko no Koufuku: black screen with BGM, waits at 0x225f6;
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- Aura Battler Dumbine: upd7220: unimplemented FIGD, has layer clearance bugs on gameplay;
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- Band-Kun: (how to run this without installing?)
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- Battle Chess: wants some dip-switches to be on in DSW4, too slow during IA thinking?
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- Bishoujo Audition: Moans with a "(program) ended. remove the floppy disk and turn off the poewr."
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@ -106,6 +104,7 @@
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- Uchiyama Aki no Chou Bangai: keyboard irq is fussy (sometimes it doesn't register a key press);
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- Uno: uses EGC
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- Viper V16 Demo: moans with a JP message;
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- Windows 2: EGC drawing issue (byte wide writes?)
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per-game TODO (PC-9821):
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- Battle Skin Panic: gfx bugs at the Gainax logo, it crashes after it;
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@ -115,6 +114,7 @@
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- Animahjong V3 makes advantage of the possibility of installing 2 sound boards, where SFX and BGMs are played on separate chips.
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- Apple Club 1/2 needs data disks to load properly;
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- Beast Lord: needs a titan.fnt, in MS-DOS
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- To deprotect BASIC modules set 0xcd7 in ram to 0
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========================================================================================
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@ -550,6 +550,7 @@ public:
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INT16 count;
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UINT16 leftover[4];
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bool first;
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bool init;
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} m_egc;
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/* PC9821 specific */
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@ -588,7 +589,6 @@ public:
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DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
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void egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask);
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UINT16 egc_blit_r(UINT32 offset, UINT16 mem_mask);
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inline UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
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UINT32 pc9801_286_a20(bool state);
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DECLARE_READ8_MEMBER(ide_hack_r);
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@ -670,6 +670,8 @@ public:
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private:
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UINT8 m_sdip_read(UINT16 port, UINT8 sdip_offset);
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void m_sdip_write(UINT16 port, UINT8 sdip_offset,UINT8 data);
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UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
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UINT16 egc_shift(int plane, UINT16 val);
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public:
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DECLARE_MACHINE_START(pc9801_common);
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DECLARE_MACHINE_START(pc9801f);
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@ -1330,35 +1332,45 @@ WRITE8_MEMBER(pc9801_state::gvram_w)
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m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask);
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}
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inline UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
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UINT16 pc9801_state::egc_shift(int plane, UINT16 val)
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{
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UINT16 out = 0;
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int src_off, dst_off;
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UINT16 src_tmp = src;
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int src_off = m_egc.regs[6] & 0xf, dst_off = (m_egc.regs[6] >> 4) & 0xf;
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int left = src_off - dst_off, right = dst_off - src_off;
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UINT16 out;
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if(m_egc.regs[6] & 0x1000)
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{
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src_off = 15 - (m_egc.regs[6] & 0xf);
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dst_off = 15 - ((m_egc.regs[6] >> 4) & 0xf);
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if(right >= 0)
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{
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out = (val >> right) | m_egc.leftover[plane];
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m_egc.leftover[plane] = val << (16 - right);
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}
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else
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{
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out = (val >> (16 - left)) | m_egc.leftover[plane];
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m_egc.leftover[plane] = val << left;
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}
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}
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else
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{
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src_off = m_egc.regs[6] & 0xf;
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dst_off = (m_egc.regs[6] >> 4) & 0xf;
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if(right >= 0)
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{
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out = (val << right) | m_egc.leftover[plane];
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m_egc.leftover[plane] = val >> (16 - right);
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}
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else
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{
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out = (val << (16 - left)) | m_egc.leftover[plane];
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m_egc.leftover[plane] = val >> left;
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}
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}
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return out;
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}
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if(src_off < dst_off)
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{
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src = src_tmp << (dst_off - src_off);
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src |= m_egc.leftover[plane];
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m_egc.leftover[plane] = src_tmp >> (16 - (dst_off - src_off));
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}
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else
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{
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src = src_tmp >> (src_off - dst_off);
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src |= m_egc.leftover[plane];
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m_egc.leftover[plane] = src_tmp << (16 - (src_off - dst_off));
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}
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UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
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{
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UINT16 out = 0;
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int dst_off = (m_egc.regs[6] >> 4) & 0xf;
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UINT16 src_tmp = src;
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for(int i = 7; i >= 0; i--)
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{
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@ -1375,33 +1387,43 @@ void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
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{
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UINT16 mask = m_egc.regs[4] & mem_mask, out = 0;
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bool dir = !(m_egc.regs[6] & 0x1000);
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int dst_off = (m_egc.regs[6] >> 4) & 0xf;
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int dst_off = (m_egc.regs[6] >> 4) & 0xf, src_off = m_egc.regs[6] & 0xf;
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offset &= 0x13fff;
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if((((m_egc.regs[2] >> 11) & 3) == 1) || ((((m_egc.regs[2] >> 11) & 3) == 2) && !BIT(m_egc.regs[2], 10)))
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if(!m_egc.init && (src_off > dst_off))
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{
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UINT16 end_mask = 0xffff, start_mask = 0xffff;
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// mask off the bits before the start
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if(m_egc.first)
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if(BIT(m_egc.regs[2], 10))
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{
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m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
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start_mask = dir ? ~((1 << dst_off) - 1) : ((1 << (15 - dst_off)) - 1);
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egc_shift(0, data);
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// leftover[0] is inited above, set others to same
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m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = m_egc.leftover[0];
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}
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m_egc.init = true;
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return;
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}
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// mask off the bits past the end of the blit
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if(m_egc.count < 16)
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// mask off the bits before the start
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if(m_egc.first)
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{
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mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (dst_off + 1)) - 1);
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if(!m_egc.init)
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m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
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}
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// mask off the bits past the end of the blit
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if(m_egc.count < 16)
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{
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UINT16 end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1);
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// if the blit is less than 16 bits, adjust the masks
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if(m_egc.first)
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{
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end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1);
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// if the blit is less than 16 bits, adjust the masks
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if(start_mask != 0xffff)
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{
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if(dir)
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end_mask <<= dst_off;
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else
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end_mask >>= (15 - dst_off);
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}
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if(dir)
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end_mask <<= dst_off;
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else
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end_mask >>= dst_off;
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}
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mask &= end_mask & start_mask;
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mask &= end_mask;
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}
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for(int i = 0; i < 4; i++)
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@ -1410,7 +1432,7 @@ void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
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{
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UINT16 src = m_egc.src[i] & mem_mask, pat = m_egc.pat[i];
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if(BIT(m_egc.regs[2], 10))
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src = data;
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src = egc_shift(i, data);
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if((m_egc.regs[2] & 0x300) == 0x200)
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pat = m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)];
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@ -1442,16 +1464,15 @@ void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
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}
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if(mem_mask != 0xffff)
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{
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dst_off &= 7;
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if(m_egc.first)
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m_egc.count -= dir ? 8 - dst_off : (dst_off + 1);
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m_egc.count -= 8 - (dst_off & 7);
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else
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m_egc.count -= 8;
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}
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else
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{
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if(m_egc.first)
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m_egc.count -= dir ? 16 - dst_off : (dst_off + 1);
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m_egc.count -= 16 - dst_off;
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else
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m_egc.count -= 16;
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}
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@ -1461,6 +1482,7 @@ void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
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if(m_egc.count <= 0)
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{
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m_egc.first = true;
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m_egc.init = false;
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m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
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}
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}
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@ -1475,17 +1497,13 @@ UINT16 pc9801_state::egc_blit_r(UINT32 offset, UINT16 mem_mask)
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m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
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m_egc.pat[3] = m_video_ram_2[plane_off];
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}
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if(!BIT(m_egc.regs[2], 10))
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{
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m_egc.src[0] = m_video_ram_2[plane_off + 0x4000];
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m_egc.src[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
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m_egc.src[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
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m_egc.src[3] = m_video_ram_2[plane_off];
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}
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for(int i = 0; i < 4; i++)
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m_egc.src[i] = egc_shift(i, m_video_ram_2[plane_off + (((i + 1) & 3) * 0x4000)]);
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if(BIT(m_egc.regs[2], 13))
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return m_video_ram_2[offset];
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else
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return m_video_ram_2[plane_off + (((m_egc.regs[1] >> 8) + 1) & 3) * 0x4000];
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return m_egc.src[(m_egc.regs[1] >> 8) & 3];
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}
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READ16_MEMBER(pc9801_state::upd7220_grcg_r)
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@ -1906,6 +1924,7 @@ WRITE16_MEMBER(pc9801_state::egc_w)
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case 7:
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m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
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m_egc.first = true;
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m_egc.init = false;
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break;
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}
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}
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@ -2969,6 +2988,7 @@ MACHINE_START_MEMBER(pc9801_state,pc9801_common)
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save_item(NAME(m_sasi_data));
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save_item(NAME(m_sasi_data_enable));
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save_item(NAME(m_sasi_ctrl));
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save_item(NAME(m_vrtc_irq_mask));
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}
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MACHINE_START_MEMBER(pc9801_state,pc9801f)
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