mc2661, mc68681, scn2674 et al.: Eliminate space and mem_mask arguments from read/write handlers (nw)

This commit is contained in:
AJR 2018-12-26 20:37:24 -05:00
parent 4418b9a568
commit 86f6dd0c6c
25 changed files with 136 additions and 136 deletions

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@ -212,9 +212,9 @@ void dmv_k801_device::io_read(address_space &space, int ifsel, offs_t offset, ui
if ((dsw >> 1) == ifsel && BIT(offset, 3) == BIT(dsw, 0))
{
if (offset & 0x04)
m_epci->write(space, offset & 0x03, data);
m_epci->write(offset & 0x03, data);
else
data = m_epci->read(space, offset & 0x03);
data = m_epci->read(offset & 0x03);
}
}
@ -224,9 +224,9 @@ void dmv_k801_device::io_write(address_space &space, int ifsel, offs_t offset, u
if ((dsw >> 1) == ifsel && BIT(offset, 3) == BIT(dsw, 0))
{
if (offset & 0x04)
m_epci->write(space, offset & 0x03, data);
m_epci->write(offset & 0x03, data);
else
data = m_epci->read(space, offset & 0x03);
data = m_epci->read(offset & 0x03);
}
}
@ -236,9 +236,9 @@ void dmv_k211_device::io_read(address_space &space, int ifsel, offs_t offset, ui
if ((BIT(jumpers, 0) && ifsel == 0) || (BIT(jumpers, 1) && ifsel == 1))
{
if (offset & 0x04)
m_epci->write(space, offset & 0x03, data);
m_epci->write(offset & 0x03, data);
else
data = m_epci->read(space, offset & 0x03);
data = m_epci->read(offset & 0x03);
}
}
@ -248,8 +248,8 @@ void dmv_k211_device::io_write(address_space &space, int ifsel, offs_t offset, u
if ((BIT(jumpers, 0) && ifsel == 0) || (BIT(jumpers, 1) && ifsel == 1))
{
if (offset & 0x04)
m_epci->write(space, offset & 0x03, data);
m_epci->write(offset & 0x03, data);
else
data = m_epci->read(space, offset & 0x03);
data = m_epci->read(offset & 0x03);
}
}

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@ -174,7 +174,7 @@ uint8_t electron_m2105_device::expbus_r(address_space &space, offs_t offset, uin
}
else if (offset >= 0xfc60 && offset < 0xfc70)
{
data = m_duart->read(space, offset & 0x0f);
data = m_duart->read(offset & 0x0f);
}
else if (offset >= 0xfc70 && offset < 0xfc90)
{
@ -200,7 +200,7 @@ void electron_m2105_device::expbus_w(address_space &space, offs_t offset, uint8_
}
else if (offset >= 0xfc60 && offset < 0xfc70)
{
m_duart->write(space, offset & 0x0f, data);
m_duart->write(offset & 0x0f, data);
}
else if (offset >= 0xfc70 && offset < 0xfc90)
{

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@ -23,13 +23,13 @@ DEFINE_DEVICE_TYPE(M68307, m68307_cpu_device, "mc68307", "MC68307")
*/
READ8_MEMBER( m68307_cpu_device::m68307_internal_serial_r )
{
if (offset&1) return m_duart->read(*m_program, offset>>1);
if (offset&1) return m_duart->read(offset>>1);
return 0x0000;
}
WRITE8_MEMBER(m68307_cpu_device::m68307_internal_serial_w)
{
if (offset & 1) m_duart->write(*m_program, offset >> 1, data);
if (offset & 1) m_duart->write(offset >> 1, data);
}

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@ -92,8 +92,8 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w )
READ16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, read),
WRITE16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, write),0xffffffff);
m_internal->install_readwrite_handler(base + 0x700, base + 0x723,
READ8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, read),
WRITE8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, write),0xffffffff);
read8sm_delegate(FUNC(mc68340_serial_module_device::read), &*m_serial),
write8sm_delegate(FUNC(mc68340_serial_module_device::write), &*m_serial),0xffffffff);
m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf,
read32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_r),this),
write32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_w),this));

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@ -38,12 +38,12 @@ void mc68340_serial_module_device::device_start()
mc68340_duart_device::device_start();
}
READ8_MEMBER( mc68340_serial_module_device::read )
uint8_t mc68340_serial_module_device::read(offs_t offset)
{
LOG("%s\n", FUNCNAME);
int val = 0;
LOGR("%08x %s %08x, (%08x)\n", m_cpu->pcbase(), FUNCNAME, offset, mem_mask);
LOGR("%08x %s %08x\n", m_cpu->pcbase(), FUNCNAME, offset);
/*Setting the STP bit stops all clocks within the serial module (including the crystal
or external clock and SCLK), except for the clock from the IMB. The clock from the IMB
@ -60,19 +60,19 @@ READ8_MEMBER( mc68340_serial_module_device::read )
{
case REG_MCRH:
val = m_mcrh;
LOGSERIAL("- %08x %s %04x, %04x (%04x) (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offset, val, mem_mask);
LOGSERIAL("- %08x %s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offset, val);
break;
case REG_MCRL:
val = m_mcrl;
LOGSERIAL("- %08x %s %04x, %04x (%04x) (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offset, val, mem_mask);
LOGSERIAL("- %08x %s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offset, val);
break;
case REG_ILR:
val = m_ilr;
LOGSERIAL("- %08x %s %04x, %04x (%04x) (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, offset, val, mem_mask);
LOGSERIAL("- %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, offset, val);
break;
case REG_IVR:
val = m_ivr;
LOGSERIAL("- %08x %s %04x, %04x (%04x) (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, offset, val, mem_mask);
LOGSERIAL("- %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, offset, val);
break;
}
@ -87,10 +87,10 @@ READ8_MEMBER( mc68340_serial_module_device::read )
"MR1B", "SRB", "n/a", "RBB", "n/a", "IP", "n/a", "n/a", // 0x18 - 0x1f
"MR2A", "MR2B" }}[offset]); // 0x20 - 0x21
return offset >= 0x10 && offset < 0x22 ? mc68340_duart_device::read(space, offset - 0x10, mem_mask) : val;
return offset >= 0x10 && offset < 0x22 ? mc68340_duart_device::read(offset - 0x10) : val;
}
WRITE8_MEMBER( mc68340_serial_module_device::write )
void mc68340_serial_module_device::write(offs_t offset, uint8_t data)
{
LOG("\n%s\n", FUNCNAME);
LOGSETUP(" * Reg %02x <- %02x - %s\n", offset, data,
@ -118,29 +118,29 @@ WRITE8_MEMBER( mc68340_serial_module_device::write )
{
case REG_MCRH:
m_mcrh = data;
LOGSERIAL("PC: %08x %s %04x, %04x (%04x) (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offset, data, mem_mask);
LOGSERIAL("PC: %08x %s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offset, data);
LOGSERIAL("- Clocks are %s\n", data & REG_MCRH_STP ? "stopped" : "running");
LOGSERIAL("- Freeze signal %s - not implemented\n", data & REG_MCRH_FRZ1 ? "stops at character boundary" : "is ignored");
LOGSERIAL("- CTS capture clock: %s - not implemented\n", data & REG_MCRH_ICCS ? "SCLK" : "Crystal");
break;
case REG_MCRL:
m_mcrl = data;
LOGSERIAL("PC: %08x %s %04x, %04x (%04x) (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offset, data, mem_mask);
LOGSERIAL("PC: %08x %s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offset, data);
LOGSERIAL("- Supervisor registers %s - not implemented\n", data & REG_MCRL_SUPV ? "requries supervisor privileges" : "can be accessed by user privileged software");
LOGSERIAL("- Interrupt Arbitration level: %02x - not implemented\n", data & REG_MCRL_ARBLV);
break;
case REG_ILR:
m_ilr = data;
LOGSERIAL("PC: %08x %s %04x, %04x (%04x) (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, offset, data, mem_mask);
LOGSERIAL("PC: %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, offset, data);
LOGSERIAL("- Interrupt Level: %02x\n", data & REG_ILR_MASK);
break;
case REG_IVR:
m_ivr = data;
LOGSERIAL("PC: %08x %s %04x, %04x (%04x) (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, offset, data, mem_mask);
LOGSERIAL("PC: %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, offset, data);
LOGSERIAL("- Interrupt Vector: %02x\n", data);
break;
default:
if (offset >= 0x10 && offset < 0x22) mc68340_duart_device::write(space, offset - 0x10, data, mem_mask);
if (offset >= 0x10 && offset < 0x22) mc68340_duart_device::write(offset - 0x10, data);
}
}

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@ -24,8 +24,8 @@ public:
// device-level overrides
virtual void device_start() override;
READ8_MEMBER( read ) override;
WRITE8_MEMBER( write ) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
DECLARE_WRITE_LINE_MEMBER(irq_w);
protected:

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@ -220,7 +220,7 @@ void mc2661_device::rcv_complete()
// read - register read
//-------------------------------------------------
READ8_MEMBER( mc2661_device::read )
uint8_t mc2661_device::read(offs_t offset)
{
uint8_t data = 0;
@ -260,7 +260,7 @@ READ8_MEMBER( mc2661_device::read )
// write - register write
//-------------------------------------------------
WRITE8_MEMBER( mc2661_device::write )
void mc2661_device::write(offs_t offset, uint8_t data)
{
switch (offset & 0x03)
{

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@ -50,8 +50,8 @@ public:
auto bkdet_handler() { return m_write_bkdet.bind(); }
auto xsync_handler() { return m_write_xsync.bind(); }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( dsr_w );
DECLARE_WRITE_LINE_MEMBER( dcd_w );

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@ -459,12 +459,12 @@ TIMER_CALLBACK_MEMBER(duart_base_device::duart_timer_callback)
}
READ8_MEMBER(mc68681_device::read)
uint8_t mc68681_device::read(offs_t offset)
{
if (offset == 0x0c)
return IVR;
uint8_t r = duart_base_device::read(space, offset, mem_mask);
uint8_t r = duart_base_device::read(offset);
if (offset == 0x0d)
{
@ -478,7 +478,7 @@ READ8_MEMBER(mc68681_device::read)
return r;
}
READ8_MEMBER(mc68340_duart_device::read)
uint8_t mc68340_duart_device::read(offs_t offset)
{
uint8_t r = 0;
@ -497,19 +497,19 @@ READ8_MEMBER(mc68340_duart_device::read)
r = m_chanB->read_MR2();
break;
default:
r = duart_base_device::read(space, offset, mem_mask);
r = duart_base_device::read(offset);
}
return r;
}
READ8_MEMBER(sc28c94_device::read)
uint8_t sc28c94_device::read(offs_t offset)
{
uint8_t r = 0;
offset &= 0x1f;
if (offset < 0x10)
{
return duart_base_device::read(space, offset, mem_mask);
return duart_base_device::read(offset);
}
switch (offset)
@ -530,7 +530,7 @@ READ8_MEMBER(sc28c94_device::read)
return r;
}
READ8_MEMBER(xr68c681_device::read)
uint8_t xr68c681_device::read(offs_t offset)
{
if (offset == 0x02)
{
@ -538,10 +538,10 @@ READ8_MEMBER(xr68c681_device::read)
return ISR & IMR;
}
else
return mc68681_device::read(space, offset, mem_mask);
return mc68681_device::read(offset);
}
READ8_MEMBER(duart_base_device::read)
uint8_t duart_base_device::read(offs_t offset)
{
uint8_t r = 0xff;
@ -631,15 +631,15 @@ READ8_MEMBER(duart_base_device::read)
return r;
}
WRITE8_MEMBER(mc68681_device::write)
void mc68681_device::write(offs_t offset, uint8_t data)
{
if (offset == 0x0c)
IVR = data;
else
duart_base_device::write(space, offset, data, mem_mask);
duart_base_device::write(offset, data);
}
WRITE8_MEMBER(mc68340_duart_device::write)
void mc68340_duart_device::write(offs_t offset, uint8_t data)
{
//printf("Duart write %02x -> %02x\n", data, offset);
@ -658,17 +658,17 @@ WRITE8_MEMBER(mc68340_duart_device::write)
m_chanB->write_MR2(data);
break;
default:
duart_base_device::write(space, offset, data, mem_mask);
duart_base_device::write(offset, data);
}
}
WRITE8_MEMBER(sc28c94_device::write)
void sc28c94_device::write(offs_t offset, uint8_t data)
{
offset &= 0x1f;
if (offset < 0x10)
{
duart_base_device::write(space, offset, data, mem_mask);
duart_base_device::write(offset, data);
}
switch (offset)
@ -689,7 +689,7 @@ WRITE8_MEMBER(sc28c94_device::write)
}
}
WRITE8_MEMBER(xr68c681_device::write)
void xr68c681_device::write(offs_t offset, uint8_t data)
{
if (offset == 0x02) /* CRA */
switch (data >> 4)
@ -761,10 +761,10 @@ WRITE8_MEMBER(xr68c681_device::write)
break;
}
mc68681_device::write(space, offset, data, mem_mask); /* pass on 68681 command */
mc68681_device::write(offset, data); /* pass on 68681 command */
}
WRITE8_MEMBER(duart_base_device::write)
void duart_base_device::write(offs_t offset, uint8_t data)
{
offset &= 0x0f;
LOG("Writing 68681 (%s) reg %x (%s) with %04x\n", tag(), offset, duart68681_reg_write_names[offset], data);

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@ -120,8 +120,8 @@ public:
}
// API
virtual DECLARE_READ8_MEMBER(read);
virtual DECLARE_WRITE8_MEMBER(write);
virtual uint8_t read(offs_t offset);
virtual void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(rx_a_w) { m_chanA->device_serial_interface::rx_w((uint8_t)state); }
DECLARE_WRITE_LINE_MEMBER(rx_b_w) { m_chanB->device_serial_interface::rx_w((uint8_t)state); }
@ -225,8 +225,8 @@ class mc68681_device : public duart_base_device
public:
mc68681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
uint8_t get_irq_vector() { m_read_vector = true; return IVR; }
protected:
@ -252,8 +252,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(rx_c_w) { m_chanC->device_serial_interface::rx_w((uint8_t)state); }
DECLARE_WRITE_LINE_MEMBER(rx_d_w) { m_chanD->device_serial_interface::rx_w((uint8_t)state); }
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
protected:
virtual void device_add_mconfig(machine_config &config) override;
@ -266,8 +266,8 @@ class mc68340_duart_device : public duart_base_device
public:
mc68340_duart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
protected:
virtual void device_add_mconfig(machine_config &config) override;
@ -279,8 +279,8 @@ class xr68c681_device : public mc68681_device
public:
xr68c681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
protected:
virtual void device_start() override;

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@ -817,7 +817,7 @@ void scn2674_device::write_command(uint8_t data)
}
READ8_MEMBER( scn2674_device::read )
uint8_t scn2674_device::read(offs_t offset)
{
/*
Offset: Purpose
@ -883,7 +883,7 @@ READ8_MEMBER( scn2674_device::read )
}
WRITE8_MEMBER( scn2674_device::write )
void scn2674_device::write(offs_t offset, uint8_t data)
{
/*
Offset: Purpose

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@ -40,12 +40,12 @@ public:
m_display_cb = callback;
}
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( buffer_r ) { return m_char_buffer; }
DECLARE_WRITE8_MEMBER( buffer_w ) { m_char_buffer = data; }
DECLARE_READ8_MEMBER( attr_buffer_r ) { return m_attr_buffer; }
DECLARE_WRITE8_MEMBER( attr_buffer_w ) { m_attr_buffer = data; }
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
uint8_t buffer_r() { return m_char_buffer; }
void buffer_w(offs_t offset, uint8_t data) { m_char_buffer = data; }
uint8_t attr_buffer_r() { return m_attr_buffer; }
void attr_buffer_w(offs_t offset, uint8_t data) { m_attr_buffer = data; }
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);

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@ -425,7 +425,7 @@ READ16_MEMBER(sc4_state::sc4_mem_r)
if ((offset>=base) && (offset<end))
{
offset-=base;
return m_duart->read(space,offset);
return m_duart->read(offset);
}
else
{
@ -594,7 +594,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
if ((offset>=base) && (offset<end))
{
offset-=base;
m_duart->write(space,offset,data&0x00ff);
m_duart->write(offset,data&0x00ff);
}
else
{

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@ -30,7 +30,7 @@ WRITE16_MEMBER( bfm_sc5_state::sc5_duart_w )
if (ACCESSING_BITS_8_15)
{
m_duart->write(space,offset,(data>>8)&0x00ff);
m_duart->write(offset,(data>>8)&0x00ff);
}
else
{

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@ -39,11 +39,11 @@ void hp700_state::mem_map(address_map &map)
map(0x30000, 0x31fff).ram().share("nvram");
map(0x34000, 0x34000).nopr();
map(0x38000, 0x38fff).lrw8("duart_rw",
[this](address_space &space, offs_t offset, u8 mem_mask) {
return m_duart->read(space, offset >> 8, mem_mask);
[this](offs_t offset) {
return m_duart->read(offset >> 8);
},
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
m_duart->write(space, offset >> 8, data, mem_mask);
[this](offs_t offset, u8 data) {
m_duart->write(offset >> 8, data);
});
map(0xffff0, 0xfffff).rom().region("maincpu", 0x1fff0);
}

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@ -31,9 +31,9 @@ public:
void tricep(machine_config &config);
private:
DECLARE_WRITE8_MEMBER(usart_select_w);
DECLARE_READ8_MEMBER(usart_r);
DECLARE_WRITE8_MEMBER(usart_w);
void usart_select_w(uint8_t data);
uint8_t usart_r(offs_t offset);
void usart_w(offs_t offset, uint8_t data);
void tricep_mem(address_map &map);
@ -48,19 +48,19 @@ private:
WRITE8_MEMBER(tricep_state::usart_select_w)
void tricep_state::usart_select_w(uint8_t data)
{
m_mux = data & 3;
}
READ8_MEMBER(tricep_state::usart_r)
uint8_t tricep_state::usart_r(offs_t offset)
{
return m_usart[m_mux]->read(space, offset);
return m_usart[m_mux]->read(offset);
}
WRITE8_MEMBER(tricep_state::usart_w)
void tricep_state::usart_w(offs_t offset, uint8_t data)
{
m_usart[m_mux]->write(space, offset, data);
m_usart[m_mux]->write(offset, data);
}
void tricep_state::tricep_mem(address_map &map)

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@ -197,8 +197,8 @@ private:
uint32_t screen_update_nevada(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_PALETTE_INIT(nevada);
template<int N> DECLARE_READ8_MEMBER(duart_r);
template<int N> DECLARE_WRITE8_MEMBER(duart_w);
template<int N> uint8_t duart_r(offs_t offset);
template<int N> void duart_w(offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER(rtc_r);
DECLARE_WRITE8_MEMBER(rtc_w);
DECLARE_READ16_MEMBER(io_board_r);
@ -344,15 +344,15 @@ void nevada_state::nvram_init(nvram_device &nvram, void *data, size_t size)
***************************************************************************/
template<int N>
READ8_MEMBER(nevada_state::duart_r)
uint8_t nevada_state::duart_r(offs_t offset)
{
return m_duart[N]->read(space, offset >> 3);
return m_duart[N]->read(offset >> 3);
}
template<int N>
WRITE8_MEMBER(nevada_state::duart_w)
void nevada_state::duart_w(offs_t offset, uint8_t data)
{
m_duart[N]->write(space, offset >> 3, data);
m_duart[N]->write(offset >> 3, data);
}
/***************************************************************************/

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@ -281,14 +281,14 @@ WRITE8_MEMBER(vt240_state::i8085_comm_w)
READ8_MEMBER(vt240_state::duart_r)
{
if(!(offset & 1))
return m_duart->read(space, offset >> 1);
return m_duart->read(offset >> 1);
return 0;
}
WRITE8_MEMBER(vt240_state::duart_w)
{
if(offset & 1)
m_duart->write(space, offset >> 1, data);
m_duart->write(offset >> 1, data);
}
WRITE8_MEMBER(vt240_state::duartout_w)

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@ -596,25 +596,25 @@ WRITE8_MEMBER(wicat_state::video_dma_w)
READ8_MEMBER(wicat_state::video_uart0_r)
{
uint16_t noff = offset >> 1;
return m_videouart0->read(space,noff);
return m_videouart0->read(noff);
}
WRITE8_MEMBER(wicat_state::video_uart0_w)
{
uint16_t noff = offset >> 1;
m_videouart0->write(space,noff,data);
m_videouart0->write(noff,data);
}
READ8_MEMBER(wicat_state::video_uart1_r)
{
uint16_t noff = offset >> 1;
return m_videouart1->read(space,noff);
return m_videouart1->read(noff);
}
WRITE8_MEMBER(wicat_state::video_uart1_w)
{
uint16_t noff = offset >> 1;
m_videouart1->write(space,noff,data);
m_videouart1->write(noff,data);
}
// XD2210 64 x 4bit NOVRAM

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@ -38,10 +38,10 @@ private:
I8275_DRAW_CHARACTER_MEMBER(draw_character);
DECLARE_WRITE8_MEMBER(crtc_w);
DECLARE_READ8_MEMBER(pci_r);
DECLARE_WRITE8_MEMBER(pci_w);
uint8_t pci_r(offs_t offset);
void pci_w(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(rxrdy_w);
DECLARE_WRITE8_MEMBER(p2_w);
void p2_w(uint8_t data);
DECLARE_READ_LINE_MEMBER(t1_r);
void prg_map(address_map &map);
@ -75,14 +75,14 @@ WRITE8_MEMBER(wy100_state::crtc_w)
m_crtc[1]->write(space, offset >> 8, data);
}
READ8_MEMBER(wy100_state::pci_r)
uint8_t wy100_state::pci_r(offs_t offset)
{
return m_pci->read(space, offset >> 8);
return m_pci->read(offset >> 8);
}
WRITE8_MEMBER(wy100_state::pci_w)
void wy100_state::pci_w(offs_t offset, uint8_t data)
{
m_pci->write(space, offset >> 8, data);
m_pci->write(offset >> 8, data);
}
WRITE_LINE_MEMBER(wy100_state::rxrdy_w)
@ -90,7 +90,7 @@ WRITE_LINE_MEMBER(wy100_state::rxrdy_w)
m_rxrdy = state;
}
WRITE8_MEMBER(wy100_state::p2_w)
void wy100_state::p2_w(uint8_t data)
{
m_bankdev->set_bank(data & 0x7f);
}

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@ -53,10 +53,10 @@ protected:
private:
SCN2672_DRAW_CHARACTER_MEMBER(draw_character);
DECLARE_READ8_MEMBER(pvtc_r);
DECLARE_WRITE8_MEMBER(pvtc_w);
DECLARE_READ8_MEMBER(sio_r);
DECLARE_WRITE8_MEMBER(sio_w);
u8 pvtc_r(offs_t offset);
void pvtc_w(offs_t offset, u8 data);
u8 sio_r(offs_t offset);
void sio_w(offs_t offset, u8 data);
u8 rbreg_r();
void keyboard_w(u8 data);
void earom_w(u8 data);
@ -88,24 +88,24 @@ SCN2672_DRAW_CHARACTER_MEMBER(wy50_state::draw_character)
{
}
READ8_MEMBER(wy50_state::pvtc_r)
u8 wy50_state::pvtc_r(offs_t offset)
{
return m_pvtc->read(space, offset >> 8);
return m_pvtc->read(offset >> 8);
}
WRITE8_MEMBER(wy50_state::pvtc_w)
void wy50_state::pvtc_w(offs_t offset, u8 data)
{
m_pvtc->write(space, offset >> 8, data);
m_pvtc->write(offset >> 8, data);
}
READ8_MEMBER(wy50_state::sio_r)
u8 wy50_state::sio_r(offs_t offset)
{
return m_sio->read(space, offset >> 8);
return m_sio->read(offset >> 8);
}
WRITE8_MEMBER(wy50_state::sio_w)
void wy50_state::sio_w(offs_t offset, u8 data)
{
m_sio->write(space, offset >> 8, data);
m_sio->write(offset >> 8, data);
}
u8 wy50_state::rbreg_r()

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@ -38,10 +38,10 @@ protected:
private:
SCN2672_DRAW_CHARACTER_MEMBER(draw_character);
DECLARE_READ8_MEMBER(pvtc_r);
DECLARE_WRITE8_MEMBER(pvtc_w);
DECLARE_READ8_MEMBER(duart_r);
DECLARE_WRITE8_MEMBER(duart_w);
u8 pvtc_r(offs_t offset);
void pvtc_w(offs_t offset, u8 data);
u8 duart_r(offs_t offset);
void duart_w(offs_t offset, u8 data);
void earom_w(u8 data);
u8 misc_r();
u8 p1_r();
@ -72,24 +72,24 @@ SCN2672_DRAW_CHARACTER_MEMBER(wy85_state::draw_character)
{
}
READ8_MEMBER(wy85_state::pvtc_r)
u8 wy85_state::pvtc_r(offs_t offset)
{
return m_pvtc->read(space, offset >> 8);
return m_pvtc->read(offset >> 8);
}
WRITE8_MEMBER(wy85_state::pvtc_w)
void wy85_state::pvtc_w(offs_t offset, u8 data)
{
m_pvtc->write(space, offset >> 8, data);
m_pvtc->write(offset >> 8, data);
}
READ8_MEMBER(wy85_state::duart_r)
u8 wy85_state::duart_r(offs_t offset)
{
return m_duart->read(space, offset >> 8);
return m_duart->read(offset >> 8);
}
WRITE8_MEMBER(wy85_state::duart_w)
void wy85_state::duart_w(offs_t offset, u8 data)
{
m_duart->write(space, offset >> 8, data);
m_duart->write(offset >> 8, data);
}
void wy85_state::earom_w(u8 data)

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@ -349,8 +349,8 @@ class apollo_sio: public duart_base_device
public:
apollo_sio(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
protected:
virtual void device_reset() override;

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@ -722,7 +722,7 @@ void apollo_sio::device_reset()
ip6_w((input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER( apollo_sio::read )
uint8_t apollo_sio::read(offs_t offset)
{
static int last_read8_offset[2] = { -1, -1 };
static int last_read8_value[2] = { -1, -1 };
@ -732,7 +732,7 @@ READ8_MEMBER( apollo_sio::read )
"1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter",
"Stop Counter" };
int data = duart_base_device::read(space, offset/2, mem_mask);
int data = duart_base_device::read(offset/2);
switch (offset / 2)
{
@ -766,7 +766,7 @@ READ8_MEMBER( apollo_sio::read )
return data;
}
WRITE8_MEMBER( apollo_sio::write )
void apollo_sio::write(offs_t offset, uint8_t data)
{
static const char * const duart68681_reg_write_names[0x10] = { "MRA",
"CSRA", "CRA", "THRA", "ACR", "IMR", "CRUR", "CTLR", "MRB", "CSRB",
@ -788,7 +788,7 @@ WRITE8_MEMBER( apollo_sio::write )
break;
#endif
}
duart_base_device::write(space, offset/2, data, mem_mask);
duart_base_device::write(offset/2, data);
}
// device type definition

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@ -90,7 +90,7 @@ READ8_MEMBER( micro3d_state::vgb_uart_r )
if (offset == 1 || offset == 2)
offset ^= 3;
return m_vgb_uart->read(space, offset);
return m_vgb_uart->read(offset);
}
WRITE8_MEMBER( micro3d_state::vgb_uart_w )
@ -99,7 +99,7 @@ WRITE8_MEMBER( micro3d_state::vgb_uart_w )
if (offset == 1 || offset == 2)
offset ^= 3;
m_vgb_uart->write(space, offset, data);
m_vgb_uart->write(offset, data);
}