mirror of
https://github.com/holub/mame
synced 2025-06-28 07:04:35 +03:00
added ucom4 i/o opcodes
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f80763b734
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@ -116,10 +116,10 @@ void ucom4_cpu_device::device_start()
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m_datamask = (1 << m_datawidth) - 1;
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m_dph_mask = m_datamask >> 4;
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m_read_a.resolve_safe(0);
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m_read_b.resolve_safe(0);
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m_read_c.resolve_safe(0);
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m_read_d.resolve_safe(0);
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m_read_a.resolve_safe(0xf);
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m_read_b.resolve_safe(0xf);
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m_read_c.resolve_safe(0xf);
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m_read_d.resolve_safe(0xf);
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m_write_c.resolve_safe();
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m_write_d.resolve_safe();
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@ -131,9 +131,9 @@ void ucom4_cpu_device::device_start()
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// zerofill
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memset(m_stack, 0, sizeof(m_stack));
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memset(m_port_out, 0, sizeof(m_port_out));
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m_op = 0;
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m_prev_op = 0;
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m_arg = 0;
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m_skip = false;
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m_pc = 0;
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m_acc = 0;
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@ -147,9 +147,9 @@ void ucom4_cpu_device::device_start()
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// register for savestates
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save_item(NAME(m_stack));
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save_item(NAME(m_port_out));
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save_item(NAME(m_op));
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save_item(NAME(m_prev_op));
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save_item(NAME(m_arg));
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save_item(NAME(m_skip));
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save_item(NAME(m_pc));
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save_item(NAME(m_acc));
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@ -185,6 +185,10 @@ void ucom4_cpu_device::device_reset()
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m_pc = 0;
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m_op = 0;
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m_skip = false;
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// clear i/o
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for (int i = NEC_UCOM4_PORTC; i <= NEC_UCOM4_PORTI; i++)
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output_w(i, 0xf);
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}
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@ -215,6 +219,7 @@ void ucom4_cpu_device::execute_run()
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debugger_instruction_hook(this, m_pc);
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m_op = m_program->read_byte(m_pc);
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m_bitmask = 1 << (m_op & 0x03);
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m_pc = (m_pc + 1) & m_prgmask;
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fetch_arg();
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@ -45,6 +45,20 @@
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ucom4_cpu_device::set_write_i_callback(*device, DEVCB_##_devcb);
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enum
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{
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NEC_UCOM4_PORTA = 0,
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NEC_UCOM4_PORTB,
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NEC_UCOM4_PORTC,
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NEC_UCOM4_PORTD,
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NEC_UCOM4_PORTE,
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NEC_UCOM4_PORTF,
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NEC_UCOM4_PORTG,
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NEC_UCOM4_PORTH,
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NEC_UCOM4_PORTI
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};
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class ucom4_cpu_device : public cpu_device
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{
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@ -117,25 +131,27 @@ protected:
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int m_datawidth;
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int m_prgmask;
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int m_datamask;
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int m_family; // MCU family (43/44/45)
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int m_stack_levels; // number of callstack levels
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UINT16 m_stack[3+1]; // max 3
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int m_family; // MCU family (43/44/45)
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int m_stack_levels; // number of callstack levels
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UINT16 m_stack[3+1]; // max 3
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UINT8 m_port_out[0x10]; // last value written to output port
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UINT8 m_op;
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UINT8 m_prev_op; // previous opcode
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UINT8 m_arg; // opcode argument for 2-byte opcodes
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bool m_skip; // skip next opcode
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UINT8 m_prev_op; // previous opcode
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UINT8 m_arg; // opcode argument for 2-byte opcodes
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UINT8 m_bitmask; // opcode bit argument
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bool m_skip; // skip next opcode
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int m_icount;
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UINT16 m_pc; // program counter
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UINT8 m_acc; // 4-bit accumulator
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UINT8 m_dpl; // 4-bit data pointer low (RAM x)
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UINT8 m_dph; // 4-bit(?) data pointer high (RAM y)
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UINT16 m_pc; // program counter
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UINT8 m_acc; // 4-bit accumulator
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UINT8 m_dpl; // 4-bit data pointer low (RAM x)
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UINT8 m_dph; // 4-bit(?) data pointer high (RAM y)
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UINT8 m_dph_mask;
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UINT8 m_carry_f; // carry flag
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UINT8 m_carry_s_f; // carry save flag
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UINT8 m_timer_f; // timer out flag
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UINT8 m_int_f; // interrupt flag
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UINT8 m_inte_f; // interrupt enable flag
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UINT8 m_carry_f; // carry flag
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UINT8 m_carry_s_f; // carry save flag
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UINT8 m_timer_f; // timer out flag
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UINT8 m_int_f; // interrupt flag
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UINT8 m_inte_f; // interrupt enable flag
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// i/o handlers
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devcb_read8 m_read_a;
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@ -156,6 +172,8 @@ protected:
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void ram_w(UINT8 data);
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void pop_stack();
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void push_stack();
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UINT8 input_r(int index);
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void output_w(int index, UINT8 data);
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void op_illegal();
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bool check_op_43();
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@ -31,6 +31,49 @@ void ucom4_cpu_device::push_stack()
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m_stack[0] = m_pc;
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}
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UINT8 ucom4_cpu_device::input_r(int index)
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{
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index &= 0xf;
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UINT8 inp = 0xf;
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switch (index)
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{
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case NEC_UCOM4_PORTA: inp = m_read_a(index, 0xff) & 0xf; break;
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case NEC_UCOM4_PORTB: inp = m_read_b(index, 0xff) & 0xf; break;
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case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff) & 0xf; break;
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case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff) & 0xf; break;
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default:
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logerror("%s read from unknown port %c at $%03X\n", tag(), 'A' + index, m_pc);
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break;
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}
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return inp;
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}
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void ucom4_cpu_device::output_w(int index, UINT8 data)
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{
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index &= 0xf;
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data &= 0xf;
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switch (index)
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{
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case NEC_UCOM4_PORTC: m_write_c(index, data, 0xff); break;
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case NEC_UCOM4_PORTD: m_write_d(index, data, 0xff); break;
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case NEC_UCOM4_PORTE: m_write_e(index, data, 0xff); break;
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case NEC_UCOM4_PORTF: m_write_f(index, data, 0xff); break;
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case NEC_UCOM4_PORTG: m_write_g(index, data, 0xff); break;
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case NEC_UCOM4_PORTH: m_write_h(index, data, 0xff); break;
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case NEC_UCOM4_PORTI: m_write_i(index, data & 7, 0xff); break;
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default:
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logerror("%s write to unknown port %c = $%X at $%03X\n", tag(), 'A' + index, data & 0xf, m_pc);
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break;
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}
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m_port_out[index] = data;
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}
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void ucom4_cpu_device::op_illegal()
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{
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logerror("%s unknown opcode $%02X at $%03X\n", tag(), m_op, m_pc);
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@ -240,39 +283,39 @@ void ucom4_cpu_device::op_ded()
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void ucom4_cpu_device::op_rmb()
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{
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// RMB B: Reset a single bit of RAM
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ram_w(ram_r() & ~(1 << (m_op & 0x03)));
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ram_w(ram_r() & ~m_bitmask);
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}
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void ucom4_cpu_device::op_smb()
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{
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// SMB B: Set a single bit of RAM
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ram_w(ram_r() | (1 << (m_op & 0x03)));
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ram_w(ram_r() | m_bitmask);
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}
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void ucom4_cpu_device::op_reb()
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{
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// REB B: Reset a single bit of output port E
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m_icount--;
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op_illegal();
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output_w(NEC_UCOM4_PORTE, m_port_out[NEC_UCOM4_PORTE] & ~m_bitmask);
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}
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void ucom4_cpu_device::op_seb()
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{
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// SEB B: Set a single bit of output port E
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m_icount--;
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op_illegal();
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output_w(NEC_UCOM4_PORTE, m_port_out[NEC_UCOM4_PORTE] | m_bitmask);
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}
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void ucom4_cpu_device::op_rpb()
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{
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// RPB B: Reset a single bit of output port (DPl)
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op_illegal();
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output_w(m_dpl, m_port_out[m_dpl] & ~m_bitmask);
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}
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void ucom4_cpu_device::op_spb()
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{
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// SPB B: Set a single bit of output port (DPl)
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op_illegal();
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output_w(m_dpl, m_port_out[m_dpl] | m_bitmask);
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}
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@ -340,14 +383,13 @@ void ucom4_cpu_device::op_cm()
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void ucom4_cpu_device::op_cmb()
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{
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// CMB B: skip next on bit(ACC) equals bit(RAM)
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UINT8 mask = 1 << (m_op & 0x03);
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m_skip = ((m_acc & mask) == (ram_r() & mask));
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m_skip = ((m_acc & m_bitmask) == (ram_r() & m_bitmask));
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}
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void ucom4_cpu_device::op_tab()
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{
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// TAB B: skip next on bit(ACC)
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m_skip = ((m_acc & (1 << (m_op & 0x03))) != 0);
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m_skip = ((m_acc & m_bitmask) != 0);
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}
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void ucom4_cpu_device::op_cli()
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@ -362,19 +404,19 @@ void ucom4_cpu_device::op_cli()
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void ucom4_cpu_device::op_tmb()
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{
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// TMB B: skip next on bit(RAM)
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m_skip = ((ram_r() & (1 << (m_op & 0x03))) != 0);
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m_skip = ((ram_r() & m_bitmask) != 0);
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}
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void ucom4_cpu_device::op_tpa()
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{
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// TPA B: skip next on bit(input port A)
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op_illegal();
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m_skip = ((input_r(NEC_UCOM4_PORTA) & m_bitmask) != 0);
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}
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void ucom4_cpu_device::op_tpb()
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{
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// TPB B: skip next on bit(input port (DPl))
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op_illegal();
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m_skip = ((input_r(m_dpl) & m_bitmask) != 0);
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}
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@ -392,31 +434,32 @@ void ucom4_cpu_device::op_tit()
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void ucom4_cpu_device::op_ia()
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{
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// IA: Input port A to ACC
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op_illegal();
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m_acc = input_r(NEC_UCOM4_PORTA);
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}
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void ucom4_cpu_device::op_ip()
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{
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// IP: Input port (DPl) to ACC
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op_illegal();
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m_acc = input_r(m_dpl);
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}
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void ucom4_cpu_device::op_oe()
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{
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// OE: Output ACC to port E
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m_write_e(0, m_acc, 0xff);
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output_w(NEC_UCOM4_PORTE, m_acc);
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}
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void ucom4_cpu_device::op_op()
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{
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// OP: Output ACC to port (DPl)
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op_illegal();
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output_w(m_dpl, m_acc);
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}
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void ucom4_cpu_device::op_ocd()
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{
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// OCD X: Output X to ports C and D
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op_illegal();
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output_w(NEC_UCOM4_PORTD, m_arg >> 4);
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output_w(NEC_UCOM4_PORTC, m_arg & 0xf);
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}
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