mirror of
https://github.com/holub/mame
synced 2025-06-30 16:00:01 +03:00
-scsicd512.cpp: Added various legacy SCSI CD-ROM devices which support 512-byte blocks by default. [Ryan Holtz]
-nscsi_cd.cpp: Added various new-SCSI CD-ROM devices which support 512-byte blocks by default. [Ryan Holtz] -sgikbd.cpp: Added a rudimentary HLE SGI Indigo keyboard device. Still needs keys to be mapped. [Ryan Holtz] -indigo.cpp: Various changes: [Ryan Holtz] * Expanded logging. * Enabled PIT8254 timer. Has the wrong clock value; the correct clock causes a hang. * Improved RAM layout. * Added stubs for DSP RAM and Entry-level graphics.
This commit is contained in:
mooglyguy
parent
0d948ec7e2
commit
882b5376a8
@ -2947,6 +2947,8 @@ if (BUSES["SCSI"]~=null) then
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MAME_DIR .. "src/devices/bus/scsi/scsihle.h",
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MAME_DIR .. "src/devices/bus/scsi/cdu76s.cpp",
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MAME_DIR .. "src/devices/bus/scsi/cdu76s.h",
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MAME_DIR .. "src/devices/bus/scsi/scsicd512.cpp",
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MAME_DIR .. "src/devices/bus/scsi/scsicd512.h",
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MAME_DIR .. "src/devices/bus/scsi/acb4070.cpp",
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MAME_DIR .. "src/devices/bus/scsi/acb4070.h",
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MAME_DIR .. "src/devices/bus/scsi/d9060hd.cpp",
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@ -3050,6 +3052,20 @@ if (BUSES["ZORRO"]~=null) then
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}
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end
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---------------------------------------------------
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--
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--@src/devices/bus/sgikbd/sgikbd.h,BUSES["SGIKBD"] = true
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---------------------------------------------------
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if (BUSES["SGIKBD"]~=null) then
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files {
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MAME_DIR .. "src/devices/bus/sgikbd/hlekbd.cpp",
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MAME_DIR .. "src/devices/bus/sgikbd/hlekbd.h",
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MAME_DIR .. "src/devices/bus/sgikbd/sgikbd.cpp",
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MAME_DIR .. "src/devices/bus/sgikbd/sgikbd.h",
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}
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end
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---------------------------------------------------
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--
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--@src/devices/bus/sunkbd/sunkbd.h,BUSES["SUNKBD"] = true
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@ -721,6 +721,7 @@ BUSES["SCSI"] = true
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--BUSES["SCV"] = true
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BUSES["SEGA8"] = true
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BUSES["SG1000_EXP"] = true
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BUSES["SGIKBD"] = true
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BUSES["SMS_CTRL"] = true
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BUSES["SMS_EXP"] = true
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--BUSES["SNES"] = true
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@ -787,6 +787,7 @@ BUSES["SCSI"] = true
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BUSES["SCV"] = true
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BUSES["SEGA8"] = true
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BUSES["SG1000_EXP"] = true
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BUSES["SGIKBD"] = true
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BUSES["SMS_CTRL"] = true
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BUSES["SMS_EXP"] = true
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BUSES["SNES"] = true
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102
src/devices/bus/scsi/scsicd512.cpp
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102
src/devices/bus/scsi/scsicd512.cpp
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@ -0,0 +1,102 @@
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// license:BSD-3-Clause
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// copyright-holders:Ryan Holtz
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/***************************************************************************
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DEC RRD45 CD-ROM
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***************************************************************************/
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#include "emu.h"
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#include "scsicd512.h"
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DEFINE_DEVICE_TYPE(RRD45, dec_rrd45_device, "rrd45", "DEC RRD45")
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DEFINE_DEVICE_TYPE(XM3301, toshiba_xm3301_device, "xm3301", "Toshiba XM-3301TA CD-ROM")
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DEFINE_DEVICE_TYPE(XM5301SUN, toshiba_xm5301_sun_device, "xm5301sun", "Toshiba XM-5301B Sun 4x CD-ROM")
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DEFINE_DEVICE_TYPE(XM5401SUN, toshiba_xm5401_sun_device, "xm5401sun", "Toshiba XM-5401B Sun 4x CD-ROM")
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DEFINE_DEVICE_TYPE(XM5701, toshiba_xm5701_device, "xm5701", "Toshiba XM-5701B 12x CD-ROM")
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DEFINE_DEVICE_TYPE(XM5701SUN, toshiba_xm5701_sun_device, "xm5701sun", "Toshiba XM-5701B Sun 12x CD-ROM")
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void scsicd512_device::device_reset()
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{
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scsihle_device::device_reset();
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m_sector_bytes = 512;
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m_num_subblocks = 4;
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}
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void scsicd512_device::ExecCommand()
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{
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switch (command[0])
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{
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case 0x12: // INQUIRY
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m_phase = SCSI_PHASE_DATAIN;
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m_status_code = SCSI_STATUS_CODE_GOOD;
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m_transfer_length = SCSILengthFromUINT8(&command[4]);
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break;
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default:
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scsicd_device::ExecCommand();
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break;
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}
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}
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void scsicd512_device::ReadData(uint8_t *data, int dataLength)
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{
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switch (command[0])
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{
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case 0x12: // INQUIRY
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{
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uint8_t buffer[36];
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memset(buffer, 0, dataLength);
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buffer[0] = 0x05; // device is present, device is CD/DVD (MMC-3)
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buffer[1] = 0x80; // media is removable
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buffer[2] = 0x02; // copied from response from actual drive
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buffer[3] = 0x02; // response data format = SPC-3 standard
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buffer[4] = 0x1f; // copied ...
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buffer[7] = 0x98; // copied ...
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memcpy(&buffer[8], m_manufacturer, 8);
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memcpy(&buffer[16], m_product, 16);
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memcpy(&buffer[32], m_revision, 4);
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memcpy(data, buffer, dataLength);
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break;
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}
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default:
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scsicd_device::ReadData(data, dataLength);
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break;
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}
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}
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scsicd512_device::scsicd512_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
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scsicd_device(mconfig, type, tag, owner, clock)
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{
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}
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dec_rrd45_device::dec_rrd45_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, RRD45, tag, owner, "DEC ", "RRD45 (C) DEC ", "0436", 0x98)
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{
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}
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toshiba_xm3301_device::toshiba_xm3301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, XM3301, tag, owner, "TOSHIBA ", "CD-ROM XM-3301TA", "0272", 0x88)
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{
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}
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toshiba_xm5301_sun_device::toshiba_xm5301_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, XM5301SUN, tag, owner, "TOSHIBA ", "XM-5301TASUN4XCD", "2915", 0x98)
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{
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}
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toshiba_xm5401_sun_device::toshiba_xm5401_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, XM5401SUN, tag, owner, "TOSHIBA ", "XM-5401TASUN4XCD", "1036", 0x98)
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{
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}
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toshiba_xm5701_device::toshiba_xm5701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, XM5701, tag, owner, "TOSHIBA ", "CD-ROM XM-5701TA", "3136", 0x98)
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{
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}
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toshiba_xm5701_sun_device::toshiba_xm5701_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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scsicd512_device(mconfig, XM5701SUN, tag, owner, "TOSHIBA ", "XM5701TASUN12XCD", "0997", 0x98)
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{
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}
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86
src/devices/bus/scsi/scsicd512.h
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86
src/devices/bus/scsi/scsicd512.h
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@ -0,0 +1,86 @@
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// license:BSD-3-Clause
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// copyright-holders:Ryan Holtz
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/***************************************************************************
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Various 512-byte-block SCSI CD-ROM devices
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***************************************************************************/
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#ifndef DEVICES_BUS_SCSI_SCSICD512_H
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#define DEVICES_BUS_SCSI_SCSICD512_H
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#pragma once
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#include "scsicd.h"
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class scsicd512_device : public scsicd_device
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{
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public:
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virtual void ExecCommand() override;
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virtual void ReadData(uint8_t *data, int dataLength) override;
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protected:
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scsicd512_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock = 0);
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scsicd512_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner,
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const char *mfr, const char *product, const char *rev, uint8_t data)
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: scsicd512_device(mconfig, type, tag, owner, 0)
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{
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strncpy(m_manufacturer, mfr, 8);
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strncpy(m_product, product, 16);
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strncpy(m_revision, rev, 4);
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m_data = data;
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}
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virtual void device_reset() override;
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char m_manufacturer[8];
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char m_product[16];
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char m_revision[4];
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uint8_t m_data;
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};
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class dec_rrd45_device : public scsicd512_device
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{
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public:
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dec_rrd45_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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class toshiba_xm3301_device : public scsicd512_device
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{
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public:
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toshiba_xm3301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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class toshiba_xm5301_sun_device : public scsicd512_device
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{
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public:
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toshiba_xm5301_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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class toshiba_xm5401_sun_device : public scsicd512_device
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{
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public:
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toshiba_xm5401_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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class toshiba_xm5701_device : public scsicd512_device
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{
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public:
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toshiba_xm5701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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class toshiba_xm5701_sun_device : public scsicd512_device
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{
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public:
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toshiba_xm5701_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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};
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DECLARE_DEVICE_TYPE(RRD45, dec_rrd45_device)
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DECLARE_DEVICE_TYPE(XM3301, toshiba_xm3301_device)
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DECLARE_DEVICE_TYPE(XM5301SUN, toshiba_xm5301_sun_device)
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DECLARE_DEVICE_TYPE(XM5401SUN, toshiba_xm5401_sun_device)
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DECLARE_DEVICE_TYPE(XM5701, toshiba_xm5701_device)
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DECLARE_DEVICE_TYPE(XM5701SUN, toshiba_xm5701_sun_device)
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#endif // DEVICES_BUS_SCSI_SCSICD512_H
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413
src/devices/bus/sgikbd/hlekbd.cpp
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413
src/devices/bus/sgikbd/hlekbd.cpp
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@ -0,0 +1,413 @@
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// license:BSD-3-Clause
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// copyright-holders:Ryan Holtz
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#include "emu.h"
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#include "hlekbd.h"
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#include "machine/keyboard.ipp"
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#include "speaker.h"
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DEFINE_DEVICE_TYPE_NS(SGI_HLE_KEYBOARD, bus::sgikbd, hle_device, "hlekbd", "SGI Indigo Keyboard (HLE)")
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namespace bus { namespace sgikbd {
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namespace {
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INPUT_PORTS_START( hle_device )
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PORT_START("ROW0")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_START("ROW1")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_START("ROW2")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_START("ROW3")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_START("ROW4")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_START("ROW5")
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PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
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PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW6")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("ROW7")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
hle_device::hle_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, SGI_HLE_KEYBOARD, tag, owner, clock)
|
||||
, device_buffered_serial_interface(mconfig, *this)
|
||||
, device_sgi_keyboard_port_interface(mconfig, *this)
|
||||
, device_matrix_keyboard_interface(mconfig, *this, "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7")
|
||||
, m_click_timer(nullptr)
|
||||
, m_beep_timer(nullptr)
|
||||
, m_beeper(*this, "beeper")
|
||||
, m_leds(*this, "led%u", 0U)
|
||||
, m_make_count(0)
|
||||
, m_keyclick(true)
|
||||
, m_auto_repeat(false)
|
||||
, m_beeper_state(0)
|
||||
, m_led_state(0)
|
||||
{
|
||||
}
|
||||
|
||||
hle_device::~hle_device()
|
||||
{
|
||||
}
|
||||
|
||||
ioport_constructor hle_device::device_input_ports() const
|
||||
{
|
||||
return INPUT_PORTS_NAME(hle_device);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hle_device::input_txd)
|
||||
{
|
||||
device_buffered_serial_interface::rx_w(state);
|
||||
}
|
||||
|
||||
void hle_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
SPEAKER(config, "bell").front_center();
|
||||
BEEP(config, m_beeper, ATTOSECONDS_TO_HZ(480 * ATTOSECONDS_PER_MICROSECOND));
|
||||
m_beeper->add_route(ALL_OUTPUTS, "bell", 1.0);
|
||||
}
|
||||
|
||||
void hle_device::device_start()
|
||||
{
|
||||
m_leds.resolve();
|
||||
m_click_timer = timer_alloc(TIMER_CLICK);
|
||||
m_beep_timer = timer_alloc(TIMER_BEEP);
|
||||
|
||||
save_item(NAME(m_make_count));
|
||||
save_item(NAME(m_keyclick));
|
||||
save_item(NAME(m_auto_repeat));
|
||||
save_item(NAME(m_beeper_state));
|
||||
save_item(NAME(m_led_state));
|
||||
}
|
||||
|
||||
void hle_device::device_reset()
|
||||
{
|
||||
// initialise state
|
||||
clear_fifo();
|
||||
m_make_count = 0;
|
||||
m_keyclick = true;
|
||||
m_auto_repeat = false;
|
||||
m_beeper_state = 0;
|
||||
m_led_state = 0;
|
||||
|
||||
// configure device_buffered_serial_interface
|
||||
set_data_frame(START_BIT_COUNT, DATA_BIT_COUNT, PARITY, STOP_BITS);
|
||||
set_rate(BAUD);
|
||||
receive_register_reset();
|
||||
transmit_register_reset();
|
||||
|
||||
// set device_sgi_keyboard_port_interface lines
|
||||
output_rxd(1);
|
||||
|
||||
// start with keyboard LEDs off
|
||||
m_leds[LED_NUM] = 0;
|
||||
m_leds[LED_CAPS] = 0;
|
||||
m_leds[LED_SCROLL] = 0;
|
||||
m_leds[LED_USER1] = 0;
|
||||
m_leds[LED_USER2] = 0;
|
||||
m_leds[LED_USER3] = 0;
|
||||
m_leds[LED_USER4] = 0;
|
||||
|
||||
m_click_timer->adjust(attotime::never);
|
||||
m_beep_timer->adjust(attotime::never);
|
||||
|
||||
// kick the base
|
||||
reset_key_state();
|
||||
start_processing(attotime::from_hz(600));
|
||||
}
|
||||
|
||||
void hle_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
{
|
||||
switch (id)
|
||||
{
|
||||
case TIMER_CLICK:
|
||||
m_beeper_state &= ~BEEPER_CLICK;
|
||||
m_beeper->set_state(m_beeper_state ? 1 : 0);
|
||||
break;
|
||||
|
||||
case TIMER_BEEP:
|
||||
m_beeper_state &= ~BEEPER_BELL;
|
||||
m_beeper->set_state(m_beeper_state ? 1 : 0);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void hle_device::tra_callback()
|
||||
{
|
||||
output_rxd(transmit_register_get_data_bit());
|
||||
}
|
||||
|
||||
void hle_device::tra_complete()
|
||||
{
|
||||
if (fifo_full())
|
||||
start_processing(attotime::from_hz(600));
|
||||
|
||||
device_buffered_serial_interface::tra_complete();
|
||||
}
|
||||
|
||||
void hle_device::key_make(uint8_t row, uint8_t column)
|
||||
{
|
||||
// we should have stopped processing if we filled the FIFO
|
||||
assert(!fifo_full());
|
||||
|
||||
// send the make code, click if desired
|
||||
//transmit_byte((row << 4) | column);
|
||||
if (m_keyclick)
|
||||
{
|
||||
m_beeper_state |= uint8_t(BEEPER_CLICK);
|
||||
m_beeper->set_state(m_beeper_state ? 1 : 0);
|
||||
m_click_timer->reset(attotime::from_msec(5));
|
||||
}
|
||||
|
||||
// count keys
|
||||
++m_make_count;
|
||||
assert(m_make_count);
|
||||
}
|
||||
|
||||
void hle_device::key_break(uint8_t row, uint8_t column)
|
||||
{
|
||||
// we should have stopped processing if we filled the FIFO
|
||||
assert(!fifo_full());
|
||||
assert(m_make_count);
|
||||
|
||||
// send the break code, and the idle code if no other keys are down
|
||||
//transmit_byte(0x80 | (row << 4) | column);
|
||||
//if (!--m_make_count)
|
||||
//transmit_byte(0xf0);
|
||||
}
|
||||
|
||||
void hle_device::transmit_byte(uint8_t byte)
|
||||
{
|
||||
device_buffered_serial_interface::transmit_byte(byte);
|
||||
if (fifo_full())
|
||||
stop_processing();
|
||||
}
|
||||
|
||||
void hle_device::received_byte(uint8_t byte)
|
||||
{
|
||||
if (BIT(byte, CTRL_B))
|
||||
{
|
||||
if (BIT(byte, CTRL_B_CMPL_DS1_2))
|
||||
{
|
||||
logerror("Not Yet Implemented: Complement DS1/2\n");
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_B_SCRLK))
|
||||
{
|
||||
logerror("Toggle Scroll Lock LED\n");
|
||||
m_led_state ^= (1 << LED_SCROLL);
|
||||
m_leds[LED_SCROLL] = BIT(m_led_state, LED_SCROLL);
|
||||
}
|
||||
if (BIT(byte, CTRL_B_L1))
|
||||
{
|
||||
logerror("Toggle User LED 1\n");
|
||||
m_led_state ^= (1 << LED_USER1);
|
||||
m_leds[LED_USER1] = BIT(m_led_state, LED_USER1);
|
||||
}
|
||||
if (BIT(byte, CTRL_B_L2))
|
||||
{
|
||||
logerror("Toggle User LED 2\n");
|
||||
m_led_state ^= (1 << LED_USER2);
|
||||
m_leds[LED_USER2] = BIT(m_led_state, LED_USER2);
|
||||
}
|
||||
if (BIT(byte, CTRL_B_L3))
|
||||
{
|
||||
logerror("Toggle User LED 3\n");
|
||||
m_led_state ^= (1 << LED_USER3);
|
||||
m_leds[LED_USER3] = BIT(m_led_state, LED_USER3);
|
||||
}
|
||||
if (BIT(byte, CTRL_B_L4))
|
||||
{
|
||||
logerror("Toggle User LED 4\n");
|
||||
m_led_state ^= (1 << LED_USER4);
|
||||
m_leds[LED_USER3] = BIT(m_led_state, LED_USER4);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (BIT(byte, CTRL_A_SBEEP))
|
||||
{
|
||||
logerror("Short Beep\n");
|
||||
m_beeper_state |= uint8_t(BEEPER_BELL);
|
||||
m_beeper->set_state(m_beeper_state ? 1 : 0);
|
||||
m_click_timer->adjust(attotime::from_msec(200));
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_LBEEP))
|
||||
{
|
||||
logerror("Long Beep\n");
|
||||
m_beeper_state |= uint8_t(BEEPER_BELL);
|
||||
m_beeper->set_state(m_beeper_state ? 1 : 0);
|
||||
m_click_timer->adjust(attotime::from_msec(1000));
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_NOCLICK))
|
||||
{
|
||||
logerror("Keyclick Off\n");
|
||||
m_keyclick = false;
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_RCB))
|
||||
{
|
||||
logerror("Receive Config Byte\n");
|
||||
transmit_byte(0x6e);
|
||||
transmit_byte(0x00); // US layout
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_NUMLK))
|
||||
{
|
||||
logerror("Toggle Num Lock LED\n");
|
||||
m_led_state ^= (1 << LED_NUM);
|
||||
m_leds[LED_NUM] = BIT(m_led_state, LED_NUM);
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_CAPSLK))
|
||||
{
|
||||
logerror("Toggle Caps Lock LED\n");
|
||||
m_led_state ^= (1 << LED_CAPS);
|
||||
m_leds[LED_CAPS] = BIT(m_led_state, LED_CAPS);
|
||||
}
|
||||
|
||||
if (BIT(byte, CTRL_A_AUTOREP))
|
||||
{
|
||||
logerror("Toggle Auto Repeat\n");
|
||||
m_auto_repeat = !m_auto_repeat;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
} } // namespace bus::sgikbd
|
||||
117
src/devices/bus/sgikbd/hlekbd.h
Normal file
117
src/devices/bus/sgikbd/hlekbd.h
Normal file
@ -0,0 +1,117 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Ryan Holtz
|
||||
#ifndef DEVICES_BUS_SGIKBD_HLEKBD_H
|
||||
#define DEVICES_BUS_SGIKBD_HLEKBD_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "sgikbd.h"
|
||||
#include "machine/keyboard.h"
|
||||
#include "sound/beep.h"
|
||||
#include "diserial.h"
|
||||
|
||||
|
||||
namespace bus { namespace sgikbd {
|
||||
|
||||
class hle_device : public device_t
|
||||
, public device_buffered_serial_interface<16U>
|
||||
, public device_sgi_keyboard_port_interface
|
||||
, protected device_matrix_keyboard_interface<8U>
|
||||
{
|
||||
public:
|
||||
// constructor/destructor
|
||||
hle_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual ~hle_device() override;
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(input_txd) override;
|
||||
|
||||
protected:
|
||||
// device overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
// device_buffered_serial_interface overrides
|
||||
virtual void tra_callback() override;
|
||||
virtual void tra_complete() override;
|
||||
|
||||
// device_matrix_keyboard_interface overrides
|
||||
virtual void key_make(uint8_t row, uint8_t column) override;
|
||||
virtual void key_break(uint8_t row, uint8_t column) override;
|
||||
|
||||
// customised transmit_byte method
|
||||
void transmit_byte(uint8_t byte);
|
||||
|
||||
private:
|
||||
enum
|
||||
{
|
||||
TIMER_CLICK = 30000,
|
||||
TIMER_BEEP = 30001
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
LED_NUM,
|
||||
LED_CAPS,
|
||||
LED_SCROLL,
|
||||
LED_USER1,
|
||||
LED_USER2,
|
||||
LED_USER3,
|
||||
LED_USER4
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
BEEPER_BELL = 0x01,
|
||||
BEEPER_CLICK = 0x02
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
RX_IDLE,
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
CTRL_A_SBEEP = 1,
|
||||
CTRL_A_LBEEP = 2,
|
||||
CTRL_A_NOCLICK = 3,
|
||||
CTRL_A_RCB = 4,
|
||||
CTRL_A_NUMLK = 5,
|
||||
CTRL_A_CAPSLK = 6,
|
||||
CTRL_A_AUTOREP = 7,
|
||||
|
||||
CTRL_B = 0,
|
||||
CTRL_B_CMPL_DS1_2 = 1,
|
||||
CTRL_B_SCRLK = 2,
|
||||
CTRL_B_L1 = 3,
|
||||
CTRL_B_L2 = 4,
|
||||
CTRL_B_L3 = 5,
|
||||
CTRL_B_L4 = 6
|
||||
};
|
||||
|
||||
// device_buffered_serial_interface overrides
|
||||
virtual void received_byte(uint8_t byte) override;
|
||||
|
||||
emu_timer *m_click_timer;
|
||||
emu_timer *m_beep_timer;
|
||||
required_device<beep_device> m_beeper;
|
||||
output_finder<7> m_leds;
|
||||
|
||||
uint8_t m_make_count;
|
||||
|
||||
bool m_keyclick;
|
||||
bool m_auto_repeat;
|
||||
uint8_t m_beeper_state;
|
||||
uint8_t m_led_state;
|
||||
};
|
||||
|
||||
} } // namespace bus::sgikbd
|
||||
|
||||
|
||||
DECLARE_DEVICE_TYPE_NS(SGI_HLE_KEYBOARD, bus::sgikbd, hle_device)
|
||||
|
||||
#endif // DEVICES_BUS_SGIKBD_HLEKBD_H
|
||||
89
src/devices/bus/sgikbd/sgikbd.cpp
Normal file
89
src/devices/bus/sgikbd/sgikbd.cpp
Normal file
@ -0,0 +1,89 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Ryan Holtz
|
||||
|
||||
#include "emu.h"
|
||||
#include "sgikbd.h"
|
||||
|
||||
|
||||
DEFINE_DEVICE_TYPE(SGIKBD_PORT, sgi_keyboard_port_device, "sgikbd", "SGI Keyboard Port")
|
||||
|
||||
|
||||
int const device_sgi_keyboard_port_interface::START_BIT_COUNT;
|
||||
int const device_sgi_keyboard_port_interface::DATA_BIT_COUNT;
|
||||
device_serial_interface::parity_t const device_sgi_keyboard_port_interface::PARITY;
|
||||
device_serial_interface::stop_bits_t const device_sgi_keyboard_port_interface::STOP_BITS;
|
||||
int const device_sgi_keyboard_port_interface::BAUD;
|
||||
|
||||
sgi_keyboard_port_device::sgi_keyboard_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
|
||||
: sgi_keyboard_port_device(mconfig, SGIKBD_PORT, tag, owner, clock)
|
||||
{
|
||||
}
|
||||
|
||||
sgi_keyboard_port_device::sgi_keyboard_port_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, type, tag, owner, clock)
|
||||
, device_slot_interface(mconfig, *this)
|
||||
, m_rxd(0)
|
||||
, m_rxd_handler(*this)
|
||||
, m_dev(nullptr)
|
||||
{
|
||||
}
|
||||
|
||||
sgi_keyboard_port_device::~sgi_keyboard_port_device()
|
||||
{
|
||||
}
|
||||
|
||||
void sgi_keyboard_port_device::device_config_complete()
|
||||
{
|
||||
m_dev = dynamic_cast<device_sgi_keyboard_port_interface *>(get_card_device());
|
||||
}
|
||||
|
||||
void sgi_keyboard_port_device::device_validity_check(validity_checker &valid) const
|
||||
{
|
||||
device_t *const card(get_card_device());
|
||||
if (card && !dynamic_cast<device_sgi_keyboard_port_interface *>(card))
|
||||
{
|
||||
logerror("Card device %s (%s) does not implement device_sgi_keyboard_port_interface\n", card->tag(), card->name());
|
||||
}
|
||||
}
|
||||
|
||||
void sgi_keyboard_port_device::device_resolve_objects()
|
||||
{
|
||||
m_rxd_handler.resolve_safe();
|
||||
}
|
||||
|
||||
void sgi_keyboard_port_device::device_start()
|
||||
{
|
||||
if (get_card_device() && !m_dev)
|
||||
{
|
||||
throw emu_fatalerror("Card device %s (%s) does not implement device_sgi_keyboard_port_interface\n", get_card_device()->tag(), get_card_device()->name());
|
||||
}
|
||||
|
||||
save_item(NAME(m_rxd));
|
||||
|
||||
m_rxd = 1;
|
||||
m_rxd_handler(m_rxd);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(sgi_keyboard_port_device::write_txd)
|
||||
{
|
||||
if (m_dev)
|
||||
m_dev->input_txd(state);
|
||||
}
|
||||
|
||||
device_sgi_keyboard_port_interface::device_sgi_keyboard_port_interface(machine_config const &mconfig, device_t &device)
|
||||
: device_slot_card_interface(mconfig, device)
|
||||
, m_port(dynamic_cast<sgi_keyboard_port_device *>(device.owner()))
|
||||
{
|
||||
}
|
||||
|
||||
device_sgi_keyboard_port_interface::~device_sgi_keyboard_port_interface()
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
#include "hlekbd.h"
|
||||
|
||||
void default_sgi_keyboard_devices(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("hlekbd", SGI_HLE_KEYBOARD);
|
||||
}
|
||||
82
src/devices/bus/sgikbd/sgikbd.h
Normal file
82
src/devices/bus/sgikbd/sgikbd.h
Normal file
@ -0,0 +1,82 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Ryan Holtz
|
||||
#ifndef DEVICES_BUS_SGIKBD_SGIKBD_H
|
||||
#define DEVICES_BUS_SGIKBD_SGIKBD_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "diserial.h"
|
||||
|
||||
class device_sgi_keyboard_port_interface;
|
||||
|
||||
class sgi_keyboard_port_device : public device_t, public device_slot_interface
|
||||
{
|
||||
friend class device_sgi_keyboard_port_interface;
|
||||
|
||||
public:
|
||||
template <typename T>
|
||||
sgi_keyboard_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt)
|
||||
: sgi_keyboard_port_device(mconfig, tag, owner, 0)
|
||||
{
|
||||
option_reset();
|
||||
opts(*this);
|
||||
set_default_option(dflt);
|
||||
set_fixed(false);
|
||||
}
|
||||
sgi_keyboard_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0);
|
||||
virtual ~sgi_keyboard_port_device();
|
||||
|
||||
// configuration helpers
|
||||
auto rxd_handler() { return m_rxd_handler.bind(); }
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( write_txd );
|
||||
|
||||
DECLARE_READ_LINE_MEMBER( rxd_r ) { return m_rxd; }
|
||||
|
||||
protected:
|
||||
sgi_keyboard_port_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual void device_config_complete() override;
|
||||
virtual void device_validity_check(validity_checker &valid) const override;
|
||||
virtual void device_resolve_objects() override;
|
||||
virtual void device_start() override;
|
||||
|
||||
int m_rxd;
|
||||
|
||||
devcb_write_line m_rxd_handler;
|
||||
|
||||
private:
|
||||
device_sgi_keyboard_port_interface *m_dev;
|
||||
};
|
||||
|
||||
|
||||
class device_sgi_keyboard_port_interface : public device_slot_card_interface
|
||||
{
|
||||
friend class sgi_keyboard_port_device;
|
||||
|
||||
public:
|
||||
virtual ~device_sgi_keyboard_port_interface() override;
|
||||
|
||||
protected:
|
||||
device_sgi_keyboard_port_interface(machine_config const &mconfig, device_t &device);
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(input_txd) { }
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(output_rxd) { m_port->m_rxd = state; m_port->m_rxd_handler(state); }
|
||||
|
||||
sgi_keyboard_port_device *m_port;
|
||||
|
||||
static constexpr int START_BIT_COUNT = 1;
|
||||
static constexpr int DATA_BIT_COUNT = 8;
|
||||
static constexpr device_serial_interface::parity_t PARITY = device_serial_interface::PARITY_ODD;
|
||||
static constexpr device_serial_interface::stop_bits_t STOP_BITS = device_serial_interface::STOP_BITS_1;
|
||||
static constexpr int BAUD = 600;
|
||||
};
|
||||
|
||||
|
||||
DECLARE_DEVICE_TYPE(SGIKBD_PORT, sgi_keyboard_port_device)
|
||||
|
||||
|
||||
void default_sgi_keyboard_devices(device_slot_interface &device);
|
||||
|
||||
#endif // DEVICES_BUS_SGIKBD_SGIKBD_H
|
||||
@ -7,9 +7,55 @@
|
||||
#include "logmacro.h"
|
||||
|
||||
DEFINE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device, "scsi_cdrom", "SCSI CD-ROM")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_RRD45, nscsi_dec_rrd45_device, "nrrd45", "RRD45 CD-ROM (New)")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_XM3301, nscsi_toshiba_xm3301_device, "nxm3301", "XM-3301TA CD-ROM (New)")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_XM5301SUN, nscsi_toshiba_xm5301_sun_device, "nxm5301sun", "XM-5301B Sun 4x CD-ROM (New)")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_XM5401SUN, nscsi_toshiba_xm5401_sun_device, "nxm5401sun", "XM-5401B Sun 4x CD-ROM (New)")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_XM5701, nscsi_toshiba_xm5701_device, "nxm5701", "XM-5701B 12x CD-ROM (New)")
|
||||
DEFINE_DEVICE_TYPE(NSCSI_XM5701SUN, nscsi_toshiba_xm5701_sun_device, "nxm5701sun", "XM-5701B Sun 12x CD-ROM (New)")
|
||||
|
||||
nscsi_cdrom_device::nscsi_cdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_full_device(mconfig, NSCSI_CDROM, tag, owner, clock), cdrom(nullptr), bytes_per_block(bytes_per_sector), lba(0), cur_sector(0), image(*this, "image")
|
||||
nscsi_cdrom_device(mconfig, NSCSI_CDROM, tag, owner, "Sony", "CDU-76S", "1.0", 0x00, 0x05)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_dec_rrd45_device::nscsi_dec_rrd45_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_RRD45, tag, owner, "DEC ", "RRD45 (C) DEC ", "0436", 0x98, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_toshiba_xm3301_device::nscsi_toshiba_xm3301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_XM3301, tag, owner, "TOSHIBA ", "CD-ROM XM-3301TA", "0272", 0x88, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_toshiba_xm5301_sun_device::nscsi_toshiba_xm5301_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_XM5301SUN, tag, owner, "TOSHIBA ", "XM-5301TASUN4XCD", "2915", 0x98, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_toshiba_xm5401_sun_device::nscsi_toshiba_xm5401_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_XM5401SUN, tag, owner, "TOSHIBA ", "XM-5401TASUN4XCD", "1036", 0x98, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_toshiba_xm5701_device::nscsi_toshiba_xm5701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_XM5701, tag, owner, "TOSHIBA ", "CD-ROM XM-5701TA", "3136", 0x98, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_toshiba_xm5701_sun_device::nscsi_toshiba_xm5701_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
nscsi_cdrom_device(mconfig, NSCSI_XM5701SUN, tag, owner, "TOSHIBA ", "XM5701TASUN12XCD", "0997", 0x98, 0x02)
|
||||
{
|
||||
}
|
||||
|
||||
nscsi_cdrom_device::nscsi_cdrom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: nscsi_full_device(mconfig, type, tag, owner, clock)
|
||||
, cdrom(nullptr)
|
||||
, bytes_per_block(bytes_per_sector)
|
||||
, lba(0)
|
||||
, cur_sector(0)
|
||||
, image(*this, "image")
|
||||
{
|
||||
}
|
||||
|
||||
@ -163,14 +209,13 @@ void nscsi_cdrom_device::scsi_command()
|
||||
|
||||
scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3)
|
||||
scsi_cmdbuf[1] = 0x80; // media is removable
|
||||
scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard
|
||||
scsi_cmdbuf[2] = compliance; // device complies with SPC-3 standard
|
||||
scsi_cmdbuf[3] = 0x02; // response data format = SPC-3 standard
|
||||
scsi_cmdbuf[4] = 32; // additional length
|
||||
// some Konami games freak out if this isn't "Sony", so we'll lie
|
||||
// this is the actual drive on my Nagano '98 board
|
||||
strncpy((char *)&scsi_cmdbuf[8], "Sony", 4);
|
||||
strncpy((char *)&scsi_cmdbuf[16], "CDU-76S", 7);
|
||||
strncpy((char *)&scsi_cmdbuf[32], "1.0", 3);
|
||||
scsi_cmdbuf[4] = 0x20; // additional length
|
||||
scsi_cmdbuf[7] = inquiry_data;
|
||||
strncpy((char *)&scsi_cmdbuf[8], manufacturer, 8);
|
||||
strncpy((char *)&scsi_cmdbuf[16], product, 16);
|
||||
strncpy((char *)&scsi_cmdbuf[32], revision, 4);
|
||||
if(size > 36)
|
||||
size = 36;
|
||||
scsi_data_in(SBUF_MAIN, size);
|
||||
|
||||
@ -12,11 +12,23 @@
|
||||
class nscsi_cdrom_device : public nscsi_full_device
|
||||
{
|
||||
public:
|
||||
nscsi_cdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
nscsi_cdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
void set_block_size(u32 block_size);
|
||||
|
||||
protected:
|
||||
nscsi_cdrom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
nscsi_cdrom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, const char *mfr, const char *product, const char *rev, uint8_t inq_data, uint8_t compliance)
|
||||
: nscsi_cdrom_device(mconfig, type, tag, owner, 0)
|
||||
{
|
||||
strncpy(manufacturer, mfr, 8);
|
||||
strncpy(this->product, product, 16);
|
||||
strncpy(revision, rev, 4);
|
||||
inquiry_data = inq_data;
|
||||
this->compliance = compliance;
|
||||
}
|
||||
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -35,9 +47,57 @@ private:
|
||||
required_device<cdrom_image_device> image;
|
||||
uint8_t mode_data[12];
|
||||
|
||||
char manufacturer[8];
|
||||
char product[16];
|
||||
char revision[4];
|
||||
uint8_t inquiry_data;
|
||||
uint8_t compliance;
|
||||
|
||||
void return_no_cd();
|
||||
};
|
||||
|
||||
class nscsi_dec_rrd45_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_dec_rrd45_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
class nscsi_toshiba_xm3301_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_toshiba_xm3301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
class nscsi_toshiba_xm5301_sun_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_toshiba_xm5301_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
class nscsi_toshiba_xm5401_sun_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_toshiba_xm5401_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
class nscsi_toshiba_xm5701_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_toshiba_xm5701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
class nscsi_toshiba_xm5701_sun_device : public nscsi_cdrom_device
|
||||
{
|
||||
public:
|
||||
nscsi_toshiba_xm5701_sun_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_RRD45, nscsi_dec_rrd45_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_XM3301, nscsi_toshiba_xm3301_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_XM5301SUN, nscsi_toshiba_xm5301_sun_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_XM5401SUN, nscsi_toshiba_xm5401_sun_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_XM5701, nscsi_toshiba_xm5701_device)
|
||||
DECLARE_DEVICE_TYPE(NSCSI_XM5701SUN, nscsi_toshiba_xm5701_sun_device)
|
||||
|
||||
#endif // MAME_MACHINE_NSCSI_CD_H
|
||||
|
||||
@ -19,8 +19,9 @@
|
||||
#include "emu.h"
|
||||
#include "bus/rs232/rs232.h"
|
||||
#include "bus/scsi/scsi.h"
|
||||
#include "bus/scsi/scsicd.h"
|
||||
#include "bus/scsi/scsicd512.h"
|
||||
#include "bus/scsi/scsihd.h"
|
||||
#include "bus/sgikbd/sgikbd.h"
|
||||
//#include "cpu/dsp56k/dsp56k.h"
|
||||
#include "cpu/mips/mips1.h"
|
||||
#include "cpu/mips/mips3.h"
|
||||
@ -33,6 +34,8 @@
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
#define ENABLE_ENTRY_GFX (0)
|
||||
|
||||
#define LOG_UNKNOWN (1 << 0)
|
||||
#define LOG_INT (1 << 1)
|
||||
#define LOG_HPC (1 << 2)
|
||||
@ -40,11 +43,16 @@
|
||||
#define LOG_DMA (1 << 5)
|
||||
#define LOG_SCSI (1 << 6)
|
||||
#define LOG_SCSI_DMA (1 << 7)
|
||||
#define LOG_DUART (1 << 8)
|
||||
#define LOG_PIT (1 << 9)
|
||||
#define LOG_ALL (LOG_UNKNOWN | LOG_INT | LOG_HPC | LOG_EEPROM | LOG_DMA | LOG_SCSI | LOG_SCSI_DMA | LOG_DUART | LOG_PIT)
|
||||
#define LOG_DUART0 (1 << 8)
|
||||
#define LOG_DUART1 (1 << 9)
|
||||
#define LOG_DUART2 (1 << 10)
|
||||
#define LOG_PIT (1 << 11)
|
||||
#define LOG_DSP (1 << 12)
|
||||
#define LOG_GFX (1 << 13)
|
||||
#define LOG_DUART (LOG_DUART0 | LOG_DUART1 | LOG_DUART2)
|
||||
#define LOG_ALL (LOG_UNKNOWN | LOG_INT | LOG_HPC | LOG_EEPROM | LOG_DMA | LOG_SCSI | LOG_SCSI_DMA | LOG_DUART | LOG_PIT | LOG_DSP | LOG_GFX)
|
||||
|
||||
#define VERBOSE (0)
|
||||
#define VERBOSE (LOG_ALL & ~(LOG_DUART1 | LOG_DUART0 | LOG_SCSI | LOG_SCSI_DMA | LOG_EEPROM | LOG_PIT | LOG_DSP))
|
||||
#include "logmacro.h"
|
||||
|
||||
class indigo_state : public driver_device
|
||||
@ -58,6 +66,7 @@ public:
|
||||
, m_eeprom(*this, "eeprom")
|
||||
, m_pit(*this, "pit")
|
||||
, m_rtc(*this, "rtc")
|
||||
, m_dsp_ram(*this, "dspram")
|
||||
{
|
||||
}
|
||||
|
||||
@ -71,8 +80,10 @@ protected:
|
||||
DECLARE_WRITE32_MEMBER(hpc_w);
|
||||
DECLARE_READ32_MEMBER(int_r);
|
||||
DECLARE_WRITE32_MEMBER(int_w);
|
||||
DECLARE_READ32_MEMBER(dspram_r);
|
||||
DECLARE_WRITE32_MEMBER(dspram_w);
|
||||
DECLARE_READ32_MEMBER(dsp_ram_r);
|
||||
DECLARE_WRITE32_MEMBER(dsp_ram_w);
|
||||
DECLARE_READ32_MEMBER(entry_r);
|
||||
DECLARE_WRITE32_MEMBER(entry_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(scsi_irq);
|
||||
|
||||
void set_timer_int_clear(uint32_t data);
|
||||
@ -84,10 +95,9 @@ protected:
|
||||
DECLARE_WRITE_LINE_MEMBER(duart2_int_w);
|
||||
|
||||
void duart_int_w(int channel, int status);
|
||||
void raise_local0_irq(uint8_t source_mask);
|
||||
void lower_local0_irq(uint8_t source_mask);
|
||||
void raise_local1_irq(uint8_t source_mask);
|
||||
void lower_local1_irq(uint8_t source_mask);
|
||||
void raise_local_irq(int channel, uint8_t source_mask);
|
||||
void lower_local_irq(int channel, uint8_t source_mask);
|
||||
void update_irq(int channel);
|
||||
|
||||
void fetch_chain(address_space &space);
|
||||
void advance_chain(address_space &space);
|
||||
@ -118,11 +128,11 @@ protected:
|
||||
struct hpc_t
|
||||
{
|
||||
uint8_t m_misc_status;
|
||||
uint32_t m_cpu_aux_ctrl;
|
||||
uint32_t m_parbuf_ptr;
|
||||
uint32_t m_local_int0_status;
|
||||
uint32_t m_local_int0_mask;
|
||||
uint32_t m_local_int1_status;
|
||||
uint32_t m_local_int1_mask;
|
||||
uint32_t m_local_int_status[2];
|
||||
uint32_t m_local_int_mask[2];
|
||||
bool m_int_status[2];
|
||||
uint32_t m_vme_intmask0;
|
||||
uint32_t m_vme_intmask1;
|
||||
uint32_t m_scsi0_dma_desc;
|
||||
@ -133,6 +143,7 @@ protected:
|
||||
uint16_t m_scsi0_dma_length;
|
||||
bool m_scsi0_dma_to_mem;
|
||||
bool m_scsi0_dma_active;
|
||||
bool m_scsi0_dma_end;
|
||||
};
|
||||
|
||||
enum
|
||||
@ -145,12 +156,11 @@ protected:
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<wd33c93_device> m_wd33c93;
|
||||
required_device_array<scc85230_device, 3> m_scc;
|
||||
required_device_array<scc8530_device, 3> m_scc;
|
||||
required_device<eeprom_serial_93cxx_device> m_eeprom;
|
||||
required_device<pit8254_device> m_pit;
|
||||
required_device<dp8573_device> m_rtc;
|
||||
|
||||
std::unique_ptr<uint32_t[]> m_dsp_ram;
|
||||
required_shared_ptr<uint32_t> m_dsp_ram;
|
||||
|
||||
hpc_t m_hpc;
|
||||
uint8_t m_duart_int_status;
|
||||
@ -204,14 +214,12 @@ protected:
|
||||
|
||||
void indigo_state::machine_start()
|
||||
{
|
||||
m_dsp_ram = std::make_unique<uint32_t[]>(0x8000);
|
||||
|
||||
save_item(NAME(m_hpc.m_misc_status));
|
||||
save_item(NAME(m_hpc.m_cpu_aux_ctrl));
|
||||
save_item(NAME(m_hpc.m_parbuf_ptr));
|
||||
save_item(NAME(m_hpc.m_local_int0_status));
|
||||
save_item(NAME(m_hpc.m_local_int0_mask));
|
||||
save_item(NAME(m_hpc.m_local_int1_status));
|
||||
save_item(NAME(m_hpc.m_local_int1_mask));
|
||||
save_item(NAME(m_hpc.m_local_int_status));
|
||||
save_item(NAME(m_hpc.m_local_int_mask));
|
||||
save_item(NAME(m_hpc.m_int_status));
|
||||
save_item(NAME(m_hpc.m_vme_intmask0));
|
||||
save_item(NAME(m_hpc.m_vme_intmask1));
|
||||
|
||||
@ -223,17 +231,14 @@ void indigo_state::machine_start()
|
||||
save_item(NAME(m_hpc.m_scsi0_dma_length));
|
||||
save_item(NAME(m_hpc.m_scsi0_dma_to_mem));
|
||||
save_item(NAME(m_hpc.m_scsi0_dma_active));
|
||||
save_item(NAME(m_hpc.m_scsi0_dma_end));
|
||||
|
||||
save_item(NAME(m_duart_int_status));
|
||||
|
||||
save_pointer(NAME(m_dsp_ram), 0x8000);
|
||||
}
|
||||
|
||||
void indigo_state::machine_reset()
|
||||
{
|
||||
memset(&m_hpc, 0, sizeof(hpc_t));
|
||||
memset(&m_dsp_ram[0], 0, sizeof(uint32_t) * 0x8000);
|
||||
|
||||
m_duart_int_status = 0;
|
||||
}
|
||||
|
||||
@ -249,7 +254,7 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
machine().describe_context(), 0x1fb80000 + offset*4, mem_mask);
|
||||
return 0;
|
||||
case 0x0094/4:
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, "%s: HPC SCSI DMA Control Register Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_scsi0_dma_ctrl, mem_mask);
|
||||
LOGMASKED(LOG_SCSI_DMA, "%s: HPC SCSI DMA Control Register Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_scsi0_dma_ctrl, mem_mask);
|
||||
return m_hpc.m_scsi0_dma_ctrl;
|
||||
case 0x00ac/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Parallel Buffer Pointer Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_parbuf_ptr, mem_mask);
|
||||
@ -274,22 +279,22 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
return m_hpc.m_misc_status;
|
||||
case 0x01bc/4:
|
||||
{
|
||||
uint32_t ret = m_eeprom->do_read() << 4;
|
||||
uint32_t ret = (m_hpc.m_cpu_aux_ctrl & ~0x10) | m_eeprom->do_read() << 4;
|
||||
LOGMASKED(LOG_EEPROM, "%s: HPC Serial EEPROM Read: %08x & %08x\n", machine().describe_context(), ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
case 0x01c0/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Status Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int0_status, mem_mask);
|
||||
return m_hpc.m_local_int0_status;
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Status Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int_status[0], mem_mask);
|
||||
return m_hpc.m_local_int_status[0];
|
||||
case 0x01c4/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Mask Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int0_mask, mem_mask);
|
||||
return m_hpc.m_local_int0_mask;
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Mask Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int_mask[0], mem_mask);
|
||||
return m_hpc.m_local_int_mask[0];
|
||||
case 0x01c8/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Status Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int1_status, mem_mask);
|
||||
return m_hpc.m_local_int1_status;
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Status Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int_status[1], mem_mask);
|
||||
return m_hpc.m_local_int_status[1];
|
||||
case 0x01cc/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Mask Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int1_mask, mem_mask);
|
||||
return m_hpc.m_local_int1_mask;
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Mask Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_local_int_mask[1], mem_mask);
|
||||
return m_hpc.m_local_int_mask[1];
|
||||
case 0x01d4/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC VME Interrupt Mask 0 Read: %08x & %08x\n", machine().describe_context(), m_hpc.m_vme_intmask0, mem_mask);
|
||||
return m_hpc.m_vme_intmask0;
|
||||
@ -298,26 +303,26 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
return m_hpc.m_vme_intmask1;
|
||||
case 0x01f0/4:
|
||||
{
|
||||
const uint8_t data = 0;//m_pit->read(0);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count0 Register (Disabled): %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
const uint8_t data = m_pit->read(0);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count0 Register: %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
case 0x01f4/4:
|
||||
{
|
||||
const uint8_t data = 0;//m_pit->read(1);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count1 Register (Disabled): %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
const uint8_t data = m_pit->read(1);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count1 Register: %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
case 0x01f8/4:
|
||||
{
|
||||
const uint8_t data = 0;//m_pit->read(2);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count2 Register (Disabled): %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
const uint8_t data = m_pit->read(2);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Count2 Register: %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
case 0x01fc/4:
|
||||
{
|
||||
const uint8_t data = 0;//m_pit->read(3);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Control Register (Disabled): %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
const uint8_t data = m_pit->read(3);
|
||||
LOGMASKED(LOG_PIT, "%s: Read Timer Control Register: %02x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
case 0x0d00/4:
|
||||
@ -326,7 +331,7 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
uint32_t ret = m_scc[index]->ba_cd_r(space, 3);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel B Control Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel B Control Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
case 0x0d04/4:
|
||||
@ -335,7 +340,7 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
const uint32_t ret = m_scc[index]->ba_cd_r(space, 2);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel B Data Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel B Data Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
case 0x0d08/4:
|
||||
@ -344,7 +349,7 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
const uint32_t ret = m_scc[index]->ba_cd_r(space, 1);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel A Control Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel A Control Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
case 0x0d0c/4:
|
||||
@ -353,7 +358,7 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
const uint32_t ret = m_scc[index]->ba_cd_r(space, 0);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel A Data Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel A Data Read: %08x & %08x\n", machine().describe_context(), index, ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
default:
|
||||
@ -366,14 +371,17 @@ READ32_MEMBER(indigo_state::hpc_r)
|
||||
void indigo_state::fetch_chain(address_space &space)
|
||||
{
|
||||
m_hpc.m_scsi0_dma_flag = space.read_dword(m_hpc.m_scsi0_dma_desc);
|
||||
m_hpc.m_scsi0_dma_addr = space.read_dword(m_hpc.m_scsi0_dma_desc+4) & 0x7fffffff;
|
||||
m_hpc.m_scsi0_dma_addr = space.read_dword(m_hpc.m_scsi0_dma_desc+4);
|
||||
m_hpc.m_scsi0_dma_next = space.read_dword(m_hpc.m_scsi0_dma_desc+8);
|
||||
m_hpc.m_scsi0_dma_length = m_hpc.m_scsi0_dma_flag & 0x3fff;
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, "Fetched SCSI DMA Descriptor block:\n");
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, " Ctrl: %08x\n", m_hpc.m_scsi0_dma_flag);
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, " Addr: %08x\n", m_hpc.m_scsi0_dma_addr);
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, " Next: %08x\n", m_hpc.m_scsi0_dma_next);
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, " Length: %04x\n", m_hpc.m_scsi0_dma_length);
|
||||
m_hpc.m_scsi0_dma_length = m_hpc.m_scsi0_dma_flag & 0x1fff;
|
||||
LOGMASKED(LOG_SCSI_DMA, "Fetched SCSI DMA Descriptor block:\n");
|
||||
LOGMASKED(LOG_SCSI_DMA, " Ctrl: %08x\n", m_hpc.m_scsi0_dma_flag);
|
||||
LOGMASKED(LOG_SCSI_DMA, " Addr: %08x\n", m_hpc.m_scsi0_dma_addr);
|
||||
LOGMASKED(LOG_SCSI_DMA, " Next: %08x\n", m_hpc.m_scsi0_dma_next);
|
||||
LOGMASKED(LOG_SCSI_DMA, " Length: %04x\n", m_hpc.m_scsi0_dma_length);
|
||||
m_hpc.m_scsi0_dma_end = BIT(m_hpc.m_scsi0_dma_addr, 31);
|
||||
m_hpc.m_scsi0_dma_addr &= 0x0fffffff;
|
||||
m_hpc.m_scsi0_dma_next &= 0x0fffffff;
|
||||
}
|
||||
|
||||
void indigo_state::advance_chain(address_space &space)
|
||||
@ -382,14 +390,17 @@ void indigo_state::advance_chain(address_space &space)
|
||||
m_hpc.m_scsi0_dma_length--;
|
||||
if (m_hpc.m_scsi0_dma_length == 0)
|
||||
{
|
||||
m_hpc.m_scsi0_dma_desc = m_hpc.m_scsi0_dma_next;
|
||||
fetch_chain(space);
|
||||
if (m_hpc.m_scsi0_dma_addr == 0 || m_hpc.m_scsi0_dma_length == 0)
|
||||
if (m_hpc.m_scsi0_dma_end)
|
||||
{
|
||||
LOGMASKED(LOG_SCSI_DMA, "HPC: Disabling SCSI DMA due to end of chain\n");
|
||||
m_hpc.m_scsi0_dma_active = false;
|
||||
m_hpc.m_scsi0_dma_ctrl &= ~HPC_DMACTRL_ENABLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_hpc.m_scsi0_dma_desc = m_hpc.m_scsi0_dma_next;
|
||||
fetch_chain(space);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -404,13 +415,13 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
switch (offset)
|
||||
{
|
||||
case 0x0090/4:
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, "%s: HPC SCSI DMA Descriptor Pointer: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
LOGMASKED(LOG_SCSI_DMA, "%s: HPC SCSI DMA Descriptor Pointer Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_hpc.m_scsi0_dma_desc = data;
|
||||
fetch_chain(space);
|
||||
break;
|
||||
|
||||
case 0x0094/4:
|
||||
LOGMASKED(LOG_HPC | LOG_DMA, "%s: HPC SCSI DMA Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
LOGMASKED(LOG_SCSI_DMA, "%s: HPC SCSI DMA Control Register Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_hpc.m_scsi0_dma_ctrl = data &~ (HPC_DMACTRL_FLUSH | HPC_DMACTRL_RESET);
|
||||
m_hpc.m_scsi0_dma_to_mem = (m_hpc.m_scsi0_dma_ctrl & HPC_DMACTRL_TO_MEM);
|
||||
m_hpc.m_scsi0_dma_active = (m_hpc.m_scsi0_dma_ctrl & HPC_DMACTRL_ENABLE);
|
||||
@ -455,28 +466,29 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
m_hpc.m_misc_status = data;
|
||||
break;
|
||||
case 0x01bc/4:
|
||||
m_hpc.m_cpu_aux_ctrl = data;
|
||||
LOGMASKED(LOG_EEPROM, "%s: HPC Serial EEPROM Write: %08x & %08x\n", machine().describe_context(), data, mem_mask );
|
||||
if (BIT(data, 0))
|
||||
{
|
||||
LOGMASKED(LOG_EEPROM, " CPU board LED on\n");
|
||||
}
|
||||
m_eeprom->di_write(BIT(data, 3));
|
||||
m_eeprom->cs_write(BIT(data, 1) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_eeprom->clk_write(BIT(data, 2) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_eeprom->cs_write(BIT(data, 1));
|
||||
m_eeprom->clk_write(BIT(data, 2));
|
||||
break;
|
||||
case 0x01c0/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Status Write (Ignored): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
break;
|
||||
case 0x01c4/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 0 Mask Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_hpc.m_local_int0_mask = data;
|
||||
m_hpc.m_local_int_mask[0] = data;
|
||||
break;
|
||||
case 0x01c8/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Status Write (Ignored): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
break;
|
||||
case 0x01cc/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC Local Interrupt 1 Mask Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_hpc.m_local_int1_mask = data;
|
||||
m_hpc.m_local_int_mask[1] = data;
|
||||
break;
|
||||
case 0x01d4/4:
|
||||
LOGMASKED(LOG_HPC, "%s: HPC VME Interrupt Mask 0 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
@ -491,23 +503,23 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
set_timer_int_clear(data);
|
||||
break;
|
||||
case 0x01f0/4:
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count0 Register (Disabled): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
//if (ACCESSING_BITS_24_31)
|
||||
// m_pit->write(0, (uint8_t)(data >> 24));
|
||||
//else if (ACCESSING_BITS_0_7)
|
||||
// m_pit->write(0, (uint8_t)data);
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count0 Register: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
if (ACCESSING_BITS_24_31)
|
||||
m_pit->write(0, (uint8_t)(data >> 24));
|
||||
else if (ACCESSING_BITS_0_7)
|
||||
m_pit->write(0, (uint8_t)data);
|
||||
return;
|
||||
case 0x01f4/4:
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count1 Register (Disabled): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
//m_pit->write(1, (uint8_t)data);
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count1 Register: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_pit->write(1, (uint8_t)data);
|
||||
return;
|
||||
case 0x01f8/4:
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count2 Register (Disabled): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
//m_pit->write(2, (uint8_t)data);
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Count2 Register: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_pit->write(2, (uint8_t)data);
|
||||
return;
|
||||
case 0x01fc/4:
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Control Register (Disabled): %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
//m_pit->write(3, (uint8_t)data);
|
||||
LOGMASKED(LOG_PIT, "%s: HPC Write Timer Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_pit->write(3, (uint8_t)data);
|
||||
return;
|
||||
case 0x0d00/4:
|
||||
case 0x0d10/4:
|
||||
@ -515,7 +527,7 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
m_scc[index]->ba_cd_w(space, 3, (uint8_t)data);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel B Control Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel B Control Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
case 0x0d04/4:
|
||||
@ -524,7 +536,7 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
m_scc[index]->ba_cd_w(space, 2, (uint8_t)data);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel B Data Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel B Data Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
case 0x0d08/4:
|
||||
@ -533,7 +545,7 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
m_scc[index]->ba_cd_w(space, 1, (uint8_t)data);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel A Control Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel A Control Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
case 0x0d0c/4:
|
||||
@ -542,7 +554,7 @@ WRITE32_MEMBER(indigo_state::hpc_w)
|
||||
{
|
||||
const uint32_t index = (offset >> 2) & 3;
|
||||
m_scc[index]->ba_cd_w(space, 0, (uint8_t)data);
|
||||
LOGMASKED(LOG_DUART, "%s: HPC DUART%d Channel A Data Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
LOGMASKED(LOG_DUART0 << index, "%s: HPC DUART%d Channel A Data Write: %08x & %08x\n", machine().describe_context(), index, data, mem_mask);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@ -650,18 +662,18 @@ WRITE_LINE_MEMBER(indigo_state::scsi_irq)
|
||||
{
|
||||
if (state)
|
||||
{
|
||||
LOGMASKED(LOG_SCSI | LOG_INT, "SCSI: Set IRQ\n");
|
||||
LOGMASKED(LOG_SCSI, "SCSI: Set IRQ\n");
|
||||
int count = m_wd33c93->get_dma_count();
|
||||
LOGMASKED(LOG_SCSI, "SCSI: count %d, active %d\n", count, m_hpc.m_scsi0_dma_active);
|
||||
LOGMASKED(LOG_SCSI_DMA, "SCSI: count %d, active %d\n", count, m_hpc.m_scsi0_dma_active);
|
||||
if (count && m_hpc.m_scsi0_dma_active)
|
||||
scsi_dma();
|
||||
|
||||
raise_local0_irq(LOCAL0_SCSI);
|
||||
raise_local_irq(0, LOCAL0_SCSI);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOGMASKED(LOG_SCSI | LOG_INT, "SCSI: Clear IRQ\n");
|
||||
lower_local0_irq(LOCAL0_SCSI);
|
||||
LOGMASKED(LOG_SCSI, "SCSI: Clear IRQ\n");
|
||||
lower_local_irq(0, LOCAL0_SCSI);
|
||||
}
|
||||
}
|
||||
|
||||
@ -709,46 +721,43 @@ void indigo_state::duart_int_w(int channel, int state)
|
||||
|
||||
if (m_duart_int_status)
|
||||
{
|
||||
LOGMASKED(LOG_PIT, "Raising DUART Interrupt: %02x\n", m_duart_int_status);
|
||||
raise_local0_irq(LOCAL0_DUART);
|
||||
LOGMASKED(LOG_DUART0 << channel, "Raising DUART Interrupt: %02x\n", m_duart_int_status);
|
||||
raise_local_irq(0, LOCAL0_DUART);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOGMASKED(LOG_PIT, "Lowering DUART Interrupt\n");
|
||||
lower_local0_irq(LOCAL0_DUART);
|
||||
LOGMASKED(LOG_DUART0 << channel, "Lowering DUART Interrupt\n");
|
||||
lower_local_irq(0, LOCAL0_DUART);
|
||||
}
|
||||
}
|
||||
|
||||
void indigo_state::raise_local0_irq(uint8_t source_mask)
|
||||
void indigo_state::raise_local_irq(int channel, uint8_t source_mask)
|
||||
{
|
||||
m_hpc.m_local_int0_status |= source_mask;
|
||||
LOGMASKED(LOG_INT, "%s IRQ0: %02x & %08x\n", (m_hpc.m_local_int0_status & m_hpc.m_local_int0_mask) ? "Asserting" : "Clearing",
|
||||
m_hpc.m_local_int0_status, m_hpc.m_local_int0_mask);
|
||||
m_maincpu->set_input_line(MIPS3_IRQ0, (m_hpc.m_local_int0_status & m_hpc.m_local_int0_mask) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_hpc.m_local_int_status[channel] |= source_mask;
|
||||
|
||||
bool old_status = m_hpc.m_int_status[channel];
|
||||
m_hpc.m_int_status[channel] = (m_hpc.m_local_int_status[channel] & m_hpc.m_local_int_mask[channel]);
|
||||
|
||||
if (old_status != m_hpc.m_int_status[channel])
|
||||
update_irq(channel);
|
||||
}
|
||||
|
||||
void indigo_state::lower_local0_irq(uint8_t source_mask)
|
||||
void indigo_state::lower_local_irq(int channel, uint8_t source_mask)
|
||||
{
|
||||
m_hpc.m_local_int0_status &= ~source_mask;
|
||||
LOGMASKED(LOG_INT, "%s IRQ0: %02x & %08x\n", (m_hpc.m_local_int0_status & m_hpc.m_local_int0_mask) ? "Asserting" : "Clearing",
|
||||
m_hpc.m_local_int0_status, m_hpc.m_local_int0_mask);
|
||||
m_maincpu->set_input_line(MIPS3_IRQ0, (m_hpc.m_local_int0_status & m_hpc.m_local_int0_mask) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_hpc.m_local_int_status[channel] &= ~source_mask;
|
||||
|
||||
bool old_status = m_hpc.m_int_status[channel];
|
||||
m_hpc.m_int_status[channel] = (m_hpc.m_local_int_status[channel] & m_hpc.m_local_int_mask[channel]);
|
||||
|
||||
if (old_status != m_hpc.m_int_status[channel])
|
||||
update_irq(channel);
|
||||
}
|
||||
|
||||
void indigo_state::raise_local1_irq(uint8_t source_mask)
|
||||
void indigo_state::update_irq(int channel)
|
||||
{
|
||||
m_hpc.m_local_int1_status |= source_mask;
|
||||
LOGMASKED(LOG_INT, "%s IRQ1: %02x & %08x\n", (m_hpc.m_local_int1_status & m_hpc.m_local_int1_mask) ? "Asserting" : "Clearing",
|
||||
m_hpc.m_local_int1_status, m_hpc.m_local_int1_mask);
|
||||
m_maincpu->set_input_line(MIPS3_IRQ1, (m_hpc.m_local_int1_status & m_hpc.m_local_int1_mask) ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
void indigo_state::lower_local1_irq(uint8_t source_mask)
|
||||
{
|
||||
m_hpc.m_local_int1_status &= ~source_mask;
|
||||
LOGMASKED(LOG_INT, "%s IRQ1: %02x & %08x\n", (m_hpc.m_local_int1_status & m_hpc.m_local_int1_mask) ? "Asserting" : "Clearing",
|
||||
m_hpc.m_local_int1_status, m_hpc.m_local_int1_mask);
|
||||
m_maincpu->set_input_line(MIPS3_IRQ1, (m_hpc.m_local_int1_status & m_hpc.m_local_int1_mask) ? ASSERT_LINE : CLEAR_LINE);
|
||||
LOGMASKED(LOG_INT, "%s IRQ%d: %02x & %02x\n", channel, m_hpc.m_int_status[channel] ? "Asserting" : "Clearing",
|
||||
m_hpc.m_local_int_status[channel], m_hpc.m_local_int_mask[channel]);
|
||||
m_maincpu->set_input_line(MIPS3_IRQ0, m_hpc.m_int_status[channel] ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
READ32_MEMBER(indigo_state::int_r)
|
||||
@ -762,43 +771,57 @@ WRITE32_MEMBER(indigo_state::int_w)
|
||||
LOGMASKED(LOG_INT, "%s: INT Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbd9000 + offset*4, data, mem_mask);
|
||||
}
|
||||
|
||||
READ32_MEMBER(indigo_state::dspram_r)
|
||||
READ32_MEMBER(indigo_state::dsp_ram_r)
|
||||
{
|
||||
LOGMASKED(LOG_INT, "%s: DSP RAM Read: %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, mem_mask);
|
||||
LOGMASKED(LOG_DSP, "%s: DSP RAM Read: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, m_dsp_ram[offset], mem_mask);
|
||||
return m_dsp_ram[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(indigo_state::dspram_w)
|
||||
WRITE32_MEMBER(indigo_state::dsp_ram_w)
|
||||
{
|
||||
LOGMASKED(LOG_INT, "%s: DSP RAM Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, data, mem_mask);
|
||||
LOGMASKED(LOG_DSP, "%s: DSP RAM Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, data, mem_mask);
|
||||
COMBINE_DATA(&m_dsp_ram[offset]);
|
||||
}
|
||||
|
||||
READ32_MEMBER(indigo_state::entry_r)
|
||||
{
|
||||
uint32_t ret = 0;
|
||||
#if ENABLE_ENTRY_GFX
|
||||
if (offset == 0x0014/4)
|
||||
ret = 0x033c0000;
|
||||
#endif
|
||||
LOGMASKED(LOG_GFX, "%s: Entry Graphics(?) Read: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, ret, mem_mask);
|
||||
return ret;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(indigo_state::entry_w)
|
||||
{
|
||||
LOGMASKED(LOG_GFX, "%s: Entry Graphics(?) Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, data, mem_mask);
|
||||
}
|
||||
|
||||
void indigo_state::indigo_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x001fffff).ram().share("share1");
|
||||
map(0x08000000, 0x08ffffff).ram().share("share2");
|
||||
map(0x09000000, 0x097fffff).ram().share("share3");
|
||||
map(0x0a000000, 0x0a7fffff).ram().share("share4");
|
||||
map(0x0c000000, 0x0c7fffff).ram().share("share5");
|
||||
map(0x10000000, 0x107fffff).ram().share("share6");
|
||||
map(0x18000000, 0x187fffff).ram().share("share7");
|
||||
map(0x00000000, 0x0007ffff).ram().share("share1");
|
||||
map(0x08000000, 0x0fffffff).ram().share("share2");
|
||||
map(0x10000000, 0x13ffffff).ram().share("share3");
|
||||
map(0x18000000, 0x1bffffff).ram().share("share4");
|
||||
map(0x1f3f0000, 0x1f3fffff).rw(FUNC(indigo_state::entry_r), FUNC(indigo_state::entry_w));
|
||||
map(0x1fb80000, 0x1fb8ffff).rw(FUNC(indigo_state::hpc_r), FUNC(indigo_state::hpc_w));
|
||||
map(0x1fbd9000, 0x1fbd903f).rw(FUNC(indigo_state::int_r), FUNC(indigo_state::int_w));
|
||||
map(0x1fbe0000, 0x1fbe7fff).rw(FUNC(indigo_state::dspram_r), FUNC(indigo_state::dspram_w));
|
||||
map(0x1fbe0000, 0x1fbfffff).rw(FUNC(indigo_state::dsp_ram_r), FUNC(indigo_state::dsp_ram_w)).share("dspram");
|
||||
}
|
||||
|
||||
void indigo3k_state::mem_map(address_map &map)
|
||||
{
|
||||
indigo_map(map);
|
||||
map(0x1fc00000, 0x1fc3ffff).rom().share("share2").region("user1", 0);
|
||||
map(0x1fc00000, 0x1fc3ffff).rom().share("share5").region("user1", 0);
|
||||
}
|
||||
|
||||
void indigo4k_state::mem_map(address_map &map)
|
||||
{
|
||||
indigo_map(map);
|
||||
map(0x1fa00000, 0x1fa1ffff).rw("sgi_mc", FUNC(sgi_mc_device::read), FUNC(sgi_mc_device::write));
|
||||
map(0x1fc00000, 0x1fc7ffff).rom().share("share8").region("user1", 0);
|
||||
map(0x1fc00000, 0x1fc7ffff).rom().share("share5").region("user1", 0);
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( indigo )
|
||||
@ -816,11 +839,12 @@ void indigo_state::indigo_base(machine_config &config)
|
||||
{
|
||||
SPEAKER(config, "mono").front_center();
|
||||
|
||||
SCC85230(config, m_scc[0], SCC_PCLK);
|
||||
SCC8530N(config, m_scc[0], SCC_PCLK);
|
||||
m_scc[0]->configure_channels(SCC_RXA_CLK.value(), SCC_TXA_CLK.value(), SCC_RXB_CLK.value(), SCC_TXB_CLK.value());
|
||||
m_scc[0]->out_int_callback().set(FUNC(indigo_state::duart0_int_w));
|
||||
m_scc[0]->out_txda_callback().set("keyboard", FUNC(sgi_keyboard_port_device::write_txd));
|
||||
|
||||
SCC85230(config, m_scc[1], SCC_PCLK);
|
||||
SCC8530N(config, m_scc[1], SCC_PCLK);
|
||||
m_scc[1]->configure_channels(SCC_RXA_CLK.value(), SCC_TXA_CLK.value(), SCC_RXB_CLK.value(), SCC_TXB_CLK.value());
|
||||
m_scc[1]->out_txda_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd));
|
||||
m_scc[1]->out_dtra_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_dtr));
|
||||
@ -830,23 +854,25 @@ void indigo_state::indigo_base(machine_config &config)
|
||||
m_scc[1]->out_rtsb_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_rts));
|
||||
m_scc[1]->out_int_callback().set(FUNC(indigo_state::duart1_int_w));
|
||||
|
||||
SCC85230(config, m_scc[2], SCC_PCLK);
|
||||
SCC8530N(config, m_scc[2], SCC_PCLK);
|
||||
m_scc[2]->configure_channels(SCC_RXA_CLK.value(), SCC_TXA_CLK.value(), SCC_RXB_CLK.value(), SCC_TXB_CLK.value());
|
||||
m_scc[2]->out_int_callback().set(FUNC(indigo_state::duart2_int_w));
|
||||
|
||||
rs232_port_device &rs232a(RS232_PORT(config, RS232A_TAG, default_rs232_devices, nullptr));
|
||||
rs232a.cts_handler().set(m_scc[1], FUNC(scc85230_device::ctsa_w));
|
||||
rs232a.dcd_handler().set(m_scc[1], FUNC(scc85230_device::dcda_w));
|
||||
rs232a.rxd_handler().set(m_scc[1], FUNC(scc85230_device::rxa_w));
|
||||
rs232a.cts_handler().set(m_scc[1], FUNC(scc8530_device::ctsa_w));
|
||||
rs232a.dcd_handler().set(m_scc[1], FUNC(scc8530_device::dcda_w));
|
||||
rs232a.rxd_handler().set(m_scc[1], FUNC(scc8530_device::rxa_w));
|
||||
|
||||
rs232_port_device &rs232b(RS232_PORT(config, RS232B_TAG, default_rs232_devices, nullptr));
|
||||
rs232b.cts_handler().set(m_scc[1], FUNC(scc85230_device::ctsb_w));
|
||||
rs232b.dcd_handler().set(m_scc[1], FUNC(scc85230_device::dcdb_w));
|
||||
rs232b.rxd_handler().set(m_scc[1], FUNC(scc85230_device::rxb_w));
|
||||
rs232b.cts_handler().set(m_scc[1], FUNC(scc8530_device::ctsb_w));
|
||||
rs232b.dcd_handler().set(m_scc[1], FUNC(scc8530_device::dcdb_w));
|
||||
rs232b.rxd_handler().set(m_scc[1], FUNC(scc8530_device::rxb_w));
|
||||
|
||||
SGIKBD_PORT(config, "keyboard", default_sgi_keyboard_devices, "hlekbd").rxd_handler().set(m_scc[0], FUNC(z80scc_device::rxa_w));
|
||||
|
||||
scsi_port_device &scsi(SCSI_PORT(config, "scsi"));
|
||||
scsi.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
|
||||
scsi.set_slot_device(2, "cdrom", SCSICD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_4));
|
||||
scsi.set_slot_device(2, "cdrom", RRD45, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_4));
|
||||
scsi.slot(2).set_option_machine_config("cdrom", cdrom_config);
|
||||
|
||||
DP8573(config, m_rtc);
|
||||
@ -860,7 +886,7 @@ void indigo_state::indigo_base(machine_config &config)
|
||||
PIT8254(config, m_pit, 0);
|
||||
m_pit->set_clk<0>(1000000);
|
||||
m_pit->set_clk<1>(1000000);
|
||||
m_pit->set_clk<2>(1000000);
|
||||
m_pit->set_clk<2>(1500000);
|
||||
m_pit->out_handler<0>().set(FUNC(indigo_state::timer0_int));
|
||||
m_pit->out_handler<1>().set(FUNC(indigo_state::timer1_int));
|
||||
m_pit->out_handler<2>().set(FUNC(indigo_state::timer2_int));
|
||||
|
||||
@ -13,10 +13,11 @@
|
||||
|
||||
#define LOG_READS (1 << 0)
|
||||
#define LOG_WRITES (1 << 1)
|
||||
#define LOG_WATCHDOG (1 << 2)
|
||||
#define LOG_MEMCFG (1 << 3)
|
||||
#define LOG_UNKNOWN (1 << 4)
|
||||
#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_WATCHDOG)
|
||||
#define LOG_RPSS (1 << 2)
|
||||
#define LOG_WATCHDOG (1 << 3)
|
||||
#define LOG_MEMCFG (1 << 4)
|
||||
#define LOG_UNKNOWN (1 << 5)
|
||||
#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_RPSS | LOG_WATCHDOG | LOG_UNKNOWN)
|
||||
|
||||
#define VERBOSE (0)
|
||||
#include "logmacro.h"
|
||||
@ -167,7 +168,7 @@ READ32_MEMBER(sgi_mc_device::read)
|
||||
LOGMASKED(LOG_READS, "%s: System ID Read: %08x & %08x\n", machine().describe_context(), m_sys_id, mem_mask);
|
||||
return m_sys_id;
|
||||
case 0x0028:
|
||||
LOGMASKED(LOG_READS, "%s: RPSS Divider Read: %08x & %08x\n", machine().describe_context(), m_rpss_divider, mem_mask);
|
||||
LOGMASKED(LOG_RPSS, "%s: RPSS Divider Read: %08x & %08x\n", machine().describe_context(), m_rpss_divider, mem_mask);
|
||||
return m_rpss_divider;
|
||||
case 0x0030:
|
||||
LOGMASKED(LOG_READS, "%s: R4000 EEPROM Read\n", machine().describe_context());
|
||||
@ -257,7 +258,7 @@ READ32_MEMBER(sgi_mc_device::read)
|
||||
LOGMASKED(LOG_READS, "%s: DMA TLB Entry 3 Low Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry3_lo, mem_mask);
|
||||
return m_dma_tlb_entry3_lo;
|
||||
case 0x1000:
|
||||
LOGMASKED(LOG_READS, "%s: RPSS 100ns Counter Read: %08x & %08x\n", machine().describe_context(), m_rpss_counter, mem_mask);
|
||||
LOGMASKED(LOG_RPSS, "%s: RPSS 100ns Counter Read: %08x & %08x\n", machine().describe_context(), m_rpss_counter, mem_mask);
|
||||
return m_rpss_counter;
|
||||
case 0x2000:
|
||||
case 0x2008:
|
||||
@ -340,7 +341,7 @@ WRITE32_MEMBER( sgi_mc_device::write )
|
||||
m_watchdog = 0;
|
||||
break;
|
||||
case 0x0028:
|
||||
LOGMASKED(LOG_WRITES, "%s: RPSS Divider Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
LOGMASKED(LOG_RPSS, "%s: RPSS Divider Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
|
||||
m_rpss_divider = data;
|
||||
m_rpss_divide_count = (int)(m_rpss_divider & 0xff);
|
||||
m_rpss_divide_counter = m_rpss_divide_count;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user