mirror of
https://github.com/holub/mame
synced 2025-04-22 08:22:15 +03:00
Merge pull request #2486 from JoakimLarsson/sda5708_3
New device: SDA5708 + 68340 improvements for the Nokia Dbox (nw)
This commit is contained in:
commit
88427b6bfb
@ -706,6 +706,17 @@ if (VIDEOS["SCN2674"]~=null) then
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}
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end
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--------------------------------------------------
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--
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--@src/devices/video/sda5708.h,VIDEOS["SDA5708"] = true
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--------------------------------------------------
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if (VIDEOS["SDA5708"]~=null) then
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files {
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MAME_DIR .. "src/devices/video/sda5708.cpp",
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MAME_DIR .. "src/devices/video/sda5708.h",
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}
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end
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--------------------------------------------------
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--
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--@src/devices/video/snes_ppu.h,VIDEOS["SNES_PPU"] = true
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@ -323,6 +323,7 @@ VIDEOS["PSX"] = true
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VIDEOS["RAMDAC"] = true
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--VIDEOS["S2636"] = true
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VIDEOS["SAA5050"] = true
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--VIDEOS["SDA5708"] = true
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VIDEOS["SCN2674"] = true
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--VIDEOS["SED1200"] = true
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--VIDEOS["SED1330"] = true
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@ -327,6 +327,7 @@ VIDEOS["PSX"] = true
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VIDEOS["RAMDAC"] = true
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VIDEOS["S2636"] = true
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VIDEOS["SAA5050"] = true
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VIDEOS["SDA5708"] = true
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VIDEOS["SED1200"] = true
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VIDEOS["SED1330"] = true
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VIDEOS["SED1520"] = true
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@ -107,6 +107,10 @@ ADDRESS_MAP_END
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m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: fscpu32_device(mconfig, tag, owner, clock, M68340, 32,32, ADDRESS_MAP_NAME(m68340_internal_map))
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,m_pa_out_cb(*this)
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,m_pa_in_cb(*this)
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,m_pb_out_cb(*this)
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,m_pb_in_cb(*this)
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{
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m68340SIM = nullptr;
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m68340DMA = nullptr;
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@ -6,7 +6,6 @@
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#pragma once
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#include "cpu/m68000/m68000.h"
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#include "68340sim.h"
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@ -14,12 +13,31 @@
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#include "68340ser.h"
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#include "68340tmu.h"
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//**************************************************************************
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// INTERFACE CONFIGURATION MACROS
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//**************************************************************************
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#define MCFG_MC68340_PA_INPUT_CB(_devcb) \
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devcb = &m68340_cpu_device::set_pa_in_callback (*device, DEVCB_##_devcb);
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#define MCFG_MC68340_PA_OUTPUT_CB(_devcb) \
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devcb = &m68340_cpu_device::set_pa_out_callback (*device, DEVCB_##_devcb);
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#define MCFG_MC68340_PB_INPUT_CB(_devcb) \
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devcb = &m68340_cpu_device::set_pb_in_callback (*device, DEVCB_##_devcb);
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#define MCFG_MC68340_PB_OUTPUT_CB(_devcb) \
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devcb = &m68340_cpu_device::set_pb_out_callback (*device, DEVCB_##_devcb);
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class m68340_cpu_device : public fscpu32_device
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{
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public:
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m68340_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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template <class Object> static devcb_base &set_pa_in_callback (device_t &device, Object &&cb){ return downcast<m68340_cpu_device &>(device).m_pa_in_cb.set_callback (std::forward<Object>(cb)); }
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template <class Object> static devcb_base &set_pa_out_callback (device_t &device, Object &&cb){ return downcast<m68340_cpu_device &>(device).m_pa_out_cb.set_callback (std::forward<Object>(cb)); }
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template <class Object> static devcb_base &set_pb_in_callback (device_t &device, Object &&cb){ return downcast<m68340_cpu_device &>(device).m_pb_in_cb.set_callback (std::forward<Object>(cb)); }
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template <class Object> static devcb_base &set_pb_out_callback (device_t &device, Object &&cb){ return downcast<m68340_cpu_device &>(device).m_pb_out_cb.set_callback (std::forward<Object>(cb)); }
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uint16_t get_cs(offs_t address);
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READ32_MEMBER( m68340_internal_base_r );
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@ -62,6 +80,11 @@ protected:
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uint16_t m_pitr;
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emu_timer *m_irq_timer;
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devcb_write8 m_pa_out_cb;
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devcb_read8 m_pa_in_cb;
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devcb_write8 m_pb_out_cb;
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devcb_read8 m_pb_in_cb;
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};
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DECLARE_DEVICE_TYPE(M68340, m68340_cpu_device)
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@ -1,10 +1,36 @@
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// license:BSD-3-Clause
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// copyright-holders:David Haywood
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// copyright-holders:David Haywood, Joakim Larsson Edstrom
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/* 68340 SIM module */
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#include "emu.h"
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#include "68340.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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//#define LOG_GENERAL (1U << 0) // Already defined in logmacro.h
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#define LOG_SETUP (1U << 1)
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#define LOG_READ (1U << 2)
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#define LOG_PORTS (1U << 3)
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//#define VERBOSE (LOG_PORTS|LOG_SETUP|LOG_READ)
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#define LOG_OUTPUT_FUNC printf // Needs always to be enabled as the default value 'logerror' is not available here
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#include "logmacro.h"
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//#define LOG(...) LOGMASKED(LOG_GENERAL, __VA_ARGS__) // Already defined in logmacro.h
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#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
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#define LOGR(...) LOGMASKED(LOG_READ, __VA_ARGS__)
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#define LOGPORTS(...) LOGMASKED(LOG_PORTS, __VA_ARGS__)
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#ifdef _MSC_VER
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#define FUNCNAME __func__
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#define LLFORMAT "%I64d"
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#else
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#define FUNCNAME __PRETTY_FUNCTION__
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#define LLFORMAT "%lld"
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#endif
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#define m68340SIM_MCR (0x00)
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// (0x02)
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@ -16,8 +42,8 @@
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// (0x0e)
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#define m68340SIM_PORTA (0x11)
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#define m68340SIM_DDRA (0x13)
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#define m68340SIM_PPRA1 (0x15)
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#define m68340SIM_PPRA2 (0x17)
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#define m68340SIM_PPARA1 (0x15)
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#define m68340SIM_PPARA2 (0x17)
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#define m68340SIM_PORTB (0x19)
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#define m68340SIM_PORTB1 (0x1b)
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#define m68340SIM_DDRB (0x1d)
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@ -51,6 +77,7 @@
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READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r )
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{
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LOGR("%s\n", FUNCNAME);
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assert(m68340SIM);
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//m68340_sim &sim = *m68340SIM;
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@ -59,35 +86,35 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r )
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switch (offset<<1)
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{
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case m68340SIM_MCR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_SYNCR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_AVR_RSR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_SWIV_SYPCR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_PICR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_PITR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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case m68340SIM_SWSR:
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logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service) - not implemented\n", pc, offset*2,mem_mask);
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return space.machine().rand();
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default:
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logerror("%08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask);
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LOGR("- %08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask);
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}
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return 0x0000;
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@ -95,54 +122,94 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r )
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READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r )
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{
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LOGR("%s\n", FUNCNAME);
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offset += 0x10;
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assert(m68340SIM);
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//m68340_sim &sim = *m68340SIM;
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m68340_sim &sim = *m68340SIM;
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int pc = space.device().safe_pc();
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int val = space.machine().rand();
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switch (offset)
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{
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case m68340SIM_PORTA:
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logerror("%08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset);
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return space.machine().rand();
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LOGR("- %08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset);
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sim.m_porta &= sim.m_ddra;
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// TODO: call callback
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if (!m_pa_in_cb.isnull())
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{
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sim.m_porta |= (m_pa_in_cb() & ~sim.m_ddra);
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}
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#if 0
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else
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{
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sim.m_porta |= (sim.m_pail & ~sim.m_ddra);
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}
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#endif
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val = sim.m_porta;
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break;
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case m68340SIM_DDRA:
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logerror("%08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset);
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return space.machine().rand();
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LOGR("- %08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset);
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val = sim.m_ddra;
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break;
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case m68340SIM_PPRA1:
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logerror("%08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset);
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return space.machine().rand();
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case m68340SIM_PPARA1:
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LOGR("- %08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset);
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val = sim.m_ppara1;
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break;
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case m68340SIM_PPRA2:
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logerror("%08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset);
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return space.machine().rand();
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case m68340SIM_PORTB:
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logerror("%08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset);
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return space.machine().rand();
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case m68340SIM_PPARA2:
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LOGR("- %08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2) - not implemented\n", pc, offset);
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val = sim.m_ppara2;
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break;
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case m68340SIM_PORTB1:
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logerror("%08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset);
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return space.machine().rand();
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LOGR("- %08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset);
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// Fallthrough to mirror register
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case m68340SIM_PORTB:
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LOGR("- %08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset);
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sim.m_portb &= sim.m_ddrb;
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// TODO: call callback
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if (!m_pb_in_cb.isnull())
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{
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sim.m_portb |= (m_pb_in_cb() & ~sim.m_ddrb);
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}
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#if 0
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else
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{
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sim.m_portb |= (sim.m_pbil & ~sim.m_ddrb);
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}
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#endif
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val = sim.m_portb;
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break;
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case m68340SIM_DDRB:
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logerror("%08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset);
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return space.machine().rand();
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LOGR("- %08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset);
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val = sim.m_ddrb;
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break;
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case m68340SIM_PPARB:
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logerror("%08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset);
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return space.machine().rand();
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LOGR("- %08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset);
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val = sim.m_pparb;
|
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break;
|
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|
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default:
|
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LOGR("- %08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset);
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logerror("%08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset);
|
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return space.machine().rand();
|
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break;
|
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}
|
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LOGR(" * Reg %02x -> %02x - %s\n", offset, val, std::array<char const *, 16>
|
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{{"", "PORTA", "", "DDRA", "", "PPARA1", "", "PPARA2", "", "PORTB","", "PORTB1", "", "DDRB", "", "PPARB"}}[offset - 0x10]);
|
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|
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return val;
|
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}
|
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|
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READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r )
|
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{
|
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LOGR("%s\n", FUNCNAME);
|
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offset += m68340SIM_AM_CS0>>2;
|
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|
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assert(m68340SIM);
|
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@ -170,6 +237,7 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r )
|
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|
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WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w )
|
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{
|
||||
LOGSETUP("%s\n", FUNCNAME);
|
||||
assert(m68340SIM);
|
||||
//m68340_sim &sim = *m68340SIM;
|
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|
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@ -178,34 +246,34 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w )
|
||||
switch (offset<<1)
|
||||
{
|
||||
case m68340SIM_MCR:
|
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logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (MCR - Module Configuration Register) - not implemented\n", pc, offset*2,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68340SIM_SYNCR:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (SYNCR - Clock Synthesizer Register) - not implemented\n", pc, offset*2,data,mem_mask);
|
||||
break;
|
||||
|
||||
|
||||
case m68340SIM_AVR_RSR:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,data,mem_mask);
|
||||
COMBINE_DATA(&m_avr);
|
||||
break;
|
||||
|
||||
case m68340SIM_SWIV_SYPCR:
|
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logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register) - not implemented\n", pc, offset*2,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68340SIM_PICR:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,data,mem_mask);
|
||||
COMBINE_DATA(&m_picr);
|
||||
break;
|
||||
|
||||
case m68340SIM_PITR:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,data,mem_mask);
|
||||
COMBINE_DATA(&m_pitr);
|
||||
if (m_pitr !=0 ) // hack
|
||||
{
|
||||
//logerror("timer set\n");
|
||||
//LOGSETUP("- timer set\n");
|
||||
m_irq_timer->adjust(cycles_to_attotime(20000)); // hack
|
||||
}
|
||||
|
||||
@ -213,58 +281,75 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w )
|
||||
|
||||
case m68340SIM_SWSR:
|
||||
// basically watchdog, you must write an alternating pattern of 0x55 / 0xaa to keep the watchdog from resetting the system
|
||||
//logerror("%08x m68340_internal_sim_w %04x, %04x (%04x) (SWSR - Software Service)\n", pc, offset*2,data,mem_mask);
|
||||
//LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) (SWSR - Software Service)\n", pc, offset*2,data,mem_mask);
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %04x (%04x)\n", pc, offset*2,data,mem_mask);
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %04x, %04x (%04x) - not implemented\n", pc, offset*2,data,mem_mask);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w )
|
||||
{
|
||||
LOG("%s", FUNCNAME);
|
||||
offset += 0x10;
|
||||
assert(m68340SIM);
|
||||
//m68340_sim &sim = *m68340SIM;
|
||||
m68340_sim &sim = *m68340SIM;
|
||||
|
||||
int pc = space.device().safe_pc();
|
||||
|
||||
LOGSETUP(" * Reg %02x <- %02x - %s\n", offset, data, std::array<char const *, 16>
|
||||
{{"", "PORTA", "", "DDRA", "", "PPRA1", "", "PPRA2", "", "PORTB","", "PORTB1", "", "DDRB", "", "PPARB"}}[offset - 0x10]);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case m68340SIM_PORTA:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PORTA - Port A Data)\n", pc, offset,data);
|
||||
LOGPORTS("- %08x %04x, %02x (PORTA - Port A Data)\n", pc, offset,data);
|
||||
sim.m_porta = (data & sim.m_ddra & sim.m_ppara1);
|
||||
|
||||
// callback
|
||||
m_pa_out_cb ((offs_t)0, sim.m_porta);
|
||||
break;
|
||||
|
||||
case m68340SIM_DDRA:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (DDRA - Port A Data Direction)\n", pc, offset,data);
|
||||
LOGPORTS("- %08x %04x, %02x (DDRA - Port A Data Direction)\n", pc, offset,data);
|
||||
sim.m_ddra = data;
|
||||
break;
|
||||
|
||||
case m68340SIM_PPRA1:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset,data);
|
||||
case m68340SIM_PPARA1:
|
||||
LOGPORTS("- %08x %04x, %02x (PPARA1 - Port A Pin Assignment 1)\n", pc, offset,data);
|
||||
sim.m_ppara1 = data;
|
||||
break;
|
||||
|
||||
case m68340SIM_PPRA2:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset,data);
|
||||
break;
|
||||
|
||||
case m68340SIM_PORTB:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB - Port B Data)\n", pc, offset,data);
|
||||
case m68340SIM_PPARA2:
|
||||
LOGPORTS("- %08x %04x, %02x (PPARA2 - Port A Pin Assignment 2)\n", pc, offset,data);
|
||||
sim.m_ppara2 = data;
|
||||
break;
|
||||
|
||||
case m68340SIM_PORTB1:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PORTB1 - Port B Data - mirror)\n", pc, offset,data);
|
||||
LOGPORTS("- %08x %04x, %02x (PORTB1 - Port B Data - mirror)\n", pc, offset,data);
|
||||
// Falling through to mirrored register portb
|
||||
case m68340SIM_PORTB:
|
||||
LOGPORTS("- %08x %04x, %02x (PORTB - Port B Data)\n", pc, offset,data);
|
||||
sim.m_portb = (data & sim.m_ddrb & sim.m_pparb);
|
||||
|
||||
// callback
|
||||
m_pb_out_cb ((offs_t)0, sim.m_portb);
|
||||
break;
|
||||
|
||||
case m68340SIM_DDRB:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (DDR - Port B Data Direction)\n", pc, offset,data);
|
||||
LOGPORTS("- %08x %04x, %02x (DDR - Port B Data Direction)\n", pc, offset,data);
|
||||
sim.m_ddrb = data;
|
||||
break;
|
||||
|
||||
case m68340SIM_PPARB:
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (PPARB - Port B Pin Assignment)\n", pc, offset,data);
|
||||
LOGPORTS("- %08x %04x, %02x (PPARB - Port B Pin Assignment)\n", pc, offset,data);
|
||||
sim.m_pparb = data;
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGPORTS("- %08x %04x, %02x (ILLEGAL?) - not implemented\n", pc, offset,data);
|
||||
logerror("%08x m68340_internal_sim_w %04x, %02x (ILLEGAL?)\n", pc, offset,data);
|
||||
break;
|
||||
}
|
||||
@ -272,6 +357,7 @@ WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w )
|
||||
|
||||
WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w )
|
||||
{
|
||||
LOGSETUP("%s\n", FUNCNAME);
|
||||
offset += m68340SIM_AM_CS0>>2;
|
||||
assert(m68340SIM);
|
||||
m68340_sim &sim = *m68340SIM;
|
||||
@ -313,6 +399,7 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w )
|
||||
break;
|
||||
|
||||
default:
|
||||
LOGSETUP("- %08x m68340_internal_sim_w %08x, %08x (%08x) - not implemented\n", pc, offset*4,data,mem_mask);
|
||||
logerror("%08x m68340_internal_sim_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
|
||||
break;
|
||||
}
|
||||
@ -351,8 +438,24 @@ TIMER_CALLBACK_MEMBER(m68340_cpu_device::periodic_interrupt_timer_callback)
|
||||
void m68340_cpu_device::start_68340_sim()
|
||||
{
|
||||
m_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68340_cpu_device::periodic_interrupt_timer_callback),this));
|
||||
|
||||
// resolve callbacks Port A
|
||||
m_pa_out_cb.resolve_safe();
|
||||
m_pa_in_cb.resolve();
|
||||
|
||||
// resolve callbacks Port B
|
||||
m_pb_out_cb.resolve_safe();
|
||||
m_pb_in_cb.resolve();
|
||||
}
|
||||
|
||||
void m68340_sim::reset()
|
||||
{
|
||||
LOGSETUP("%s\n", FUNCNAME);
|
||||
|
||||
// Ports - only setup those that are affected by reset
|
||||
m_ddra = 0x00;
|
||||
m_ppara1 = 0xff;
|
||||
m_ppara2 = 0x00;
|
||||
m_ddrb = 0x00;
|
||||
m_pparb = 0xff;
|
||||
}
|
||||
|
@ -5,12 +5,21 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
class m68340_sim
|
||||
{
|
||||
public:
|
||||
uint32_t m_am[4];
|
||||
uint32_t m_ba[4];
|
||||
// Chip selects
|
||||
uint32_t m_am[4]; // chip select address mask + control, unaffected by reset
|
||||
uint32_t m_ba[4]; // chip select base address + control, unaffected by reset
|
||||
|
||||
// Ports Reset values
|
||||
uint8_t m_porta; // unaffected by reset
|
||||
uint8_t m_ddra; // 0x00
|
||||
uint8_t m_ppara1; // 0xff
|
||||
uint8_t m_ppara2; // 0x00
|
||||
uint8_t m_portb; // unaffected by reset
|
||||
uint8_t m_ddrb; // 0x00
|
||||
uint8_t m_pparb; // 0xff
|
||||
|
||||
void reset();
|
||||
};
|
||||
|
180
src/devices/video/sda5708.cpp
Normal file
180
src/devices/video/sda5708.cpp
Normal file
@ -0,0 +1,180 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Joakim Larsson Edstrom
|
||||
/**********************************************************************
|
||||
|
||||
Siemens SDA5708 8 character 7x5 dot matrix LED display
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "sda5708.h"
|
||||
|
||||
//**************************************************************************
|
||||
// MACROS / CONSTANTS
|
||||
//**************************************************************************
|
||||
|
||||
//#define LOG_GENERAL (1U << 0) // Already defined in logmacro.h
|
||||
#define LOG_SETUP (1U << 1)
|
||||
#define LOG_CMD (1U << 2)
|
||||
#define LOG_DATA (1U << 3)
|
||||
|
||||
//#define VERBOSE (LOG_DATA|LOG_SETUP|LOG_CMD|LOG_GENERAL)
|
||||
//#define LOG_OUTPUT_FUNC printf
|
||||
|
||||
#include "logmacro.h"
|
||||
|
||||
//#define LOG(...) LOGMASKED(LOG_GENERAL, __VA_ARGS__) // Already defined in logmacro.h
|
||||
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
|
||||
#define LOGCMD(...) LOGMASKED(LOG_CMD, __VA_ARGS__)
|
||||
#define LOGDATA(...) LOGMASKED(LOG_DATA, __VA_ARGS__)
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#define FUNCNAME __func__
|
||||
#define LLFORMAT "%I64d"
|
||||
#else
|
||||
#define FUNCNAME __PRETTY_FUNCTION__
|
||||
#define LLFORMAT "%lld"
|
||||
#endif
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// DEVICE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// device type definition
|
||||
//const device_type SDA5708 = &device_creator<sda5708_device>;
|
||||
DEFINE_DEVICE_TYPE(SDA5708, sda5708_device, "sda5708", "SDA5708")
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// sda5708_device - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
sda5708_device::sda5708_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
device_t(mconfig, SDA5708, tag, owner, clock)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void sda5708_device::device_start()
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
// register for state saving
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void sda5708_device::device_reset()
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// load_w - load signal
|
||||
//
|
||||
// The Load pin is an active low input used to enable data transfer into the display.
|
||||
// When Load is low, data is clocked into the 8 bit serial data register. When Load goes
|
||||
// high, the contents of the 8 bit serial data register are evaluated by the display controller.
|
||||
// While Load remains high the Data and SDCLK pins may be used to control other serial devices
|
||||
// on the same bus.
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE_LINE_MEMBER( sda5708_device::load_w )
|
||||
{
|
||||
LOG("%s - line %s\n", FUNCNAME, state == ASSERT_LINE ? "asserted" : "cleared");
|
||||
if (m_load != state && m_reset == CLEAR_LINE && state == CLEAR_LINE)
|
||||
{
|
||||
switch (m_serial & SDA5708_REG_MASK)
|
||||
{
|
||||
case SDA5708_CNTR_COMMAND:
|
||||
LOGCMD("- Control command: %0x02\n", m_serial & 0x1f);
|
||||
break;
|
||||
case SDA5708_CLEAR_COMMAND:
|
||||
LOGCMD("- Display cleared\n");
|
||||
memset(m_dispmem, 0x00, sizeof(m_dispmem));
|
||||
break;
|
||||
case SDA5708_ADDR_COMMAND:
|
||||
LOGCMD("- Address command: %02x\n", m_serial & 0x1f);
|
||||
m_digit = m_serial & 7;
|
||||
m_cdp = 0;
|
||||
break;
|
||||
case SDA5708_DATA_COMMAND:
|
||||
LOGCMD("- Data command: %02x\n", m_serial & 0x1f);
|
||||
LOGDATA("- SDA5708 data: %c%c%c%c%c\n",
|
||||
(m_serial & 0x10) ? 'x' : ' ',
|
||||
(m_serial & 0x08) ? 'x' : ' ',
|
||||
(m_serial & 0x04) ? 'x' : ' ',
|
||||
(m_serial & 0x02) ? 'x' : ' ',
|
||||
(m_serial & 0x01) ? 'x' : ' ' );
|
||||
m_dispmem[m_digit * 7 + m_cdp] = m_serial;
|
||||
m_cdp = (m_cdp + 1) % 7;
|
||||
break;
|
||||
default:
|
||||
LOGCMD("- Unknown command:%02x\n", m_serial);
|
||||
break;
|
||||
}
|
||||
}
|
||||
m_load = state;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// data_w - data line
|
||||
//
|
||||
// The Data pin holds the bits to be clocked into the serial data register whenever the SDCLK
|
||||
// line goes high. The least significant bit D0 is loaded first.
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE_LINE_MEMBER( sda5708_device::data_w )
|
||||
{
|
||||
LOG("%s - line %s\n", FUNCNAME, state == ASSERT_LINE ? "asserted" : "cleared");
|
||||
m_data = state;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// sdclk_w - serial data clock
|
||||
//
|
||||
// SDCLK is the serial clock line. Data is accepted by the display's serial data register when the SDCLK line
|
||||
// goes high. The Load pin must be low for the serial data register to accept any data. The minimum clock period is
|
||||
// 200ns. Setup time, the time between a stable Data line and a rising SDCLK signal, should be a minimum of 50ns.
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE_LINE_MEMBER( sda5708_device::sdclk_w )
|
||||
{
|
||||
LOG("%s - line %s\n", FUNCNAME, state == ASSERT_LINE ? "asserted" : "cleared");
|
||||
|
||||
if ( m_sdclk != state && m_reset == CLEAR_LINE && m_load == ASSERT_LINE && state == ASSERT_LINE)
|
||||
{
|
||||
m_serial = (((m_serial >> 1) & 0x7f) | (m_data == ASSERT_LINE ? 0x80 : 0));
|
||||
}
|
||||
m_sdclk = state;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// reset_w - chip reset
|
||||
//
|
||||
// When the Reset pin is held low, the display will be reset. The multiplex counter, the address register,
|
||||
// the control word and the display bit patterns are all cleared. This means that the display will be
|
||||
// blank and the display is set to 100% brightness and maximum peak current.
|
||||
// During normal operation the Reset pin is only made low for a short period when power is applied to
|
||||
// the circuit and is left at high level from then on.
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE_LINE_MEMBER( sda5708_device::reset_w )
|
||||
{
|
||||
LOG("%s - line %s\n", FUNCNAME, state == ASSERT_LINE ? "asserted" : "cleared");
|
||||
m_reset = state;
|
||||
}
|
120
src/devices/video/sda5708.h
Normal file
120
src/devices/video/sda5708.h
Normal file
@ -0,0 +1,120 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Joakim Larsson Edstrom
|
||||
/**********************************************************************
|
||||
|
||||
Siemens SDA5708 8 character 7x5 dot matrix LED display
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#ifndef MAME_VIDEO_SDA5708_H
|
||||
#define MAME_VIDEO_SDA5708_H
|
||||
|
||||
#pragma once
|
||||
|
||||
/* Misc info
|
||||
* ---------
|
||||
* http://www.sbprojects.com/knowledge/footprints/sda5708/index.php
|
||||
* http://arduinotehniq.blogspot.se/2015/07/sda5708-display-8-character-7x5-dot.html
|
||||
*
|
||||
* Display front - LEDs
|
||||
* --------------------
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx
|
||||
* Dig0 Dig1 Dig2 Dig3 Dig4 Dig5 Dig6 Dig7
|
||||
*
|
||||
* Display rear - Pinout
|
||||
* ---------------------
|
||||
* +--------------------------------------------------------+
|
||||
* | O O |
|
||||
* | +----------------------------------------------+ |
|
||||
* | | o o o o o o | |
|
||||
* | | Pin:6 5 4 3 2 1 | |
|
||||
* | | | |
|
||||
* | +----------------------------------------------+ |
|
||||
* +--------------------------------------------------------+
|
||||
* 6:GND 5:_RESET 4:SDCLK 3:Data 2:_Load 1:Vcc
|
||||
*
|
||||
*/
|
||||
|
||||
///*************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
///*************************************************************************
|
||||
|
||||
#define MCFG_SDA5708_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, SDA5708, 0)
|
||||
|
||||
|
||||
///*************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
///*************************************************************************
|
||||
|
||||
// ======================> sda5708_device
|
||||
|
||||
class sda5708_device : public device_t
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
sda5708_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( load_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( data_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( sdclk_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( reset_w );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
enum {
|
||||
SDA5708_REG_MASK = 0xE0,
|
||||
|
||||
SDA5708_CNTR_COMMAND = 0xE0,
|
||||
SDA5708_CNTR_BRIGHT_MAS= 0x1F,
|
||||
SDA5708_CNTR_BRIGHT_100= 0x00,
|
||||
SDA5708_CNTR_BRIGHT_53 = 0x01,
|
||||
SDA5708_CNTR_BRIGHT_40 = 0x02,
|
||||
SDA5708_CNTR_BRIGHT_27 = 0x03,
|
||||
SDA5708_CNTR_BRIGHT_20 = 0x04,
|
||||
SDA5708_CNTR_BRIGHT_13 = 0x05,
|
||||
SDA5708_CNTR_BRIGHT_6_6= 0x06,
|
||||
SDA5708_CNTR_BRIGHT_0 = 0x07,
|
||||
SDA5708_CNTR_PKCUR_12_5= 0x08,
|
||||
|
||||
SDA5708_CLEAR_COMMAND = 0xC0,
|
||||
|
||||
SDA5708_ADDR_COMMAND = 0xA0,
|
||||
SDA5708_ADDR_LED_MASK = 0x07,
|
||||
SDA5708_ADDR_LED0 = 0x00,
|
||||
SDA5708_ADDR_LED1 = 0x01,
|
||||
SDA5708_ADDR_LED2 = 0x02,
|
||||
SDA5708_ADDR_LED3 = 0x03,
|
||||
SDA5708_ADDR_LED4 = 0x04,
|
||||
SDA5708_ADDR_LED5 = 0x05,
|
||||
SDA5708_ADDR_LED6 = 0x06,
|
||||
SDA5708_ADDR_LED7 = 0x07,
|
||||
|
||||
SDA5708_DATA_COMMAND = 0x00
|
||||
};
|
||||
|
||||
uint8_t m_serial;
|
||||
uint8_t m_load;
|
||||
uint8_t m_reset;
|
||||
uint8_t m_data;
|
||||
uint8_t m_sdclk;
|
||||
uint8_t m_dispmem[7 * 8];
|
||||
uint8_t m_cdp;
|
||||
uint8_t m_digit;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type SDA5708;
|
||||
|
||||
#endif // MAME_VIDEO_SDA5708_H
|
@ -88,7 +88,9 @@
|
||||
* 0x00FFF700-0x00FFF721 Serial devices offset to SIM40
|
||||
* 0x00FFF600-0x00FFF67F Timers offset to SIM40
|
||||
* 0x00FFF000-0x00FFF07F SIM40 programmed base adress (MCR)
|
||||
* 0x00700000-0x008fffff RAM
|
||||
* 0x00700000-0x0077ffff RAM
|
||||
* 0x00780000-0x007807ff I/O area
|
||||
* 0x00800000-0x008fffff RAM
|
||||
* 0x00000000-0x0001ffff bootstrap
|
||||
* --------------------------------------------------------------------------
|
||||
*
|
||||
@ -106,14 +108,14 @@
|
||||
* SIM40 + 0x0700: 0x00 Serial port
|
||||
* SIM40 + 0x071F: 0xFF Serial port
|
||||
* SIM40 + 0x0004: 0x7F03 SYNCR
|
||||
* SIM40 + 0x0040: 0x003FFFF5 CS0 mask 1
|
||||
* SIM40 + 0x0044: 0x00000003 CS0 base 1
|
||||
* SIM40 + 0x0048: 0x003FFFF5 CS1 mask 1
|
||||
* SIM40 + 0x004C: 0x00800003 CS1 base 1
|
||||
* SIM40 + 0x0050: 0x00007FFF CS2 mask 1
|
||||
* SIM40 + 0x0040: 0x003FFFF5 CS0 mask 1 - block size = 4194304 (4MB)
|
||||
* SIM40 + 0x0044: 0x00000003 CS0 base 1 - base addr = 0x000000
|
||||
* SIM40 + 0x0048: 0x003FFFF5 CS1 mask 1 - block size = 4194304 (4MB)
|
||||
* SIM40 + 0x004C: 0x00800003 CS1 base 1 - base addr = 0x
|
||||
* SIM40 + 0x0050: 0x00007FFF CS2 mask 1 - block size = 65536 (64KB)
|
||||
* SIM40 + 0x0054: 0x00700003 CS2 base 1
|
||||
* SIM40 + 0x0058: 0x000007F2 CS3 mask 1
|
||||
* SIM40 + 0x005C: 0x00700003 CS3 base 1
|
||||
* SIM40 + 0x0058: 0x000007F2 CS3 mask 1 - block size = 2048 (2KB)
|
||||
* SIM40 + 0x005C: 0x00780003 CS3 base 1
|
||||
* SIM40 + 0x001F: 0x40 PBARB Port B Pin Assignment
|
||||
*
|
||||
* -------------------------------------------------------------
|
||||
@ -272,6 +274,38 @@
|
||||
* SIM40 + 0x0640: 0x03 MCR Timer 2
|
||||
* tbc...
|
||||
*
|
||||
* LED Dot Matrix Display hookup
|
||||
* -------------------------------------
|
||||
* "DISPLAY CONN ALT" connected to the SDA5708
|
||||
* pin signal connected to
|
||||
* 1 VCC +5v
|
||||
* 2 LOAD1* PA2 68340 pin 121 IP01
|
||||
* 3 DATA D8 68340 pin 134 IP01
|
||||
* 4 SDCLK Q6 74138 pin 9 IP12
|
||||
* 5 RESET* Q4 74259 pin 9 IP16
|
||||
* 6 GND GND
|
||||
*
|
||||
* IP12 74138 hookup
|
||||
* pin signal connected to
|
||||
* 1 A0 A8 68340 pin 46 IP01
|
||||
* 2 A1 A9 68340 pin 47 IP01
|
||||
* 3 A2 A10 68340 pin 48 IP01
|
||||
* 4 E1* CS3 68340 pin 5 IP01
|
||||
* 5 E2* CS3 68340 pin 5 IP01
|
||||
* 6 E3 +5v
|
||||
* 9 Q6 SDCLK SDA5708 pin 4
|
||||
* 14 Q1 Enable* 74259 pin 14 IP16
|
||||
*
|
||||
* IP16 74259 hookup
|
||||
* pin signal connected to
|
||||
* 1 A0 A0 68340 pin 113 IP01
|
||||
* 2 A1 A1 68340 pin 37 IP01
|
||||
* 3 A2 A2 68340 pin 38 IP01
|
||||
* 9 Q4 Reset* SDA5708 pin 5
|
||||
* 13 D D8 68340 pin 134 IP01
|
||||
* 14 Enable* Q1 74138 pin 14 IP12
|
||||
* 15 Clear* System reset
|
||||
*
|
||||
* Identified low level drivers in firmware
|
||||
* ----------------------------------------
|
||||
* 800420..80046C : Some PORT A serialisation routine for the
|
||||
@ -294,8 +328,6 @@
|
||||
* ----------------------------------------------------------
|
||||
*
|
||||
* TODO:
|
||||
* - Dump the ROMs
|
||||
* - Dump/Find bootable software
|
||||
* - Setup a working address map
|
||||
* - Fix debug terminal
|
||||
* - TBC
|
||||
@ -305,26 +337,83 @@
|
||||
#include "emu.h"
|
||||
#include "machine/68340.h"
|
||||
|
||||
#include "video/sda5708.h"
|
||||
#include "machine/latch8.h" // IP16
|
||||
|
||||
//**************************************************************************
|
||||
// MACROS / CONSTANTS
|
||||
//**************************************************************************
|
||||
|
||||
//#define LOG_GENERAL (1U << 0) // Already defined in logmacro.h
|
||||
#define LOG_SETUP (1U << 1)
|
||||
#define LOG_DISPLAY (1U << 2)
|
||||
|
||||
//#define VERBOSE (LOG_GENERAL|LOG_SETUP|LOG_DISPLAY)
|
||||
//#define LOG_OUTPUT_FUNC printf
|
||||
|
||||
#include "logmacro.h"
|
||||
|
||||
//#define LOG(...) LOGMASKED(LOG_GENERAL, __VA_ARGS__) // Already defined in logmacro.h
|
||||
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
|
||||
#define LOGDISPLAY(...) LOGMASKED(LOG_DISPLAY, __VA_ARGS__)
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#define FUNCNAME __func__
|
||||
#define LLFORMAT "%I64d"
|
||||
#else
|
||||
#define FUNCNAME __PRETTY_FUNCTION__
|
||||
#define LLFORMAT "%lld"
|
||||
#endif
|
||||
|
||||
class dbox_state : public driver_device
|
||||
{
|
||||
public:
|
||||
dbox_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"){ }
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_display(*this, "display")
|
||||
, m_ip16_74259(*this, "hct259.ip16")
|
||||
{ }
|
||||
required_device<m68340_cpu_device> m_maincpu;
|
||||
required_device<sda5708_device> m_display;
|
||||
required_device<latch8_device> m_ip16_74259;
|
||||
|
||||
virtual void machine_reset() override;
|
||||
DECLARE_DRIVER_INIT(dbox);
|
||||
DECLARE_WRITE8_MEMBER (sda5708_reset);
|
||||
DECLARE_WRITE8_MEMBER (sda5708_clk);
|
||||
DECLARE_WRITE8_MEMBER(write_pa);
|
||||
};
|
||||
|
||||
void dbox_state::machine_reset()
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
}
|
||||
|
||||
// TODO: Hookup the reset latch correctly
|
||||
WRITE8_MEMBER (dbox_state::sda5708_reset){
|
||||
LOGDISPLAY("%s - not implemented\n", FUNCNAME);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER (dbox_state::sda5708_clk){
|
||||
LOGDISPLAY("%s\n", FUNCNAME);
|
||||
m_display->sdclk_w(CLEAR_LINE);
|
||||
m_display->data_w((0x80 & data) != 0 ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_display->sdclk_w(ASSERT_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER (dbox_state::write_pa){
|
||||
LOGDISPLAY("%s\n", FUNCNAME);
|
||||
m_display->load_w((0x04 & data) == 0 ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( dbox_map, AS_PROGRAM, 32, dbox_state )
|
||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM AM_REGION("maincpu", 0)
|
||||
AM_RANGE(0x700000, 0x8fffff) AM_RAM
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM AM_REGION("maincpu", 0)
|
||||
AM_RANGE(0x700000, 0x77ffff) AM_RAM // CS2
|
||||
// AM_RANGE(0x780000, 0x7807ff) AM_RAM // CS3
|
||||
AM_RANGE(0x780100, 0x7801ff) AM_WRITE8(sda5708_reset, 0xffffffff)
|
||||
AM_RANGE(0x780600, 0x7806ff) AM_WRITE8(sda5708_clk, 0xffffffff)
|
||||
AM_RANGE(0x800000, 0x8fffff) AM_RAM // CS1
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* Input ports */
|
||||
@ -334,16 +423,27 @@ INPUT_PORTS_END
|
||||
static MACHINE_CONFIG_START( dbox )
|
||||
MCFG_CPU_ADD("maincpu", M68340, XTAL_16MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(dbox_map)
|
||||
MCFG_MC68340_PA_OUTPUT_CB(WRITE8(dbox_state, write_pa))
|
||||
|
||||
/* LED Matrix Display */
|
||||
MCFG_SDA5708_ADD("display")
|
||||
|
||||
/* IP16 74256 8 bit latch */
|
||||
MCFG_LATCH8_ADD("hct259.ip16")
|
||||
MCFG_LATCH8_WRITE_4(DEVWRITELINE("display", sda5708_device, reset_w))
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
DRIVER_INIT_MEMBER(dbox_state, dbox)
|
||||
{
|
||||
}
|
||||
|
||||
// TODO: Figure out correct ROM address map
|
||||
// TODO: Figure out what DVB2000 is doing
|
||||
ROM_START( dbox )
|
||||
ROM_REGION(0x1000000, "maincpu", 0)
|
||||
// ROM_LOAD16_WORD( "dvb2000.bin", 0x000000, 0x8b742, CRC(5b21c455) SHA1(1e7654c37dfa65d1b8ac2469cdda82f91b47b3c7) )
|
||||
ROM_LOAD16_WORD( "nokboot.bin", 0x000000, 0x20000, CRC(0ff53e1f) SHA1(52002ee22c032775dac383d408c44abe9244724f) )
|
||||
// ROM_LOAD16_WORD( "dvb2000.bin", 0x000000, 0x08b742, CRC(5b21c455) SHA1(1e7654c37dfa65d1b8ac2469cdda82f91b47b3c7) )
|
||||
ROM_LOAD16_WORD( "nokboot.bin", 0x000000, 0x020000, CRC(0ff53e1f) SHA1(52002ee22c032775dac383d408c44abe9244724f) )
|
||||
ROM_END
|
||||
|
||||
COMP( 1996, dbox, 0, 0, dbox, dbox, dbox_state, dbox, "Nokia Multimedia", "D-box 1, Kirsch gruppe", MACHINE_IS_SKELETON )
|
||||
|
Loading…
Reference in New Issue
Block a user