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https://github.com/holub/mame
synced 2025-04-25 01:40:16 +03:00
wicat: added the VIA, RTC and the 7 UARTs.
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mahlemiut
parent
2538d2488a
commit
8874b78abf
@ -11,6 +11,9 @@ Wicat - various systems.
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "machine/terminal.h"
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#include "machine/6522via.h"
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#include "machine/mm58274c.h"
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#include "machine/mc2661.h"
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#include "wicat.lh"
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class wicat_state : public driver_device
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@ -21,20 +24,43 @@ public:
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// , m_p_base(*this, "rambase")
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, m_maincpu(*this, "maincpu")
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, m_terminal(*this, TERMINAL_TAG)
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, m_rtc(*this, "rtc")
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, m_uart0(*this,"uart0")
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, m_uart1(*this,"uart1")
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, m_uart2(*this,"uart2")
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, m_uart3(*this,"uart3")
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, m_uart4(*this,"uart4")
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, m_uart5(*this,"uart5")
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, m_uart6(*this,"uart6")
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{ }
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DECLARE_WRITE8_MEMBER(kbd_put);
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//DECLARE_WRITE8_MEMBER(kbd_put);
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DECLARE_READ16_MEMBER(invalid_r);
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DECLARE_WRITE16_MEMBER(invalid_w);
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DECLARE_WRITE16_MEMBER(serial_w);
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DECLARE_WRITE16_MEMBER(parallel_led_w);
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DECLARE_READ8_MEMBER(via_a_r);
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DECLARE_READ8_MEMBER(via_b_r);
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DECLARE_WRITE8_MEMBER(via_a_w);
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DECLARE_WRITE8_MEMBER(via_b_w);
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private:
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UINT8 m_term_data;
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virtual void machine_start();
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virtual void machine_reset();
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// required_shared_ptr<UINT16> m_p_base;
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required_device<cpu_device> m_maincpu;
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required_device<generic_terminal_device> m_terminal;
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required_device<serial_terminal_device> m_terminal;
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required_device<mm58274c_device> m_rtc;
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required_device<mc2661_device> m_uart0;
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required_device<mc2661_device> m_uart1;
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required_device<mc2661_device> m_uart2;
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required_device<mc2661_device> m_uart3;
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required_device<mc2661_device> m_uart4;
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required_device<mc2661_device> m_uart5;
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required_device<mc2661_device> m_uart6;
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UINT8 m_portA;
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UINT8 m_portB;
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};
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@ -44,11 +70,20 @@ static ADDRESS_MAP_START(wicat_mem, AS_PROGRAM, 16, wicat_state)
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// AM_RANGE(0x000000, 0x01efff) AM_RAM AM_SHARE("rambase")
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AM_RANGE(0x000000, 0x001fff) AM_ROM AM_REGION("c2", 0x0000)
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AM_RANGE(0x020000, 0x1fffff) AM_RAM
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AM_RANGE(0x200000, 0x3fffff) AM_RAM
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AM_RANGE(0x400000, 0xdfffff) AM_READWRITE(invalid_r,invalid_w)
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AM_RANGE(0xeff800, 0xefffff) AM_RAM // memory mapping SRAM, used during boot sequence for the stack (TODO)
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AM_RANGE(0xf00000, 0xf0002f) AM_WRITE(serial_w) // UARTs
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AM_RANGE(0x200000, 0x2fffff) AM_RAM
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AM_RANGE(0x300000, 0xdfffff) AM_READWRITE(invalid_r,invalid_w)
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AM_RANGE(0xeff800, 0xeffbff) AM_RAM // memory mapping SRAM, used during boot sequence for the stack (TODO)
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AM_RANGE(0xf00000, 0xf00007) AM_DEVREADWRITE8("uart0",mc2661_device,read,write,0xff00) // UARTs
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AM_RANGE(0xf00008, 0xf0000f) AM_DEVREADWRITE8("uart1",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00010, 0xf00017) AM_DEVREADWRITE8("uart2",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00018, 0xf0001f) AM_DEVREADWRITE8("uart3",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00020, 0xf00027) AM_DEVREADWRITE8("uart4",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00028, 0xf0002f) AM_DEVREADWRITE8("uart5",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00030, 0xf00037) AM_DEVREADWRITE8("uart6",mc2661_device,read,write,0xff00)
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AM_RANGE(0xf00040, 0xf0005f) AM_DEVREADWRITE8("via",via6522_device,read,write,0xff00)
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AM_RANGE(0xf00060, 0xf0007f) AM_DEVREADWRITE8("rtc",mm58274c_device,read,write,0xff00)
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AM_RANGE(0xf000d0, 0xf000d1) AM_WRITE(parallel_led_w)
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AM_RANGE(0xf00f00, 0xf00fff) AM_READWRITE(invalid_r,invalid_w)
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ADDRESS_MAP_END
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@ -65,10 +100,10 @@ void wicat_state::machine_reset()
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{
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}
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WRITE8_MEMBER( wicat_state::kbd_put )
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{
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m_term_data = data;
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}
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//WRITE8_MEMBER( wicat_state::kbd_put )
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//{
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// m_term_data = data;
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//}
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WRITE16_MEMBER( wicat_state::serial_w )
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{
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@ -76,11 +111,11 @@ WRITE16_MEMBER( wicat_state::serial_w )
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{
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switch(offset)
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{
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case 0x00:
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case 0x02:
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case 0x04:
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case 0x06:
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m_terminal->write(space,0,data);
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//case 0x00:
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//case 0x01:
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//case 0x02:
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//case 0x03:
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//m_terminal->write(space,0,data >> 8);
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default:
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logerror("Serial: Unused serial port write %02x to offset %02x\n",data,offset);
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}
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@ -99,6 +134,28 @@ WRITE16_MEMBER( wicat_state::parallel_led_w )
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output_set_value("led6",(~data) & 0x8000);
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}
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READ8_MEMBER( wicat_state::via_a_r )
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{
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return m_portA;
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}
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READ8_MEMBER( wicat_state::via_b_r )
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{
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return m_portB;
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}
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WRITE8_MEMBER( wicat_state::via_a_w )
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{
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m_portA = data;
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logerror("VIA: write %02x to port A\n",data);
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}
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WRITE8_MEMBER( wicat_state::via_b_w )
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{
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m_portB = data;
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logerror("VIA: write %02x to port B\n",data);
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}
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READ16_MEMBER( wicat_state::invalid_r )
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{
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m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
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@ -112,18 +169,83 @@ WRITE16_MEMBER( wicat_state::invalid_w )
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m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
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}
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static GENERIC_TERMINAL_INTERFACE( terminal_intf )
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static serial_terminal_interface terminal_intf =
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{
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DEVCB_DRIVER_MEMBER(wicat_state, kbd_put)
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DEVCB_NULL
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};
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static mc2661_interface wicat_uart0_intf =
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{
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0, // RXC
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0, // TXC
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DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, serial_port_device, rx), // RXD in
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DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, serial_port_device, tx), // RXD out
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DEVCB_CPU_INPUT_LINE("maincpu",M68K_IRQ_2), // RXRDY out
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DEVCB_NULL, // TXRDY out
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DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, rs232_port_device, rts_w), // RTS out
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DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, rs232_port_device, dtr_w), // DTR out
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DEVCB_CPU_INPUT_LINE("maincpu",M68K_IRQ_2), // TXEMT out
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DEVCB_NULL, // BKDET out
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DEVCB_NULL // XSYNC out
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};
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static mc2661_interface wicat_unused_intf =
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{
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0,
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0,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL
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};
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static via6522_interface wicat_via_intf =
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{
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DEVCB_DRIVER_MEMBER(wicat_state,via_a_r), // Port A in
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DEVCB_DRIVER_MEMBER(wicat_state,via_b_r), // Port B in
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DEVCB_NULL, // CA1 in
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DEVCB_NULL, // CB1 in
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DEVCB_NULL, // CA2 in
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DEVCB_NULL, // CB2 in
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DEVCB_DRIVER_MEMBER(wicat_state,via_a_w), // Port A out
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DEVCB_DRIVER_MEMBER(wicat_state,via_b_w), // Port B out
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DEVCB_NULL, // CA1 out
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DEVCB_NULL, // CB1 out
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DEVCB_NULL, // CA2 out
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DEVCB_NULL, // CB2 out
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DEVCB_CPU_INPUT_LINE("maincpu", M68K_IRQ_1) // IRQ
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};
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static mm58274c_interface wicat_rtc_intf =
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{
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0, // 12 hour
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1 // first day
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};
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static MACHINE_CONFIG_START( wicat, wicat_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M68000, 8000000) // unknown clock
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MCFG_CPU_ADD("maincpu", M68000, XTAL_8MHz) // unknown clock
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MCFG_CPU_PROGRAM_MAP(wicat_mem)
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/* video hardware */
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MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
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MCFG_SERIAL_TERMINAL_ADD(TERMINAL_TAG, terminal_intf, XTAL_5_0688MHz)
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MCFG_VIA6522_ADD("via",XTAL_4MHz,wicat_via_intf)
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MCFG_MM58274C_ADD("rtc",wicat_rtc_intf) // actually an MM58174AN, but should be compatible
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MCFG_MC2661_ADD("uart0", XTAL_5_0688MHz, wicat_uart0_intf) // connected to terminal board (TODO)
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MCFG_MC2661_ADD("uart1", XTAL_5_0688MHz, wicat_unused_intf)
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MCFG_MC2661_ADD("uart2", XTAL_5_0688MHz, wicat_unused_intf)
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MCFG_MC2661_ADD("uart3", XTAL_5_0688MHz, wicat_unused_intf)
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MCFG_MC2661_ADD("uart4", XTAL_5_0688MHz, wicat_unused_intf)
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MCFG_MC2661_ADD("uart5", XTAL_5_0688MHz, wicat_unused_intf)
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MCFG_MC2661_ADD("uart6", XTAL_5_0688MHz, wicat_unused_intf) // connected to modem port
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MCFG_DEFAULT_LAYOUT(layout_wicat)
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MACHINE_CONFIG_END
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@ -142,12 +264,14 @@ ROM_START( wicat )
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ROM_LOAD ("cpu.8c", 0x00020, 0x0020, CRC(190a55ad) SHA1(de8a847bff8c343d69b853a215e6ee775ef2ef96) )
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ROM_LOAD ("cpu.15c", 0x00040, 0x0020, CRC(ba2dd77d) SHA1(eb693d6d30aa6a9dba61c6c41a75614ed4e9e69a) )
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// System 150 CPU/MU board
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ROM_REGION16_BE(0x2000, "c2", 0)
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ROM_LOAD16_BYTE("boot156.a5", 0x00000, 0x0800, CRC(58510a52) SHA1(d2135b056a04ba830b0ae1cef539e4a9a1b58f82) )
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ROM_LOAD16_BYTE("boot156.a7", 0x00001, 0x0800, CRC(e53999f1) SHA1(9c6c6a3a56b5c16a35e1fe824f37c8ae739ebcb9) )
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ROM_LOAD16_BYTE("wd3_15.b5", 0x01000, 0x0800, CRC(a765899b) SHA1(8427c564029914b7dbc29768ce451604180e390f) )
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ROM_LOAD16_BYTE("wd3_15.b7", 0x01001, 0x0800, CRC(9d986585) SHA1(1ac7579c692f827b121c56dac0a77b15400caba1) )
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// Terminal CPU board (Graphical)
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ROM_REGION16_BE(0x8000, "g1", 0)
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ROM_LOAD16_BYTE("1term0.e", 0x00000, 0x0800, CRC(a9aade37) SHA1(644e9362d5a9523be5c6f39a650b574735dbd4a2) )
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ROM_LOAD16_BYTE("1term0.o", 0x00001, 0x0800, CRC(8026b5b7) SHA1(cb93e0595b321889694cbb87f497d244e6a2d648) )
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@ -184,6 +308,7 @@ ROM_START( wicat )
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ROM_LOAD16_BYTE("2term7.e", 0x07000, 0x0800, CRC(033ea830) SHA1(27c33eea2df812a1a96e2f47ba7993e2ca3675ad) )
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ROM_LOAD16_BYTE("2term7.o", 0x07001, 0x0800, CRC(e157c5d2) SHA1(3cd1ea0fb9df1358e8a358468a4df5e4eaaa86a2) )
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// Terminal Video board
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ROM_REGION(0x1000, "g2char", 0)
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ROM_LOAD ("ascii.chr", 0x00000, 0x0800, CRC(43e26e37) SHA1(f3d5d16040c66f0e827f72a35d4694ca62950949) )
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ROM_LOAD ("apl.chr", 0x00800, 0x0800, CRC(8c6d698e) SHA1(147dd9296fe2efc6140fa148a6edf673c33f9371) )
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