mirror of
https://github.com/holub/mame
synced 2025-06-07 05:13:46 +03:00
last batch of changes to make the https://github.com/mamedev/mame/tree/devcb-no-space branch build. (nw)
This commit is contained in:
parent
6b8cb09ee7
commit
889e65792e
@ -111,7 +111,7 @@ READ8_MEMBER(el2_3c503_device::el2_3c503_loport_r) {
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switch((m_regs.ctrl >> 2) & 3) {
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case 0:
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m_dp8390->dp8390_cs(CLEAR_LINE);
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return m_dp8390->dp8390_r(space, offset, mem_mask);
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return m_dp8390->dp8390_r(offset);
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case 1:
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return m_prom[offset];
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case 2:
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@ -126,7 +126,7 @@ WRITE8_MEMBER(el2_3c503_device::el2_3c503_loport_w) {
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switch((m_regs.ctrl >> 2) & 3) {
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case 0:
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m_dp8390->dp8390_cs(CLEAR_LINE);
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return m_dp8390->dp8390_w(space, offset, data, mem_mask);
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return m_dp8390->dp8390_w(offset, data);
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case 1:
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case 2:
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logerror("3c503: invalid attempt to write to prom\n");
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@ -170,7 +170,7 @@ void mufdc_device::device_reset()
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// FDC INTERFACE
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//**************************************************************************
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READ8_MEMBER( mufdc_device::fdc_input_r )
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uint8_t mufdc_device::fdc_input_r()
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{
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return ~m_config->read();
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}
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@ -53,7 +53,7 @@ protected:
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private:
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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DECLARE_READ8_MEMBER( fdc_input_r );
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uint8_t fdc_input_r();
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DECLARE_WRITE_LINE_MEMBER( fdc_irq_w );
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DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
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@ -42,12 +42,12 @@ void ne1000_device::device_reset() {
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READ8_MEMBER(ne1000_device::ne1000_port_r) {
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if(offset < 16) {
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m_dp8390->dp8390_cs(CLEAR_LINE);
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return m_dp8390->dp8390_r(space, offset, mem_mask);
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return m_dp8390->dp8390_r(offset);
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}
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switch(offset) {
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case 16:
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m_dp8390->dp8390_cs(ASSERT_LINE);
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return m_dp8390->dp8390_r(space, offset, mem_mask);
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return m_dp8390->dp8390_r(offset);
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case 31:
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m_dp8390->dp8390_reset(CLEAR_LINE);
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return 0;
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@ -60,13 +60,13 @@ READ8_MEMBER(ne1000_device::ne1000_port_r) {
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WRITE8_MEMBER(ne1000_device::ne1000_port_w) {
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if(offset < 16) {
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m_dp8390->dp8390_cs(CLEAR_LINE);
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m_dp8390->dp8390_w(space, offset, data, mem_mask);
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m_dp8390->dp8390_w(offset, data);
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return;
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}
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switch(offset) {
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case 16:
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m_dp8390->dp8390_cs(ASSERT_LINE);
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m_dp8390->dp8390_w(space, offset, data, mem_mask);
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m_dp8390->dp8390_w(offset, data);
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return;
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case 31:
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m_dp8390->dp8390_reset(ASSERT_LINE);
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@ -94,7 +94,7 @@ WRITE_LINE_MEMBER(ne1000_device::ne1000_irq_w) {
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}
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}
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READ8_MEMBER(ne1000_device::ne1000_mem_read) {
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uint8_t ne1000_device::ne1000_mem_read(offs_t offset) {
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offset &= ~0xc000; // verify
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if(offset < 16) return m_prom[offset];
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if((offset < (8*1024)) || (offset >= (16*1024))) {
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@ -104,7 +104,7 @@ READ8_MEMBER(ne1000_device::ne1000_mem_read) {
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return m_board_ram[offset - (8*1024)];
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}
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WRITE8_MEMBER(ne1000_device::ne1000_mem_write) {
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void ne1000_device::ne1000_mem_write(offs_t offset, uint8_t data) {
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offset &= ~0xc000; // verify
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if((offset < (8*1024)) || (offset >= (16*1024))) {
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logerror("ne1000: invalid memory write %04X\n", offset);
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@ -28,8 +28,8 @@ protected:
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private:
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void ne1000_irq_w(int state);
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DECLARE_READ8_MEMBER(ne1000_mem_read);
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DECLARE_WRITE8_MEMBER(ne1000_mem_write);
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uint8_t ne1000_mem_read(offs_t offset);
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void ne1000_mem_write(offs_t offset, uint8_t data);
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required_device<dp8390d_device> m_dp8390;
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uint8_t m_irq;
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@ -43,14 +43,14 @@ READ16_MEMBER(ne2000_device::ne2000_port_r) {
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offset <<= 1;
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if(offset < 16) {
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m_dp8390->dp8390_cs(CLEAR_LINE);
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return m_dp8390->dp8390_r(space, offset, 0xff) |
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m_dp8390->dp8390_r(space, offset+1, 0xff) << 8;
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return m_dp8390->dp8390_r(offset) |
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m_dp8390->dp8390_r(offset+1) << 8;
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}
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if(mem_mask == 0xff00) offset++;
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switch(offset) {
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case 16:
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m_dp8390->dp8390_cs(ASSERT_LINE);
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return m_dp8390->dp8390_r(space, offset, mem_mask);
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return m_dp8390->dp8390_r(offset);
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case 31:
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m_dp8390->dp8390_reset(CLEAR_LINE);
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return 0;
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@ -68,15 +68,15 @@ WRITE16_MEMBER(ne2000_device::ne2000_port_w) {
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data >>= 8;
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offset++;
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}
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m_dp8390->dp8390_w(space, offset, data & 0xff, 0xff);
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if(mem_mask == 0xffff) m_dp8390->dp8390_w(space, offset+1, data>>8, 0xff);
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m_dp8390->dp8390_w(offset, data & 0xff);
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if(mem_mask == 0xffff) m_dp8390->dp8390_w(offset+1, data>>8);
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return;
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}
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if(mem_mask == 0xff00) offset++;
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switch(offset) {
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case 16:
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m_dp8390->dp8390_cs(ASSERT_LINE);
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m_dp8390->dp8390_w(space, offset, data, mem_mask);
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m_dp8390->dp8390_w(offset, data);
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return;
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case 31:
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m_dp8390->dp8390_reset(ASSERT_LINE);
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@ -104,7 +104,7 @@ WRITE_LINE_MEMBER(ne2000_device::ne2000_irq_w) {
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}
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}
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READ8_MEMBER(ne2000_device::ne2000_mem_read) {
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uint8_t ne2000_device::ne2000_mem_read(offs_t offset) {
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offset &= ~0x8000;
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if(offset < 32) return m_prom[offset>>1];
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if((offset < (16*1024)) || (offset >= (32*1024))) {
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@ -114,7 +114,7 @@ READ8_MEMBER(ne2000_device::ne2000_mem_read) {
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return m_board_ram[offset - (16*1024)];
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}
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WRITE8_MEMBER(ne2000_device::ne2000_mem_write) {
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void ne2000_device::ne2000_mem_write(offs_t offset, uint8_t data) {
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offset &= ~0x8000;
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if((offset < (16*1024)) || (offset >= (32*1024))) {
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logerror("ne2000: invalid memory write %04X\n", offset);
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@ -26,8 +26,8 @@ protected:
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private:
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void ne2000_irq_w(int state);
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DECLARE_READ8_MEMBER(ne2000_mem_read);
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DECLARE_WRITE8_MEMBER(ne2000_mem_write);
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uint8_t ne2000_mem_read(offs_t offset);
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void ne2000_mem_write(offs_t offset, uint8_t data);
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required_device<dp8390d_device> m_dp8390;
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uint8_t m_irq;
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@ -63,7 +63,7 @@ WRITE8_MEMBER( sb16_lle_device::dac_data_w )
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m_rdac->write(data << 8);
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}
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READ8_MEMBER( sb16_lle_device::p1_r )
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uint8_t sb16_lle_device::p1_r()
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{
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uint8_t ret = 0;
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ret |= m_data_out << 0;
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@ -71,7 +71,7 @@ READ8_MEMBER( sb16_lle_device::p1_r )
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return ret;
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}
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WRITE8_MEMBER( sb16_lle_device::p1_w )
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void sb16_lle_device::p1_w(uint8_t data)
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{
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/* port P1
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* bit0 - output byte ready
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@ -85,12 +85,12 @@ WRITE8_MEMBER( sb16_lle_device::p1_w )
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*/
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}
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READ8_MEMBER( sb16_lle_device::p2_r )
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uint8_t sb16_lle_device::p2_r()
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{
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return 0;
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}
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WRITE8_MEMBER( sb16_lle_device::p2_w )
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void sb16_lle_device::p2_w(uint8_t data)
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{
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/* port P2
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* bit0 -
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@ -45,10 +45,10 @@ private:
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// mcu ports
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DECLARE_READ8_MEMBER( dsp_data_r );
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DECLARE_WRITE8_MEMBER( dsp_data_w );
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DECLARE_READ8_MEMBER( p1_r );
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DECLARE_WRITE8_MEMBER( p1_w );
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DECLARE_READ8_MEMBER( p2_r );
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DECLARE_WRITE8_MEMBER( p2_w );
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uint8_t p1_r();
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void p1_w(uint8_t data);
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uint8_t p2_r();
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void p2_w(uint8_t data);
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DECLARE_WRITE8_MEMBER( rate_w );
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DECLARE_READ8_MEMBER( dma8_r );
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DECLARE_WRITE8_MEMBER( dma8_w );
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@ -27,12 +27,12 @@ WRITE8_MEMBER( stereo_fx_device::dev_dsp_data_w )
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}
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// port 1 is the left DAC but is written and read bitwise during capture
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READ8_MEMBER( stereo_fx_device::p1_r )
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uint8_t stereo_fx_device::p1_r()
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{
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return 0x80;
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}
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READ8_MEMBER( stereo_fx_device::p3_r )
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uint8_t stereo_fx_device::p3_r()
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{
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uint8_t ret = 0;
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@ -43,7 +43,7 @@ READ8_MEMBER( stereo_fx_device::p3_r )
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return ret;
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}
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WRITE8_MEMBER( stereo_fx_device::p3_w )
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void stereo_fx_device::p3_w(uint8_t data)
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{
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m_t1 = (data & 0x20) >> 5;
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}
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// mcu ports
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DECLARE_READ8_MEMBER( dev_dsp_data_r );
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DECLARE_WRITE8_MEMBER( dev_dsp_data_w );
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DECLARE_READ8_MEMBER( p1_r );
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DECLARE_READ8_MEMBER( p3_r );
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DECLARE_WRITE8_MEMBER( p3_w );
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uint8_t p1_r();
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uint8_t p3_r();
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void p3_w(uint8_t data);
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DECLARE_WRITE8_MEMBER( dev_host_irq_w );
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DECLARE_WRITE8_MEMBER( raise_drq_w );
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DECLARE_WRITE8_MEMBER( port20_w );
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@ -118,17 +118,17 @@ WRITE_LINE_MEMBER( wdxt_gen_device::mr_w )
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}
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}
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READ8_MEMBER( wdxt_gen_device::rd322_r )
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uint8_t wdxt_gen_device::rd322_r()
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{
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return 0xff;
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}
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READ8_MEMBER( wdxt_gen_device::ram_r )
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uint8_t wdxt_gen_device::ram_r(offs_t offset)
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{
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return m_ram[offset];
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}
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WRITE8_MEMBER( wdxt_gen_device::ram_w )
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void wdxt_gen_device::ram_w(offs_t offset, uint8_t data)
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{
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m_ram[offset] = data;
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}
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@ -260,7 +260,7 @@ READ_LINE_MEMBER( wdxt_gen_device::wd1015_t1_r )
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// wd1015_p1_r -
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//-------------------------------------------------
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READ8_MEMBER( wdxt_gen_device::wd1015_p1_r )
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uint8_t wdxt_gen_device::wd1015_p1_r()
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{
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/*
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@ -289,7 +289,7 @@ READ8_MEMBER( wdxt_gen_device::wd1015_p1_r )
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// wd1015_p1_w -
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//-------------------------------------------------
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WRITE8_MEMBER( wdxt_gen_device::wd1015_p1_w )
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void wdxt_gen_device::wd1015_p1_w(uint8_t data)
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{
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/*
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@ -316,7 +316,7 @@ WRITE8_MEMBER( wdxt_gen_device::wd1015_p1_w )
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// wd1015_p2_r -
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//-------------------------------------------------
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READ8_MEMBER( wdxt_gen_device::wd1015_p2_r )
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uint8_t wdxt_gen_device::wd1015_p2_r()
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{
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/*
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@ -347,7 +347,7 @@ READ8_MEMBER( wdxt_gen_device::wd1015_p2_r )
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// wd1015_p2_w -
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//-------------------------------------------------
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WRITE8_MEMBER( wdxt_gen_device::wd1015_p2_w )
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void wdxt_gen_device::wd1015_p2_w(uint8_t data)
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{
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/*
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@ -58,14 +58,14 @@ private:
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DECLARE_WRITE_LINE_MEMBER( irq5_w );
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DECLARE_WRITE_LINE_MEMBER( drq3_w );
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DECLARE_WRITE_LINE_MEMBER( mr_w );
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DECLARE_READ8_MEMBER( rd322_r );
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DECLARE_READ8_MEMBER( ram_r );
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DECLARE_WRITE8_MEMBER( ram_w );
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uint8_t rd322_r();
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uint8_t ram_r(offs_t offset);
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void ram_w(offs_t offset, uint8_t data);
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DECLARE_READ_LINE_MEMBER( wd1015_t1_r );
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DECLARE_READ8_MEMBER( wd1015_p1_r );
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DECLARE_WRITE8_MEMBER( wd1015_p1_w );
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DECLARE_READ8_MEMBER( wd1015_p2_r );
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DECLARE_WRITE8_MEMBER( wd1015_p2_w );
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uint8_t wd1015_p1_r();
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void wd1015_p1_w(uint8_t data);
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uint8_t wd1015_p2_r();
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void wd1015_p2_w(uint8_t data);
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void wd1015_io(address_map &map);
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@ -254,7 +254,7 @@ void southbridge_device::device_reset()
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* pic8259 configuration
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*
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*************************************************************/
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READ8_MEMBER( southbridge_device::get_slave_ack )
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uint8_t southbridge_device::get_slave_ack(offs_t offset)
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{
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if (offset==2) // IRQ = 2
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return m_pic8259_slave->acknowledge();
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@ -411,22 +411,22 @@ void southbridge_device::pc_dma_write_word(offs_t offset, uint8_t data)
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}
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READ8_MEMBER( southbridge_device::pc_dma8237_0_dack_r ) { return m_isabus->dack_r(0); }
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READ8_MEMBER( southbridge_device::pc_dma8237_1_dack_r ) { return m_isabus->dack_r(1); }
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READ8_MEMBER( southbridge_device::pc_dma8237_2_dack_r ) { return m_isabus->dack_r(2); }
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READ8_MEMBER( southbridge_device::pc_dma8237_3_dack_r ) { return m_isabus->dack_r(3); }
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READ8_MEMBER( southbridge_device::pc_dma8237_5_dack_r ) { return m_isabus->dack_r(5); }
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READ8_MEMBER( southbridge_device::pc_dma8237_6_dack_r ) { return m_isabus->dack_r(6); }
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READ8_MEMBER( southbridge_device::pc_dma8237_7_dack_r ) { return m_isabus->dack_r(7); }
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uint8_t southbridge_device::pc_dma8237_0_dack_r() { return m_isabus->dack_r(0); }
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uint8_t southbridge_device::pc_dma8237_1_dack_r() { return m_isabus->dack_r(1); }
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uint8_t southbridge_device::pc_dma8237_2_dack_r() { return m_isabus->dack_r(2); }
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uint8_t southbridge_device::pc_dma8237_3_dack_r() { return m_isabus->dack_r(3); }
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uint8_t southbridge_device::pc_dma8237_5_dack_r() { return m_isabus->dack_r(5); }
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uint8_t southbridge_device::pc_dma8237_6_dack_r() { return m_isabus->dack_r(6); }
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uint8_t southbridge_device::pc_dma8237_7_dack_r() { return m_isabus->dack_r(7); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_0_dack_w ){ m_isabus->dack_w(0, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_1_dack_w ){ m_isabus->dack_w(1, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_2_dack_w ){ m_isabus->dack_w(2, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_3_dack_w ){ m_isabus->dack_w(3, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_5_dack_w ){ m_isabus->dack_w(5, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_6_dack_w ){ m_isabus->dack_w(6, data); }
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WRITE8_MEMBER( southbridge_device::pc_dma8237_7_dack_w ){ m_isabus->dack_w(7, data); }
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void southbridge_device::pc_dma8237_0_dack_w(uint8_t data) { m_isabus->dack_w(0, data); }
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void southbridge_device::pc_dma8237_1_dack_w(uint8_t data) { m_isabus->dack_w(1, data); }
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void southbridge_device::pc_dma8237_2_dack_w(uint8_t data) { m_isabus->dack_w(2, data); }
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void southbridge_device::pc_dma8237_3_dack_w(uint8_t data) { m_isabus->dack_w(3, data); }
|
||||
void southbridge_device::pc_dma8237_5_dack_w(uint8_t data) { m_isabus->dack_w(5, data); }
|
||||
void southbridge_device::pc_dma8237_6_dack_w(uint8_t data) { m_isabus->dack_w(6, data); }
|
||||
void southbridge_device::pc_dma8237_7_dack_w(uint8_t data) { m_isabus->dack_w(7, data); }
|
||||
|
||||
WRITE_LINE_MEMBER( southbridge_device::at_dma8237_out_eop )
|
||||
{
|
||||
|
@ -88,25 +88,25 @@ private:
|
||||
DECLARE_READ8_MEMBER(at_portb_r);
|
||||
DECLARE_WRITE8_MEMBER(at_portb_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(iochck_w);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
uint8_t get_slave_ack(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out1_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out2_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_0_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_1_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_2_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_3_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_5_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_6_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_7_dack_r);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_0_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_1_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_2_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_3_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_5_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_6_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_7_dack_w);
|
||||
uint8_t pc_dma8237_0_dack_r();
|
||||
uint8_t pc_dma8237_1_dack_r();
|
||||
uint8_t pc_dma8237_2_dack_r();
|
||||
uint8_t pc_dma8237_3_dack_r();
|
||||
uint8_t pc_dma8237_5_dack_r();
|
||||
uint8_t pc_dma8237_6_dack_r();
|
||||
uint8_t pc_dma8237_7_dack_r();
|
||||
void pc_dma8237_0_dack_w(uint8_t data);
|
||||
void pc_dma8237_1_dack_w(uint8_t data);
|
||||
void pc_dma8237_2_dack_w(uint8_t data);
|
||||
void pc_dma8237_3_dack_w(uint8_t data);
|
||||
void pc_dma8237_5_dack_w(uint8_t data);
|
||||
void pc_dma8237_6_dack_w(uint8_t data);
|
||||
void pc_dma8237_7_dack_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_dma8237_out_eop);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
|
||||
|
@ -180,12 +180,12 @@ READ16_MEMBER( macpds_hyperdrive_device::hyperdrive_r )
|
||||
return m_hdc->read(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( macpds_hyperdrive_device::hdd_w )
|
||||
void macpds_hyperdrive_device::hdd_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// printf("hdd_w: %02x @ %x\n", data, offset);
|
||||
}
|
||||
|
||||
READ8_MEMBER( macpds_hyperdrive_device::hdd_r )
|
||||
uint8_t macpds_hyperdrive_device::hdd_r(offs_t offset)
|
||||
{
|
||||
// printf("hdd_r: @ %x\n", offset);
|
||||
return 0;
|
||||
|
@ -42,8 +42,8 @@ private:
|
||||
DECLARE_READ16_MEMBER(hyperdrive_r);
|
||||
DECLARE_WRITE16_MEMBER(hyperdrive_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(hdd_r);
|
||||
DECLARE_WRITE8_MEMBER(hdd_w);
|
||||
uint8_t hdd_r(offs_t offset);
|
||||
void hdd_w(offs_t offset, uint8_t data);
|
||||
};
|
||||
|
||||
|
||||
|
@ -341,7 +341,7 @@ WRITE_LINE_MEMBER(isbc202_device::co_w)
|
||||
m_cpes[ 3 ]->li_w(state);
|
||||
}
|
||||
|
||||
READ8_MEMBER(isbc202_device::px_r)
|
||||
uint8_t isbc202_device::px_r()
|
||||
{
|
||||
if (BIT(m_px_s1s0 , 0)) {
|
||||
return m_cmd & 7;
|
||||
|
@ -37,7 +37,7 @@ public:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(co_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(px_r);
|
||||
uint8_t px_r();
|
||||
|
||||
protected:
|
||||
// device_t overrides
|
||||
|
@ -145,12 +145,12 @@ WRITE32_MEMBER( nubus_mac8390_device::en_w )
|
||||
if (mem_mask == 0xff000000)
|
||||
{
|
||||
// printf("%02x to 8390 @ %x\n", data>>24, 0xf-offset);
|
||||
m_dp83902->dp8390_w(space, 0xf-offset, data>>24);
|
||||
m_dp83902->dp8390_w(0xf-offset, data>>24);
|
||||
}
|
||||
else if (mem_mask == 0xffff0000)
|
||||
{
|
||||
m_dp83902->dp8390_cs(1);
|
||||
m_dp83902->dp8390_w(space, 0xf-offset, data>>16);
|
||||
m_dp83902->dp8390_w(0xf-offset, data>>16);
|
||||
m_dp83902->dp8390_cs(0);
|
||||
}
|
||||
else
|
||||
@ -163,12 +163,12 @@ READ32_MEMBER( nubus_mac8390_device::en_r )
|
||||
{
|
||||
if (mem_mask == 0xff000000)
|
||||
{
|
||||
return (m_dp83902->dp8390_r(space, 0xf-offset)<<24);
|
||||
return (m_dp83902->dp8390_r(0xf-offset)<<24);
|
||||
}
|
||||
else if (mem_mask == 0xffff0000)
|
||||
{
|
||||
m_dp83902->dp8390_cs(1);
|
||||
return (m_dp83902->dp8390_r(space, 0xf-offset)<<16);
|
||||
return (m_dp83902->dp8390_r(0xf-offset)<<16);
|
||||
m_dp83902->dp8390_cs(0);
|
||||
}
|
||||
else
|
||||
@ -191,13 +191,13 @@ WRITE_LINE_MEMBER( nubus_mac8390_device::dp_irq_w )
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER( nubus_mac8390_device::dp_mem_read )
|
||||
uint8_t nubus_mac8390_device::dp_mem_read(offs_t offset)
|
||||
{
|
||||
// printf("MC3NB: 8390 read RAM @ %x = %02x\n", offset, m_ram[offset]);
|
||||
return m_ram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( nubus_mac8390_device::dp_mem_write )
|
||||
void nubus_mac8390_device::dp_mem_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
// printf("MC3NB: 8390 wrote %02x to RAM @ %x\n", data, offset);
|
||||
m_ram[offset] = data;
|
||||
|
@ -39,8 +39,8 @@ protected:
|
||||
|
||||
private:
|
||||
void dp_irq_w(int state);
|
||||
DECLARE_READ8_MEMBER(dp_mem_read);
|
||||
DECLARE_WRITE8_MEMBER(dp_mem_write);
|
||||
uint8_t dp_mem_read(offs_t offset);
|
||||
void dp_mem_write(offs_t offset, uint8_t data);
|
||||
|
||||
uint8_t m_ram[0x20000];
|
||||
uint8_t m_prom[16];
|
||||
|
@ -344,7 +344,7 @@ WRITE_LINE_MEMBER( ec_1841_keyboard_device::data_write )
|
||||
// bus_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ec_1841_keyboard_device::bus_w )
|
||||
void ec_1841_keyboard_device::bus_w(uint8_t data)
|
||||
{
|
||||
LOGDBG("bus_w %02x\n", data);
|
||||
|
||||
@ -356,7 +356,7 @@ WRITE8_MEMBER( ec_1841_keyboard_device::bus_w )
|
||||
// p1_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ec_1841_keyboard_device::p1_r )
|
||||
uint8_t ec_1841_keyboard_device::p1_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -388,7 +388,7 @@ READ8_MEMBER( ec_1841_keyboard_device::p1_r )
|
||||
// p1_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ec_1841_keyboard_device::p1_w )
|
||||
void ec_1841_keyboard_device::p1_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
@ -412,7 +412,7 @@ WRITE8_MEMBER( ec_1841_keyboard_device::p1_w )
|
||||
// p2_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ec_1841_keyboard_device::p2_w )
|
||||
void ec_1841_keyboard_device::p2_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
|
@ -43,10 +43,10 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER( bus_w );
|
||||
DECLARE_READ8_MEMBER( p1_r );
|
||||
DECLARE_WRITE8_MEMBER( p1_w );
|
||||
DECLARE_WRITE8_MEMBER( p2_w );
|
||||
void bus_w(uint8_t data);
|
||||
uint8_t p1_r();
|
||||
void p1_w(uint8_t data);
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER( t1_r );
|
||||
|
||||
required_device<i8048_device> m_maincpu;
|
||||
|
@ -417,7 +417,7 @@ READ8_MEMBER( iskr_1030_keyboard_device::ram_r )
|
||||
// p1_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( iskr_1030_keyboard_device::p1_r )
|
||||
uint8_t iskr_1030_keyboard_device::p1_r()
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
@ -444,7 +444,7 @@ READ8_MEMBER( iskr_1030_keyboard_device::p1_r )
|
||||
// p2_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( iskr_1030_keyboard_device::p2_w )
|
||||
void iskr_1030_keyboard_device::p2_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
@ -468,7 +468,7 @@ WRITE8_MEMBER( iskr_1030_keyboard_device::p2_w )
|
||||
// p1_w - OK
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( iskr_1030_keyboard_device::p1_w )
|
||||
void iskr_1030_keyboard_device::p1_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
bit description
|
||||
|
@ -44,9 +44,9 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER( p1_r );
|
||||
DECLARE_WRITE8_MEMBER( p1_w );
|
||||
DECLARE_WRITE8_MEMBER( p2_w );
|
||||
uint8_t p1_r();
|
||||
void p1_w(uint8_t data);
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER( t1_r );
|
||||
|
||||
DECLARE_READ8_MEMBER( ram_r );
|
||||
|
@ -585,13 +585,13 @@ WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::internal_data_write )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( pc_kbd_keytronic_pc3270_device::p1_read )
|
||||
uint8_t pc_kbd_keytronic_pc3270_device::p1_read()
|
||||
{
|
||||
return m_p1 & m_p1_data;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::p1_write )
|
||||
void pc_kbd_keytronic_pc3270_device::p1_write(uint8_t data)
|
||||
{
|
||||
if (LOG)
|
||||
logerror("keytronic_pc3270::p1_write(): write %02x\n", data);
|
||||
@ -600,13 +600,13 @@ WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::p1_write )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( pc_kbd_keytronic_pc3270_device::p2_read )
|
||||
uint8_t pc_kbd_keytronic_pc3270_device::p2_read()
|
||||
{
|
||||
return m_p2;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::p2_write )
|
||||
void pc_kbd_keytronic_pc3270_device::p2_write(uint8_t data)
|
||||
{
|
||||
if (LOG)
|
||||
logerror("keytronic_pc3270::p2_write(): write %02x\n", data);
|
||||
@ -615,7 +615,7 @@ WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::p2_write )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( pc_kbd_keytronic_pc3270_device::p3_read )
|
||||
uint8_t pc_kbd_keytronic_pc3270_device::p3_read()
|
||||
{
|
||||
uint8_t data = m_p3;
|
||||
|
||||
@ -628,7 +628,7 @@ READ8_MEMBER( pc_kbd_keytronic_pc3270_device::p3_read )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_keytronic_pc3270_device::p3_write )
|
||||
void pc_kbd_keytronic_pc3270_device::p3_write(uint8_t data)
|
||||
{
|
||||
if (LOG)
|
||||
logerror("keytronic_pc3270::p3_write(): write %02x\n", data);
|
||||
|
@ -49,12 +49,12 @@ protected:
|
||||
|
||||
DECLARE_READ8_MEMBER( internal_data_read );
|
||||
DECLARE_WRITE8_MEMBER( internal_data_write );
|
||||
DECLARE_READ8_MEMBER( p1_read );
|
||||
DECLARE_WRITE8_MEMBER( p1_write );
|
||||
DECLARE_READ8_MEMBER( p2_read );
|
||||
DECLARE_WRITE8_MEMBER( p2_write );
|
||||
DECLARE_READ8_MEMBER( p3_read );
|
||||
DECLARE_WRITE8_MEMBER( p3_write );
|
||||
uint8_t p1_read();
|
||||
void p1_write(uint8_t data);
|
||||
uint8_t p2_read();
|
||||
void p2_write(uint8_t data);
|
||||
uint8_t p3_read();
|
||||
void p3_write(uint8_t data);
|
||||
|
||||
void keytronic_pc3270_io(address_map &map);
|
||||
void keytronic_pc3270_program(address_map &map);
|
||||
|
@ -282,7 +282,7 @@ WRITE_LINE_MEMBER( pc_kbd_microsoft_natural_device::data_write )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( pc_kbd_microsoft_natural_device::p0_read )
|
||||
uint8_t pc_kbd_microsoft_natural_device::p0_read()
|
||||
{
|
||||
uint8_t data = 0xFF;
|
||||
|
||||
@ -341,25 +341,25 @@ READ8_MEMBER( pc_kbd_microsoft_natural_device::p0_read )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_microsoft_natural_device::p0_write )
|
||||
void pc_kbd_microsoft_natural_device::p0_write(uint8_t data)
|
||||
{
|
||||
m_p0 = data;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_microsoft_natural_device::p1_write )
|
||||
void pc_kbd_microsoft_natural_device::p1_write(uint8_t data)
|
||||
{
|
||||
m_p1 = data;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_microsoft_natural_device::p2_write )
|
||||
void pc_kbd_microsoft_natural_device::p2_write(uint8_t data)
|
||||
{
|
||||
m_p2 = data;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( pc_kbd_microsoft_natural_device::p3_read )
|
||||
uint8_t pc_kbd_microsoft_natural_device::p3_read()
|
||||
{
|
||||
uint8_t data = m_p3 & ~0x21;
|
||||
|
||||
@ -373,7 +373,7 @@ READ8_MEMBER( pc_kbd_microsoft_natural_device::p3_read )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( pc_kbd_microsoft_natural_device::p3_write )
|
||||
void pc_kbd_microsoft_natural_device::p3_write(uint8_t data)
|
||||
{
|
||||
if ( m_pc_kbdc )
|
||||
{
|
||||
|
@ -49,12 +49,12 @@ private:
|
||||
uint8_t m_p2;
|
||||
uint8_t m_p3;
|
||||
|
||||
DECLARE_READ8_MEMBER(p0_read);
|
||||
DECLARE_WRITE8_MEMBER(p0_write);
|
||||
DECLARE_WRITE8_MEMBER(p1_write);
|
||||
DECLARE_WRITE8_MEMBER(p2_write);
|
||||
DECLARE_READ8_MEMBER(p3_read);
|
||||
DECLARE_WRITE8_MEMBER(p3_write);
|
||||
uint8_t p0_read();
|
||||
void p0_write(uint8_t data);
|
||||
void p1_write(uint8_t data);
|
||||
void p2_write(uint8_t data);
|
||||
uint8_t p3_read();
|
||||
void p3_write(uint8_t data);
|
||||
};
|
||||
|
||||
|
||||
|
@ -265,7 +265,7 @@ void ibm_pc_83_keyboard_device::device_reset()
|
||||
// bus_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_83_keyboard_device::bus_w )
|
||||
void ibm_pc_83_keyboard_device::bus_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -290,7 +290,7 @@ WRITE8_MEMBER( ibm_pc_83_keyboard_device::bus_w )
|
||||
// p1_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ibm_pc_83_keyboard_device::p1_r )
|
||||
uint8_t ibm_pc_83_keyboard_device::p1_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -320,7 +320,7 @@ READ8_MEMBER( ibm_pc_83_keyboard_device::p1_r )
|
||||
// p2_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_83_keyboard_device::p2_w )
|
||||
void ibm_pc_83_keyboard_device::p2_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
|
@ -45,9 +45,9 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override { };
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER( bus_w );
|
||||
DECLARE_READ8_MEMBER( p1_r );
|
||||
DECLARE_WRITE8_MEMBER( p2_w );
|
||||
void bus_w(uint8_t data);
|
||||
uint8_t p1_r();
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER( t0_r );
|
||||
|
||||
required_device<i8048_device> m_maincpu;
|
||||
|
@ -395,7 +395,7 @@ void ibm_pc_at_84_keyboard_device::device_reset()
|
||||
// bus_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::bus_w )
|
||||
void ibm_pc_at_84_keyboard_device::bus_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -425,7 +425,7 @@ WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::bus_w )
|
||||
// p1_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ibm_pc_at_84_keyboard_device::p1_r )
|
||||
uint8_t ibm_pc_at_84_keyboard_device::p1_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -454,7 +454,7 @@ READ8_MEMBER( ibm_pc_at_84_keyboard_device::p1_r )
|
||||
// p1_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::p1_w )
|
||||
void ibm_pc_at_84_keyboard_device::p1_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -484,7 +484,7 @@ WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::p1_w )
|
||||
// p2_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ibm_pc_at_84_keyboard_device::p2_r )
|
||||
uint8_t ibm_pc_at_84_keyboard_device::p2_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -513,7 +513,7 @@ READ8_MEMBER( ibm_pc_at_84_keyboard_device::p2_r )
|
||||
// p2_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_at_84_keyboard_device::p2_w )
|
||||
void ibm_pc_at_84_keyboard_device::p2_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
|
@ -47,11 +47,11 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override { };
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER( bus_w );
|
||||
DECLARE_READ8_MEMBER( p1_r );
|
||||
DECLARE_WRITE8_MEMBER( p1_w );
|
||||
DECLARE_READ8_MEMBER( p2_r );
|
||||
DECLARE_WRITE8_MEMBER( p2_w );
|
||||
void bus_w(uint8_t data);
|
||||
uint8_t p1_r();
|
||||
void p1_w(uint8_t data);
|
||||
uint8_t p2_r();
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER( t0_r );
|
||||
DECLARE_READ_LINE_MEMBER( t1_r );
|
||||
|
||||
|
@ -293,9 +293,9 @@ WRITE_LINE_MEMBER( ibm_pc_xt_83_keyboard_device::data_write )
|
||||
// bus_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ibm_pc_xt_83_keyboard_device::bus_r )
|
||||
uint8_t ibm_pc_xt_83_keyboard_device::bus_r()
|
||||
{
|
||||
// HACK this should be handled in mcs48.c
|
||||
// HACK this should be handled in mcs48.cpp
|
||||
return m_bus;
|
||||
}
|
||||
|
||||
@ -304,7 +304,7 @@ READ8_MEMBER( ibm_pc_xt_83_keyboard_device::bus_r )
|
||||
// bus_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::bus_w )
|
||||
void ibm_pc_xt_83_keyboard_device::bus_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -352,7 +352,7 @@ WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::bus_w )
|
||||
// p1_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::p1_w )
|
||||
void ibm_pc_xt_83_keyboard_device::p1_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
@ -377,7 +377,7 @@ WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::p1_w )
|
||||
// p2_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ibm_pc_xt_83_keyboard_device::p2_w )
|
||||
void ibm_pc_xt_83_keyboard_device::p2_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
|
@ -44,10 +44,10 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER( bus_r );
|
||||
DECLARE_WRITE8_MEMBER( bus_w );
|
||||
DECLARE_WRITE8_MEMBER( p1_w );
|
||||
DECLARE_WRITE8_MEMBER( p2_w );
|
||||
uint8_t bus_r();
|
||||
void bus_w(uint8_t data);
|
||||
void p1_w(uint8_t data);
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER( t0_r );
|
||||
DECLARE_READ_LINE_MEMBER( t1_r );
|
||||
|
||||
|
@ -235,7 +235,7 @@ bool sega_sk1100_device::is_readable(uint8_t offset)
|
||||
I8255 INTERFACE
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ8_MEMBER( sega_sk1100_device::ppi_pa_r )
|
||||
uint8_t sega_sk1100_device::ppi_pa_r()
|
||||
{
|
||||
/*
|
||||
Signal Description
|
||||
@ -253,7 +253,7 @@ READ8_MEMBER( sega_sk1100_device::ppi_pa_r )
|
||||
return m_pa[m_keylatch]->read();
|
||||
}
|
||||
|
||||
READ8_MEMBER( sega_sk1100_device::ppi_pb_r )
|
||||
uint8_t sega_sk1100_device::ppi_pb_r()
|
||||
{
|
||||
/*
|
||||
Signal Description
|
||||
@ -284,7 +284,7 @@ READ8_MEMBER( sega_sk1100_device::ppi_pb_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( sega_sk1100_device::ppi_pc_w )
|
||||
void sega_sk1100_device::ppi_pc_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
Signal Description
|
||||
|
@ -49,9 +49,9 @@ protected:
|
||||
virtual bool is_readable(uint8_t offset) override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER( ppi_pa_r );
|
||||
DECLARE_READ8_MEMBER( ppi_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( ppi_pc_w );
|
||||
uint8_t ppi_pa_r();
|
||||
uint8_t ppi_pb_r();
|
||||
void ppi_pc_w(uint8_t data);
|
||||
|
||||
required_device<cassette_image_device> m_cassette;
|
||||
required_device<i8255_device> m_ppi;
|
||||
|
@ -14,17 +14,17 @@
|
||||
IMPLEMENTATION
|
||||
***************************************************************************/
|
||||
|
||||
READ8_MEMBER(spc1000_fdd_exp_device::i8255_c_r)
|
||||
uint8_t spc1000_fdd_exp_device::i8255_c_r()
|
||||
{
|
||||
return m_i8255_0_pc >> 4;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(spc1000_fdd_exp_device::i8255_b_w)
|
||||
void spc1000_fdd_exp_device::i8255_b_w(uint8_t data)
|
||||
{
|
||||
m_i8255_portb = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(spc1000_fdd_exp_device::i8255_c_w)
|
||||
void spc1000_fdd_exp_device::i8255_c_w(uint8_t data)
|
||||
{
|
||||
m_i8255_1_pc = data;
|
||||
}
|
||||
|
@ -51,9 +51,9 @@ private:
|
||||
uint8_t m_i8255_1_pc;
|
||||
uint8_t m_i8255_portb;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(i8255_b_w);
|
||||
DECLARE_READ8_MEMBER(i8255_c_r);
|
||||
DECLARE_WRITE8_MEMBER(i8255_c_w);
|
||||
void i8255_b_w(uint8_t data);
|
||||
uint8_t i8255_c_r();
|
||||
void i8255_c_w(uint8_t data);
|
||||
|
||||
DECLARE_READ8_MEMBER(tc_r);
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
|
@ -255,7 +255,7 @@ void spectrum_opus_device::mreq_w(offs_t offset, uint8_t data)
|
||||
m_exp->mreq_w(offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(spectrum_opus_device::pia_out_a)
|
||||
void spectrum_opus_device::pia_out_a(uint8_t data)
|
||||
{
|
||||
floppy_image_device *floppy = nullptr;
|
||||
|
||||
@ -272,7 +272,7 @@ WRITE8_MEMBER(spectrum_opus_device::pia_out_a)
|
||||
m_fdc->dden_w(BIT(data, 5));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(spectrum_opus_device::pia_out_b)
|
||||
void spectrum_opus_device::pia_out_b(uint8_t data)
|
||||
{
|
||||
m_centronics->write_data1(BIT(data, 1));
|
||||
m_centronics->write_data2(BIT(data, 2));
|
||||
|
@ -50,8 +50,8 @@ protected:
|
||||
virtual DECLARE_READ_LINE_MEMBER(romcs) override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(pia_out_a);
|
||||
DECLARE_WRITE8_MEMBER(pia_out_b);
|
||||
void pia_out_a(uint8_t data);
|
||||
void pia_out_b(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(busy_w);
|
||||
|
||||
required_ioport m_joy;
|
||||
|
@ -35,8 +35,8 @@ protected:
|
||||
virtual void register_write(offs_t offset, u8 data) override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(pia_b_w);
|
||||
DECLARE_READ8_MEMBER(pia_cb1_r);
|
||||
void pia_b_w(uint8_t data);
|
||||
uint8_t pia_cb1_r();
|
||||
DECLARE_WRITE_LINE_MEMBER(pia_irq_b);
|
||||
TIMER_CALLBACK_MEMBER(mpt_timer_callback);
|
||||
DECLARE_WRITE_LINE_MEMBER(pia_irqa_w);
|
||||
@ -115,7 +115,7 @@ void ss50_mpt_device::register_write(offs_t offset, u8 data)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(ss50_mpt_device::pia_b_w)
|
||||
void ss50_mpt_device::pia_b_w(uint8_t data)
|
||||
{
|
||||
if (data & 0x80)
|
||||
{
|
||||
@ -171,7 +171,7 @@ WRITE8_MEMBER(ss50_mpt_device::pia_b_w)
|
||||
m_mpt_timer->enable(true);
|
||||
}
|
||||
|
||||
READ8_MEMBER(ss50_mpt_device::pia_cb1_r)
|
||||
uint8_t ss50_mpt_device::pia_cb1_r()
|
||||
{
|
||||
return m_mpt_timer_state;
|
||||
}
|
||||
|
@ -73,10 +73,10 @@ private:
|
||||
uint8_t m_pia_porta;
|
||||
uint8_t m_pia_portb;
|
||||
|
||||
DECLARE_READ8_MEMBER(pia_a_r);
|
||||
DECLARE_READ8_MEMBER(pia_b_r);
|
||||
DECLARE_WRITE8_MEMBER(pia_a_w);
|
||||
DECLARE_WRITE8_MEMBER(pia_b_w);
|
||||
uint8_t pia_a_r();
|
||||
uint8_t pia_b_r();
|
||||
void pia_a_w(uint8_t data);
|
||||
void pia_b_w(uint8_t data);
|
||||
|
||||
};
|
||||
|
||||
@ -123,22 +123,22 @@ void ss50_piaide_device::register_write(offs_t offset, uint8_t data)
|
||||
/******* MC6821 PIA on IDE Board *******/
|
||||
/* Read/Write handlers for pia ide */
|
||||
|
||||
READ8_MEMBER( ss50_piaide_device::pia_a_r )
|
||||
uint8_t ss50_piaide_device::pia_a_r()
|
||||
{
|
||||
return m_pia_porta;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ss50_piaide_device::pia_b_r )
|
||||
uint8_t ss50_piaide_device::pia_b_r()
|
||||
{
|
||||
return m_pia_portb;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ss50_piaide_device::pia_a_w )
|
||||
void ss50_piaide_device::pia_a_w(uint8_t data)
|
||||
{
|
||||
m_pia_porta = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ss50_piaide_device::pia_b_w )
|
||||
void ss50_piaide_device::pia_b_w(uint8_t data)
|
||||
{
|
||||
uint16_t tempidedata;
|
||||
|
||||
|
@ -142,7 +142,7 @@ void tanbus_mpvdu_device::set_inhibit_lines(offs_t offset, int &inhram, int &inh
|
||||
// IMPLEMENTATION
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER(tanbus_mpvdu_device::videoram_r)
|
||||
uint8_t tanbus_mpvdu_device::videoram_r(offs_t offset)
|
||||
{
|
||||
return m_videoram[offset];
|
||||
}
|
||||
|
@ -43,7 +43,7 @@ protected:
|
||||
virtual void set_inhibit_lines(offs_t offset, int &inhram, int &inhrom) override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(videoram_r);
|
||||
uint8_t videoram_r(offs_t offset);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
DECLARE_WRITE_LINE_MEMBER(vsync_changed);
|
||||
|
||||
|
@ -154,7 +154,7 @@ void tanbus_ravdu_device::set_inhibit_lines(offs_t offset, int &inhram, int &inh
|
||||
// IMPLEMENTATION
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER(tanbus_ravdu_device::videoram_r)
|
||||
uint8_t tanbus_ravdu_device::videoram_r(offs_t offset)
|
||||
{
|
||||
return m_videoram[offset & 0x7ff];
|
||||
}
|
||||
|
@ -44,7 +44,7 @@ protected:
|
||||
virtual void set_inhibit_lines(offs_t offset, int &inhram, int &inhrom) override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(videoram_r);
|
||||
uint8_t videoram_r(offs_t offset);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
DECLARE_WRITE_LINE_MEMBER(vsync_changed);
|
||||
|
||||
|
@ -380,19 +380,19 @@ WRITE_LINE_MEMBER(tanbus_tanex_device::bus_irq_w)
|
||||
// VIA callback functions for VIA #0
|
||||
//**************************************************************
|
||||
|
||||
READ8_MEMBER(tanbus_tanex_device::via_0_in_a)
|
||||
uint8_t tanbus_tanex_device::via_0_in_a()
|
||||
{
|
||||
int data = ioport("JOY")->read();
|
||||
LOG("via_0_in_a %02X\n", data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(tanbus_tanex_device::via_0_out_a)
|
||||
void tanbus_tanex_device::via_0_out_a(uint8_t data)
|
||||
{
|
||||
LOG("via_0_out_a %02X\n", data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(tanbus_tanex_device::via_0_out_b)
|
||||
void tanbus_tanex_device::via_0_out_b(uint8_t data)
|
||||
{
|
||||
LOG("via_0_out_b %02X\n", data);
|
||||
/* bit #5 is the replay cassette drive */
|
||||
@ -415,12 +415,12 @@ WRITE_LINE_MEMBER(tanbus_tanex_device::via_0_out_cb2)
|
||||
// VIA callback functions for VIA #1
|
||||
//**************************************************************
|
||||
|
||||
WRITE8_MEMBER(tanbus_tanex_device::via_1_out_a)
|
||||
void tanbus_tanex_device::via_1_out_a(uint8_t data)
|
||||
{
|
||||
LOG("via_1_out_a %02X\n", data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(tanbus_tanex_device::via_1_out_b)
|
||||
void tanbus_tanex_device::via_1_out_b(uint8_t data)
|
||||
{
|
||||
LOG("via_1_out_b %02X\n", data);
|
||||
}
|
||||
|
@ -53,13 +53,13 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(bus_irq_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(bus_so_w);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(read_cassette);
|
||||
DECLARE_READ8_MEMBER(via_0_in_a);
|
||||
DECLARE_WRITE8_MEMBER(via_0_out_a);
|
||||
DECLARE_WRITE8_MEMBER(via_0_out_b);
|
||||
uint8_t via_0_in_a();
|
||||
void via_0_out_a(uint8_t data);
|
||||
void via_0_out_b(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_0_out_ca2);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_0_out_cb2);
|
||||
DECLARE_WRITE8_MEMBER(via_1_out_a);
|
||||
DECLARE_WRITE8_MEMBER(via_1_out_b);
|
||||
void via_1_out_a(uint8_t data);
|
||||
void via_1_out_b(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_1_out_ca2);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_1_out_cb2);
|
||||
|
||||
|
@ -286,7 +286,7 @@ WRITE_LINE_MEMBER( corcomp_fdc_device::clock_in )
|
||||
m_tms9901->phi_line(state);
|
||||
}
|
||||
|
||||
READ8_MEMBER( corcomp_fdc_device::tms9901_input )
|
||||
uint8_t corcomp_fdc_device::tms9901_input(offs_t offset)
|
||||
{
|
||||
// Inputs
|
||||
// INT1: Switch 8
|
||||
|
@ -49,7 +49,7 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_irq_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_hld_w );
|
||||
DECLARE_READ8_MEMBER( tms9901_input );
|
||||
uint8_t tms9901_input(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER( select_dsk );
|
||||
DECLARE_WRITE_LINE_MEMBER( side_select );
|
||||
DECLARE_WRITE_LINE_MEMBER( motor_w );
|
||||
|
@ -34,7 +34,7 @@ WRITE_LINE_MEMBER( vic1112_device::via0_irq_w )
|
||||
m_slot->irq_w(m_via0_irq | m_via1_irq);
|
||||
}
|
||||
|
||||
READ8_MEMBER( vic1112_device::via0_pb_r )
|
||||
uint8_t vic1112_device::via0_pb_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -62,7 +62,7 @@ READ8_MEMBER( vic1112_device::via0_pb_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( vic1112_device::via0_pb_w )
|
||||
void vic1112_device::via0_pb_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
|
||||
|
@ -47,8 +47,8 @@ protected:
|
||||
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER( via0_irq_w );
|
||||
DECLARE_READ8_MEMBER( via0_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( via0_pb_w );
|
||||
uint8_t via0_pb_r();
|
||||
void via0_pb_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER( via1_irq_w );
|
||||
|
||||
required_device<via6522_device> m_via0;
|
||||
|
@ -558,14 +558,14 @@ void vme_fccpu20_device::update_irq_to_maincpu()
|
||||
#define BR8N38400 0x08
|
||||
#define FORCEBUG 0x30
|
||||
|
||||
READ8_MEMBER (vme_fccpu20_device::pita_r)
|
||||
uint8_t vme_fccpu20_device::pita_r()
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
return FORCEBUG | BR7N9600;
|
||||
}
|
||||
|
||||
/* Enabling/Disabling of VME IRQ 1-7 */
|
||||
READ8_MEMBER (vme_fccpu20_device::pitb_r)
|
||||
uint8_t vme_fccpu20_device::pitb_r()
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
return 0xff;
|
||||
@ -573,7 +573,7 @@ READ8_MEMBER (vme_fccpu20_device::pitb_r)
|
||||
|
||||
/* VME board ID bit and bus release software settings (output) (ROR, RAT, RATAR, RATBCLR, RORAT, RORRAT */
|
||||
/* Bit 4 is bus available */
|
||||
READ8_MEMBER (vme_fccpu20_device::pitc_r)
|
||||
uint8_t vme_fccpu20_device::pitc_r()
|
||||
{
|
||||
uint8_t board_id = 0;
|
||||
|
||||
|
@ -60,9 +60,9 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(bim_irq_callback);
|
||||
|
||||
/* PIT callbacks */
|
||||
DECLARE_READ8_MEMBER (pita_r);
|
||||
DECLARE_READ8_MEMBER (pitb_r);
|
||||
DECLARE_READ8_MEMBER (pitc_r);
|
||||
uint8_t pita_r();
|
||||
uint8_t pitb_r();
|
||||
uint8_t pitc_r();
|
||||
|
||||
// Below are duplicated declarations from src/mame/drivers/fccpu20.cpp
|
||||
DECLARE_READ32_MEMBER (bootvect_r);
|
||||
|
@ -449,7 +449,7 @@ WRITE8_MEMBER (vme_fcisio1_card_device::not_implemented_w){
|
||||
}
|
||||
|
||||
// TODO: Get a manual to understand the config options for real
|
||||
READ8_MEMBER (vme_fcisio1_card_device::config_rd){
|
||||
uint8_t vme_fcisio1_card_device::config_rd(){
|
||||
uint8_t ret = 0;
|
||||
LOG("%s\n", FUNCNAME);
|
||||
|
||||
|
@ -28,7 +28,7 @@ protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER (config_rd);
|
||||
uint8_t config_rd();
|
||||
|
||||
DECLARE_READ16_MEMBER (bootvect_r);
|
||||
|
||||
|
@ -406,7 +406,7 @@ WRITE8_MEMBER (vme_fcscsi1_card_device::tcr_w){
|
||||
return;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER (vme_fcscsi1_card_device::led_w){
|
||||
void vme_fcscsi1_card_device::led_w(uint8_t data) {
|
||||
LOG("%s [%02x]\n", FUNCNAME, data);
|
||||
|
||||
m_fdc->dden_w(BIT(data, 7));
|
||||
@ -450,12 +450,12 @@ WRITE_LINE_MEMBER(vme_fcscsi1_card_device::fdc_irq)
|
||||
update_irq_to_maincpu();
|
||||
}
|
||||
|
||||
READ8_MEMBER(vme_fcscsi1_card_device::fdc_read_byte)
|
||||
uint8_t vme_fcscsi1_card_device::fdc_read_byte()
|
||||
{
|
||||
return m_fdc->data_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(vme_fcscsi1_card_device::fdc_write_byte)
|
||||
void vme_fcscsi1_card_device::fdc_write_byte(uint8_t data)
|
||||
{
|
||||
m_fdc->data_w(data & 0xff);
|
||||
}
|
||||
|
@ -40,14 +40,14 @@ private:
|
||||
|
||||
//fdc
|
||||
DECLARE_WRITE_LINE_MEMBER(fdc_irq);
|
||||
DECLARE_READ8_MEMBER(fdc_read_byte);
|
||||
DECLARE_WRITE8_MEMBER(fdc_write_byte);
|
||||
uint8_t fdc_read_byte();
|
||||
void fdc_write_byte(uint8_t data);
|
||||
DECLARE_FLOPPY_FORMATS(floppy_formats);
|
||||
|
||||
DECLARE_READ16_MEMBER (bootvect_r);
|
||||
DECLARE_READ8_MEMBER (tcr_r);
|
||||
DECLARE_WRITE8_MEMBER (tcr_w);
|
||||
DECLARE_WRITE8_MEMBER (led_w);
|
||||
void led_w(uint8_t data);
|
||||
|
||||
/* Dummy driver routines */
|
||||
DECLARE_READ8_MEMBER(not_implemented_r);
|
||||
|
@ -63,15 +63,15 @@ READ16_MEMBER(x68k_neptune_device::x68k_neptune_port_r)
|
||||
if(offset < 0x100+16)
|
||||
{
|
||||
m_dp8390->dp8390_cs(CLEAR_LINE);
|
||||
return (m_dp8390->dp8390_r(space, offset, 0xff) << 8)|
|
||||
m_dp8390->dp8390_r(space, offset+1, 0xff);
|
||||
return (m_dp8390->dp8390_r(offset) << 8)|
|
||||
m_dp8390->dp8390_r(offset+1);
|
||||
}
|
||||
//if(mem_mask == 0x00ff) offset++;
|
||||
switch(offset)
|
||||
{
|
||||
case 0x100+16:
|
||||
m_dp8390->dp8390_cs(ASSERT_LINE);
|
||||
data = m_dp8390->dp8390_r(space, offset, mem_mask);
|
||||
data = m_dp8390->dp8390_r(offset);
|
||||
data = ((data & 0x00ff) << 8) | ((data & 0xff00) >> 8);
|
||||
return data;
|
||||
case 0x100+31:
|
||||
@ -95,8 +95,8 @@ WRITE16_MEMBER(x68k_neptune_device::x68k_neptune_port_w)
|
||||
data <<= 8;
|
||||
offset++;
|
||||
}
|
||||
m_dp8390->dp8390_w(space, offset, data>>8, 0xff);
|
||||
if(mem_mask == 0xffff) m_dp8390->dp8390_w(space, offset+1, data & 0xff, 0xff);
|
||||
m_dp8390->dp8390_w(offset, data>>8);
|
||||
if(mem_mask == 0xffff) m_dp8390->dp8390_w(offset+1, data & 0xff);
|
||||
return;
|
||||
}
|
||||
//if(mem_mask == 0x00ff) offset++;
|
||||
@ -105,7 +105,7 @@ WRITE16_MEMBER(x68k_neptune_device::x68k_neptune_port_w)
|
||||
case 0x100+16:
|
||||
m_dp8390->dp8390_cs(ASSERT_LINE);
|
||||
data = ((data & 0x00ff) << 8) | ((data & 0xff00) >> 8);
|
||||
m_dp8390->dp8390_w(space, offset, data, mem_mask);
|
||||
m_dp8390->dp8390_w(offset, data);
|
||||
return;
|
||||
case 0x100+31:
|
||||
m_dp8390->dp8390_reset(ASSERT_LINE);
|
||||
@ -116,7 +116,7 @@ WRITE16_MEMBER(x68k_neptune_device::x68k_neptune_port_w)
|
||||
return;
|
||||
}
|
||||
|
||||
READ8_MEMBER(x68k_neptune_device::x68k_neptune_mem_read)
|
||||
uint8_t x68k_neptune_device::x68k_neptune_mem_read(offs_t offset)
|
||||
{
|
||||
if(offset < 32) return m_prom[offset>>1];
|
||||
if((offset < (16*1024)) || (offset >= (32*1024)))
|
||||
@ -127,7 +127,7 @@ READ8_MEMBER(x68k_neptune_device::x68k_neptune_mem_read)
|
||||
return m_board_ram[offset - (16*1024)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(x68k_neptune_device::x68k_neptune_mem_write)
|
||||
void x68k_neptune_device::x68k_neptune_mem_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if((offset < (16*1024)) || (offset >= (32*1024)))
|
||||
{
|
||||
|
@ -40,8 +40,8 @@ protected:
|
||||
virtual uint8_t iack2() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(x68k_neptune_mem_read);
|
||||
DECLARE_WRITE8_MEMBER(x68k_neptune_mem_write);
|
||||
uint8_t x68k_neptune_mem_read(offs_t offset);
|
||||
void x68k_neptune_mem_write(offs_t offset, uint8_t data);
|
||||
void x68k_neptune_irq_w(int state);
|
||||
|
||||
x68k_expansion_slot_device *m_slot;
|
||||
|
@ -2,7 +2,7 @@
|
||||
// copyright-holders:Philip Bennett
|
||||
/***************************************************************************
|
||||
|
||||
esrip.c
|
||||
esrip.cpp
|
||||
|
||||
Implementation of the Entertainment Sciences
|
||||
AM29116-based Real Time Image Processor
|
||||
@ -1769,7 +1769,7 @@ void esrip_device::execute_run()
|
||||
uint8_t status;
|
||||
|
||||
/* I think we can get away with placing this outside of the loop */
|
||||
status = m_status_in(*m_program, 0);
|
||||
status = m_status_in();
|
||||
|
||||
/* Core execution loop */
|
||||
do
|
||||
@ -1802,7 +1802,7 @@ void esrip_device::execute_run()
|
||||
|
||||
/* FDT RAM: /Enable, Direction and /RAM OE */
|
||||
else if (!bl44 && !_BIT(m_l2, 3) && bl46)
|
||||
y_bus = m_fdt_r(*m_program, m_fdt_cnt, 0xffff);
|
||||
y_bus = m_fdt_r(m_fdt_cnt);
|
||||
|
||||
/* IPT RAM: /Enable and /READ */
|
||||
else if (!_BIT(m_l2, 6) && !_BIT(m_l4, 5))
|
||||
@ -1829,7 +1829,7 @@ void esrip_device::execute_run()
|
||||
|
||||
/* FDT RAM */
|
||||
if (!bl44)
|
||||
x_bus = m_fdt_r(*m_program, m_fdt_cnt, 0xffff);
|
||||
x_bus = m_fdt_r(m_fdt_cnt);
|
||||
|
||||
/* Buffer is enabled - write direction */
|
||||
else if (!BIT(m_l2, 3) && !bl46)
|
||||
@ -1854,7 +1854,7 @@ void esrip_device::execute_run()
|
||||
|
||||
/* Write FDT RAM: /Enable, Direction and WRITE */
|
||||
if (!BIT(m_l2, 3) && !bl46 && !BIT(m_l4, 3))
|
||||
m_fdt_w(*m_program, m_fdt_cnt, x_bus, 0xffff);
|
||||
m_fdt_w(m_fdt_cnt, x_bus);
|
||||
|
||||
/* Write IPT RAM: /Enable and /WR */
|
||||
if (!BIT(m_l2, 7) && !BIT(m_l4, 5))
|
||||
|
@ -299,7 +299,7 @@ READ8_MEMBER(m6500_1_device::read_port)
|
||||
if (!machine().side_effects_disabled() && m_port_in_cb[offset])
|
||||
{
|
||||
u8 const prev(m_port_in[offset]);
|
||||
m_port_in[offset] = m_port_in_cb[offset](space);
|
||||
m_port_in[offset] = m_port_in_cb[offset]();
|
||||
if (!offset)
|
||||
{
|
||||
u8 const diff((prev ^ m_port_in[0]) & m_port_buf[0]);
|
||||
@ -318,12 +318,12 @@ WRITE8_MEMBER(m6500_1_device::write_port)
|
||||
{
|
||||
u8 const prev(m_port_in[offset] & m_port_buf[offset]);
|
||||
if (m_port_buf[offset] != data)
|
||||
m_port_out_cb[offset](space, m_port_buf[offset] = data);
|
||||
m_port_out_cb[offset](m_port_buf[offset] = data);
|
||||
|
||||
if (!offset)
|
||||
{
|
||||
if (!machine().side_effects_disabled() && m_port_in_cb[0])
|
||||
m_port_in[0] = m_port_in_cb[0](space);
|
||||
m_port_in[0] = m_port_in_cb[0]();
|
||||
u8 const effective(m_port_in[0] & data);
|
||||
u8 const diff(prev ^ effective);
|
||||
if (BIT(diff, 0) && BIT(effective, 0))
|
||||
|
@ -70,7 +70,7 @@ WRITE_LINE_MEMBER(n2a03_device::apu_irq)
|
||||
set_input_line(N2A03_APU_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
READ8_MEMBER(n2a03_device::apu_read_mem)
|
||||
uint8_t n2a03_device::apu_read_mem(offs_t offset)
|
||||
{
|
||||
return mintf->program->read_byte(offset);
|
||||
}
|
||||
|
@ -48,7 +48,7 @@ protected:
|
||||
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER(apu_irq);
|
||||
DECLARE_READ8_MEMBER(apu_read_mem);
|
||||
uint8_t apu_read_mem(offs_t offset);
|
||||
|
||||
};
|
||||
|
||||
|
@ -285,7 +285,7 @@ template <std::size_t N> READ8_MEMBER(m6805_hmos_device::port_r)
|
||||
{
|
||||
if (!m_port_cb_r[N].isnull())
|
||||
{
|
||||
u8 const newval(m_port_cb_r[N](space, 0, ~m_port_ddr[N] & ~m_port_mask[N]) & ~m_port_mask[N]);
|
||||
u8 const newval(m_port_cb_r[N](0, ~m_port_ddr[N] & ~m_port_mask[N]) & ~m_port_mask[N]);
|
||||
if (newval != m_port_input[N])
|
||||
{
|
||||
LOGIOPORT("read PORT%c: new input = %02X & %02X (was %02X)\n",
|
||||
@ -322,7 +322,7 @@ template <std::size_t N> void m6805_hmos_device::port_cb_w()
|
||||
{
|
||||
u8 const data(m_port_open_drain[N] ? m_port_latch[N] | ~m_port_ddr[N] : m_port_latch[N]);
|
||||
u8 const mask(m_port_open_drain[N] ? (~m_port_latch[N] & m_port_ddr[N]) : m_port_ddr[N]);
|
||||
m_port_cb_w[N](space(AS_PROGRAM), 0, data, mask);
|
||||
m_port_cb_w[N](0, data, mask);
|
||||
}
|
||||
|
||||
READ8_MEMBER(m68705_device::pcr_r)
|
||||
|
@ -200,7 +200,7 @@ READ8_MEMBER(m68hc05_device::port_read)
|
||||
offset &= PORT_COUNT - 1;
|
||||
if (!machine().side_effects_disabled() && !m_port_cb_r[offset].isnull())
|
||||
{
|
||||
u8 const newval(m_port_cb_r[offset](space, 0, ~m_port_ddr[offset] & m_port_bits[offset]) & m_port_bits[offset]);
|
||||
u8 const newval(m_port_cb_r[offset](0, ~m_port_ddr[offset] & m_port_bits[offset]) & m_port_bits[offset]);
|
||||
u8 const diff(newval ^ m_port_input[offset]);
|
||||
if (diff)
|
||||
{
|
||||
@ -226,7 +226,7 @@ WRITE8_MEMBER(m68hc05_device::port_latch_w)
|
||||
}
|
||||
m_port_latch[offset] = data;
|
||||
if (diff & m_port_ddr[offset])
|
||||
m_port_cb_w[offset](space, 0, port_value(offset), m_port_ddr[offset]);
|
||||
m_port_cb_w[offset](0, port_value(offset), m_port_ddr[offset]);
|
||||
}
|
||||
|
||||
READ8_MEMBER(m68hc05_device::port_ddr_r)
|
||||
@ -247,7 +247,7 @@ WRITE8_MEMBER(m68hc05_device::port_ddr_w)
|
||||
{
|
||||
if (!m_port_cb_r[offset].isnull())
|
||||
{
|
||||
u8 const newval(m_port_cb_r[offset](space, 0, ~m_port_ddr[offset] & m_port_bits[offset]) & m_port_bits[offset]);
|
||||
u8 const newval(m_port_cb_r[offset](0, ~m_port_ddr[offset] & m_port_bits[offset]) & m_port_bits[offset]);
|
||||
u8 const diff(newval ^ m_port_input[offset]);
|
||||
if (diff)
|
||||
{
|
||||
@ -258,7 +258,7 @@ WRITE8_MEMBER(m68hc05_device::port_ddr_w)
|
||||
}
|
||||
update_port_irq();
|
||||
}
|
||||
m_port_cb_w[offset](space, 0, port_value(offset), m_port_ddr[offset]);
|
||||
m_port_cb_w[offset](0, port_value(offset), m_port_ddr[offset]);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1000,7 +1000,7 @@ void mcs51_cpu_device::transmit_receive(int source)
|
||||
m_uart.bits_to_send--;
|
||||
if(m_uart.bits_to_send == 0) {
|
||||
//Call the callback function
|
||||
m_serial_tx_cb(*m_io, 0, m_uart.data_out, 0xff);
|
||||
m_serial_tx_cb(0, m_uart.data_out, 0xff);
|
||||
//Set Interrupt Flag
|
||||
SET_TI(1);
|
||||
}
|
||||
@ -1018,7 +1018,7 @@ void mcs51_cpu_device::transmit_receive(int source)
|
||||
{
|
||||
int data = 0;
|
||||
//Call our callball function to retrieve the data
|
||||
data = m_serial_rx_cb(*m_io, 0, 0xff);
|
||||
data = m_serial_rx_cb(0, 0xff);
|
||||
LOG(("RX Deliver %d\n", data));
|
||||
SET_SBUF(data);
|
||||
//Flag the IRQ
|
||||
|
@ -3403,32 +3403,32 @@ void psxcpu_device::setcp3cr( int reg, uint32_t value )
|
||||
|
||||
READ32_MEMBER( psxcpu_device::gpu_r )
|
||||
{
|
||||
return m_gpu_read_handler( space, offset, mem_mask );
|
||||
return m_gpu_read_handler( offset, mem_mask );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( psxcpu_device::gpu_w )
|
||||
{
|
||||
m_gpu_write_handler( space, offset, data, mem_mask );
|
||||
m_gpu_write_handler( offset, data, mem_mask );
|
||||
}
|
||||
|
||||
READ16_MEMBER( psxcpu_device::spu_r )
|
||||
{
|
||||
return m_spu_read_handler( space, offset, mem_mask );
|
||||
return m_spu_read_handler( offset, mem_mask );
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( psxcpu_device::spu_w )
|
||||
{
|
||||
m_spu_write_handler( space, offset, data, mem_mask );
|
||||
m_spu_write_handler( offset, data, mem_mask );
|
||||
}
|
||||
|
||||
READ8_MEMBER( psxcpu_device::cd_r )
|
||||
{
|
||||
return m_cd_read_handler( space, offset, mem_mask );
|
||||
return m_cd_read_handler( offset, mem_mask );
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( psxcpu_device::cd_w )
|
||||
{
|
||||
m_cd_write_handler( space, offset, data, mem_mask );
|
||||
m_cd_write_handler( offset, data, mem_mask );
|
||||
}
|
||||
|
||||
void psxcpu_device::set_disable_rom_berr(bool mode)
|
||||
|
@ -53,8 +53,8 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(m68307_duart_irq_handler);
|
||||
DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { m_write_a_tx(state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { m_write_b_tx(state); }
|
||||
DECLARE_READ8_MEMBER(m68307_duart_input_r) { return m_read_inport(); }
|
||||
DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { m_write_outport(data); }
|
||||
uint8_t m68307_duart_input_r() { return m_read_inport(); }
|
||||
void m68307_duart_output_w(uint8_t data) { m_write_outport(data); }
|
||||
|
||||
void init16_m68307(address_space &space);
|
||||
|
||||
|
@ -180,7 +180,7 @@ WRITE_LINE_MEMBER(dp8390_device::dp8390_reset) {
|
||||
if(!state) device_reset();
|
||||
}
|
||||
|
||||
READ16_MEMBER(dp8390_device::dp8390_r) {
|
||||
uint16_t dp8390_device::dp8390_r(offs_t offset) {
|
||||
uint16_t data;
|
||||
if(m_cs) {
|
||||
uint32_t high16 = (m_regs.dcr & 4)?m_regs.rsar<<16:0;
|
||||
@ -350,7 +350,7 @@ READ16_MEMBER(dp8390_device::dp8390_r) {
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(dp8390_device::dp8390_w) {
|
||||
void dp8390_device::dp8390_w(offs_t offset, uint16_t data) {
|
||||
if(m_cs) {
|
||||
uint32_t high16 = (m_regs.dcr & 4)?m_regs.rsar<<16:0;
|
||||
if(m_regs.dcr & 1) {
|
||||
|
@ -16,8 +16,8 @@ public:
|
||||
auto mem_read_callback() { return m_mem_read_cb.bind(); }
|
||||
auto mem_write_callback() { return m_mem_write_cb.bind(); }
|
||||
|
||||
DECLARE_WRITE16_MEMBER( dp8390_w );
|
||||
DECLARE_READ16_MEMBER( dp8390_r );
|
||||
void dp8390_w(offs_t offset, uint16_t data);
|
||||
uint16_t dp8390_r(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER( dp8390_cs );
|
||||
DECLARE_WRITE_LINE_MEMBER( dp8390_reset );
|
||||
void recv_cb(uint8_t *buf, int len) override;
|
||||
|
@ -103,9 +103,9 @@ READ16_MEMBER( gayle_device::gayle_r )
|
||||
if (!BIT(offset, 14))
|
||||
{
|
||||
if (BIT(offset, 13))
|
||||
data = m_cs0_read(space, (offset >> 2) & 0x07, mem_mask);
|
||||
data = m_cs0_read((offset >> 2) & 0x07, mem_mask);
|
||||
else
|
||||
data = m_cs1_read(space, (offset >> 2) & 0x07, mem_mask);
|
||||
data = m_cs1_read((offset >> 2) & 0x07, mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
@ -153,9 +153,9 @@ WRITE16_MEMBER( gayle_device::gayle_w )
|
||||
if (!BIT(offset, 14))
|
||||
{
|
||||
if (BIT(offset, 13))
|
||||
m_cs0_write(space, (offset >> 2) & 0x07, data, mem_mask);
|
||||
m_cs0_write((offset >> 2) & 0x07, data, mem_mask);
|
||||
else
|
||||
m_cs1_write(space, (offset >> 2) & 0x07, data, mem_mask);
|
||||
m_cs1_write((offset >> 2) & 0x07, data, mem_mask);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -492,7 +492,7 @@ void i82371sb_isa_device::map_extra(uint64_t memory_window_start, uint64_t memor
|
||||
|
||||
|
||||
// Southbridge
|
||||
READ8_MEMBER( i82371sb_isa_device::get_slave_ack )
|
||||
uint8_t i82371sb_isa_device::get_slave_ack(offs_t offset)
|
||||
{
|
||||
if (offset==2) // IRQ = 2
|
||||
return m_pic8259_slave->acknowledge();
|
||||
@ -582,7 +582,7 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dma_hrq_changed )
|
||||
m_dma8237_2->hack_w( state );
|
||||
}
|
||||
|
||||
READ8_MEMBER(i82371sb_isa_device::pc_dma_read_byte)
|
||||
uint8_t i82371sb_isa_device::pc_dma_read_byte(offs_t offset)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -595,7 +595,7 @@ READ8_MEMBER(i82371sb_isa_device::pc_dma_read_byte)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(i82371sb_isa_device::pc_dma_write_byte)
|
||||
void i82371sb_isa_device::pc_dma_write_byte(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -606,7 +606,7 @@ WRITE8_MEMBER(i82371sb_isa_device::pc_dma_write_byte)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(i82371sb_isa_device::pc_dma_read_word)
|
||||
uint8_t i82371sb_isa_device::pc_dma_read_word(offs_t offset)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -621,7 +621,7 @@ READ8_MEMBER(i82371sb_isa_device::pc_dma_read_word)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(i82371sb_isa_device::pc_dma_write_word)
|
||||
void i82371sb_isa_device::pc_dma_write_word(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -632,22 +632,22 @@ WRITE8_MEMBER(i82371sb_isa_device::pc_dma_write_word)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_0_dack_r ) { return m_isabus->dack_r(0); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_1_dack_r ) { return m_isabus->dack_r(1); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_2_dack_r ) { return m_isabus->dack_r(2); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_3_dack_r ) { return m_isabus->dack_r(3); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_5_dack_r ) { return m_isabus->dack_r(5); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_6_dack_r ) { return m_isabus->dack_r(6); }
|
||||
READ8_MEMBER( i82371sb_isa_device::pc_dma8237_7_dack_r ) { return m_isabus->dack_r(7); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_0_dack_r() { return m_isabus->dack_r(0); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_1_dack_r() { return m_isabus->dack_r(1); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_2_dack_r() { return m_isabus->dack_r(2); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_3_dack_r() { return m_isabus->dack_r(3); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_5_dack_r() { return m_isabus->dack_r(5); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_6_dack_r() { return m_isabus->dack_r(6); }
|
||||
uint8_t i82371sb_isa_device::pc_dma8237_7_dack_r() { return m_isabus->dack_r(7); }
|
||||
|
||||
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_0_dack_w ) { m_isabus->dack_w(0, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_1_dack_w ) { m_isabus->dack_w(1, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_2_dack_w ) { m_isabus->dack_w(2, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_3_dack_w ) { m_isabus->dack_w(3, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_5_dack_w ) { m_isabus->dack_w(5, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_6_dack_w ) { m_isabus->dack_w(6, data); }
|
||||
WRITE8_MEMBER( i82371sb_isa_device::pc_dma8237_7_dack_w ) { m_isabus->dack_w(7, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_0_dack_w(uint8_t data) { m_isabus->dack_w(0, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_1_dack_w(uint8_t data) { m_isabus->dack_w(1, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_2_dack_w(uint8_t data) { m_isabus->dack_w(2, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_3_dack_w(uint8_t data) { m_isabus->dack_w(3, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_5_dack_w(uint8_t data) { m_isabus->dack_w(5, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_6_dack_w(uint8_t data) { m_isabus->dack_w(6, data); }
|
||||
void i82371sb_isa_device::pc_dma8237_7_dack_w(uint8_t data) { m_isabus->dack_w(7, data); }
|
||||
|
||||
WRITE_LINE_MEMBER( i82371sb_isa_device::at_dma8237_out_eop )
|
||||
{
|
||||
|
@ -71,20 +71,20 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out1_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out2_changed);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_0_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_1_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_2_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_3_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_5_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_6_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_7_dack_r);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_0_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_1_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_2_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_3_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_5_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_6_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_7_dack_w);
|
||||
uint8_t pc_dma8237_0_dack_r();
|
||||
uint8_t pc_dma8237_1_dack_r();
|
||||
uint8_t pc_dma8237_2_dack_r();
|
||||
uint8_t pc_dma8237_3_dack_r();
|
||||
uint8_t pc_dma8237_5_dack_r();
|
||||
uint8_t pc_dma8237_6_dack_r();
|
||||
uint8_t pc_dma8237_7_dack_r();
|
||||
void pc_dma8237_0_dack_w(uint8_t data);
|
||||
void pc_dma8237_1_dack_w(uint8_t data);
|
||||
void pc_dma8237_2_dack_w(uint8_t data);
|
||||
void pc_dma8237_3_dack_w(uint8_t data);
|
||||
void pc_dma8237_5_dack_w(uint8_t data);
|
||||
void pc_dma8237_6_dack_w(uint8_t data);
|
||||
void pc_dma8237_7_dack_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack2_w);
|
||||
@ -95,11 +95,11 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack7_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_dma8237_out_eop);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
|
||||
DECLARE_READ8_MEMBER(pc_dma_read_byte);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma_write_byte);
|
||||
DECLARE_READ8_MEMBER(pc_dma_read_word);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma_write_word);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
uint8_t pc_dma_read_byte(offs_t offset);
|
||||
void pc_dma_write_byte(offs_t offset, uint8_t data);
|
||||
uint8_t pc_dma_read_word(offs_t offset);
|
||||
void pc_dma_write_word(offs_t offset,uint8_t data);
|
||||
uint8_t get_slave_ack(offs_t offset);
|
||||
|
||||
void internal_io_map(address_map &map);
|
||||
|
||||
|
@ -451,7 +451,7 @@ INPUT_PORTS_START( ie15 )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
WRITE16_MEMBER( ie15_device::kbd_put )
|
||||
void ie15_device::kbd_put(uint16_t data)
|
||||
{
|
||||
DBG_LOG(2,"keyboard",("W %02X<-%02X '%c' %02X (%c)\n", m_kb_data, data, 'x' /* data < 0x20 ? ' ' : (data & 255) */,
|
||||
m_kb_flag, m_kb_flag ? 'n' : 'y'));
|
||||
|
@ -75,7 +75,7 @@ private:
|
||||
|
||||
void ie15core(machine_config &config);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(kbd_put);
|
||||
void kbd_put(uint16_t data);
|
||||
DECLARE_WRITE8_MEMBER(mem_w);
|
||||
DECLARE_READ8_MEMBER(mem_r);
|
||||
DECLARE_WRITE8_MEMBER(mem_addr_lo_w);
|
||||
|
@ -669,19 +669,19 @@ READ32_MEMBER(pxa255_periphs_device::gpio_r)
|
||||
{
|
||||
case PXA255_GPLR0:
|
||||
{
|
||||
const uint32_t value = (m_gpio_regs.gplr0 & m_gpio_regs.gpdr0) | m_gpio0_r(space, 0, ~m_gpio_regs.gpdr0);
|
||||
const uint32_t value = (m_gpio_regs.gplr0 & m_gpio_regs.gpdr0) | m_gpio0_r(0, ~m_gpio_regs.gpdr0);
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 0: %08x & %08x\n", m_gpio_regs.gplr0, mem_mask);
|
||||
return value;
|
||||
}
|
||||
case PXA255_GPLR1:
|
||||
{
|
||||
const uint32_t value = (m_gpio_regs.gplr1 & m_gpio_regs.gpdr1) | m_gpio1_r(space, 0, ~m_gpio_regs.gpdr1);
|
||||
const uint32_t value = (m_gpio_regs.gplr1 & m_gpio_regs.gpdr1) | m_gpio1_r(0, ~m_gpio_regs.gpdr1);
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 1: %08x & %08x\n", m_gpio_regs.gplr1, mem_mask);
|
||||
return value;
|
||||
}
|
||||
case PXA255_GPLR2:
|
||||
{
|
||||
const uint32_t value = (m_gpio_regs.gplr2 & m_gpio_regs.gpdr2) | m_gpio2_r(space, 0, ~m_gpio_regs.gpdr2);
|
||||
const uint32_t value = (m_gpio_regs.gplr2 & m_gpio_regs.gpdr2) | m_gpio2_r(0, ~m_gpio_regs.gpdr2);
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 2: %08x & %08x\n", m_gpio_regs.gplr2, mem_mask);
|
||||
return value;
|
||||
}
|
||||
@ -792,32 +792,32 @@ WRITE32_MEMBER(pxa255_periphs_device::gpio_w)
|
||||
case PXA255_GPSR0:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 0: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr0 |= data & m_gpio_regs.gpdr0;
|
||||
m_gpio0_w(space, 0, data, m_gpio_regs.gpdr0);
|
||||
m_gpio0_w(0, data, m_gpio_regs.gpdr0);
|
||||
break;
|
||||
case PXA255_GPSR1:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 1: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr1 |= data & m_gpio_regs.gpdr1;
|
||||
m_gpio1_w(space, 0, data, m_gpio_regs.gpdr1);
|
||||
m_gpio1_w(0, data, m_gpio_regs.gpdr1);
|
||||
break;
|
||||
case PXA255_GPSR2:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 2: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr2 |= data & m_gpio_regs.gpdr2;
|
||||
m_gpio2_w(space, 0, data, m_gpio_regs.gpdr2);
|
||||
m_gpio2_w(0, data, m_gpio_regs.gpdr2);
|
||||
break;
|
||||
case PXA255_GPCR0:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 0: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr0 &= ~(data & m_gpio_regs.gpdr0);
|
||||
m_gpio0_w(space, 0, data, m_gpio_regs.gpdr0);
|
||||
m_gpio0_w(0, data, m_gpio_regs.gpdr0);
|
||||
break;
|
||||
case PXA255_GPCR1:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 1: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr1 &= ~(data & m_gpio_regs.gpdr1);
|
||||
m_gpio1_w(space, 0, data, m_gpio_regs.gpdr1);
|
||||
m_gpio1_w(0, data, m_gpio_regs.gpdr1);
|
||||
break;
|
||||
case PXA255_GPCR2:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 2: %08x & %08x\n", data, mem_mask);
|
||||
m_gpio_regs.gpsr2 &= ~(data & m_gpio_regs.gpdr2);
|
||||
m_gpio2_w(space, 0, data, m_gpio_regs.gpdr2);
|
||||
m_gpio2_w(0, data, m_gpio_regs.gpdr2);
|
||||
break;
|
||||
case PXA255_GRER0:
|
||||
LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Rising Edge Detect Enable Register 0: %08x & %08x\n", data, mem_mask);
|
||||
|
@ -157,7 +157,7 @@ sega_scu_device::sega_scu_device(const machine_config &mconfig, const char *tag,
|
||||
// configuration addiitons
|
||||
//-------------------------------------------------
|
||||
|
||||
READ16_MEMBER(sega_scu_device::scudsp_dma_r)
|
||||
uint16_t sega_scu_device::scudsp_dma_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
//address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
offs_t addr = offset;
|
||||
@ -168,7 +168,7 @@ READ16_MEMBER(sega_scu_device::scudsp_dma_r)
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER(sega_scu_device::scudsp_dma_w)
|
||||
void sega_scu_device::scudsp_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
//address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
offs_t addr = offset;
|
||||
|
@ -110,8 +110,8 @@ private:
|
||||
void dma_start_factor_ack(uint8_t event);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(scudsp_end_w);
|
||||
DECLARE_READ16_MEMBER(scudsp_dma_r);
|
||||
DECLARE_WRITE16_MEMBER(scudsp_dma_w);
|
||||
uint16_t scudsp_dma_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void scudsp_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
// DMA
|
||||
DECLARE_READ32_MEMBER(dma_lv0_r);
|
||||
|
@ -327,7 +327,7 @@ void sis85c496_host_device::map_extra(uint64_t memory_window_start, uint64_t mem
|
||||
}
|
||||
|
||||
// Southbridge
|
||||
READ8_MEMBER( sis85c496_host_device::get_slave_ack )
|
||||
uint8_t sis85c496_host_device::get_slave_ack(offs_t offset)
|
||||
{
|
||||
if (offset==2) // IRQ = 2
|
||||
return m_pic8259_slave->acknowledge();
|
||||
@ -417,7 +417,7 @@ WRITE_LINE_MEMBER( sis85c496_host_device::pc_dma_hrq_changed )
|
||||
m_dma8237_2->hack_w( state );
|
||||
}
|
||||
|
||||
READ8_MEMBER(sis85c496_host_device::pc_dma_read_byte)
|
||||
uint8_t sis85c496_host_device::pc_dma_read_byte(offs_t offset)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -430,7 +430,7 @@ READ8_MEMBER(sis85c496_host_device::pc_dma_read_byte)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(sis85c496_host_device::pc_dma_write_byte)
|
||||
void sis85c496_host_device::pc_dma_write_byte(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -441,7 +441,7 @@ WRITE8_MEMBER(sis85c496_host_device::pc_dma_write_byte)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(sis85c496_host_device::pc_dma_read_word)
|
||||
uint8_t sis85c496_host_device::pc_dma_read_word(offs_t offset)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -456,7 +456,7 @@ READ8_MEMBER(sis85c496_host_device::pc_dma_read_word)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(sis85c496_host_device::pc_dma_write_word)
|
||||
void sis85c496_host_device::pc_dma_write_word(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
|
||||
if(m_dma_channel == -1)
|
||||
@ -467,22 +467,22 @@ WRITE8_MEMBER(sis85c496_host_device::pc_dma_write_word)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_0_dack_r ) { return 0; } //m_isabus->dack_r(0); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_1_dack_r ) { return 0; } //m_isabus->dack_r(1); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_2_dack_r ) { return 0; } //m_isabus->dack_r(2); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_3_dack_r ) { return 0; } //m_isabus->dack_r(3); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_5_dack_r ) { return 0; } //m_isabus->dack_r(5); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_6_dack_r ) { return 0; } //m_isabus->dack_r(6); }
|
||||
READ8_MEMBER( sis85c496_host_device::pc_dma8237_7_dack_r ) { return 0; } //m_isabus->dack_r(7); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_0_dack_r() { return 0; } //m_isabus->dack_r(0); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_1_dack_r() { return 0; } //m_isabus->dack_r(1); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_2_dack_r() { return 0; } //m_isabus->dack_r(2); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_3_dack_r() { return 0; } //m_isabus->dack_r(3); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_5_dack_r() { return 0; } //m_isabus->dack_r(5); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_6_dack_r() { return 0; } //m_isabus->dack_r(6); }
|
||||
uint8_t sis85c496_host_device::pc_dma8237_7_dack_r() { return 0; } //m_isabus->dack_r(7); }
|
||||
|
||||
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_0_dack_w ){ } //m_isabus->dack_w(0, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_1_dack_w ){ } //m_isabus->dack_w(1, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_2_dack_w ){ } //m_isabus->dack_w(2, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_3_dack_w ){ } //m_isabus->dack_w(3, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_5_dack_w ){ } //m_isabus->dack_w(5, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_6_dack_w ){ } //m_isabus->dack_w(6, data); }
|
||||
WRITE8_MEMBER( sis85c496_host_device::pc_dma8237_7_dack_w ){ } //m_isabus->dack_w(7, data); }
|
||||
void sis85c496_host_device::pc_dma8237_0_dack_w(uint8_t data) { } //m_isabus->dack_w(0, data); }
|
||||
void sis85c496_host_device::pc_dma8237_1_dack_w(uint8_t data) { } //m_isabus->dack_w(1, data); }
|
||||
void sis85c496_host_device::pc_dma8237_2_dack_w(uint8_t data) { } //m_isabus->dack_w(2, data); }
|
||||
void sis85c496_host_device::pc_dma8237_3_dack_w(uint8_t data) { } //m_isabus->dack_w(3, data); }
|
||||
void sis85c496_host_device::pc_dma8237_5_dack_w(uint8_t data) { } //m_isabus->dack_w(5, data); }
|
||||
void sis85c496_host_device::pc_dma8237_6_dack_w(uint8_t data) { } //m_isabus->dack_w(6, data); }
|
||||
void sis85c496_host_device::pc_dma8237_7_dack_w(uint8_t data) { } //m_isabus->dack_w(7, data); }
|
||||
|
||||
WRITE_LINE_MEMBER( sis85c496_host_device::at_dma8237_out_eop )
|
||||
{
|
||||
|
@ -105,25 +105,25 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(at_page8_w);
|
||||
DECLARE_READ8_MEMBER(at_portb_r);
|
||||
DECLARE_WRITE8_MEMBER(at_portb_w);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
uint8_t get_slave_ack(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out1_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_pit8254_out2_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_0_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_1_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_2_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_3_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_5_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_6_dack_r);
|
||||
DECLARE_READ8_MEMBER(pc_dma8237_7_dack_r);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_0_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_1_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_2_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_3_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_5_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_6_dack_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma8237_7_dack_w);
|
||||
uint8_t pc_dma8237_0_dack_r();
|
||||
uint8_t pc_dma8237_1_dack_r();
|
||||
uint8_t pc_dma8237_2_dack_r();
|
||||
uint8_t pc_dma8237_3_dack_r();
|
||||
uint8_t pc_dma8237_5_dack_r();
|
||||
uint8_t pc_dma8237_6_dack_r();
|
||||
uint8_t pc_dma8237_7_dack_r();
|
||||
void pc_dma8237_0_dack_w(uint8_t data);
|
||||
void pc_dma8237_1_dack_w(uint8_t data);
|
||||
void pc_dma8237_2_dack_w(uint8_t data);
|
||||
void pc_dma8237_3_dack_w(uint8_t data);
|
||||
void pc_dma8237_5_dack_w(uint8_t data);
|
||||
void pc_dma8237_6_dack_w(uint8_t data);
|
||||
void pc_dma8237_7_dack_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(at_dma8237_out_eop);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
|
||||
@ -142,10 +142,10 @@ private:
|
||||
DECLARE_READ8_MEMBER(at_keybc_r);
|
||||
DECLARE_WRITE8_MEMBER(at_keybc_w);
|
||||
DECLARE_WRITE8_MEMBER(write_rtc);
|
||||
DECLARE_READ8_MEMBER(pc_dma_read_byte);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma_write_byte);
|
||||
DECLARE_READ8_MEMBER(pc_dma_read_word);
|
||||
DECLARE_WRITE8_MEMBER(pc_dma_write_word);
|
||||
uint8_t pc_dma_read_byte(offs_t offset);
|
||||
void pc_dma_write_byte(offs_t offset, uint8_t data);
|
||||
uint8_t pc_dma_read_word(offs_t offset);
|
||||
void pc_dma_write_word(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(cpu_int_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(cpu_a20_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(cpu_reset_w);
|
||||
|
@ -74,7 +74,7 @@ void spg110_device::configure_spg_io(spg2xx_io_device* io)
|
||||
io->write_ffrq_tmr2_irq_callback().set(FUNC(spg110_device::ffreq2_w));
|
||||
}
|
||||
|
||||
READ16_MEMBER(spg110_device::space_r)
|
||||
uint16_t spg110_device::space_r(offs_t offset)
|
||||
{
|
||||
address_space &cpuspace = this->space(AS_PROGRAM);
|
||||
return cpuspace.read_word(offset);
|
||||
|
@ -59,7 +59,7 @@ private:
|
||||
required_device<spg110_video_device> m_spg_video;
|
||||
required_device<spg110_audio_device> m_spg_audio;
|
||||
|
||||
DECLARE_READ16_MEMBER(space_r);
|
||||
uint16_t space_r(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER(audioirq_w);
|
||||
|
||||
devcb_write16 m_porta_out;
|
||||
@ -73,19 +73,19 @@ private:
|
||||
|
||||
devcb_write8 m_chip_sel;
|
||||
|
||||
DECLARE_READ16_MEMBER(porta_r) { return m_porta_in(); }
|
||||
DECLARE_READ16_MEMBER(portb_r) { return m_portb_in(); }
|
||||
DECLARE_READ16_MEMBER(portc_r) { return m_portc_in(); }
|
||||
DECLARE_WRITE16_MEMBER(porta_w) { m_porta_out(offset, data, mem_mask); }
|
||||
DECLARE_WRITE16_MEMBER(portb_w) { m_portb_out(offset, data, mem_mask); }
|
||||
DECLARE_WRITE16_MEMBER(portc_w) { m_portc_out(offset, data, mem_mask); }
|
||||
uint16_t porta_r() { return m_porta_in(); }
|
||||
uint16_t portb_r() { return m_portb_in(); }
|
||||
uint16_t portc_r() { return m_portc_in(); }
|
||||
void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_porta_out(offset, data, mem_mask); }
|
||||
void portb_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_portb_out(offset, data, mem_mask); }
|
||||
void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_portc_out(offset, data, mem_mask); }
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ffreq1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ffreq2_w);
|
||||
|
||||
template <size_t Line> DECLARE_READ16_MEMBER(adc_r) { return m_adc_in[Line](); }
|
||||
DECLARE_WRITE8_MEMBER(cs_w) { m_chip_sel(offset, data, mem_mask); }
|
||||
DECLARE_READ16_MEMBER(get_pal_r) { return 0; /*m_pal_flag;*/ }
|
||||
template <size_t Line> uint16_t adc_r() { return m_adc_in[Line](); }
|
||||
void cs_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0) { m_chip_sel(offset, data, mem_mask); }
|
||||
uint16_t get_pal_r() { return 0; /*m_pal_flag;*/ }
|
||||
void configure_spg_io(spg2xx_io_device* io);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(videoirq_w);
|
||||
|
@ -111,7 +111,7 @@ void spg2xx_device::device_reset()
|
||||
m_fiq_vector = 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(spg2xx_device::fiq_vector_w)
|
||||
void spg2xx_device::fiq_vector_w(uint8_t data)
|
||||
{
|
||||
m_fiq_vector = data;
|
||||
}
|
||||
@ -165,7 +165,7 @@ WRITE_LINE_MEMBER(spg2xx_device::ffreq2_w)
|
||||
|
||||
|
||||
|
||||
READ16_MEMBER(spg2xx_device::space_r)
|
||||
uint16_t spg2xx_device::space_r(offs_t offset)
|
||||
{
|
||||
address_space &cpuspace = this->space(AS_PROGRAM);
|
||||
return cpuspace.read_word(offset);
|
||||
|
@ -82,7 +82,7 @@ protected:
|
||||
|
||||
void internal_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(fiq_vector_w);
|
||||
void fiq_vector_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(videoirq_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(audioirq_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(audiochirq_w);
|
||||
@ -92,7 +92,7 @@ protected:
|
||||
DECLARE_WRITE_LINE_MEMBER(ffreq1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ffreq2_w);
|
||||
|
||||
DECLARE_READ16_MEMBER(space_r);
|
||||
uint16_t space_r(offs_t offset);
|
||||
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
@ -100,8 +100,8 @@ protected:
|
||||
// TODO: these are fixed values, put them in relevant devices?
|
||||
uint16_t m_sprite_limit;
|
||||
uint16_t m_pal_flag;
|
||||
DECLARE_READ16_MEMBER(get_sprlimit) { return m_sprite_limit; }
|
||||
DECLARE_READ16_MEMBER(get_pal_ntsc) { return m_pal_flag; }
|
||||
uint16_t get_sprlimit() { return m_sprite_limit; }
|
||||
uint16_t get_pal_ntsc() { return m_pal_flag; }
|
||||
|
||||
devcb_write16 m_porta_out;
|
||||
devcb_write16 m_portb_out;
|
||||
@ -131,22 +131,22 @@ protected:
|
||||
|
||||
void configure_spg_io(spg2xx_io_device* io);
|
||||
|
||||
DECLARE_READ16_MEMBER(guny_in_r) { return m_guny_in(); }
|
||||
DECLARE_READ16_MEMBER(gunx_in_r) { return m_gunx_in(); }
|
||||
DECLARE_READ16_MEMBER(porta_r) { return m_porta_in(); }
|
||||
DECLARE_READ16_MEMBER(portb_r) { return m_portb_in(); }
|
||||
DECLARE_READ16_MEMBER(portc_r) { return m_portc_in(); }
|
||||
DECLARE_WRITE16_MEMBER(porta_w) { m_porta_out(offset, data, mem_mask); }
|
||||
DECLARE_WRITE16_MEMBER(portb_w) { m_portb_out(offset, data, mem_mask); }
|
||||
DECLARE_WRITE16_MEMBER(portc_w) { m_portc_out(offset, data, mem_mask); }
|
||||
template <size_t Line> DECLARE_READ16_MEMBER(adc_r) { return m_adc_in[Line](); }
|
||||
uint16_t guny_in_r() { return m_guny_in(); }
|
||||
uint16_t gunx_in_r() { return m_gunx_in(); }
|
||||
uint16_t porta_r() { return m_porta_in(); }
|
||||
uint16_t portb_r() { return m_portb_in(); }
|
||||
uint16_t portc_r() { return m_portc_in(); }
|
||||
void porta_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_porta_out(offset, data, mem_mask); }
|
||||
void portb_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_portb_out(offset, data, mem_mask); }
|
||||
void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_portc_out(offset, data, mem_mask); }
|
||||
template <size_t Line> uint16_t adc_r() { return m_adc_in[Line](); }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(eepromx_w) { m_i2c_w(offset, data, mem_mask); }
|
||||
DECLARE_READ8_MEMBER(eepromx_r) { return m_i2c_r(); };
|
||||
void eepromx_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0) { m_i2c_w(offset, data, mem_mask); }
|
||||
uint8_t eepromx_r() { return m_i2c_r(); };
|
||||
|
||||
DECLARE_WRITE8_MEMBER(uart_tx_w) { m_uart_tx(offset, data, mem_mask); }
|
||||
void uart_tx_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0) { m_uart_tx(offset, data, mem_mask); }
|
||||
DECLARE_WRITE_LINE_MEMBER(spi_tx_w) { m_spi_tx(state); }
|
||||
DECLARE_WRITE8_MEMBER(cs_w) { m_chip_sel(offset, data, mem_mask); }
|
||||
void cs_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0) { m_chip_sel(offset, data, mem_mask); }
|
||||
};
|
||||
|
||||
class spg24x_device : public spg2xx_device
|
||||
|
@ -330,7 +330,7 @@ WRITE_LINE_MEMBER(qsound_device::dsp_ock_w)
|
||||
m_old = old;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(qsound_device::dsp_pio_w)
|
||||
void qsound_device::dsp_pio_w(offs_t offset, u16 data)
|
||||
{
|
||||
// PDX0 is used for QSound ROM offset, and PDX1 is used for ADPCM ROM offset
|
||||
// this prevents spurious PSEL transitions between sending samples to the DAC
|
||||
@ -340,7 +340,7 @@ WRITE16_MEMBER(qsound_device::dsp_pio_w)
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(qsound_device::dsp_pio_r)
|
||||
u16 qsound_device::dsp_pio_r()
|
||||
{
|
||||
LOGCOMMAND(
|
||||
"QSound: DSP PIO read returning %s = %04X\n",
|
||||
|
@ -41,11 +41,11 @@ protected:
|
||||
private:
|
||||
// DSP ROM access
|
||||
DECLARE_READ16_MEMBER(dsp_sample_r);
|
||||
DECLARE_WRITE16_MEMBER(dsp_pio_w);
|
||||
void dsp_pio_w(offs_t offset, u16 data);
|
||||
|
||||
// for synchronised DSP communication
|
||||
DECLARE_WRITE_LINE_MEMBER(dsp_ock_w);
|
||||
DECLARE_READ16_MEMBER(dsp_pio_r);
|
||||
u16 dsp_pio_r();
|
||||
void set_dsp_ready(void *ptr, s32 param);
|
||||
void set_cmd(void *ptr, s32 param);
|
||||
|
||||
|
@ -1136,7 +1136,7 @@ void spu_device::kill_sound()
|
||||
//
|
||||
//
|
||||
|
||||
READ16_MEMBER( spu_device::read )
|
||||
uint16_t spu_device::read(offs_t offset)
|
||||
{
|
||||
unsigned short ret, *rp=(unsigned short *)(reg+((offset*2)&0x1ff));
|
||||
|
||||
@ -1158,7 +1158,7 @@ READ16_MEMBER( spu_device::read )
|
||||
//
|
||||
//
|
||||
|
||||
WRITE16_MEMBER( spu_device::write )
|
||||
void spu_device::write(offs_t offset, uint16_t data)
|
||||
{
|
||||
#ifdef debug_spu_registers
|
||||
printf("spu: write %08x = %04x [%s]\n",
|
||||
|
@ -218,8 +218,8 @@ public:
|
||||
void flush_xa(const unsigned int sector=0);
|
||||
void flush_cdda(const unsigned int sector=0);
|
||||
|
||||
DECLARE_READ16_MEMBER( read );
|
||||
DECLARE_WRITE16_MEMBER( write );
|
||||
uint16_t read(offs_t offset);
|
||||
void write(offs_t offset, uint16_t data);
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -3264,7 +3264,7 @@ void psxgpu_device::gpu_write( uint32_t *p_ram, int32_t n_size )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( psxgpu_device::write )
|
||||
void psxgpu_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
switch( offset )
|
||||
{
|
||||
@ -3459,7 +3459,7 @@ void psxgpu_device::gpu_read( uint32_t *p_ram, int32_t n_size )
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER( psxgpu_device::read )
|
||||
uint32_t psxgpu_device::read(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
uint32_t data;
|
||||
|
||||
|
@ -30,8 +30,8 @@ public:
|
||||
auto vblank_callback() { return m_vblank_handler.bind(); }
|
||||
void set_vram_size(int size) { vramSize = size; }
|
||||
|
||||
DECLARE_WRITE32_MEMBER( write );
|
||||
DECLARE_READ32_MEMBER( read );
|
||||
void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t read(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void dma_read( uint32_t *ram, uint32_t n_address, int32_t n_size );
|
||||
void dma_write( uint32_t *ram, uint32_t n_address, int32_t n_size );
|
||||
void lightgun_set( int, int );
|
||||
|
@ -1935,7 +1935,7 @@ uint8_t snes_ppu_device::read(address_space &space, uint32_t offset, uint8_t wri
|
||||
}
|
||||
case SLHV: /* Software latch for H/V counter */
|
||||
set_latch_hv(screen().hpos(), screen().vpos());
|
||||
return m_openbus_cb(space, 0); /* Return value is meaningless */
|
||||
return m_openbus_cb(0); /* Return value is meaningless */
|
||||
|
||||
case ROAMDATA: /* Read data from OAM (DR) */
|
||||
{
|
||||
@ -2029,7 +2029,7 @@ uint8_t snes_ppu_device::read(address_space &space, uint32_t offset, uint8_t wri
|
||||
}
|
||||
|
||||
/* note: remaining registers (Namely TM in Super Kick Boxing) returns MDR open bus, not PPU Open Bus! */
|
||||
return m_openbus_cb(space, 0);
|
||||
return m_openbus_cb(0);
|
||||
}
|
||||
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user