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https://github.com/holub/mame
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bus/nes: Updated Taito X1-017 boards. (#9535)
- Replaced bad program ROMs with dumps with proper page order. - Updated banking to work with proper dumps. - Fixed CHR banking from possibly ignoring first writes. - Added special latching bytes to internal X1-017 RAM. - Added IRQ support (no games exist that use it).
This commit is contained in:
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8b327ef709
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16
hash/nes.xml
16
hash/nes.xml
@ -21301,7 +21301,7 @@ license:CC0
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</software>
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<software name="khkoshn" supported="no">
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<description>Kyuukyoku Harikiri Koushien (Jpn)</description>
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<description>Kyuukyoku Harikiri Koushien (Japan)</description>
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<year>1992</year>
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<publisher>Taito</publisher>
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<info name="serial" value="TFC-KHK-6900 (42)"/>
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@ -21312,7 +21312,7 @@ license:CC0
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<feature name="pcb" value="TAITO-X1-017" />
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<feature name="batt" value="yes" />
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<dataarea name="prg" size="131072">
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<rom name="d23-01" size="131072" crc="265167e1" sha1="9e587587b2685ca1b320bd0a137eedbb6b274797" offset="00000" />
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<rom name="d23-01" size="131072" crc="f45c0971" sha1="46e76efbd5e2eca206abe80329fbd5df0ef5bc79" offset="00000" />
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</dataarea>
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<dataarea name="chr" size="262144">
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<rom name="d23-02" size="262144" crc="63ca0132" sha1="1fd70de7748ec7f42619f182bc8c86573b96abf6" offset="00000" />
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@ -21374,7 +21374,7 @@ license:CC0
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</software>
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<software name="khstad3">
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<description>Kyuukyoku Harikiri Stadium III (Jpn)</description>
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<description>Kyuukyoku Harikiri Stadium III (Japan)</description>
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<year>1991</year>
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<publisher>Taito</publisher>
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<info name="serial" value="TFC-KHIII-6900 (34)"/>
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@ -21385,7 +21385,7 @@ license:CC0
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<feature name="pcb" value="TAITO-X1-017" />
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<feature name="batt" value="yes" />
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<dataarea name="prg" size="131072">
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<rom name="c75-01" size="131072" crc="49aa5257" sha1="974e0af88ca48d491d34a15661dc45bdba7dbe03" offset="00000" />
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<rom name="c75-01" size="131072" crc="b15e8be2" sha1="d5047b27e37ec33ed2c4a198aecea3966e032e29" offset="00000" />
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</dataarea>
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<dataarea name="chr" size="262144">
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<rom name="c75-02" size="262144" crc="0d6a9893" sha1="079c20f0ba98aa846440e988f2d989b003ee9909" offset="00000" />
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@ -21397,7 +21397,7 @@ license:CC0
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</software>
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<software name="khstadh" supported="no">
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<description>Kyuukyoku Harikiri Stadium - Heisei Gannen Ban (Jpn)</description>
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<description>Kyuukyoku Harikiri Stadium - Heisei Gannen Ban (Japan)</description>
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<year>1989</year>
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<publisher>Taito</publisher>
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<info name="serial" value="TFC-KHH-6800 (25)"/>
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@ -21408,7 +21408,7 @@ license:CC0
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<feature name="pcb" value="TAITO-X1-017" />
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<feature name="batt" value="yes" />
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<dataarea name="prg" size="131072">
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<rom name="prg-x3-025b" size="131072" crc="4819a595" sha1="4479fe8316d8dec8927d58650d6707a048e2a274" offset="00000" />
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<rom name="prg-x3-025b" size="131072" crc="c2339468" sha1="1c5c9a192a27b848f3f84f2dffb59b1a30749046" offset="00000" />
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</dataarea>
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<dataarea name="chr" size="262144">
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<rom name="chr-x3-026" size="262144" crc="1c36a136" sha1="37d36fcc65b56858a5b5aa628c8c8765b064028a" offset="00000" />
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@ -32467,7 +32467,7 @@ license:CC0
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</software>
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<software name="sdkeiji">
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<description>SD Keiji - Blader (Jpn)</description>
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<description>SD Keiji - Blader (Japan)</description>
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<year>1991</year>
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<publisher>Taito</publisher>
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<info name="serial" value="TFC-SKB-6400 (39)"/>
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@ -32478,7 +32478,7 @@ license:CC0
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<feature name="pcb" value="TAITO-X1-017" />
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<feature name="batt" value="yes" />
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<dataarea name="prg" size="131072">
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<rom name="c94-01" size="131072" crc="ee711afb" sha1="4a6f0c928e068dd0cdb8b38ff45ade6512191fb2" offset="00000" />
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<rom name="c94-01" size="131072" crc="40bc248e" sha1="f01de343bd9b6fb4458731b44d385e36d999fc08" offset="00000" />
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</dataarea>
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<dataarea name="chr" size="131072">
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<rom name="c94-02" size="131072" crc="1e234045" sha1="98ed114cf467a6f25f7e07d9b045df476e5df790" offset="00000" />
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@ -114,7 +114,7 @@ static const nes_mmc mmc_list[] =
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{ 79, AVE_NINA06 },
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{ 80, TAITO_X1_005 },
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{ 81, NTDEC_N715021 }, // 81 Super Gun
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{ 82, TAITO_X1_017 },
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// 82 Taito X1-017 mapper for old mis-ordered PRG dumps
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{ 83, CONY_BOARD },
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// 84 Pasofami hacked images?
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{ 85, KONAMI_VRC7 },
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@ -529,7 +529,7 @@ static const nes_mmc mmc_list[] =
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{ 549, KAISER_KS7016B }, // Meikyuu Jiin Dababa alt FDS conversion
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{ 550, BMC_JY820845C },
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{ 551, JNCOTA_KT1001 },
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// 552 TAITO_X1_017, this is a correction of mapper 82. We should drop 82 and only support the accurate dumps of 552?
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{ 552, TAITO_X1_017 },
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{ 553, SACHEN_3013 }, // Dong Dong Nao 1
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{ 554, KAISER_KS7010 }, // Akumajo Dracula FDS conversion
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{ 555, STD_EVENT2 },
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@ -66,8 +66,8 @@ nes_x1_005_device::nes_x1_005_device(const machine_config &mconfig, const char *
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{
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}
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nes_x1_017_device::nes_x1_017_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: nes_nrom_device(mconfig, NES_X1_017, tag, owner, clock), m_latch(0)
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nes_x1_017_device::nes_x1_017_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: nes_nrom_device(mconfig, NES_X1_017, tag, owner, clock), m_latch(0), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), irq_timer(nullptr)
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{
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}
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@ -125,6 +125,13 @@ void nes_x1_005_device::pcb_reset()
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void nes_x1_017_device::device_start()
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{
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common_start();
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irq_timer = timer_alloc(TIMER_IRQ);
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irq_timer->adjust(attotime::zero, 0, clocks_to_attotime(1));
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_count));
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save_item(NAME(m_irq_count_latch));
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save_item(NAME(m_latch));
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save_item(NAME(m_reg));
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save_item(NAME(m_mmc_vrom_bank));
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@ -137,14 +144,17 @@ void nes_x1_017_device::device_start()
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void nes_x1_017_device::pcb_reset()
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{
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m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
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prg16_89ab(0);
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prg16_cdef(m_prg_chunks - 1);
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chr8(0, m_chr_source);
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m_irq_enable = 0;
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m_irq_count = 0;
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m_irq_count_latch = 0;
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m_latch = 0;
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memset(m_reg, 0, sizeof(m_reg));
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memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank));
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m_reg[0] = m_reg[1] = m_reg[2] = 0;
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std::fill(std::begin(m_mmc_vrom_bank), std::end(m_mmc_vrom_bank), 0x00);
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}
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@ -279,9 +289,6 @@ void nes_tc0190fmc_pal16r4_device::write_h(offs_t offset, uint8_t data)
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Actually, Fudou Myouou Den uses a variant of the board with
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CIRAM, making necessary two distinct mappers & pcb_id.
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Also, we miss to emulate the security check at 0x7ef8 / 0x7ef9
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and the 0x80 ram!
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iNES: mappers 80 & 207
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-------------------------------------------------*/
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@ -364,37 +371,42 @@ uint8_t nes_x1_005_device::read_m(offs_t offset)
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Taito X1-017 board emulation
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We miss to emulate the security check at 0x6000-0x73ff
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and the ram!
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Games: Kyuukyoku Harikiri Koushien, Kyuukyoku Harikiri
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Stadium, SD Keiji - Blader
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Stadium 3, Kyuukyoku Harikiri - Heisei Gannenban,
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SD Keiji - Blader
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iNES: mapper 82
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NES 2.0: mapper 552 (old mapper 82 are mis-ordered bad dumps)
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In MESS: Supported.
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In MAME: Supported.
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TODO: KH Koushien seems to be working except it needs to
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be reset once with a new NVRAM file. KH Heisei won't
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load "Single Game" menu option but other game modes work.
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-------------------------------------------------*/
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void nes_x1_017_device::device_timer(emu_timer &timer, device_timer_id id, int param)
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{
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if (id == TIMER_IRQ)
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{
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if ((m_irq_enable & 0x05) == 1 && m_irq_count) // counting enabled?
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m_irq_count--;
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if (!m_irq_count && BIT(m_irq_enable, 1))
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set_irq_line(ASSERT_LINE);
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}
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}
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void nes_x1_017_device::set_chr()
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{
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if (m_latch)
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{
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chr2_4(m_mmc_vrom_bank[0] >> 1, CHRROM);
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chr2_6(m_mmc_vrom_bank[1] >> 1, CHRROM);
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}
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else
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{
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chr2_0(m_mmc_vrom_bank[0] >> 1, CHRROM);
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chr2_2(m_mmc_vrom_bank[1] >> 1, CHRROM);
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}
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chr2_x(0 ^ m_latch, m_mmc_vrom_bank[0] >> 1, CHRROM);
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chr2_x(2 ^ m_latch, m_mmc_vrom_bank[1] >> 1, CHRROM);
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chr1_x(4 ^ m_latch, m_mmc_vrom_bank[2], CHRROM);
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chr1_x(5 ^ m_latch, m_mmc_vrom_bank[3], CHRROM);
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chr1_x(6 ^ m_latch, m_mmc_vrom_bank[4], CHRROM);
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chr1_x(7 ^ m_latch, m_mmc_vrom_bank[5], CHRROM);
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}
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void nes_x1_017_device::write_m(offs_t offset, uint8_t data)
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void nes_x1_017_device::write_m(offs_t offset, u8 data)
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{
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LOG_MMC(("x1017 write_m, offset: %04x, data: %02x\n", offset, data));
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@ -406,19 +418,13 @@ void nes_x1_017_device::write_m(offs_t offset, uint8_t data)
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case 0x1ef3:
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case 0x1ef4:
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case 0x1ef5:
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if (m_mmc_vrom_bank[offset & 0x07] != data)
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{
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m_mmc_vrom_bank[offset & 0x07] = data;
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set_chr();
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}
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m_mmc_vrom_bank[offset & 0x07] = data;
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set_chr();
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break;
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case 0x1ef6:
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set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
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if (m_latch != ((data & 0x02) << 1))
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{
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m_latch = ((data & 0x02) << 1);
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set_chr();
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}
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m_latch = (data & 0x02) << 1;
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set_chr();
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break;
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case 0x1ef7:
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case 0x1ef8:
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@ -426,39 +432,54 @@ void nes_x1_017_device::write_m(offs_t offset, uint8_t data)
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m_reg[(offset & 0x0f) - 7] = data;
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break;
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case 0x1efa:
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prg8_89(data >> 2);
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break;
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case 0x1efb:
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prg8_ab(data >> 2);
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break;
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case 0x1efc:
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prg8_cd(data >> 2);
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prg8_x((offset & 0x0f) - 0xa, bitswap<6>(data, 0, 1, 2, 3, 4, 5));
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break;
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default:
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logerror("x1017_m_w uncaught write, addr: %04x, value: %02x\n", offset + 0x6000, data);
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case 0x1efd:
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m_irq_count_latch = data;
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break;
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case 0x1efe:
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m_irq_enable = data;
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if (!BIT(m_irq_enable, 0))
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m_irq_count = m_irq_count_latch ? (m_irq_count_latch + 2) * 16 : 17;
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if (!BIT(m_irq_enable, 1))
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set_irq_line(CLEAR_LINE);
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break;
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case 0x1eff:
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set_irq_line(CLEAR_LINE);
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m_irq_count = m_irq_count_latch ? (m_irq_count_latch + 1) * 16 : 1;
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break;
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}
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// 2+2+1 KB of Internal RAM can be independently enabled/disabled!
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if (offset < 0x0800 && m_reg[0] == 0xca)
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m_x1_017_ram[0x0000 + (offset & 0x7ff)] = data;
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if (offset < 0x1000 && m_reg[1] == 0x69)
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m_x1_017_ram[0x0800 + (offset & 0x7ff)] = data;
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if (offset < 0x1400 && m_reg[2] == 0x84)
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m_x1_017_ram[0x1000 + (offset & 0x3ff)] = data;
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if ((offset < 0x0800 && m_reg[0] == 0xca) ||
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(offset < 0x1000 && m_reg[1] == 0x69) ||
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(offset < 0x1400 && m_reg[2] == 0x84))
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{
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m_x1_017_ram[offset] = data;
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// 1st byte in each 1K page latches most recent read/write from that page
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m_x1_017_ram[offset & 0x1c00] = data;
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}
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}
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uint8_t nes_x1_017_device::read_m(offs_t offset)
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u8 nes_x1_017_device::read_m(offs_t offset)
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{
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LOG_MMC(("x1017 read_m, offset: %04x\n", offset));
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// 2+2+1 KB of Internal RAM can be independently enabled/disabled!
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if (offset < 0x0800 && m_reg[0] == 0xca)
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return m_x1_017_ram[0x0000 + (offset & 0x7ff)];
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if (offset < 0x1000 && m_reg[1] == 0x69)
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return m_x1_017_ram[0x0800 + (offset & 0x7ff)];
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if (offset < 0x1400 && m_reg[2] == 0x84)
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return m_x1_017_ram[0x1000 + (offset & 0x3ff)];
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if ((offset < 0x0800 && m_reg[0] == 0xca) ||
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(offset < 0x1000 && m_reg[1] == 0x69) ||
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(offset < 0x1400 && m_reg[2] == 0x84))
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{
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u8 ret = m_x1_017_ram[offset];
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return get_open_bus();
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// 1st byte in each 1K page latches most recent read/write from that page
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m_x1_017_ram[offset & 0x1c00] = ret;
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return ret;
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}
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return 0; // no open bus behavior due to pull-down resistors
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}
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@ -79,24 +79,34 @@ class nes_x1_017_device : public nes_nrom_device
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{
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public:
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// construction/destruction
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nes_x1_017_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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nes_x1_017_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual uint8_t read_m(offs_t offset) override;
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virtual void write_m(offs_t offset, uint8_t data) override;
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virtual u8 read_ex(offs_t offset) override { return 0; } // no open bus
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virtual u8 read_l(offs_t offset) override { return 0; } // no open bus
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virtual u8 read_m(offs_t offset) override;
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virtual void write_m(offs_t offset, u8 data) override;
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virtual void pcb_reset() override;
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
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private:
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void set_chr();
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uint8_t m_latch;
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uint8_t m_reg[3]; //mapper ram protect
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uint8_t m_mmc_vrom_bank[6];
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u8 m_latch;
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u8 m_reg[3]; // mapper ram enable
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u8 m_mmc_vrom_bank[6];
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// Taito X1-017 chip contains 5K of internal ram, battery backed up
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uint8_t m_x1_017_ram[0x1400];
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u8 m_x1_017_ram[0x1400];
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u16 m_irq_count;
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u8 m_irq_count_latch;
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u8 m_irq_enable;
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static constexpr device_timer_id TIMER_IRQ = 0;
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emu_timer *irq_timer;
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};
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@ -106,5 +116,4 @@ DECLARE_DEVICE_TYPE(NES_TC0190FMC_PAL16R4, nes_tc0190fmc_pal16r4_device)
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DECLARE_DEVICE_TYPE(NES_X1_005, nes_x1_005_device)
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DECLARE_DEVICE_TYPE(NES_X1_017, nes_x1_017_device)
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#endif // MAME_BUS_NES_TAITO_H
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