From 88bcdb4a50c005ae660d8c2dcb6c88f35992be0e Mon Sep 17 00:00:00 2001 From: cracyc Date: Fri, 13 Apr 2018 09:48:53 -0500 Subject: [PATCH] pc9801_86: add clocks (nw) --- src/devices/bus/cbus/pc9801_86.cpp | 7 +++---- src/devices/bus/isa/sb16.cpp | 2 +- src/emu/xtal.cpp | 3 +++ 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/devices/bus/cbus/pc9801_86.cpp b/src/devices/bus/cbus/pc9801_86.cpp index 2b08d158669..fbea8ebee05 100644 --- a/src/devices/bus/cbus/pc9801_86.cpp +++ b/src/devices/bus/cbus/pc9801_86.cpp @@ -20,7 +20,6 @@ #include "sound/volt_reg.h" #include "speaker.h" -#define MAIN_CLOCK_X1 XTAL(1'996'800) #define QUEUE_SIZE 32768 //************************************************************************** @@ -55,7 +54,7 @@ WRITE_LINE_MEMBER(pc9801_86_device::sound_irq) MACHINE_CONFIG_START(pc9801_86_device::device_add_mconfig) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") - MCFG_SOUND_ADD("opna", YM2608, MAIN_CLOCK_X1*4) // unknown clock / divider + MCFG_SOUND_ADD("opna", YM2608, 7.987_MHz_XTAL) MCFG_YM2608_IRQ_HANDLER(WRITELINE(pc9801_86_device, sound_irq)) MCFG_AY8910_PORT_A_READ_CB(READ8(pc9801_86_device, opn_porta_r)) //MCFG_AY8910_PORT_B_READ_CB(READ8(pc9801_state, opn_portb_r)) @@ -252,8 +251,8 @@ READ8_MEMBER(pc9801_86_device::pcm_r) WRITE8_MEMBER(pc9801_86_device::pcm_w) { - const int rate = 44100*3; // TODO : unknown clock / divider - const int divs[8] = {3, 4, 6, 8, 12, 16, 24, 32}; + const u32 rate = (25.4_MHz_XTAL).value() / 16; + const int divs[8] = {36, 48, 72, 96, 144, 192, 288, 384}; if((offset & 1) == 0) { switch(offset >> 1) diff --git a/src/devices/bus/isa/sb16.cpp b/src/devices/bus/isa/sb16.cpp index 0dd902721ac..5569ae8689f 100644 --- a/src/devices/bus/isa/sb16.cpp +++ b/src/devices/bus/isa/sb16.cpp @@ -108,7 +108,7 @@ void sb16_lle_device::control_timer(bool start) { if(start && m_freq) { - double rate = (46615120.0/1024/256) * m_freq; + double rate = ((46.61512_MHz_XTAL).dvalue()/1024/256) * m_freq; m_timer->adjust(attotime::from_hz(rate), 0, attotime::from_hz(rate)); } else diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index 2d8733ba8fa..2d2489713ca 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -117,6 +117,7 @@ const double XTAL::known_xtals[] = { 7'159'090, /* 7.15909_MHz_XTAL Blood Bros (2x NTSC subcarrier) */ 7'372'800, /* 7.3728_MHz_XTAL - */ 7'864'300, /* 7.8643_MHz_XTAL Used on InterFlip games as video clock */ + 7'987'000, /* 7.987_MHz_XTAL PC9801-86 YM2608 clock */ 8'000'000, /* 8_MHz_XTAL Extremely common, used on 100's of PCBs */ 8'200'000, /* 8.2_MHz_XTAL Universal Mr. Do - Model 8021 PCB */ 8'388'000, /* 8.388_MHz_XTAL Nintendo Game Boy Color */ @@ -255,6 +256,7 @@ const double XTAL::known_xtals[] = { 25'174'800, /* 25.1748_MHz_XTAL Sega System 16A/16B (1600x NTSC line rate) */ 25'200'000, /* 25.2_MHz_XTAL Tektronix 4404 video clock */ 25'398'360, /* 25.39836_MHz_XTAL Tandberg TDV 2324 */ + 25'400'000, /* 25.4_MHz_XTAL PC9801-86 PCM base clock */ 25'447'000, /* 25.447_MHz_XTAL Namco EVA3A (Funcube2) */ 25'590'906, /* 25.590906_MHz_XTAL Atari Jaguar NTSC */ 25'593'900, /* 25.5939_MHz_XTAL Atari Jaguar PAL */ @@ -315,6 +317,7 @@ const double XTAL::known_xtals[] = { 45'158'000, /* 45.158_MHz_XTAL Sega Model 2A video board, Model 3 CPU board */ 45'619'200, /* 45.6192_MHz_XTAL DEC VK100 */ 45'830'400, /* 45.8304_MHz_XTAL Microterm 5510 */ + 46'615'120, /* 46.61512_Mhz_XTAL Soundblaster 16 PCM base clock */ 47'736'000, /* 47.736_MHz_XTAL Visual 100 */ 48'000'000, /* 48_MHz_XTAL Williams/Midway Y/Z-unit system / SSV board */ 48'384'000, /* 48.384_MHz_XTAL Namco NB-1 */