mirror of
https://github.com/holub/mame
synced 2025-05-31 01:51:46 +03:00
ccs2810: Major refinements
- Implement power-on jump in a hardware-accurate manner, including full configuration options. - Hook up INS8250 device for RS-232 serial communication. This requires ROM wait states to be (crudely) simulated, or else the baud rate recognition routine will mess up its timing. - Make serial port address configurable as well (although the monitor still expects it to be at the default setting). This will help prepare for S-100 bus emulation.
This commit is contained in:
AJR
parent
35448dceb1
commit
89157c45ec
@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Robbbert
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// copyright-holders:Robbbert,AJR
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/***************************************************************************
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CCS Model 2810
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@ -62,129 +62,701 @@ ToDo:
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#include "emu.h"
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#include "cpu/z80/z80.h"
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//#include "machine/ins8250.h"
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#include "machine/terminal.h"
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#include "bus/rs232/rs232.h"
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#include "machine/ins8250.h"
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#include "machine/ram.h"
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#include "machine/wd_fdc.h"
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#define TERMINAL_TAG "terminal"
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class ccs_state : public driver_device
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{
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public:
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ccs_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_terminal(*this, TERMINAL_TAG),
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m_fdc (*this, "fdc"),
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m_floppy0(*this, "fdc:0")
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m_ram(*this, RAM_TAG),
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m_rom(*this, "maincpu"),
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m_ins8250(*this, "ins8250"),
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m_fdc(*this, "fdc"),
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m_floppy0(*this, "fdc:0"),
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m_jump_addr_sel(*this, {"ADDRLO", "ADDRHI"}),
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m_ser_addr_sel(*this, "SERADDR"),
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m_jump_en(*this, "JMPEN"),
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m_rom_en(*this, "ROMEN"),
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m_ser_en(*this, "SEREN")
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{
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}
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DECLARE_READ8_MEMBER(memory_read);
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DECLARE_WRITE8_MEMBER(memory_write);
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DECLARE_READ8_MEMBER(io_read);
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DECLARE_WRITE8_MEMBER(io_write);
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DECLARE_DRIVER_INIT(ccs2810);
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DECLARE_DRIVER_INIT(ccs2422);
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DECLARE_MACHINE_RESET(ccs);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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DECLARE_READ8_MEMBER(port04_r);
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DECLARE_READ8_MEMBER(port20_r);
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DECLARE_READ8_MEMBER(port25_r);
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DECLARE_READ8_MEMBER(port26_r);
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DECLARE_READ8_MEMBER(port34_r);
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DECLARE_WRITE8_MEMBER(port04_w);
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DECLARE_WRITE8_MEMBER(port20_w);
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DECLARE_WRITE8_MEMBER(port34_w);
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DECLARE_WRITE8_MEMBER(port40_w);
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void kbd_put(u8 data);
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private:
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uint8_t m_term_data;
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uint8_t m_26_count;
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required_device<cpu_device> m_maincpu;
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required_device<ram_device> m_ram;
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required_region_ptr<uint8_t> m_rom;
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required_device<ins8250_device> m_ins8250;
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optional_device<mb8877_device> m_fdc;
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optional_device<floppy_connector> m_floppy0;
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required_ioport_array<2> m_jump_addr_sel;
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required_ioport m_ser_addr_sel;
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required_ioport m_jump_en;
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required_ioport m_rom_en;
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required_ioport m_ser_en;
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uint8_t m_power_on_status;
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bool m_ss;
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bool m_dden;
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bool m_dsize;
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uint8_t m_ds;
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floppy_image_device *m_floppy;
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required_device<cpu_device> m_maincpu;
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required_device<generic_terminal_device> m_terminal;
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optional_device<mb8877_device> m_fdc;
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optional_device<floppy_connector> m_floppy0;
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};
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READ8_MEMBER(ccs_state::memory_read)
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{
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uint8_t result = m_ram->read(offset);
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if (!BIT(m_power_on_status, 0))
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{
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if (BIT(m_power_on_status, 1))
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result = m_jump_addr_sel[1]->read();
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else
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result = !BIT(m_power_on_status, 2) ? 0xc3 : m_jump_addr_sel[0]->read();
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}
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else if ((offset & 0xf800) == 0xf000 && m_rom_en->read() == 0)
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{
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result = m_rom[offset & 0x7ff];
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// wait state forced for 4 MHz operation
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if (!machine().side_effect_disabled())
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m_maincpu->adjust_icount(-1);
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}
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if (!machine().side_effect_disabled())
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m_power_on_status |= m_power_on_status >> 1;
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return result;
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}
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WRITE8_MEMBER(ccs_state::memory_write)
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{
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m_ram->write(offset, data);
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}
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READ8_MEMBER(ccs_state::io_read)
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{
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// A7-A3 are compared against jumper settings
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if (m_ser_en->read() && (offset & 0x00f8) == m_ser_addr_sel->read())
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return m_ins8250->ins8250_r(space, offset & 7);
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return 0xff;
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}
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WRITE8_MEMBER(ccs_state::io_write)
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{
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// A7-A3 are compared against jumper settings
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if (m_ser_en->read() && (offset & 0x00f8) == m_ser_addr_sel->read())
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m_ins8250->ins8250_w(space, offset & 7, data);
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}
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static ADDRESS_MAP_START(ccs2810_mem, AS_PROGRAM, 8, ccs_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0xefff) AM_RAM
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AM_RANGE(0xf000, 0xf7ff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
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AM_RANGE(0xf800, 0xffff) AM_RAM
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(memory_read, memory_write)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(ccs2810_io, AS_IO, 8, ccs_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x20, 0x20) AM_READWRITE(port20_r,port20_w)
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AM_RANGE(0x25, 0x25) AM_READ(port25_r)
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AM_RANGE(0x26, 0x26) AM_READ(port26_r)
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//AM_RANGE(0x20, 0x27) AM_DEVREADWRITE("ins8250", ins8250_device, ins8250_r, ins8250_w )
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(io_read, io_write)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(ccs2422_io, AS_IO, 8, ccs_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x04, 0x04) AM_READWRITE(port04_r,port04_w)
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AM_RANGE(0x20, 0x20) AM_READWRITE(port20_r,port20_w)
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AM_RANGE(0x25, 0x25) AM_READ(port25_r)
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AM_RANGE(0x26, 0x26) AM_READ(port26_r)
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AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("fdc", mb8877_device, read, write)
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AM_RANGE(0x34, 0x34) AM_READWRITE(port34_r,port34_w)
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AM_RANGE(0x40, 0x40) AM_WRITE(port40_w)
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AM_RANGE(0x04, 0x04) AM_MIRROR(0xff00) AM_READWRITE(port04_r,port04_w)
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AM_RANGE(0x30, 0x33) AM_MIRROR(0xff00) AM_DEVREADWRITE("fdc", mb8877_device, read, write)
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AM_RANGE(0x34, 0x34) AM_MIRROR(0xff00) AM_READWRITE(port34_r,port34_w)
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AM_RANGE(0x40, 0x40) AM_MIRROR(0xff00) AM_WRITE(port40_w)
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(io_read, io_write)
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ADDRESS_MAP_END
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/* Input ports */
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static INPUT_PORTS_START( ccs2810 )
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PORT_START("ROMEN")
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PORT_DIPNAME(1, 0, "Enable On-board ROM") PORT_DIPLOCATION("ROM EN:1")
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PORT_DIPSETTING(1, DEF_STR(Off))
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PORT_DIPSETTING(0, DEF_STR(On))
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PORT_START("JMPEN")
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PORT_DIPNAME(1, 0, "Enable Power-on Jump") PORT_DIPLOCATION("JMP EN:1")
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PORT_DIPSETTING(1, DEF_STR(Off))
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PORT_DIPSETTING(0, DEF_STR(On))
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PORT_START("ADDRLO")
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PORT_DIPNAME(0xff, 0x00, "Power-on Jump Address (Low)") PORT_DIPLOCATION("JA:!16,!15,!14,!13,!12,!11,!10,!9")
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PORT_DIPSETTING(0x00, "XX00h")
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PORT_DIPSETTING(0x01, "XX01h")
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PORT_DIPSETTING(0x02, "XX02h")
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PORT_DIPSETTING(0x03, "XX03h")
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PORT_DIPSETTING(0x04, "XX04h")
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PORT_DIPSETTING(0x05, "XX05h")
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PORT_DIPSETTING(0x06, "XX06h")
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PORT_DIPSETTING(0x07, "XX07h")
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PORT_DIPSETTING(0x08, "XX08h")
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PORT_DIPSETTING(0x09, "XX09h")
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PORT_DIPSETTING(0x0a, "XX0Ah")
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PORT_DIPSETTING(0x0b, "XX0Bh")
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PORT_DIPSETTING(0x0c, "XX0Ch")
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PORT_DIPSETTING(0x0d, "XX0Dh")
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PORT_DIPSETTING(0x0e, "XX0Eh")
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PORT_DIPSETTING(0x0f, "XX0Fh")
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PORT_DIPSETTING(0x10, "XX10h")
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PORT_DIPSETTING(0x11, "XX11h")
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PORT_DIPSETTING(0x12, "XX12h")
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PORT_DIPSETTING(0x13, "XX13h")
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PORT_DIPSETTING(0x14, "XX14h")
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PORT_DIPSETTING(0x15, "XX15h")
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PORT_DIPSETTING(0x16, "XX16h")
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PORT_DIPSETTING(0x17, "XX17h")
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PORT_DIPSETTING(0x18, "XX18h")
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PORT_DIPSETTING(0x19, "XX19h")
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PORT_DIPSETTING(0x1a, "XX1Ah")
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PORT_DIPSETTING(0x1b, "XX1Bh")
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PORT_DIPSETTING(0x1c, "XX1Ch")
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PORT_DIPSETTING(0x1d, "XX1Dh")
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PORT_DIPSETTING(0x1e, "XX1Eh")
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PORT_DIPSETTING(0x1f, "XX1Fh")
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PORT_DIPSETTING(0x20, "XX20h")
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PORT_DIPSETTING(0x21, "XX21h")
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PORT_DIPSETTING(0x22, "XX22h")
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PORT_DIPSETTING(0x23, "XX23h")
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PORT_DIPSETTING(0x24, "XX24h")
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PORT_DIPSETTING(0x25, "XX25h")
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PORT_DIPSETTING(0x26, "XX26h")
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PORT_DIPSETTING(0x27, "XX27h")
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PORT_DIPSETTING(0x28, "XX28h")
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PORT_DIPSETTING(0x29, "XX29h")
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PORT_DIPSETTING(0x2a, "XX2Ah")
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PORT_DIPSETTING(0x2b, "XX2Bh")
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PORT_DIPSETTING(0x2c, "XX2Ch")
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PORT_DIPSETTING(0x2d, "XX2Dh")
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PORT_DIPSETTING(0x2e, "XX2Eh")
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PORT_DIPSETTING(0x2f, "XX2Fh")
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PORT_DIPSETTING(0x30, "XX30h")
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PORT_DIPSETTING(0x31, "XX31h")
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PORT_DIPSETTING(0x32, "XX32h")
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PORT_DIPSETTING(0x33, "XX33h")
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PORT_DIPSETTING(0x34, "XX34h")
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PORT_DIPSETTING(0x35, "XX35h")
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PORT_DIPSETTING(0x36, "XX36h")
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PORT_DIPSETTING(0x37, "XX37h")
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PORT_DIPSETTING(0x38, "XX38h")
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PORT_DIPSETTING(0x39, "XX39h")
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PORT_DIPSETTING(0x3a, "XX3Ah")
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PORT_DIPSETTING(0x3b, "XX3Bh")
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PORT_DIPSETTING(0x3c, "XX3Ch")
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PORT_DIPSETTING(0x3d, "XX3Dh")
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PORT_DIPSETTING(0x3e, "XX3Eh")
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PORT_DIPSETTING(0x3f, "XX3Fh")
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PORT_DIPSETTING(0x40, "XX40h")
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PORT_DIPSETTING(0x41, "XX41h")
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PORT_DIPSETTING(0x42, "XX42h")
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PORT_DIPSETTING(0x43, "XX43h")
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PORT_DIPSETTING(0x44, "XX44h")
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PORT_DIPSETTING(0x45, "XX45h")
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PORT_DIPSETTING(0x46, "XX46h")
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PORT_DIPSETTING(0x47, "XX47h")
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PORT_DIPSETTING(0x48, "XX48h")
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PORT_DIPSETTING(0x49, "XX49h")
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PORT_DIPSETTING(0x4a, "XX4Ah")
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PORT_DIPSETTING(0x4b, "XX4Bh")
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PORT_DIPSETTING(0x4c, "XX4Ch")
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PORT_DIPSETTING(0x4d, "XX4Dh")
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PORT_DIPSETTING(0x4e, "XX4Eh")
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PORT_DIPSETTING(0x4f, "XX4Fh")
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PORT_DIPSETTING(0x50, "XX50h")
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PORT_DIPSETTING(0x51, "XX51h")
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PORT_DIPSETTING(0x52, "XX52h")
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PORT_DIPSETTING(0x53, "XX53h")
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PORT_DIPSETTING(0x54, "XX54h")
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PORT_DIPSETTING(0x55, "XX55h")
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PORT_DIPSETTING(0x56, "XX56h")
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PORT_DIPSETTING(0x57, "XX57h")
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PORT_DIPSETTING(0x58, "XX58h")
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PORT_DIPSETTING(0x59, "XX59h")
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PORT_DIPSETTING(0x5a, "XX5Ah")
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PORT_DIPSETTING(0x5b, "XX5Bh")
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PORT_DIPSETTING(0x5c, "XX5Ch")
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PORT_DIPSETTING(0x5d, "XX5Dh")
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PORT_DIPSETTING(0x5e, "XX5Eh")
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PORT_DIPSETTING(0x5f, "XX5Fh")
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PORT_DIPSETTING(0x60, "XX60h")
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PORT_DIPSETTING(0x61, "XX61h")
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PORT_DIPSETTING(0x62, "XX62h")
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PORT_DIPSETTING(0x63, "XX63h")
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PORT_DIPSETTING(0x64, "XX64h")
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PORT_DIPSETTING(0x65, "XX65h")
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PORT_DIPSETTING(0x66, "XX66h")
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PORT_DIPSETTING(0x67, "XX67h")
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PORT_DIPSETTING(0x68, "XX68h")
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PORT_DIPSETTING(0x69, "XX69h")
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PORT_DIPSETTING(0x6a, "XX6Ah")
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PORT_DIPSETTING(0x6b, "XX6Bh")
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PORT_DIPSETTING(0x6c, "XX6Ch")
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PORT_DIPSETTING(0x6d, "XX6Dh")
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PORT_DIPSETTING(0x6e, "XX6Eh")
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PORT_DIPSETTING(0x6f, "XX6Fh")
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PORT_DIPSETTING(0x70, "XX70h")
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PORT_DIPSETTING(0x71, "XX71h")
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PORT_DIPSETTING(0x72, "XX72h")
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PORT_DIPSETTING(0x73, "XX73h")
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PORT_DIPSETTING(0x74, "XX74h")
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PORT_DIPSETTING(0x75, "XX75h")
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PORT_DIPSETTING(0x76, "XX76h")
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PORT_DIPSETTING(0x77, "XX77h")
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PORT_DIPSETTING(0x78, "XX78h")
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PORT_DIPSETTING(0x79, "XX79h")
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PORT_DIPSETTING(0x7a, "XX7Ah")
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PORT_DIPSETTING(0x7b, "XX7Bh")
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PORT_DIPSETTING(0x7c, "XX7Ch")
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PORT_DIPSETTING(0x7d, "XX7Dh")
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PORT_DIPSETTING(0x7e, "XX7Eh")
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PORT_DIPSETTING(0x7f, "XX7Fh")
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PORT_DIPSETTING(0x80, "XX80h")
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PORT_DIPSETTING(0x81, "XX81h")
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PORT_DIPSETTING(0x82, "XX82h")
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PORT_DIPSETTING(0x83, "XX83h")
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PORT_DIPSETTING(0x84, "XX84h")
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PORT_DIPSETTING(0x85, "XX85h")
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PORT_DIPSETTING(0x86, "XX86h")
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PORT_DIPSETTING(0x87, "XX87h")
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PORT_DIPSETTING(0x88, "XX88h")
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PORT_DIPSETTING(0x89, "XX89h")
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PORT_DIPSETTING(0x8a, "XX8Ah")
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PORT_DIPSETTING(0x8b, "XX8Bh")
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PORT_DIPSETTING(0x8c, "XX8Ch")
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PORT_DIPSETTING(0x8d, "XX8Dh")
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PORT_DIPSETTING(0x8e, "XX8Eh")
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PORT_DIPSETTING(0x8f, "XX8Fh")
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PORT_DIPSETTING(0x90, "XX90h")
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PORT_DIPSETTING(0x91, "XX91h")
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PORT_DIPSETTING(0x92, "XX92h")
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PORT_DIPSETTING(0x93, "XX93h")
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PORT_DIPSETTING(0x94, "XX94h")
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PORT_DIPSETTING(0x95, "XX95h")
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PORT_DIPSETTING(0x96, "XX96h")
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PORT_DIPSETTING(0x97, "XX97h")
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PORT_DIPSETTING(0x98, "XX98h")
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PORT_DIPSETTING(0x99, "XX99h")
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PORT_DIPSETTING(0x9a, "XX9Ah")
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PORT_DIPSETTING(0x9b, "XX9Bh")
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PORT_DIPSETTING(0x9c, "XX9Ch")
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PORT_DIPSETTING(0x9d, "XX9Dh")
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PORT_DIPSETTING(0x9e, "XX9Eh")
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PORT_DIPSETTING(0x9f, "XX9Fh")
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PORT_DIPSETTING(0xa0, "XXA0h")
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PORT_DIPSETTING(0xa1, "XXA1h")
|
||||
PORT_DIPSETTING(0xa2, "XXA2h")
|
||||
PORT_DIPSETTING(0xa3, "XXA3h")
|
||||
PORT_DIPSETTING(0xa4, "XXA4h")
|
||||
PORT_DIPSETTING(0xa5, "XXA5h")
|
||||
PORT_DIPSETTING(0xa6, "XXA6h")
|
||||
PORT_DIPSETTING(0xa7, "XXA7h")
|
||||
PORT_DIPSETTING(0xa8, "XXA8h")
|
||||
PORT_DIPSETTING(0xa9, "XXA9h")
|
||||
PORT_DIPSETTING(0xaa, "XXAAh")
|
||||
PORT_DIPSETTING(0xab, "XXABh")
|
||||
PORT_DIPSETTING(0xac, "XXACh")
|
||||
PORT_DIPSETTING(0xad, "XXADh")
|
||||
PORT_DIPSETTING(0xae, "XXAEh")
|
||||
PORT_DIPSETTING(0xaf, "XXAFh")
|
||||
PORT_DIPSETTING(0xb0, "XXB0h")
|
||||
PORT_DIPSETTING(0xb1, "XXB1h")
|
||||
PORT_DIPSETTING(0xb2, "XXB2h")
|
||||
PORT_DIPSETTING(0xb3, "XXB3h")
|
||||
PORT_DIPSETTING(0xb4, "XXB4h")
|
||||
PORT_DIPSETTING(0xb5, "XXB5h")
|
||||
PORT_DIPSETTING(0xb6, "XXB6h")
|
||||
PORT_DIPSETTING(0xb7, "XXB7h")
|
||||
PORT_DIPSETTING(0xb8, "XXB8h")
|
||||
PORT_DIPSETTING(0xb9, "XXB9h")
|
||||
PORT_DIPSETTING(0xba, "XXBAh")
|
||||
PORT_DIPSETTING(0xbb, "XXBBh")
|
||||
PORT_DIPSETTING(0xbc, "XXBCh")
|
||||
PORT_DIPSETTING(0xbd, "XXBDh")
|
||||
PORT_DIPSETTING(0xbe, "XXBEh")
|
||||
PORT_DIPSETTING(0xbf, "XXBFh")
|
||||
PORT_DIPSETTING(0xc0, "XXC0h")
|
||||
PORT_DIPSETTING(0xc1, "XXC1h")
|
||||
PORT_DIPSETTING(0xc2, "XXC2h")
|
||||
PORT_DIPSETTING(0xc3, "XXC3h")
|
||||
PORT_DIPSETTING(0xc4, "XXC4h")
|
||||
PORT_DIPSETTING(0xc5, "XXC5h")
|
||||
PORT_DIPSETTING(0xc6, "XXC6h")
|
||||
PORT_DIPSETTING(0xc7, "XXC7h")
|
||||
PORT_DIPSETTING(0xc8, "XXC8h")
|
||||
PORT_DIPSETTING(0xc9, "XXC9h")
|
||||
PORT_DIPSETTING(0xca, "XXCAh")
|
||||
PORT_DIPSETTING(0xcb, "XXCBh")
|
||||
PORT_DIPSETTING(0xcc, "XXCCh")
|
||||
PORT_DIPSETTING(0xcd, "XXCDh")
|
||||
PORT_DIPSETTING(0xce, "XXCEh")
|
||||
PORT_DIPSETTING(0xcf, "XXCFh")
|
||||
PORT_DIPSETTING(0xd0, "XXD0h")
|
||||
PORT_DIPSETTING(0xd1, "XXD1h")
|
||||
PORT_DIPSETTING(0xd2, "XXD2h")
|
||||
PORT_DIPSETTING(0xd3, "XXD3h")
|
||||
PORT_DIPSETTING(0xd4, "XXD4h")
|
||||
PORT_DIPSETTING(0xd5, "XXD5h")
|
||||
PORT_DIPSETTING(0xd6, "XXD6h")
|
||||
PORT_DIPSETTING(0xd7, "XXD7h")
|
||||
PORT_DIPSETTING(0xd8, "XXD8h")
|
||||
PORT_DIPSETTING(0xd9, "XXD9h")
|
||||
PORT_DIPSETTING(0xda, "XXDAh")
|
||||
PORT_DIPSETTING(0xdb, "XXDBh")
|
||||
PORT_DIPSETTING(0xdc, "XXDCh")
|
||||
PORT_DIPSETTING(0xdd, "XXDDh")
|
||||
PORT_DIPSETTING(0xde, "XXDEh")
|
||||
PORT_DIPSETTING(0xdf, "XXDFh")
|
||||
PORT_DIPSETTING(0xe0, "XXE0h")
|
||||
PORT_DIPSETTING(0xe1, "XXE1h")
|
||||
PORT_DIPSETTING(0xe2, "XXE2h")
|
||||
PORT_DIPSETTING(0xe3, "XXE3h")
|
||||
PORT_DIPSETTING(0xe4, "XXE4h")
|
||||
PORT_DIPSETTING(0xe5, "XXE5h")
|
||||
PORT_DIPSETTING(0xe6, "XXE6h")
|
||||
PORT_DIPSETTING(0xe7, "XXE7h")
|
||||
PORT_DIPSETTING(0xe8, "XXE8h")
|
||||
PORT_DIPSETTING(0xe9, "XXE9h")
|
||||
PORT_DIPSETTING(0xea, "XXEAh")
|
||||
PORT_DIPSETTING(0xeb, "XXEBh")
|
||||
PORT_DIPSETTING(0xec, "XXECh")
|
||||
PORT_DIPSETTING(0xed, "XXEDh")
|
||||
PORT_DIPSETTING(0xee, "XXEEh")
|
||||
PORT_DIPSETTING(0xef, "XXEFh")
|
||||
PORT_DIPSETTING(0xf0, "XXF0h")
|
||||
PORT_DIPSETTING(0xf1, "XXF1h")
|
||||
PORT_DIPSETTING(0xf2, "XXF2h")
|
||||
PORT_DIPSETTING(0xf3, "XXF3h")
|
||||
PORT_DIPSETTING(0xf4, "XXF4h")
|
||||
PORT_DIPSETTING(0xf5, "XXF5h")
|
||||
PORT_DIPSETTING(0xf6, "XXF6h")
|
||||
PORT_DIPSETTING(0xf7, "XXF7h")
|
||||
PORT_DIPSETTING(0xf8, "XXF8h")
|
||||
PORT_DIPSETTING(0xf9, "XXF9h")
|
||||
PORT_DIPSETTING(0xfa, "XXFAh")
|
||||
PORT_DIPSETTING(0xfb, "XXFBh")
|
||||
PORT_DIPSETTING(0xfc, "XXFCh")
|
||||
PORT_DIPSETTING(0xfd, "XXFDh")
|
||||
PORT_DIPSETTING(0xfe, "XXFEh")
|
||||
PORT_DIPSETTING(0xff, "XXFFh")
|
||||
|
||||
PORT_START("ADDRHI")
|
||||
PORT_DIPNAME(0xff, 0xf0, "Power-on Jump Address (High)") PORT_DIPLOCATION("JA:!8,!7,!6,!5,!4,!3,!2,!1")
|
||||
PORT_DIPSETTING(0x00, "00XXh")
|
||||
PORT_DIPSETTING(0x01, "01XXh")
|
||||
PORT_DIPSETTING(0x02, "02XXh")
|
||||
PORT_DIPSETTING(0x03, "03XXh")
|
||||
PORT_DIPSETTING(0x04, "04XXh")
|
||||
PORT_DIPSETTING(0x05, "05XXh")
|
||||
PORT_DIPSETTING(0x06, "06XXh")
|
||||
PORT_DIPSETTING(0x07, "07XXh")
|
||||
PORT_DIPSETTING(0x08, "08XXh")
|
||||
PORT_DIPSETTING(0x09, "09XXh")
|
||||
PORT_DIPSETTING(0x0a, "0AXXh")
|
||||
PORT_DIPSETTING(0x0b, "0BXXh")
|
||||
PORT_DIPSETTING(0x0c, "0CXXh")
|
||||
PORT_DIPSETTING(0x0d, "0DXXh")
|
||||
PORT_DIPSETTING(0x0e, "0EXXh")
|
||||
PORT_DIPSETTING(0x0f, "0FXXh")
|
||||
PORT_DIPSETTING(0x10, "10XXh")
|
||||
PORT_DIPSETTING(0x11, "11XXh")
|
||||
PORT_DIPSETTING(0x12, "12XXh")
|
||||
PORT_DIPSETTING(0x13, "13XXh")
|
||||
PORT_DIPSETTING(0x14, "14XXh")
|
||||
PORT_DIPSETTING(0x15, "15XXh")
|
||||
PORT_DIPSETTING(0x16, "16XXh")
|
||||
PORT_DIPSETTING(0x17, "17XXh")
|
||||
PORT_DIPSETTING(0x18, "18XXh")
|
||||
PORT_DIPSETTING(0x19, "19XXh")
|
||||
PORT_DIPSETTING(0x1a, "1AXXh")
|
||||
PORT_DIPSETTING(0x1b, "1BXXh")
|
||||
PORT_DIPSETTING(0x1c, "1CXXh")
|
||||
PORT_DIPSETTING(0x1d, "1DXXh")
|
||||
PORT_DIPSETTING(0x1e, "1EXXh")
|
||||
PORT_DIPSETTING(0x1f, "1FXXh")
|
||||
PORT_DIPSETTING(0x20, "20XXh")
|
||||
PORT_DIPSETTING(0x21, "21XXh")
|
||||
PORT_DIPSETTING(0x22, "22XXh")
|
||||
PORT_DIPSETTING(0x23, "23XXh")
|
||||
PORT_DIPSETTING(0x24, "24XXh")
|
||||
PORT_DIPSETTING(0x25, "25XXh")
|
||||
PORT_DIPSETTING(0x26, "26XXh")
|
||||
PORT_DIPSETTING(0x27, "27XXh")
|
||||
PORT_DIPSETTING(0x28, "28XXh")
|
||||
PORT_DIPSETTING(0x29, "29XXh")
|
||||
PORT_DIPSETTING(0x2a, "2AXXh")
|
||||
PORT_DIPSETTING(0x2b, "2BXXh")
|
||||
PORT_DIPSETTING(0x2c, "2CXXh")
|
||||
PORT_DIPSETTING(0x2d, "2DXXh")
|
||||
PORT_DIPSETTING(0x2e, "2EXXh")
|
||||
PORT_DIPSETTING(0x2f, "2FXXh")
|
||||
PORT_DIPSETTING(0x30, "30XXh")
|
||||
PORT_DIPSETTING(0x31, "31XXh")
|
||||
PORT_DIPSETTING(0x32, "32XXh")
|
||||
PORT_DIPSETTING(0x33, "33XXh")
|
||||
PORT_DIPSETTING(0x34, "34XXh")
|
||||
PORT_DIPSETTING(0x35, "35XXh")
|
||||
PORT_DIPSETTING(0x36, "36XXh")
|
||||
PORT_DIPSETTING(0x37, "37XXh")
|
||||
PORT_DIPSETTING(0x38, "38XXh")
|
||||
PORT_DIPSETTING(0x39, "39XXh")
|
||||
PORT_DIPSETTING(0x3a, "3AXXh")
|
||||
PORT_DIPSETTING(0x3b, "3BXXh")
|
||||
PORT_DIPSETTING(0x3c, "3CXXh")
|
||||
PORT_DIPSETTING(0x3d, "3DXXh")
|
||||
PORT_DIPSETTING(0x3e, "3EXXh")
|
||||
PORT_DIPSETTING(0x3f, "3FXXh")
|
||||
PORT_DIPSETTING(0x40, "40XXh")
|
||||
PORT_DIPSETTING(0x41, "41XXh")
|
||||
PORT_DIPSETTING(0x42, "42XXh")
|
||||
PORT_DIPSETTING(0x43, "43XXh")
|
||||
PORT_DIPSETTING(0x44, "44XXh")
|
||||
PORT_DIPSETTING(0x45, "45XXh")
|
||||
PORT_DIPSETTING(0x46, "46XXh")
|
||||
PORT_DIPSETTING(0x47, "47XXh")
|
||||
PORT_DIPSETTING(0x48, "48XXh")
|
||||
PORT_DIPSETTING(0x49, "49XXh")
|
||||
PORT_DIPSETTING(0x4a, "4AXXh")
|
||||
PORT_DIPSETTING(0x4b, "4BXXh")
|
||||
PORT_DIPSETTING(0x4c, "4CXXh")
|
||||
PORT_DIPSETTING(0x4d, "4DXXh")
|
||||
PORT_DIPSETTING(0x4e, "4EXXh")
|
||||
PORT_DIPSETTING(0x4f, "4FXXh")
|
||||
PORT_DIPSETTING(0x50, "50XXh")
|
||||
PORT_DIPSETTING(0x51, "51XXh")
|
||||
PORT_DIPSETTING(0x52, "52XXh")
|
||||
PORT_DIPSETTING(0x53, "53XXh")
|
||||
PORT_DIPSETTING(0x54, "54XXh")
|
||||
PORT_DIPSETTING(0x55, "55XXh")
|
||||
PORT_DIPSETTING(0x56, "56XXh")
|
||||
PORT_DIPSETTING(0x57, "57XXh")
|
||||
PORT_DIPSETTING(0x58, "58XXh")
|
||||
PORT_DIPSETTING(0x59, "59XXh")
|
||||
PORT_DIPSETTING(0x5a, "5AXXh")
|
||||
PORT_DIPSETTING(0x5b, "5BXXh")
|
||||
PORT_DIPSETTING(0x5c, "5CXXh")
|
||||
PORT_DIPSETTING(0x5d, "5DXXh")
|
||||
PORT_DIPSETTING(0x5e, "5EXXh")
|
||||
PORT_DIPSETTING(0x5f, "5FXXh")
|
||||
PORT_DIPSETTING(0x60, "60XXh")
|
||||
PORT_DIPSETTING(0x61, "61XXh")
|
||||
PORT_DIPSETTING(0x62, "62XXh")
|
||||
PORT_DIPSETTING(0x63, "63XXh")
|
||||
PORT_DIPSETTING(0x64, "64XXh")
|
||||
PORT_DIPSETTING(0x65, "65XXh")
|
||||
PORT_DIPSETTING(0x66, "66XXh")
|
||||
PORT_DIPSETTING(0x67, "67XXh")
|
||||
PORT_DIPSETTING(0x68, "68XXh")
|
||||
PORT_DIPSETTING(0x69, "69XXh")
|
||||
PORT_DIPSETTING(0x6a, "6AXXh")
|
||||
PORT_DIPSETTING(0x6b, "6BXXh")
|
||||
PORT_DIPSETTING(0x6c, "6CXXh")
|
||||
PORT_DIPSETTING(0x6d, "6DXXh")
|
||||
PORT_DIPSETTING(0x6e, "6EXXh")
|
||||
PORT_DIPSETTING(0x6f, "6FXXh")
|
||||
PORT_DIPSETTING(0x70, "70XXh")
|
||||
PORT_DIPSETTING(0x71, "71XXh")
|
||||
PORT_DIPSETTING(0x72, "72XXh")
|
||||
PORT_DIPSETTING(0x73, "73XXh")
|
||||
PORT_DIPSETTING(0x74, "74XXh")
|
||||
PORT_DIPSETTING(0x75, "75XXh")
|
||||
PORT_DIPSETTING(0x76, "76XXh")
|
||||
PORT_DIPSETTING(0x77, "77XXh")
|
||||
PORT_DIPSETTING(0x78, "78XXh")
|
||||
PORT_DIPSETTING(0x79, "79XXh")
|
||||
PORT_DIPSETTING(0x7a, "7AXXh")
|
||||
PORT_DIPSETTING(0x7b, "7BXXh")
|
||||
PORT_DIPSETTING(0x7c, "7CXXh")
|
||||
PORT_DIPSETTING(0x7d, "7DXXh")
|
||||
PORT_DIPSETTING(0x7e, "7EXXh")
|
||||
PORT_DIPSETTING(0x7f, "7FXXh")
|
||||
PORT_DIPSETTING(0x80, "80XXh")
|
||||
PORT_DIPSETTING(0x81, "81XXh")
|
||||
PORT_DIPSETTING(0x82, "82XXh")
|
||||
PORT_DIPSETTING(0x83, "83XXh")
|
||||
PORT_DIPSETTING(0x84, "84XXh")
|
||||
PORT_DIPSETTING(0x85, "85XXh")
|
||||
PORT_DIPSETTING(0x86, "86XXh")
|
||||
PORT_DIPSETTING(0x87, "87XXh")
|
||||
PORT_DIPSETTING(0x88, "88XXh")
|
||||
PORT_DIPSETTING(0x89, "89XXh")
|
||||
PORT_DIPSETTING(0x8a, "8AXXh")
|
||||
PORT_DIPSETTING(0x8b, "8BXXh")
|
||||
PORT_DIPSETTING(0x8c, "8CXXh")
|
||||
PORT_DIPSETTING(0x8d, "8DXXh")
|
||||
PORT_DIPSETTING(0x8e, "8EXXh")
|
||||
PORT_DIPSETTING(0x8f, "8FXXh")
|
||||
PORT_DIPSETTING(0x90, "90XXh")
|
||||
PORT_DIPSETTING(0x91, "91XXh")
|
||||
PORT_DIPSETTING(0x92, "92XXh")
|
||||
PORT_DIPSETTING(0x93, "93XXh")
|
||||
PORT_DIPSETTING(0x94, "94XXh")
|
||||
PORT_DIPSETTING(0x95, "95XXh")
|
||||
PORT_DIPSETTING(0x96, "96XXh")
|
||||
PORT_DIPSETTING(0x97, "97XXh")
|
||||
PORT_DIPSETTING(0x98, "98XXh")
|
||||
PORT_DIPSETTING(0x99, "99XXh")
|
||||
PORT_DIPSETTING(0x9a, "9AXXh")
|
||||
PORT_DIPSETTING(0x9b, "9BXXh")
|
||||
PORT_DIPSETTING(0x9c, "9CXXh")
|
||||
PORT_DIPSETTING(0x9d, "9DXXh")
|
||||
PORT_DIPSETTING(0x9e, "9EXXh")
|
||||
PORT_DIPSETTING(0x9f, "9FXXh")
|
||||
PORT_DIPSETTING(0xa0, "A0XXh")
|
||||
PORT_DIPSETTING(0xa1, "A1XXh")
|
||||
PORT_DIPSETTING(0xa2, "A2XXh")
|
||||
PORT_DIPSETTING(0xa3, "A3XXh")
|
||||
PORT_DIPSETTING(0xa4, "A4XXh")
|
||||
PORT_DIPSETTING(0xa5, "A5XXh")
|
||||
PORT_DIPSETTING(0xa6, "A6XXh")
|
||||
PORT_DIPSETTING(0xa7, "A7XXh")
|
||||
PORT_DIPSETTING(0xa8, "A8XXh")
|
||||
PORT_DIPSETTING(0xa9, "A9XXh")
|
||||
PORT_DIPSETTING(0xaa, "AAXXh")
|
||||
PORT_DIPSETTING(0xab, "ABXXh")
|
||||
PORT_DIPSETTING(0xac, "ACXXh")
|
||||
PORT_DIPSETTING(0xad, "ADXXh")
|
||||
PORT_DIPSETTING(0xae, "AEXXh")
|
||||
PORT_DIPSETTING(0xaf, "AFXXh")
|
||||
PORT_DIPSETTING(0xb0, "B0XXh")
|
||||
PORT_DIPSETTING(0xb1, "B1XXh")
|
||||
PORT_DIPSETTING(0xb2, "B2XXh")
|
||||
PORT_DIPSETTING(0xb3, "B3XXh")
|
||||
PORT_DIPSETTING(0xb4, "B4XXh")
|
||||
PORT_DIPSETTING(0xb5, "B5XXh")
|
||||
PORT_DIPSETTING(0xb6, "B6XXh")
|
||||
PORT_DIPSETTING(0xb7, "B7XXh")
|
||||
PORT_DIPSETTING(0xb8, "B8XXh")
|
||||
PORT_DIPSETTING(0xb9, "B9XXh")
|
||||
PORT_DIPSETTING(0xba, "BAXXh")
|
||||
PORT_DIPSETTING(0xbb, "BBXXh")
|
||||
PORT_DIPSETTING(0xbc, "BCXXh")
|
||||
PORT_DIPSETTING(0xbd, "BDXXh")
|
||||
PORT_DIPSETTING(0xbe, "BEXXh")
|
||||
PORT_DIPSETTING(0xbf, "BFXXh")
|
||||
PORT_DIPSETTING(0xc0, "C0XXh")
|
||||
PORT_DIPSETTING(0xc1, "C1XXh")
|
||||
PORT_DIPSETTING(0xc2, "C2XXh")
|
||||
PORT_DIPSETTING(0xc3, "C3XXh")
|
||||
PORT_DIPSETTING(0xc4, "C4XXh")
|
||||
PORT_DIPSETTING(0xc5, "C5XXh")
|
||||
PORT_DIPSETTING(0xc6, "C6XXh")
|
||||
PORT_DIPSETTING(0xc7, "C7XXh")
|
||||
PORT_DIPSETTING(0xc8, "C8XXh")
|
||||
PORT_DIPSETTING(0xc9, "C9XXh")
|
||||
PORT_DIPSETTING(0xca, "CAXXh")
|
||||
PORT_DIPSETTING(0xcb, "CBXXh")
|
||||
PORT_DIPSETTING(0xcc, "CCXXh")
|
||||
PORT_DIPSETTING(0xcd, "CDXXh")
|
||||
PORT_DIPSETTING(0xce, "CEXXh")
|
||||
PORT_DIPSETTING(0xcf, "CFXXh")
|
||||
PORT_DIPSETTING(0xd0, "D0XXh")
|
||||
PORT_DIPSETTING(0xd1, "D1XXh")
|
||||
PORT_DIPSETTING(0xd2, "D2XXh")
|
||||
PORT_DIPSETTING(0xd3, "D3XXh")
|
||||
PORT_DIPSETTING(0xd4, "D4XXh")
|
||||
PORT_DIPSETTING(0xd5, "D5XXh")
|
||||
PORT_DIPSETTING(0xd6, "D6XXh")
|
||||
PORT_DIPSETTING(0xd7, "D7XXh")
|
||||
PORT_DIPSETTING(0xd8, "D8XXh")
|
||||
PORT_DIPSETTING(0xd9, "D9XXh")
|
||||
PORT_DIPSETTING(0xda, "DAXXh")
|
||||
PORT_DIPSETTING(0xdb, "DBXXh")
|
||||
PORT_DIPSETTING(0xdc, "DCXXh")
|
||||
PORT_DIPSETTING(0xdd, "DDXXh")
|
||||
PORT_DIPSETTING(0xde, "DEXXh")
|
||||
PORT_DIPSETTING(0xdf, "DFXXh")
|
||||
PORT_DIPSETTING(0xe0, "E0XXh")
|
||||
PORT_DIPSETTING(0xe1, "E1XXh")
|
||||
PORT_DIPSETTING(0xe2, "E2XXh")
|
||||
PORT_DIPSETTING(0xe3, "E3XXh")
|
||||
PORT_DIPSETTING(0xe4, "E4XXh")
|
||||
PORT_DIPSETTING(0xe5, "E5XXh")
|
||||
PORT_DIPSETTING(0xe6, "E6XXh")
|
||||
PORT_DIPSETTING(0xe7, "E7XXh")
|
||||
PORT_DIPSETTING(0xe8, "E8XXh")
|
||||
PORT_DIPSETTING(0xe9, "E9XXh")
|
||||
PORT_DIPSETTING(0xea, "EAXXh")
|
||||
PORT_DIPSETTING(0xeb, "EBXXh")
|
||||
PORT_DIPSETTING(0xec, "ECXXh")
|
||||
PORT_DIPSETTING(0xed, "EDXXh")
|
||||
PORT_DIPSETTING(0xee, "EEXXh")
|
||||
PORT_DIPSETTING(0xef, "EFXXh")
|
||||
PORT_DIPSETTING(0xf0, "F0XXh")
|
||||
PORT_DIPSETTING(0xf1, "F1XXh")
|
||||
PORT_DIPSETTING(0xf2, "F2XXh")
|
||||
PORT_DIPSETTING(0xf3, "F3XXh")
|
||||
PORT_DIPSETTING(0xf4, "F4XXh")
|
||||
PORT_DIPSETTING(0xf5, "F5XXh")
|
||||
PORT_DIPSETTING(0xf6, "F6XXh")
|
||||
PORT_DIPSETTING(0xf7, "F7XXh")
|
||||
PORT_DIPSETTING(0xf8, "F8XXh")
|
||||
PORT_DIPSETTING(0xf9, "F9XXh")
|
||||
PORT_DIPSETTING(0xfa, "FAXXh")
|
||||
PORT_DIPSETTING(0xfb, "FBXXh")
|
||||
PORT_DIPSETTING(0xfc, "FCXXh")
|
||||
PORT_DIPSETTING(0xfd, "FDXXh")
|
||||
PORT_DIPSETTING(0xfe, "FEXXh")
|
||||
PORT_DIPSETTING(0xff, "FFXXh")
|
||||
|
||||
PORT_START("SEREN")
|
||||
PORT_DIPNAME(1, 1, "Enable Serial Port") PORT_DIPLOCATION("SER EN:!1")
|
||||
PORT_DIPSETTING(0, DEF_STR(Off))
|
||||
PORT_DIPSETTING(1, DEF_STR(On))
|
||||
|
||||
PORT_START("SERADDR")
|
||||
PORT_DIPNAME(0xf8, 0x20, "Serial Address Select") PORT_DIPLOCATION("A7-A3:!5,!4,!3,!2,!1")
|
||||
PORT_DIPSETTING(0x00, "00h-07h")
|
||||
PORT_DIPSETTING(0x08, "08h-0Fh")
|
||||
PORT_DIPSETTING(0x10, "10h-17h")
|
||||
PORT_DIPSETTING(0x18, "18h-1Fh")
|
||||
PORT_DIPSETTING(0x20, "20h-27h")
|
||||
PORT_DIPSETTING(0x28, "28h-2Fh")
|
||||
PORT_DIPSETTING(0x30, "30h-37h")
|
||||
PORT_DIPSETTING(0x38, "38h-3Fh")
|
||||
PORT_DIPSETTING(0x40, "40h-47h")
|
||||
PORT_DIPSETTING(0x48, "48h-4Fh")
|
||||
PORT_DIPSETTING(0x50, "50h-57h")
|
||||
PORT_DIPSETTING(0x58, "58h-5Fh")
|
||||
PORT_DIPSETTING(0x60, "60h-67h")
|
||||
PORT_DIPSETTING(0x68, "68h-6Fh")
|
||||
PORT_DIPSETTING(0x70, "70h-77h")
|
||||
PORT_DIPSETTING(0x78, "78h-7Fh")
|
||||
PORT_DIPSETTING(0x80, "80h-87h")
|
||||
PORT_DIPSETTING(0x88, "88h-8Fh")
|
||||
PORT_DIPSETTING(0x90, "90h-97h")
|
||||
PORT_DIPSETTING(0x98, "98h-9Fh")
|
||||
PORT_DIPSETTING(0xa0, "A0h-A7h")
|
||||
PORT_DIPSETTING(0xa8, "A8h-AFh")
|
||||
PORT_DIPSETTING(0xb0, "B0h-B7h")
|
||||
PORT_DIPSETTING(0xb8, "B8h-BFh")
|
||||
PORT_DIPSETTING(0xc0, "C0h-C7h")
|
||||
PORT_DIPSETTING(0xc8, "C8h-CFh")
|
||||
PORT_DIPSETTING(0xd0, "D0h-D7h")
|
||||
PORT_DIPSETTING(0xd8, "D8h-DFh")
|
||||
PORT_DIPSETTING(0xe0, "E0h-E7h")
|
||||
PORT_DIPSETTING(0xe8, "E8h-EFh")
|
||||
PORT_DIPSETTING(0xf0, "F0h-F7h")
|
||||
PORT_DIPSETTING(0xf8, "F8h-FFh")
|
||||
INPUT_PORTS_END
|
||||
|
||||
//*************************************
|
||||
//
|
||||
// Keyboard
|
||||
//
|
||||
//*************************************
|
||||
READ8_MEMBER( ccs_state::port20_r )
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
m_term_data = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ccs_state::port25_r )
|
||||
{
|
||||
return (m_term_data) ? 0x21 : 0x20;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ccs_state::port26_r )
|
||||
{
|
||||
if (m_26_count) m_26_count--;
|
||||
return m_26_count;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ccs_state::port20_w )
|
||||
{
|
||||
m_terminal->write(space, 0, data & 0x7f);
|
||||
}
|
||||
|
||||
void ccs_state::kbd_put(u8 data)
|
||||
{
|
||||
m_term_data = data;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static const ins8250_interface com_intf =
|
||||
{
|
||||
DEVCB_NOOP,
|
||||
DEVCB_NOOP,
|
||||
DEVCB_NOOP,
|
||||
DEVCB_NOOP,
|
||||
DEVCB_NOOP,
|
||||
DEVCB_NOOP
|
||||
};
|
||||
#endif
|
||||
|
||||
//*************************************
|
||||
//
|
||||
// Status / Control ports
|
||||
@ -285,33 +857,26 @@ WRITE8_MEMBER( ccs_state::port04_w )
|
||||
//*************************************
|
||||
WRITE8_MEMBER( ccs_state::port40_w )
|
||||
{
|
||||
membank("bankr0")->set_entry( (data) ? 1 : 0);
|
||||
//membank("bankr0")->set_entry( (data) ? 1 : 0);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( ccs_state, ccs )
|
||||
void ccs_state::machine_start()
|
||||
{
|
||||
membank("bankr0")->set_entry(0); // point at rom
|
||||
membank("bankw0")->set_entry(0); // always write to ram
|
||||
m_26_count = 0x41;
|
||||
m_maincpu->set_state_int(Z80_PC, 0xf000);
|
||||
save_item(NAME(m_power_on_status));
|
||||
}
|
||||
|
||||
void ccs_state::machine_reset()
|
||||
{
|
||||
// pRESET clears 74LS175 wired as shift register
|
||||
m_power_on_status = m_jump_en->read() | 8;
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER( ccs_state, ccs2810 )
|
||||
{
|
||||
uint8_t *main = memregion("maincpu")->base();
|
||||
|
||||
membank("bankr0")->configure_entry(1, &main[0x0000]);
|
||||
membank("bankr0")->configure_entry(0, &main[0x10000]);
|
||||
membank("bankw0")->configure_entry(0, &main[0x0000]);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER( ccs_state, ccs2422 )
|
||||
{
|
||||
uint8_t *main = memregion("maincpu")->base();
|
||||
|
||||
membank("bankr0")->configure_entry(1, &main[0x0000]);
|
||||
membank("bankr0")->configure_entry(0, &main[0x10000]);
|
||||
membank("bankw0")->configure_entry(0, &main[0x0000]);
|
||||
}
|
||||
|
||||
//*************************************
|
||||
@ -328,31 +893,51 @@ SLOT_INTERFACE_END
|
||||
|
||||
static MACHINE_CONFIG_START( ccs2810 )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu",Z80, XTAL_16MHz / 4)
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
|
||||
MCFG_CPU_PROGRAM_MAP(ccs2810_mem)
|
||||
MCFG_CPU_IO_MAP(ccs2810_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(ccs_state, ccs)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
|
||||
MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(ccs_state, kbd_put))
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("64K")
|
||||
|
||||
/* Devices */
|
||||
//MCFG_INS8250_ADD( "ins8250", com_intf, XTAL_1_8432MHz )
|
||||
MCFG_DEVICE_ADD("ins8250", INS8250, XTAL_1_8432MHz)
|
||||
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
|
||||
MCFG_INS8250_OUT_OUT1_CB(DEVWRITELINE("rs232", rs232_port_device, write_etc)) // RLSD
|
||||
|
||||
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
|
||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("ins8250", ins8250_device, rx_w))
|
||||
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ins8250", ins8250_device, ri_w))
|
||||
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("ins8250", ins8250_device, dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("ins8250", ins8250_device, dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("ins8250", ins8250_device, cts_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( ccs2422 )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu",Z80, XTAL_16MHz / 4)
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
|
||||
MCFG_CPU_PROGRAM_MAP(ccs2810_mem)
|
||||
MCFG_CPU_IO_MAP(ccs2422_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(ccs_state, ccs)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
|
||||
MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(ccs_state, kbd_put))
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("64K")
|
||||
|
||||
/* Devices */
|
||||
MCFG_DEVICE_ADD("ins8250", INS8250, XTAL_1_8432MHz)
|
||||
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
|
||||
MCFG_INS8250_OUT_OUT1_CB(DEVWRITELINE("rs232", rs232_port_device, write_etc)) // RLSD
|
||||
|
||||
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
|
||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("ins8250", ins8250_device, rx_w))
|
||||
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ins8250", ins8250_device, ri_w))
|
||||
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("ins8250", ins8250_device, dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("ins8250", ins8250_device, dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("ins8250", ins8250_device, cts_w))
|
||||
|
||||
MCFG_MB8877_ADD("fdc", XTAL_16MHz / 8) // UB1793 or MB8877
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", ccs_floppies, "8sssd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
@ -360,16 +945,16 @@ MACHINE_CONFIG_END
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( ccs2810 )
|
||||
ROM_REGION( 0x10800, "maincpu", 0 )
|
||||
ROM_LOAD( "ccs2810.u8", 0x10000, 0x0800, CRC(0c3054ea) SHA1(c554b7c44a61af13decb2785f3c9b33c6fc2bfce))
|
||||
ROM_REGION( 0x800, "maincpu", 0 )
|
||||
ROM_LOAD( "ccs2810.u8", 0x0000, 0x0800, CRC(0c3054ea) SHA1(c554b7c44a61af13decb2785f3c9b33c6fc2bfce))
|
||||
|
||||
ROM_REGION( 0x0100, "proms", 0 )
|
||||
ROM_LOAD_OPTIONAL( "5623.u9", 0x0000, 0x0100, NO_DUMP )
|
||||
ROM_REGION( 0x100, "proms", 0 )
|
||||
ROM_LOAD_OPTIONAL( "5623.u9", 0x0000, 0x0100, NO_DUMP ) // actual PROM type may differ
|
||||
ROM_END
|
||||
|
||||
ROM_START( ccs2422 )
|
||||
ROM_REGION( 0x10800, "maincpu", 0 )
|
||||
ROM_LOAD( "2422.u24", 0x10000, 0x0800, CRC(6b47586b) SHA1(73ba779a659da4a1f0e22a3fa351a2b36d8456a0))
|
||||
ROM_REGION( 0x800, "maincpu", 0 )
|
||||
ROM_LOAD( "2422.u24", 0x0000, 0x0800, CRC(6b47586b) SHA1(73ba779a659da4a1f0e22a3fa351a2b36d8456a0))
|
||||
|
||||
ROM_REGION( 0x300, "proms", 0 )
|
||||
ROM_LOAD_OPTIONAL( "2422.u23", 0x0000, 0x0100, CRC(b279cada) SHA1(6cc6e00ec49ba2245c8836d6f09266b09d6e7648))
|
||||
|
||||
Loading…
Reference in New Issue
Block a user