mirror of
https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
RobertoFresca
commit
8a21cd7337
@ -1595,6 +1595,8 @@ if (BUSES["VME"]~=null) then
|
||||
MAME_DIR .. "src/devices/bus/vme/vme_fcisio.h",
|
||||
MAME_DIR .. "src/devices/bus/vme/vme_fcscsi.cpp",
|
||||
MAME_DIR .. "src/devices/bus/vme/vme_fcscsi.h",
|
||||
MAME_DIR .. "src/devices/bus/vme/vme_hcpu30.cpp",
|
||||
MAME_DIR .. "src/devices/bus/vme/vme_hcpu30.h",
|
||||
}
|
||||
end
|
||||
|
||||
|
||||
192
src/devices/bus/vme/vme_hcpu30.cpp
Normal file
192
src/devices/bus/vme/vme_hcpu30.cpp
Normal file
@ -0,0 +1,192 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Sergey Svishchev
|
||||
|
||||
/*
|
||||
* Besta HCPU30 board, skeleton driver.
|
||||
*
|
||||
* Supported by SysV R3 "Bestix" port and also by Linux port,
|
||||
* see https://github.com/shattered/linux-m68k
|
||||
*
|
||||
* 68030 @ 33 MHz - primary CPU
|
||||
* 68882 @ ?? Mhz - FPU
|
||||
* 68020 @ ?? MHz - I/O CPU (using shared memory region)
|
||||
*
|
||||
* 4 or 16 MB of DRAM
|
||||
* 8 or 32 KB of NVRAM
|
||||
*
|
||||
* WD33C93 - SCSI
|
||||
* DP8473 - Floppy
|
||||
* i82586? - Ethernet
|
||||
* 62421 - Real-time clock
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "vme_hcpu30.h"
|
||||
|
||||
//#define LOG_GENERAL (1U << 0)
|
||||
#define LOG_SETUP (1U << 1)
|
||||
#define LOG_INT (1U << 2)
|
||||
|
||||
//#define VERBOSE (LOG_GENERAL | LOG_SETUP | LOG_INT)
|
||||
//#define LOG_OUTPUT_FUNC printf
|
||||
|
||||
#include "logmacro.h"
|
||||
|
||||
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
|
||||
#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#define FUNCNAME __func__
|
||||
#else
|
||||
#define FUNCNAME __PRETTY_FUNCTION__
|
||||
#endif
|
||||
|
||||
|
||||
#define DUSCC_CLOCK XTAL_14_7456MHz /* XXX Unverified */
|
||||
#define RS232P1_TAG "rs232p1"
|
||||
#define RS232P2_TAG "rs232p2"
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
DEFINE_DEVICE_TYPE(VME_HCPU30, vme_hcpu30_card_device, "hcpu30", "Besta HCPU30 CPU board")
|
||||
|
||||
static ADDRESS_MAP_START(hcpu30_mem, AS_PROGRAM, 32, vme_hcpu30_card_device)
|
||||
AM_RANGE(0x00000000, 0x00000007) AM_ROM AM_READ(bootvect_r) /* ROM mirror just during reset */
|
||||
AM_RANGE(0x00000000, 0x00000007) AM_RAM AM_WRITE(bootvect_w) /* After first write we act as RAM */
|
||||
AM_RANGE(0x00000008, 0x001fffff) AM_RAM // local bus DRAM, 4MB
|
||||
AM_RANGE(0x00200000, 0x00201fff) AM_RAM // AM_SHARE("iocpu")
|
||||
AM_RANGE(0xff000000, 0xff007fff) AM_ROM AM_MIRROR(0x8000) AM_REGION("user1", 0)
|
||||
AM_RANGE(0xff020000, 0xff027fff) AM_RAM AM_MIRROR(0x8000) // SRAM 32KB
|
||||
AM_RANGE(0xffff8000, 0xffff8fff) AM_UNMAP // shared memory with iocpu
|
||||
AM_RANGE(0xffff9000, 0xffff9fff) AM_RAM // SRAM, optional: battery-backed
|
||||
AM_RANGE(0xfffff100, 0xfffff11f) AM_UNMAP // VME bus configuration (accessed after DIP switch read)
|
||||
AM_RANGE(0xfffff120, 0xfffff123) AM_READ_PORT("SA1")
|
||||
AM_RANGE(0xfffff200, 0xfffff2ff) AM_UNMAP
|
||||
AM_RANGE(0xfffff300, 0xfffff3ff) AM_DEVREADWRITE8("duscc", duscc68562_device, read, write, 0xffffffff)
|
||||
AM_RANGE(0xfffff600, 0xfffff6ff) AM_UNMAP
|
||||
AM_RANGE(0xfffff700, 0xfffff7ff) AM_UNMAP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START(hcpu30)
|
||||
PORT_START("SA1")
|
||||
PORT_DIPNAME(0x03000000, 0x00000000, "Console port speed")
|
||||
PORT_DIPSETTING(0x00000000, "9600")
|
||||
PORT_DIPSETTING(0x01000000, "19200")
|
||||
PORT_DIPSETTING(0x02000000, "38400")
|
||||
PORT_DIPSETTING(0x03000000, "4800")
|
||||
PORT_DIPNAME(0x04000000, 0x04000000, "Boot into...")
|
||||
PORT_DIPSETTING(0x00000000, "UNIX")
|
||||
PORT_DIPSETTING(0x04000000, "Monitor")
|
||||
PORT_DIPNAME(0x10000000, 0x00000000, "VME bus width")
|
||||
PORT_DIPSETTING(0x00000000, "32 bits")
|
||||
PORT_DIPSETTING(0x10000000, "16 bits")
|
||||
PORT_DIPNAME(0x20000000, 0x00000000, "VME bus free")
|
||||
PORT_DIPSETTING(0x00000000, "ROR")
|
||||
PORT_DIPSETTING(0x20000000, "not ROR")
|
||||
PORT_DIPNAME(0x40000000, 0x00000000, "Cache burst mode")
|
||||
PORT_DIPSETTING(0x00000000, "Off")
|
||||
PORT_DIPSETTING(0x40000000, "On")
|
||||
PORT_DIPNAME(0x80000000, 0x00000000, "Undefined")
|
||||
PORT_DIPSETTING(0x00000000, "Off")
|
||||
PORT_DIPSETTING(0x80000000, "On")
|
||||
INPUT_PORTS_END
|
||||
|
||||
ROM_START(hcpu30)
|
||||
ROM_REGION32_BE(0x8000, "user1", ROMREGION_ERASEFF)
|
||||
ROM_LOAD("hcpu30.27c256.dat", 0x0000, 0x8000, CRC(d24da66e) SHA1(5431b0559b168a995e725b35e1465a0b8ee8aa72))
|
||||
ROM_END
|
||||
|
||||
//-------------------------------------------------
|
||||
// rom_region - device-specific ROM region
|
||||
//-------------------------------------------------
|
||||
|
||||
const tiny_rom_entry *vme_hcpu30_card_device::device_rom_region() const
|
||||
{
|
||||
return ROM_NAME(hcpu30);
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// input_ports - device-specific input ports
|
||||
//-------------------------------------------------
|
||||
|
||||
ioport_constructor vme_hcpu30_card_device::device_input_ports() const
|
||||
{
|
||||
return INPUT_PORTS_NAME(hcpu30);
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_add_mconfig - add device configuration
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_CONFIG_MEMBER(vme_hcpu30_card_device::device_add_mconfig)
|
||||
MCFG_CPU_ADD("maincpu", M68030, 2*16670000)
|
||||
MCFG_CPU_PROGRAM_MAP(hcpu30_mem)
|
||||
|
||||
MCFG_DUSCC68562_ADD("duscc", DUSCC_CLOCK, 0, 0, 0, 0)
|
||||
MCFG_DUSCC_OUT_TXDA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_txd))
|
||||
MCFG_DUSCC_OUT_DTRA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_dtr))
|
||||
MCFG_DUSCC_OUT_RTSA_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
|
||||
MCFG_DUSCC_OUT_TXDB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_txd))
|
||||
MCFG_DUSCC_OUT_DTRB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_dtr))
|
||||
MCFG_DUSCC_OUT_RTSB_CB(DEVWRITELINE(RS232P2_TAG, rs232_port_device, write_rts))
|
||||
// MCFG_DUSCC_OUT_INT_CB(DEVWRITELINE()
|
||||
|
||||
MCFG_RS232_PORT_ADD (RS232P1_TAG, default_rs232_devices, "terminal")
|
||||
MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, rxa_w))
|
||||
MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, ctsa_w))
|
||||
|
||||
MCFG_RS232_PORT_ADD (RS232P2_TAG, default_rs232_devices, nullptr)
|
||||
MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, rxb_w))
|
||||
MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, ctsb_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset */
|
||||
READ32_MEMBER(vme_hcpu30_card_device::bootvect_r)
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
return m_sysrom[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(vme_hcpu30_card_device::bootvect_w)
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
|
||||
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
|
||||
m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
|
||||
}
|
||||
|
||||
vme_hcpu30_card_device::vme_hcpu30_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, type, tag, owner, clock)
|
||||
, device_vme_card_interface(mconfig, *this)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_dusccterm(*this, "duscc")
|
||||
{
|
||||
LOG("%s %s\n", tag, FUNCNAME);
|
||||
m_slot = 1;
|
||||
}
|
||||
|
||||
vme_hcpu30_card_device::vme_hcpu30_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: vme_hcpu30_card_device(mconfig, VME_HCPU30, tag, owner, clock)
|
||||
{
|
||||
}
|
||||
|
||||
void vme_hcpu30_card_device::device_start()
|
||||
{
|
||||
LOG("%s %s\n", tag(), FUNCNAME);
|
||||
|
||||
set_vme_device();
|
||||
|
||||
save_pointer (NAME (m_sysrom), sizeof(m_sysrom));
|
||||
save_pointer (NAME (m_sysram), sizeof(m_sysram));
|
||||
|
||||
/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
|
||||
m_sysrom = (uint32_t*)(memregion ("user1")->base());
|
||||
}
|
||||
|
||||
void vme_hcpu30_card_device::device_reset()
|
||||
{
|
||||
LOG("%s %s\n", tag(), FUNCNAME);
|
||||
}
|
||||
46
src/devices/bus/vme/vme_hcpu30.h
Normal file
46
src/devices/bus/vme/vme_hcpu30.h
Normal file
@ -0,0 +1,46 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Sergey Svishchev
|
||||
#ifndef MAME_BUS_VME_VME_HCPU30_H
|
||||
#define MAME_BUS_VME_VME_HCPU30_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "bus/vme/vme.h"
|
||||
#include "bus/rs232/rs232.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "machine/68230pit.h"
|
||||
#include "machine/scnxx562.h"
|
||||
#include "machine/terminal.h"
|
||||
#include "machine/wd33c93.h"
|
||||
|
||||
DECLARE_DEVICE_TYPE(VME_HCPU30, vme_hcpu30_card_device)
|
||||
|
||||
class vme_hcpu30_card_device : public device_t, public device_vme_card_interface
|
||||
{
|
||||
public:
|
||||
vme_hcpu30_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_READ32_MEMBER(bootvect_r);
|
||||
DECLARE_WRITE32_MEMBER(bootvect_w);
|
||||
|
||||
protected:
|
||||
vme_hcpu30_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// optional information overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<duscc68562_device> m_dusccterm;
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
|
||||
uint32_t *m_sysrom;
|
||||
uint32_t m_sysram[2];
|
||||
};
|
||||
|
||||
#endif // MAME_BUS_VME_VME_HCPU30_H
|
||||
@ -101,6 +101,7 @@
|
||||
#include "bus/vme/vme_fcisio.h"
|
||||
#include "bus/vme/vme_fcscsi.h"
|
||||
#include "bus/vme/vme_mzr8300.h"
|
||||
#include "bus/vme/vme_hcpu30.h"
|
||||
#include "machine/clock.h"
|
||||
|
||||
#define LOG_GENERAL 0x01
|
||||
@ -168,6 +169,7 @@ static SLOT_INTERFACE_START(miniforce_vme_cards)
|
||||
SLOT_INTERFACE("fccpu21", VME_FCCPU21)
|
||||
SLOT_INTERFACE("fcisio", VME_FCISIO1)
|
||||
SLOT_INTERFACE("fcscsi", VME_FCSCSI1)
|
||||
SLOT_INTERFACE("hcpu30", VME_HCPU30)
|
||||
SLOT_INTERFACE_END
|
||||
|
||||
/*
|
||||
|
||||
@ -45,11 +45,16 @@
|
||||
#include "bus/rs232/rs232.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/m6502/m6502.h"
|
||||
#include "machine/am9513.h"
|
||||
#include "machine/mos6551.h" // debug tty
|
||||
#include "machine/mc146818.h"
|
||||
#include "sound/sn76496.h"
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
#define VIDEO_CLOCK 25200000
|
||||
|
||||
class tek440x_state : public driver_device
|
||||
{
|
||||
public:
|
||||
@ -147,14 +152,14 @@ static ADDRESS_MAP_START( maincpu_map, AS_PROGRAM, 16, tek440x_state )
|
||||
AM_RANGE(0x780000, 0x781fff) AM_RAM // map registers
|
||||
// 782000-783fff: video address registers
|
||||
// 784000-785fff: video control registers
|
||||
// 788000-789fff: SN76496 audio
|
||||
AM_RANGE(0x788000, 0x788001) AM_DEVWRITE8("snsnd", sn76496_device, write, 0xff00)
|
||||
// 78a000-78bfff: NS32081 FPU
|
||||
AM_RANGE(0x78c000, 0x78c007) AM_DEVREADWRITE8("aica", mos6551_device, read, write, 0xff00)
|
||||
// 7b1000-7b2fff: diagnostic registers
|
||||
// 7b2000-7b3fff: Centronics printer data
|
||||
// 7b4000-7b5fff: 68681 DUART
|
||||
// 7b6000-7b7fff: Mouse
|
||||
// 7b8000-7b9fff: AM9513 timer
|
||||
AM_RANGE(0x7b8000, 0x7b8003) AM_MIRROR(0x100) AM_DEVREADWRITE("timer", am9513_device, read16, write16)
|
||||
// 7ba000-7bbfff: MC146818 RTC
|
||||
// 7bc000-7bdfff: SCSI bus address registers
|
||||
// 7be000-7bffff: SCSI (NCR 5385)
|
||||
@ -183,7 +188,7 @@ INPUT_PORTS_END
|
||||
static MACHINE_CONFIG_START( tek4404 )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68010, 166666666)
|
||||
MCFG_CPU_ADD("maincpu", M68010, 16666666)
|
||||
MCFG_CPU_PROGRAM_MAP(maincpu_map)
|
||||
|
||||
MCFG_CPU_ADD("fdccpu", M6502, 1000000)
|
||||
@ -204,11 +209,18 @@ static MACHINE_CONFIG_START( tek4404 )
|
||||
MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
|
||||
MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
|
||||
|
||||
MCFG_DEVICE_ADD("timer", AM9513, 16666666 / 10) // from CPU E output
|
||||
|
||||
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aica", mos6551_device, write_rxd))
|
||||
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("aica", mos6551_device, write_dcd))
|
||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("aica", mos6551_device, write_dsr))
|
||||
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("aica", mos6551_device, write_cts))
|
||||
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
MCFG_SOUND_ADD("snsnd", SN76496, VIDEO_CLOCK / 8)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -237,4 +249,4 @@ ROM_END
|
||||
*
|
||||
*************************************/
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT DEVICE INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1984, tek4404, 0, 0, tek4404, tek4404, tek440x_state, 0, "Tektronix", "4404", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
COMP( 1984, tek4404, 0, 0, tek4404, tek4404, tek440x_state, 0, "Tektronix", "4404 Artificial Intelligence System", MACHINE_NOT_WORKING )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user