i186: move 80186 peripherals into the cpu [Carl]
leland: finish modernizing the leland sound and use new 80186 [Carl]
This commit is contained in:
cracyc
parent
6d1a42504d
commit
8af5aa8dd3
2
.gitattributes
vendored
2
.gitattributes
vendored
@ -512,6 +512,8 @@ src/emu/cpu/i8085/8085dasm.c svneol=native#text/plain
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src/emu/cpu/i8085/i8085.c svneol=native#text/plain
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src/emu/cpu/i8085/i8085.h svneol=native#text/plain
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src/emu/cpu/i8085/i8085cpu.h svneol=native#text/plain
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src/emu/cpu/i86/i186.c svneol=native#text/plain
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src/emu/cpu/i86/i186.h svneol=native#text/plain
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src/emu/cpu/i86/i286.c svneol=native#text/plain
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src/emu/cpu/i86/i286.h svneol=native#text/plain
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src/emu/cpu/i86/i86.c svneol=native#text/plain
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@ -798,6 +798,7 @@ $(CPUOBJ)/mcs96/i8xc196.inc: $(CPUSRC)/mcs96/mcs96make.py $(CPUSRC)/mcs96/mcs96o
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ifneq ($(filter I86,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/i86 $(CPUOBJ)/i386
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CPUOBJS += $(CPUOBJ)/i86/i86.o
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CPUOBJS += $(CPUOBJ)/i86/i186.o
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CPUOBJS += $(CPUOBJ)/i86/i286.o
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DASMOBJS += $(CPUOBJ)/i386/i386dasm.o
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endif
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@ -812,6 +813,11 @@ $(CPUOBJ)/i86/i86.o: $(CPUSRC)/i86/i86.c \
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$(CPUSRC)/i86/i86.h \
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$(CPUSRC)/i86/i86inline.h
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$(CPUOBJ)/i86/i186.o: $(CPUSRC)/i86/i186.c \
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$(CPUSRC)/i86/i86.h \
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$(CPUSRC)/i86/i186.h \
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$(CPUSRC)/i86/i86inline.h
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$(CPUOBJ)/i86/i286.o: $(CPUSRC)/i86/i286.c \
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$(CPUSRC)/i86/i86.h \
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$(CPUSRC)/i86/i286.h \
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1683
src/emu/cpu/i86/i186.c
Normal file
1683
src/emu/cpu/i86/i186.c
Normal file
File diff suppressed because it is too large
Load Diff
154
src/emu/cpu/i86/i186.h
Normal file
154
src/emu/cpu/i86/i186.h
Normal file
@ -0,0 +1,154 @@
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#ifndef I186_H__
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#define I186_H__
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#include "emu.h"
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#include "i86.h"
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extern const device_type I80186;
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extern const device_type I80188;
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class i80186_cpu_device : public i8086_common_cpu_device
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{
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public:
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// construction/destruction
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i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size);
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template<class _Object> static devcb2_base &static_set_read_slave_ack_callback(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_read_slave_ack_func.set_callback(object); }
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template<class _Object> static devcb2_base &static_set_chip_select_callback(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_out_chip_select_func.set_callback(object); }
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template<class _Object> static devcb2_base &static_set_tmrout0_handler(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_out_tmrout0_func.set_callback(object); }
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template<class _Object> static devcb2_base &static_set_tmrout1_handler(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_out_tmrout1_func.set_callback(object); }
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IRQ_CALLBACK_MEMBER(int_callback);
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DECLARE_WRITE_LINE_MEMBER(drq0_w) { if(state) drq_callback(0); m_dma[0].drq_state = state; }
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DECLARE_WRITE_LINE_MEMBER(drq1_w) { if(state) drq_callback(1); m_dma[1].drq_state = state; }
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DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
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DECLARE_WRITE_LINE_MEMBER(tmrin1_w) { if(state && (m_timer[1].control & 0x8004) == 0x8004) { inc_timer(1); } }
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DECLARE_WRITE_LINE_MEMBER(int0_w) { external_int(0, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state, 0); }
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DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state, 0); }
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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protected:
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virtual void execute_run();
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virtual void device_start();
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virtual void device_reset();
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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virtual UINT32 execute_input_lines() const { return 1; }
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virtual UINT8 fetch_op();
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virtual UINT8 fetch();
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UINT32 pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
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virtual UINT8 read_port_byte(UINT16 port);
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virtual UINT16 read_port_word(UINT16 port);
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virtual void write_port_byte(UINT16 port, UINT8 data);
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virtual void write_port_word(UINT16 port, UINT16 data);
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static const UINT8 m_i80186_timing[200];
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private:
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void update_interrupt_state();
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void handle_eoi(int data);
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void external_int(UINT16 intno, int state, UINT8 vector);
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void internal_timer_sync(int which);
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void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
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void update_dma_control(int which, int new_control);
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void drq_callback(int which);
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void inc_timer(int which);
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DECLARE_READ16_MEMBER(internal_port_r);
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DECLARE_WRITE16_MEMBER(internal_port_w);
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struct mem_state
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{
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UINT16 lower;
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UINT16 upper;
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UINT16 middle;
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UINT16 middle_size;
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UINT16 peripheral;
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};
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struct timer_state
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{
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UINT16 control;
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UINT16 maxA;
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UINT16 maxB;
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bool active_count;
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UINT16 count;
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emu_timer *int_timer;
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emu_timer *time_timer;
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UINT8 time_timer_active;
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attotime last_time;
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};
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struct dma_state
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{
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bool drq_delay;
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bool drq_state;
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UINT32 source;
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UINT32 dest;
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UINT16 count;
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UINT16 control;
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emu_timer *finish_timer;
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};
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struct intr_state
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{
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UINT8 pending;
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UINT16 ack_mask;
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UINT16 priority_mask;
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UINT16 in_service;
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UINT16 request;
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UINT16 status;
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UINT16 poll_status;
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UINT16 timer;
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UINT16 dma[2];
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UINT16 ext[4];
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};
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static const device_timer_id TIMER_INT0 = 0;
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static const device_timer_id TIMER_INT1 = 1;
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static const device_timer_id TIMER_INT2 = 2;
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static const device_timer_id TIMER_TIME0 = 3;
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static const device_timer_id TIMER_TIME1 = 4;
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static const device_timer_id TIMER_TIME2 = 5;
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static const device_timer_id TIMER_DMA0 = 6;
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static const device_timer_id TIMER_DMA1 = 7;
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struct timer_state m_timer[3];
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struct dma_state m_dma[2];
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struct intr_state m_intr;
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struct mem_state m_mem;
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UINT16 m_reloc;
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address_space_config m_program_config;
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address_space_config m_io_config;
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devcb2_read8 m_read_slave_ack_func;
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devcb2_write16 m_out_chip_select_func;
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devcb2_write_line m_out_tmrout0_func;
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devcb2_write_line m_out_tmrout1_func;
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};
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class i80188_cpu_device : public i80186_cpu_device
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{
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public:
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// construction/destruction
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i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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#define MCFG_80186_IRQ_SLAVE_ACK(_devcb) \
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devcb = &i80186_cpu_device::static_set_read_slave_ack_callback(*device, DEVCB2_##_devcb);
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#define MCFG_80186_CHIP_SELECT_CB(_devcb) \
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devcb = &i80186_cpu_device::static_set_chip_select_callback(*device, DEVCB2_##_devcb);
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#define MCFG_80186_TMROUT0_HANDLER(_devcb) \
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devcb = &i80186_cpu_device::static_set_tmrout0_handler(*device, DEVCB2_##_devcb);
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#define MCFG_80186_TMROUT1_HANDLER(_devcb) \
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devcb = &i80186_cpu_device::static_set_tmrout1_handler(*device, DEVCB2_##_devcb);
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#endif
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@ -77,78 +77,6 @@ const UINT8 i8086_cpu_device::m_i8086_timing[] =
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18, 9,17, /* MOVS 8-bit */
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18, 9,17, /* MOVS 16-bit */
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};
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/* these come from the Intel 80186 datasheet */
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const UINT8 i80186_cpu_device::m_i80186_timing[] =
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{
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45,28, /* exception, IRET */
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0, 2, 4, 3, /* INTs */
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2, /* segment overrides */
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2, 2, 3, /* flag operations */
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8, 7,19,15, /* arithmetic adjusts */
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4, 4, /* decimal adjusts */
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2, 4, /* sign extension */
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2,18, 6, 2, 6,11, /* misc */
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14,14,14, /* direct JMPs */
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11,17,26, /* indirect JMPs */
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15,23, /* direct CALLs */
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13,19,38, /* indirect CALLs */
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16,22,18,25, /* returns */
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4,13, 5,15, /* conditional JMPs */
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6,16, 6,16, /* loops */
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10,10, 8, 8, /* port reads */
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9, 9, 7, 7, /* port writes */
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2, 9,12, /* move, 8-bit */
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3,12, /* move, 8-bit immediate */
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2, 9,12, /* move, 16-bit */
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4,13, /* move, 16-bit immediate */
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8, 8, 9, 9, /* move, AL/AX memory */
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2,11, 2,11, /* move, segment registers */
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4,17, /* exchange, 8-bit */
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4,17, 3, /* exchange, 16-bit */
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10,16, 9, 9, /* pushes */
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10,20, 8, 8, /* pops */
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3,10,10, /* ALU ops, 8-bit */
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4,16,10, /* ALU ops, 8-bit immediate */
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3,10,10, /* ALU ops, 16-bit */
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4,16,10, /* ALU ops, 16-bit immediate */
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4,16,10, /* ALU ops, 16-bit w/8-bit immediate */
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26,35,32,41, /* MUL */
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25,34,31,40, /* IMUL */
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29,38,35,44, /* DIV */
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44,53,50,59, /* IDIV */
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3, 3,15,15, /* INC/DEC */
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3, 3,10,10, /* NEG/NOT */
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2, 5, 1, /* reg shift/rotate */
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15,17, 1, /* m8 shift/rotate */
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15,17, 1, /* m16 shift/rotate */
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22, 5,22, /* CMPS 8-bit */
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22, 5,22, /* CMPS 16-bit */
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15, 5,15, /* SCAS 8-bit */
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15, 5,15, /* SCAS 16-bit */
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12, 6,11, /* LODS 8-bit */
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12, 6,11, /* LODS 16-bit */
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10, 6, 9, /* STOS 8-bit */
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10, 6, 9, /* STOS 16-bit */
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14, 8, 8, /* MOVS 8-bit */
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14, 8, 8, /* MOVS 16-bit */
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14, 8, 8, /* (80186) INS 8-bit */
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14, 8, 8, /* (80186) INS 16-bit */
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14, 8, 8, /* (80186) OUTS 8-bit */
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14, 8, 8, /* (80186) OUTS 16-bit */
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14,68,83, /* (80186) PUSH immediate, PUSHA/POPA */
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22,29, /* (80186) IMUL immediate 8-bit */
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25,32, /* (80186) IMUL immediate 16-bit */
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15,25,4,16, 8, /* (80186) ENTER/LEAVE */
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33, /* (80186) BOUND */
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};
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/***************************************************************************/
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/* cpu state */
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@ -159,405 +87,6 @@ const UINT8 i80186_cpu_device::m_i80186_timing[] =
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const device_type I8086 = &device_creator<i8086_cpu_device>;
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const device_type I8088 = &device_creator<i8088_cpu_device>;
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const device_type I80186 = &device_creator<i80186_cpu_device>;
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const device_type I80188 = &device_creator<i80188_cpu_device>;
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i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: i80186_cpu_device(mconfig, I80188, "I80188", tag, owner, clock, "i80188", __FILE__, 8)
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{
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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m_fetch_xor = 0;
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}
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: i8086_common_cpu_device(mconfig, I80186, "I80186", tag, owner, clock, "i80186", __FILE__)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, 20, 0)
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, m_io_config("io", ENDIANNESS_LITTLE, 16, 16, 0)
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{
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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m_fetch_xor = BYTE_XOR_LE(0);
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}
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size)
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: i8086_common_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_LITTLE, data_bus_size, 20, 0)
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, m_io_config("io", ENDIANNESS_LITTLE, data_bus_size, 16, 0)
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{
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}
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UINT8 i80186_cpu_device::fetch_op()
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{
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UINT8 data;
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data = m_direct->read_decrypted_byte(pc(), m_fetch_xor);
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m_ip++;
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return data;
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}
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UINT8 i80186_cpu_device::fetch()
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{
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UINT8 data;
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data = m_direct->read_raw_byte(pc(), m_fetch_xor);
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m_ip++;
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return data;
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}
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void i80186_cpu_device::execute_run()
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{
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while(m_icount > 0 )
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{
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if ( m_seg_prefix_next )
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{
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m_seg_prefix = true;
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m_seg_prefix_next = false;
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}
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else
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{
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m_prev_ip = m_ip;
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m_seg_prefix = false;
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/* Dispatch IRQ */
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if ( m_pending_irq && m_no_interrupt == 0 )
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{
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if ( m_pending_irq & NMI_IRQ )
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{
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interrupt(I8086_NMI_INT_VECTOR);
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m_pending_irq &= ~NMI_IRQ;
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}
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else if ( m_IF )
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{
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/* the actual vector is retrieved after pushing flags */
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/* and clearing the IF */
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interrupt(-1);
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}
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}
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/* No interrupt allowed between last instruction and this one */
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if ( m_no_interrupt )
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{
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m_no_interrupt--;
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}
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/* trap should allow one instruction to be executed */
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if ( m_fire_trap )
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{
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if ( m_fire_trap >= 2 )
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{
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interrupt(1);
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m_fire_trap = 0;
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}
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else
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{
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m_fire_trap++;
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}
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}
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}
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debugger_instruction_hook( this, pc() );
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UINT8 op = fetch_op();
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switch(op)
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{
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case 0x60: // i_pusha
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{
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UINT32 tmp = m_regs.w[SP];
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PUSH(m_regs.w[AX]);
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PUSH(m_regs.w[CX]);
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PUSH(m_regs.w[DX]);
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PUSH(m_regs.w[BX]);
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PUSH(tmp);
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PUSH(m_regs.w[BP]);
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PUSH(m_regs.w[SI]);
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PUSH(m_regs.w[DI]);
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CLK(PUSHA);
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}
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break;
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case 0x61: // i_popa
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m_regs.w[DI] = POP();
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m_regs.w[SI] = POP();
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m_regs.w[BP] = POP();
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POP();
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m_regs.w[BX] = POP();
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m_regs.w[DX] = POP();
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m_regs.w[CX] = POP();
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m_regs.w[AX] = POP();
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CLK(POPA);
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break;
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case 0x62: // i_bound
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{
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UINT32 low,high,tmp;
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m_modrm = fetch();
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low = GetRMWord();
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high = GetnextRMWord();
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tmp = RegWord();
|
||||
if (tmp<low || tmp>high)
|
||||
interrupt(5);
|
||||
CLK(BOUND);
|
||||
logerror("%s: %06x: bound %04x high %04x low %04x tmp\n", tag(), pc(), high, low, tmp);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x68: // i_push_d16
|
||||
PUSH( fetch_word() );
|
||||
CLK(PUSH_IMM);
|
||||
break;
|
||||
|
||||
case 0x69: // i_imul_d16
|
||||
{
|
||||
UINT32 tmp;
|
||||
DEF_r16w();
|
||||
tmp = fetch_word();
|
||||
m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)tmp);
|
||||
m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
|
||||
RegWord(m_dst);
|
||||
CLKM(IMUL_RRI16, IMUL_RMI16);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x6a: // i_push_d8
|
||||
PUSH( (UINT16)((INT16)((INT8)fetch())) );
|
||||
CLK(PUSH_IMM);
|
||||
break;
|
||||
|
||||
case 0x6b: // i_imul_d8
|
||||
{
|
||||
UINT32 src2;
|
||||
DEF_r16w();
|
||||
src2= (UINT16)((INT16)((INT8)fetch()));
|
||||
m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)src2);
|
||||
m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
|
||||
RegWord(m_dst);
|
||||
CLKM(IMUL_RRI8, IMUL_RMI8);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x6c: // i_insb
|
||||
i_insb();
|
||||
break;
|
||||
|
||||
case 0x6d: // i_insw
|
||||
i_insw();
|
||||
break;
|
||||
|
||||
case 0x6e: // i_outsb
|
||||
i_outsb();
|
||||
break;
|
||||
|
||||
case 0x6f: // i_outsw
|
||||
i_outsw();
|
||||
break;
|
||||
|
||||
case 0x8e: // i_mov_sregw
|
||||
m_modrm = fetch();
|
||||
m_src = GetRMWord();
|
||||
CLKM(MOV_SR,MOV_SM);
|
||||
switch (m_modrm & 0x38)
|
||||
{
|
||||
case 0x00: /* mov es,ew */
|
||||
m_sregs[ES] = m_src;
|
||||
break;
|
||||
case 0x10: /* mov ss,ew */
|
||||
m_sregs[SS] = m_src;
|
||||
m_no_interrupt = 1;
|
||||
break;
|
||||
case 0x18: /* mov ds,ew */
|
||||
m_sregs[DS] = m_src;
|
||||
break;
|
||||
default:
|
||||
logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
|
||||
interrupt(6);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xc0: // i_rotshft_bd8
|
||||
{
|
||||
UINT8 c;
|
||||
m_modrm = fetch();
|
||||
m_src = GetRMByte();
|
||||
m_dst = m_src;
|
||||
c = fetch() & 0x1f;
|
||||
CLKM(ROT_REG_BASE,ROT_M8_BASE);
|
||||
m_icount -= m_timing[ROT_REG_BIT] * c;
|
||||
if (c)
|
||||
{
|
||||
switch ( m_modrm & 0x38 )
|
||||
{
|
||||
case 0x00: do { ROL_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x08: do { ROR_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x10: do { ROLC_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x18: do { RORC_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x30:
|
||||
case 0x20: SHL_BYTE(c); break;
|
||||
case 0x28: SHR_BYTE(c); break;
|
||||
case 0x38: SHRA_BYTE(c); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xc1: // i_rotshft_wd8
|
||||
{
|
||||
UINT8 c;
|
||||
m_modrm = fetch();
|
||||
m_src = GetRMWord();
|
||||
m_dst = m_src;
|
||||
c = fetch() & 0x1f;
|
||||
CLKM(ROT_REG_BASE,ROT_M16_BASE);
|
||||
m_icount -= m_timing[ROT_REG_BIT] * c;
|
||||
if (c)
|
||||
{
|
||||
switch ( m_modrm & 0x38 )
|
||||
{
|
||||
case 0x00: do { ROL_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x08: do { ROR_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x10: do { ROLC_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x18: do { RORC_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x30:
|
||||
case 0x20: SHL_WORD(c); break;
|
||||
case 0x28: SHR_WORD(c); break;
|
||||
case 0x38: SHRA_WORD(c); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xc8: // i_enter
|
||||
{
|
||||
UINT16 nb = fetch();
|
||||
UINT32 level;
|
||||
|
||||
nb |= fetch() << 8;
|
||||
level = fetch();
|
||||
CLK(!level ? ENTER0 : (level == 1) ? ENTER1 : ENTER_BASE);
|
||||
if(level > 1)
|
||||
m_icount -= level * m_timing[ENTER_COUNT];
|
||||
PUSH(m_regs.w[BP]);
|
||||
m_regs.w[BP] = m_regs.w[SP];
|
||||
m_regs.w[SP] -= nb;
|
||||
for (int i=1; i<level; i++)
|
||||
{
|
||||
PUSH( GetMemW(SS,m_regs.w[BP] - i*2) );
|
||||
}
|
||||
if (level)
|
||||
{
|
||||
PUSH(m_regs.w[BP]);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xc9: // i_leave
|
||||
m_regs.w[SP] = m_regs.w[BP];
|
||||
m_regs.w[BP] = POP();
|
||||
CLK(LEAVE);
|
||||
break;
|
||||
|
||||
case 0xd2: // i_rotshft_bcl
|
||||
{
|
||||
UINT8 c;
|
||||
|
||||
m_modrm = fetch();
|
||||
m_src = GetRMByte();
|
||||
m_dst = m_src;
|
||||
c = m_regs.b[CL] & 0x1f;
|
||||
CLKM(ROT_REG_BASE,ROT_M16_BASE);
|
||||
m_icount -= m_timing[ROT_REG_BIT] * c;
|
||||
if (c)
|
||||
{
|
||||
switch ( m_modrm & 0x38 )
|
||||
{
|
||||
case 0x00: do { ROL_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x08: do { ROR_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x10: do { ROLC_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x18: do { RORC_BYTE(); c--; } while (c>0); PutbackRMByte(m_dst); break;
|
||||
case 0x30:
|
||||
case 0x20: SHL_BYTE(c); break;
|
||||
case 0x28: SHR_BYTE(c); break;
|
||||
case 0x38: SHRA_BYTE(c); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xd3: // i_rotshft_wcl
|
||||
{
|
||||
UINT8 c;
|
||||
|
||||
m_modrm = fetch();
|
||||
m_src = GetRMWord();
|
||||
m_dst = m_src;
|
||||
c = m_regs.b[CL] & 0x1f;
|
||||
CLKM(ROT_REG_BASE,ROT_M16_BASE);
|
||||
m_icount -= m_timing[ROT_REG_BIT] * c;
|
||||
if (c)
|
||||
{
|
||||
switch ( m_modrm & 0x38 )
|
||||
{
|
||||
case 0x00: do { ROL_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x08: do { ROR_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x10: do { ROLC_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x18: do { RORC_WORD(); c--; } while (c>0); PutbackRMWord(m_dst); break;
|
||||
case 0x30:
|
||||
case 0x20: SHL_WORD(c); break;
|
||||
case 0x28: SHR_WORD(c); break;
|
||||
case 0x38: SHRA_WORD(c); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xf2: // i_repne
|
||||
case 0xf3:
|
||||
{
|
||||
bool pass = false;
|
||||
UINT8 next = repx_op();
|
||||
UINT16 c = m_regs.w[CX];
|
||||
|
||||
switch (next)
|
||||
{
|
||||
case 0x6c: CLK(OVERRIDE); if (c) do { i_insb(); c--; } while (c>0 && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
|
||||
case 0x6d: CLK(OVERRIDE); if (c) do { i_insw(); c--; } while (c>0 && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
|
||||
case 0x6e: CLK(OVERRIDE); if (c) do { i_outsb(); c--; } while (c>0 && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
|
||||
case 0x6f: CLK(OVERRIDE); if (c) do { i_outsw(); c--; } while (c>0 && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
|
||||
default:
|
||||
// Decrement IP and pass on
|
||||
m_ip -= 1 + (m_seg_prefix_next ? 1 : 0);
|
||||
pass = true;
|
||||
}
|
||||
if(!pass)
|
||||
{
|
||||
if(c)
|
||||
m_ip = m_prev_ip;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
default:
|
||||
if(!common_op(op))
|
||||
{
|
||||
m_icount -= 10; // UD fault timing?
|
||||
logerror("%s: %06x: Invalid Opcode %02x\n", tag(), pc(), op);
|
||||
m_ip = m_prev_ip;
|
||||
interrupt(6); // 80186 has #UD
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void i80186_cpu_device::device_start()
|
||||
{
|
||||
i8086_common_cpu_device::device_start();
|
||||
state_add( I8086_ES, "ES", m_sregs[ES] ).callimport().callexport().formatstr("%04X");
|
||||
state_add( I8086_CS, "CS", m_sregs[CS] ).callimport().callexport().formatstr("%04X");
|
||||
state_add( I8086_SS, "SS", m_sregs[SS] ).callimport().callexport().formatstr("%04X");
|
||||
state_add( I8086_DS, "DS", m_sregs[DS] ).callimport().callexport().formatstr("%04X");
|
||||
state_add( I8086_VECTOR, "V", m_int_vector).callimport().callexport().formatstr("%02X");
|
||||
|
||||
state_add(STATE_GENPC, "curpc", m_pc).callimport().callexport().formatstr("%05X");
|
||||
}
|
||||
|
||||
i8088_cpu_device::i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: i8086_cpu_device(mconfig, I8088, "I8088", tag, owner, clock, "i8088", __FILE__, 8)
|
||||
@ -960,7 +489,6 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state )
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
offs_t i8086_common_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
|
||||
{
|
||||
extern int i386_dasm_one(char *buffer, offs_t eip, const UINT8 *oprom, int mode);
|
||||
@ -2262,6 +1790,11 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
|
||||
case 0xd4: // i_aam
|
||||
{
|
||||
UINT8 base = fetch();
|
||||
if(!base)
|
||||
{
|
||||
interrupt(0);
|
||||
break;
|
||||
}
|
||||
m_regs.b[AH] = m_regs.b[AL] / base;
|
||||
m_regs.b[AL] %= base;
|
||||
set_SZPF_Word(m_regs.w[AX]);
|
||||
|
||||
@ -7,18 +7,10 @@
|
||||
|
||||
extern const device_type I8086;
|
||||
extern const device_type I8088;
|
||||
extern const device_type I80186;
|
||||
extern const device_type I80188;
|
||||
|
||||
#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
|
||||
#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
|
||||
#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
|
||||
#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
|
||||
#define INPUT_LINE_TEST 20
|
||||
#define INPUT_LINE_DRQ0 21
|
||||
#define INPUT_LINE_DRQ1 22
|
||||
#define INPUT_LINE_TMRIN0 23
|
||||
#define INPUT_LINE_TMRIN1 24
|
||||
|
||||
|
||||
enum
|
||||
{
|
||||
@ -346,7 +338,7 @@ public:
|
||||
protected:
|
||||
virtual void execute_run();
|
||||
virtual void device_start();
|
||||
virtual UINT32 execute_input_lines() const { return 2; }
|
||||
virtual UINT32 execute_input_lines() const { return 1; }
|
||||
virtual UINT8 fetch_op();
|
||||
virtual UINT8 fetch();
|
||||
UINT32 pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
|
||||
@ -363,35 +355,5 @@ public:
|
||||
i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
class i80186_cpu_device : public i8086_common_cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size);
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
|
||||
|
||||
protected:
|
||||
virtual void execute_run();
|
||||
virtual void device_start();
|
||||
virtual UINT32 execute_input_lines() const { return 9; }
|
||||
virtual UINT8 fetch_op();
|
||||
virtual UINT8 fetch();
|
||||
UINT32 pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
|
||||
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_io_config;
|
||||
static const UINT8 m_i80186_timing[200];
|
||||
};
|
||||
|
||||
class i80188_cpu_device : public i80186_cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
#endif /* __I8086_H__ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -26,12 +26,11 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "machine/eepromser.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "includes/leland.h"
|
||||
#include "sound/2151intf.h"
|
||||
|
||||
|
||||
#define MASTER_CLOCK XTAL_28_63636MHz
|
||||
@ -56,10 +55,10 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( master_map_io, AS_IO, 8, leland_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x04, 0x04) AM_DEVREAD_LEGACY("custom", leland_80186_response_r)
|
||||
AM_RANGE(0x05, 0x05) AM_DEVWRITE_LEGACY("custom", leland_80186_command_hi_w)
|
||||
AM_RANGE(0x06, 0x06) AM_DEVWRITE_LEGACY("custom", leland_80186_command_lo_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_DEVWRITE_LEGACY("custom", ataxx_80186_control_w)
|
||||
AM_RANGE(0x04, 0x04) AM_DEVREAD("custom", leland_80186_sound_device, leland_80186_response_r)
|
||||
AM_RANGE(0x05, 0x05) AM_DEVWRITE("custom", leland_80186_sound_device, leland_80186_command_hi_w)
|
||||
AM_RANGE(0x06, 0x06) AM_DEVWRITE("custom", leland_80186_sound_device, leland_80186_command_lo_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("custom", leland_80186_sound_device, ataxx_80186_control_w)
|
||||
AM_RANGE(0x20, 0x20) AM_READWRITE(ataxx_eeprom_r, ataxx_eeprom_w)
|
||||
AM_RANGE(0xd0, 0xef) AM_READWRITE(ataxx_mvram_port_r, ataxx_mvram_port_w)
|
||||
AM_RANGE(0xf0, 0xff) AM_READWRITE(ataxx_master_input_r, ataxx_master_output_w)
|
||||
@ -301,9 +300,11 @@ static MACHINE_CONFIG_START( ataxx, leland_state )
|
||||
MCFG_CPU_PROGRAM_MAP(slave_map_program)
|
||||
MCFG_CPU_IO_MAP(slave_map_io)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", I80186, XTAL_16MHz)
|
||||
MCFG_CPU_ADD("audiocpu", I80186, XTAL_16MHz/2)
|
||||
MCFG_CPU_PROGRAM_MAP(leland_80186_map_program)
|
||||
MCFG_CPU_IO_MAP(ataxx_80186_map_io)
|
||||
MCFG_80186_CHIP_SELECT_CB(DEVWRITE16("custom", leland_80186_sound_device, peripheral_ctrl))
|
||||
MCFG_80186_TMROUT0_HANDLER(DEVWRITELINE("custom", leland_80186_sound_device, i80186_tmr0_w))
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(leland_state,ataxx)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(leland_state,ataxx)
|
||||
@ -317,21 +318,16 @@ static MACHINE_CONFIG_START( ataxx, leland_state )
|
||||
MCFG_FRAGMENT_ADD(ataxx_video)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
MCFG_SOUND_ADD("custom", LELAND_80186, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
MCFG_DEVICE_ADD("custom", ATAXX_80186, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( wsf, ataxx )
|
||||
MCFG_CPU_MODIFY("audiocpu")
|
||||
MCFG_80186_TMROUT1_HANDLER(DEVWRITELINE("custom", leland_80186_sound_device, i80186_tmr1_w))
|
||||
|
||||
/* basic machine hardware */
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_YM2151_ADD("ymsnd", 4000000)
|
||||
MCFG_SOUND_ROUTE(0, "mono", 0.40)
|
||||
MCFG_SOUND_ROUTE(1, "mono", 0.40)
|
||||
MCFG_DEVICE_REMOVE("custom")
|
||||
MCFG_DEVICE_ADD("custom", WSF_80186, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
#include "emu.h"
|
||||
#include "cpu/s2650/s2650.h"
|
||||
#include "cpu/i8085/i8085.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
class bingo_state : public driver_device
|
||||
{
|
||||
|
||||
@ -438,7 +438,7 @@
|
||||
************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "cpu/pic16c5x/pic16c5x.h"
|
||||
#include "sound/saa1099.h"
|
||||
|
||||
|
||||
@ -28,7 +28,7 @@ code doesn't make much sense, wrong mapping? bad?
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
|
||||
class gambl186_state : public driver_device
|
||||
|
||||
@ -96,7 +96,7 @@ Game is V30 based, with rom banking (2Mb)
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/nec/nec.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "sound/okim6376.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "fashion.lh"
|
||||
@ -143,6 +143,7 @@ public:
|
||||
UINT32 screen_update_tourvisn(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
UINT32 screen_update_brasil(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(vblank_irq);
|
||||
INTERRUPT_GEN_MEMBER(vblank_irq_80186);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<okim6376_device> m_okim6376;
|
||||
};
|
||||
@ -1063,6 +1064,11 @@ INTERRUPT_GEN_MEMBER(highvdeo_state::vblank_irq)
|
||||
device.execute().set_input_line_and_vector(0,HOLD_LINE,0x08/4);
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(highvdeo_state::vblank_irq_80186)
|
||||
{
|
||||
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( tv_vcf, highvdeo_state )
|
||||
MCFG_CPU_ADD("maincpu", V30, XTAL_12MHz/2 ) // ?
|
||||
MCFG_CPU_PROGRAM_MAP(tv_vcf_map)
|
||||
@ -1134,14 +1140,14 @@ static MACHINE_CONFIG_DERIVED( ciclone, tv_tcf )
|
||||
MCFG_CPU_ADD("maincpu", I80186, 20000000/2 ) // ?
|
||||
MCFG_CPU_PROGRAM_MAP(tv_tcf_map)
|
||||
MCFG_CPU_IO_MAP(tv_tcf_io)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", highvdeo_state, vblank_irq)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", highvdeo_state, vblank_irq_80186)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( brasil, highvdeo_state )
|
||||
MCFG_CPU_ADD("maincpu", I80186, 20000000 ) // fashion doesn't like 20/2 Mhz
|
||||
MCFG_CPU_PROGRAM_MAP(brasil_map)
|
||||
MCFG_CPU_IO_MAP(brasil_io)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", highvdeo_state, vblank_irq)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", highvdeo_state, vblank_irq_80186)
|
||||
|
||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
|
||||
|
||||
@ -42,7 +42,7 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "machine/eepromser.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
@ -71,12 +71,16 @@ static ADDRESS_MAP_START( master_map_program, AS_PROGRAM, 8, leland_state )
|
||||
AM_RANGE(0xf800, 0xf801) AM_WRITE(leland_master_video_addr_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( master_map_io, AS_IO, 8, leland_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0xfd, 0xff) AM_READWRITE(leland_master_analog_key_r, leland_master_analog_key_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( master_redline_map_io, AS_IO, 8, leland_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(leland_master_alt_bankswitch_w)
|
||||
AM_RANGE(0xf2, 0xf2) AM_DEVREADWRITE_LEGACY("custom", leland_80186_response_r, leland_80186_command_lo_w)
|
||||
AM_RANGE(0xf4, 0xf4) AM_DEVWRITE_LEGACY("custom", leland_80186_command_hi_w)
|
||||
AM_RANGE(0xf2, 0xf2) AM_DEVREADWRITE("custom", leland_80186_sound_device, leland_80186_response_r, leland_80186_command_lo_w)
|
||||
AM_RANGE(0xf4, 0xf4) AM_DEVWRITE("custom", leland_80186_sound_device, leland_80186_command_hi_w)
|
||||
AM_RANGE(0xfd, 0xff) AM_READWRITE(leland_master_analog_key_r, leland_master_analog_key_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -748,7 +752,6 @@ static MACHINE_CONFIG_START( leland, leland_state )
|
||||
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD(leland_video)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
@ -760,42 +763,44 @@ static MACHINE_CONFIG_START( leland, leland_state )
|
||||
MCFG_SOUND_CONFIG(ay8910_config)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
|
||||
MCFG_SOUND_ADD("custom", LELAND, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_SOUND_ADD("dac0", DAC, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
MCFG_SOUND_ADD("dac1", DAC, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( redline, leland )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_MODIFY("master")
|
||||
MCFG_CPU_IO_MAP(master_redline_map_io)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", I80186, MCU_CLOCK)
|
||||
MCFG_CPU_ADD("audiocpu", I80186, MCU_CLOCK/2)
|
||||
MCFG_CPU_PROGRAM_MAP(leland_80186_map_program)
|
||||
MCFG_CPU_IO_MAP(redline_80186_map_io)
|
||||
MCFG_80186_CHIP_SELECT_CB(DEVWRITE16("custom", leland_80186_sound_device, peripheral_ctrl))
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SOUND_REPLACE("custom", REDLINE_80186, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
MCFG_DEVICE_ADD("custom", REDLINE_80186, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( quarterb, redline )
|
||||
|
||||
/* basic machine hardware */
|
||||
|
||||
MCFG_CPU_MODIFY("audiocpu")
|
||||
MCFG_CPU_IO_MAP(leland_80186_map_io)
|
||||
MCFG_80186_TMROUT0_HANDLER(DEVWRITELINE("custom", leland_80186_sound_device, i80186_tmr0_w))
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SOUND_REPLACE("custom", LELAND_80186, 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
MCFG_DEVICE_REPLACE("custom", LELAND_80186, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( lelandi, quarterb )
|
||||
|
||||
/* basic machine hardware */
|
||||
|
||||
MCFG_CPU_MODIFY("slave")
|
||||
MCFG_CPU_PROGRAM_MAP(slave_large_map_program)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
|
||||
class neptunp2_state : public driver_device
|
||||
|
||||
@ -36,7 +36,7 @@ To do:
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/h83002/h8.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "cpu/z180/z180.h"
|
||||
#include "sound/3812intf.h"
|
||||
#include "sound/okim6295.h"
|
||||
|
||||
@ -24,7 +24,7 @@ CPU is an Intel 80188
|
||||
*************************************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
|
||||
class timetrv_state : public driver_device
|
||||
|
||||
@ -5,6 +5,10 @@
|
||||
*************************************************************************/
|
||||
|
||||
#include "machine/eepromser.h"
|
||||
#include "sound/2151intf.h"
|
||||
#include "sound/dac.h"
|
||||
#include "machine/pit8253.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
#define LELAND_BATTERY_RAM_SIZE 0x4000
|
||||
#define ATAXX_EXTRA_TRAM_SIZE 0x800
|
||||
@ -16,7 +20,7 @@ struct vram_state_data
|
||||
UINT8 m_latch[2];
|
||||
};
|
||||
|
||||
|
||||
class leland_80186_sound_device;
|
||||
|
||||
class leland_state : public driver_device
|
||||
{
|
||||
@ -25,11 +29,17 @@ public:
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_master(*this, "master"),
|
||||
m_slave(*this, "slave"),
|
||||
m_eeprom(*this, "eeprom") { }
|
||||
m_eeprom(*this, "eeprom"),
|
||||
m_sound(*this, "custom"),
|
||||
m_dac0(*this, "dac0"),
|
||||
m_dac1(*this, "dac1") { }
|
||||
|
||||
required_device<cpu_device> m_master;
|
||||
required_device<cpu_device> m_slave;
|
||||
required_device<eeprom_serial_93cxx_device> m_eeprom;
|
||||
optional_device<leland_80186_sound_device> m_sound;
|
||||
optional_device<dac_device> m_dac0;
|
||||
optional_device<dac_device> m_dac1;
|
||||
|
||||
UINT8 m_dac_control;
|
||||
UINT8 *m_alleymas_kludge_mem;
|
||||
@ -146,6 +156,7 @@ public:
|
||||
DECLARE_MACHINE_START(leland);
|
||||
DECLARE_MACHINE_RESET(leland);
|
||||
DECLARE_VIDEO_START(leland);
|
||||
DECLARE_VIDEO_START(leland2);
|
||||
DECLARE_VIDEO_START(ataxx);
|
||||
UINT32 screen_update_leland(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
UINT32 screen_update_ataxx(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -197,45 +208,72 @@ void leland_rotate_memory(running_machine &machine, const char *cpuname);
|
||||
|
||||
/*----------- defined in audio/leland.c -----------*/
|
||||
|
||||
class leland_sound_device : public device_t,
|
||||
public device_sound_interface
|
||||
{
|
||||
public:
|
||||
leland_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
leland_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
~leland_sound_device() { global_free(m_token); }
|
||||
|
||||
// access to legacy token
|
||||
void *token() const { assert(m_token != NULL); return m_token; }
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
// sound stream update overrides
|
||||
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
|
||||
private:
|
||||
// internal state
|
||||
void *m_token;
|
||||
};
|
||||
|
||||
extern const device_type LELAND;
|
||||
|
||||
class leland_80186_sound_device : public leland_sound_device
|
||||
class leland_80186_sound_device : public device_t
|
||||
{
|
||||
public:
|
||||
leland_80186_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
leland_80186_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(peripheral_ctrl);
|
||||
DECLARE_WRITE8_MEMBER(leland_80186_control_w);
|
||||
DECLARE_WRITE8_MEMBER(ataxx_80186_control_w);
|
||||
DECLARE_READ16_MEMBER(peripheral_r);
|
||||
DECLARE_WRITE16_MEMBER(peripheral_w);
|
||||
DECLARE_WRITE8_MEMBER(leland_80186_command_lo_w);
|
||||
DECLARE_WRITE8_MEMBER(leland_80186_command_hi_w);
|
||||
DECLARE_READ16_MEMBER(main_to_sound_comm_r);
|
||||
DECLARE_READ8_MEMBER(leland_80186_response_r);
|
||||
DECLARE_WRITE16_MEMBER(sound_to_main_comm_w);
|
||||
DECLARE_WRITE16_MEMBER(dac_w);
|
||||
DECLARE_WRITE16_MEMBER(ataxx_dac_control);
|
||||
DECLARE_WRITE_LINE_MEMBER(pit0_2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pit1_0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pit1_1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pit1_2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pit2_0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(i80186_tmr0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(i80186_tmr1_w);
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
int m_type;
|
||||
|
||||
enum {
|
||||
TYPE_LELAND,
|
||||
TYPE_REDLINE,
|
||||
TYPE_ATAXX,
|
||||
TYPE_WSF
|
||||
};
|
||||
|
||||
required_device<dac_device> m_dac;
|
||||
|
||||
// sound stream update overrides
|
||||
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
|
||||
private:
|
||||
void command_lo_sync(void *ptr, int param);
|
||||
void delayed_response_r(void *ptr, int param);
|
||||
void set_clock_line(int which, bool state) { m_clock_active = state ? (m_clock_active | (1<<which)) : (m_clock_active & ~(1<<which)); }
|
||||
// internal state
|
||||
i80186_cpu_device *m_audiocpu;
|
||||
UINT16 m_peripheral;
|
||||
UINT8 m_last_control;
|
||||
UINT8 m_clock_active;
|
||||
UINT8 m_clock_tick;
|
||||
UINT16 m_sound_command;
|
||||
UINT16 m_sound_response;
|
||||
UINT32 m_ext_start;
|
||||
UINT32 m_ext_stop;
|
||||
UINT8 m_ext_active;
|
||||
UINT8* m_ext_base;
|
||||
INT16 m_dac_sample[8];
|
||||
UINT8 m_dac_volume[8];
|
||||
emu_timer *m_dac_timer;
|
||||
|
||||
required_device<pit8254_device> m_pit0;
|
||||
optional_device<pit8254_device> m_pit1;
|
||||
optional_device<pit8254_device> m_pit2;
|
||||
optional_device<ym2151_device> m_ymsnd;
|
||||
};
|
||||
|
||||
extern const device_type LELAND_80186;
|
||||
@ -244,28 +282,29 @@ class redline_80186_sound_device : public leland_80186_sound_device
|
||||
{
|
||||
public:
|
||||
redline_80186_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
// sound stream update overrides
|
||||
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
|
||||
private:
|
||||
// internal state
|
||||
DECLARE_WRITE16_MEMBER(redline_dac_w);
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
};
|
||||
|
||||
extern const device_type REDLINE_80186;
|
||||
|
||||
class ataxx_80186_sound_device : public leland_80186_sound_device
|
||||
{
|
||||
public:
|
||||
ataxx_80186_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
};
|
||||
|
||||
void leland_dac_update(device_t *device, int dacnum, UINT8 sample);
|
||||
extern const device_type ATAXX_80186;
|
||||
|
||||
DECLARE_READ8_DEVICE_HANDLER( leland_80186_response_r );
|
||||
class wsf_80186_sound_device : public leland_80186_sound_device
|
||||
{
|
||||
public:
|
||||
wsf_80186_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
};
|
||||
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_control_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_command_lo_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( ataxx_80186_control_w );
|
||||
extern const device_type WSF_80186;
|
||||
|
||||
ADDRESS_MAP_EXTERN(leland_80186_map_program, 16);
|
||||
ADDRESS_MAP_EXTERN(leland_80186_map_io, 16);
|
||||
|
||||
@ -467,7 +467,7 @@ WRITE8_MEMBER(leland_state::leland_master_alt_bankswitch_w)
|
||||
(this->*m_update_master_bank)();
|
||||
|
||||
/* sound control is in the rest */
|
||||
leland_80186_control_w(machine().device("custom"), space, offset, data);
|
||||
m_sound->leland_80186_control_w(space, offset, data);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -29,15 +29,14 @@
|
||||
|
||||
TIMER_CALLBACK_MEMBER(leland_state::scanline_callback)
|
||||
{
|
||||
device_t *audio = machine().device("custom");
|
||||
int scanline = param;
|
||||
|
||||
/* update the DACs */
|
||||
if (!(m_dac_control & 0x01))
|
||||
leland_dac_update(audio, 0, m_video_ram[(m_last_scanline) * 256 + 160]);
|
||||
m_dac0->write_unsigned8(m_video_ram[(m_last_scanline) * 256 + 160]);
|
||||
|
||||
if (!(m_dac_control & 0x02))
|
||||
leland_dac_update(audio, 1, m_video_ram[(m_last_scanline) * 256 + 161]);
|
||||
m_dac1->write_unsigned8(m_video_ram[(m_last_scanline) * 256 + 161]);
|
||||
|
||||
m_last_scanline = scanline;
|
||||
|
||||
@ -65,11 +64,10 @@ VIDEO_START_MEMBER(leland_state,leland)
|
||||
|
||||
}
|
||||
|
||||
|
||||
VIDEO_START_MEMBER(leland_state,ataxx)
|
||||
{
|
||||
/* first do the standard stuff */
|
||||
VIDEO_START_CALL_MEMBER(leland);
|
||||
m_video_ram = auto_alloc_array_clear(machine(), UINT8, VRAM_SIZE);
|
||||
|
||||
/* allocate memory */
|
||||
m_ataxx_qram = auto_alloc_array_clear(machine(), UINT8, QRAM_SIZE);
|
||||
@ -527,7 +525,6 @@ MACHINE_CONFIG_FRAGMENT( leland_video )
|
||||
MCFG_SCREEN_UPDATE_DRIVER(leland_state, screen_update_leland)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_DERIVED( ataxx_video, leland_video )
|
||||
MCFG_VIDEO_START_OVERRIDE(leland_state,ataxx)
|
||||
MCFG_SCREEN_MODIFY("screen")
|
||||
|
||||
@ -168,7 +168,6 @@ static ADDRESS_MAP_START( compis_io, AS_IO, 16, compis_state )
|
||||
AM_RANGE( 0x0330, 0x0333) AM_DEVREADWRITE8("upd7220", upd7220_device, read, write, 0x00ff) /* GDC 82720 PCS6:6 */
|
||||
AM_RANGE( 0x0340, 0x0343) AM_DEVICE8("i8272a", i8272a_device, map, 0x00ff) /* iSBX0 (J8) FDC 8272 */
|
||||
AM_RANGE( 0x0350, 0x0351) AM_DEVREADWRITE8("i8272a", i8272a_device, mdma_r, mdma_w, 0x00ff) /* iSBX0 (J8) DMA ACK */
|
||||
AM_RANGE( 0xff00, 0xffff) AM_READWRITE( compis_i186_internal_port_r, compis_i186_internal_port_w)/* CPU 80186 */
|
||||
//{ 0x0100, 0x017e, compis_null_r }, /* RTC */
|
||||
//{ 0x0180, 0x01ff, compis_null_r }, /* PCS3? */
|
||||
//{ 0x0200, 0x027f, compis_null_r }, /* Reserved */
|
||||
@ -372,7 +371,7 @@ static MACHINE_CONFIG_START( compis, compis_state )
|
||||
/* Devices */
|
||||
MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config )
|
||||
MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config )
|
||||
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) )
|
||||
MCFG_PIC8259_ADD( "pic8259_master", DEVWRITELINE("maincpu", i80186_cpu_device, int2_w), VCC, READ8(compis_state, get_slave_ack) )
|
||||
MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL )
|
||||
MCFG_I8255_ADD( "ppi8255", compis_ppi_interface )
|
||||
MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock
|
||||
@ -412,7 +411,7 @@ static MACHINE_CONFIG_START( compis2, compis_state )
|
||||
/* Devices */
|
||||
MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config )
|
||||
MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config )
|
||||
MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) )
|
||||
MCFG_PIC8259_ADD( "pic8259_master", DEVWRITELINE("maincpu", i80186_cpu_device, int2_w), VCC, READ8(compis_state, get_slave_ack) )
|
||||
MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL )
|
||||
MCFG_I8255_ADD( "ppi8255", compis_ppi_interface )
|
||||
MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock
|
||||
|
||||
@ -336,7 +336,7 @@ WRITE8_MEMBER(rainbow_state::share_z80_w)
|
||||
READ8_MEMBER(rainbow_state::i8088_latch_r)
|
||||
{
|
||||
// printf("Read %02x from 8088 mailbox\n", m_8088_mailbox);
|
||||
m_i8088->set_input_line(INPUT_LINE_INT1, CLEAR_LINE);
|
||||
m_i8088->set_input_line(INPUT_LINE_INT0, CLEAR_LINE);
|
||||
return m_8088_mailbox;
|
||||
}
|
||||
|
||||
@ -357,7 +357,7 @@ READ8_MEMBER(rainbow_state::z80_latch_r)
|
||||
WRITE8_MEMBER(rainbow_state::z80_latch_w)
|
||||
{
|
||||
// printf("%02x to 8088 mailbox\n", data);
|
||||
m_i8088->set_input_line_and_vector(INPUT_LINE_INT1, ASSERT_LINE, 0x27);
|
||||
m_i8088->set_input_line_and_vector(INPUT_LINE_INT0, ASSERT_LINE, 0x27);
|
||||
m_8088_mailbox = data;
|
||||
}
|
||||
|
||||
@ -420,11 +420,11 @@ void rainbow_state::update_kbd_irq()
|
||||
{
|
||||
if ((m_kbd_rx_ready) || (m_kbd_tx_ready))
|
||||
{
|
||||
m_i8088->set_input_line_and_vector(INPUT_LINE_INT2, ASSERT_LINE, 0x26);
|
||||
m_i8088->set_input_line_and_vector(INPUT_LINE_INT0, ASSERT_LINE, 0x26);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_i8088->set_input_line(INPUT_LINE_INT2, CLEAR_LINE);
|
||||
m_i8088->set_input_line(INPUT_LINE_INT0, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "cpu/mcs51/mcs51.h"
|
||||
#include "imagedev/flopdrv.h"
|
||||
#include "machine/ram.h"
|
||||
@ -110,7 +110,7 @@ static ADDRESS_MAP_START(nimbus_io, AS_IO, 16, rmnimbus_state )
|
||||
AM_RANGE( 0x00f0, 0x00f7) AM_DEVREADWRITE8(Z80SIO_TAG, z80sio_device, read, write, 0x00ff)
|
||||
AM_RANGE( 0x0400, 0x041f) AM_READWRITE8(nimbus_disk_r, nimbus_disk_w, 0x00FF)
|
||||
AM_RANGE( 0x0480, 0x049f) AM_DEVREADWRITE8(VIA_TAG, via6522_device, read, write, 0x00FF)
|
||||
AM_RANGE( 0xff00, 0xffff) AM_READWRITE(nimbus_i186_internal_port_r, nimbus_i186_internal_port_w)/* CPU 80186 */
|
||||
//AM_RANGE( 0xff00, 0xffff) AM_READWRITE(nimbus_i186_internal_port_r, nimbus_i186_internal_port_w)/* CPU 80186 */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( nimbus )
|
||||
@ -286,6 +286,7 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state )
|
||||
MCFG_CPU_ADD(MAINCPU_TAG, I80186, 10000000)
|
||||
MCFG_CPU_PROGRAM_MAP(nimbus_mem)
|
||||
MCFG_CPU_IO_MAP(nimbus_io)
|
||||
MCFG_80186_IRQ_SLAVE_ACK(DEVREAD8(DEVICE_SELF_OWNER, rmnimbus_state, cascade_callback))
|
||||
|
||||
MCFG_CPU_ADD(IOCPU_TAG, I8031, 11059200)
|
||||
MCFG_CPU_PROGRAM_MAP(nimbus_iocpu_mem)
|
||||
|
||||
@ -121,10 +121,10 @@ WRITE8_MEMBER( tandy2k_state::enable_w )
|
||||
m_fdc->reset();
|
||||
|
||||
// timer 0 enable
|
||||
m_maincpu->set_input_line(INPUT_LINE_TMRIN0, BIT(data, 6));
|
||||
m_maincpu->tmrin0_w(BIT(data, 6));
|
||||
|
||||
// timer 1 enable
|
||||
m_maincpu->set_input_line(INPUT_LINE_TMRIN1, BIT(data, 7));
|
||||
m_maincpu->tmrin1_w(BIT(data, 7));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tandy2k_state::dma_mux_w )
|
||||
@ -705,8 +705,8 @@ static MACHINE_CONFIG_START( tandy2k, tandy2k_state )
|
||||
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
|
||||
MCFG_I8251_ADD(I8251A_TAG, usart_intf)
|
||||
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
|
||||
MCFG_PIC8259_ADD(I8259A_0_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT0), VCC, NULL)
|
||||
MCFG_PIC8259_ADD(I8259A_1_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT1), VCC, NULL)
|
||||
MCFG_PIC8259_ADD(I8259A_0_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int0_w), VCC, NULL)
|
||||
MCFG_PIC8259_ADD(I8259A_1_TAG, DEVWRITELINE(I80186_TAG, i80186_cpu_device, int1_w), VCC, NULL)
|
||||
MCFG_I8272A_ADD(I8272A_TAG, true)
|
||||
MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", floppy_image_device::default_floppy_formats)
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
|
||||
#define I80188_TAG "i80188"
|
||||
#define SCREEN_TAG "screen"
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
#define COMPIS_H_
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "cpu/mcs48/mcs48.h"
|
||||
#include "video/upd7220.h"
|
||||
#include "machine/ctronics.h"
|
||||
@ -155,8 +155,8 @@ public:
|
||||
required_device<upd7220_device> m_crtc;
|
||||
DECLARE_READ16_MEMBER(compis_usart_r);
|
||||
DECLARE_WRITE16_MEMBER(compis_usart_w);
|
||||
DECLARE_READ16_MEMBER(compis_i186_internal_port_r);
|
||||
DECLARE_WRITE16_MEMBER(compis_i186_internal_port_w);
|
||||
// DECLARE_READ16_MEMBER(compis_i186_internal_port_r);
|
||||
// DECLARE_WRITE16_MEMBER(compis_i186_internal_port_w);
|
||||
DECLARE_WRITE8_MEMBER(vram_w);
|
||||
DECLARE_READ8_MEMBER(compis_ppi_port_b_r);
|
||||
DECLARE_WRITE8_MEMBER(compis_ppi_port_c_w);
|
||||
@ -166,13 +166,13 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(compis_pic8259_master_set_int_line);
|
||||
DECLARE_WRITE_LINE_MEMBER(compis_pic8259_slave_set_int_line);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
i186_state m_i186;
|
||||
// i186_state m_i186;
|
||||
TYP_COMPIS m_compis;
|
||||
UINT8 *m_p_videoram;
|
||||
void update_dma_control(int which, int new_control);
|
||||
void internal_timer_update(int which, int new_count, int new_maxA, int new_maxB, int new_control);
|
||||
void internal_timer_sync(int which);
|
||||
void handle_eoi(int data);
|
||||
// void update_dma_control(int which, int new_control);
|
||||
// void internal_timer_update(int which, int new_count, int new_maxA, int new_maxB, int new_control);
|
||||
// void internal_timer_sync(int which);
|
||||
// void handle_eoi(int data);
|
||||
void compis_fdc_tc(int state);
|
||||
|
||||
void fdc_irq(bool state);
|
||||
@ -185,10 +185,10 @@ public:
|
||||
virtual void palette_init();
|
||||
UINT32 screen_update_compis2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(compis_vblank_int);
|
||||
TIMER_CALLBACK_MEMBER(internal_timer_int);
|
||||
TIMER_CALLBACK_MEMBER(dma_timer_callback);
|
||||
IRQ_CALLBACK_MEMBER(int_callback);
|
||||
IRQ_CALLBACK_MEMBER(compis_irq_callback);
|
||||
// TIMER_CALLBACK_MEMBER(internal_timer_int);
|
||||
// TIMER_CALLBACK_MEMBER(dma_timer_callback);
|
||||
// IRQ_CALLBACK_MEMBER(int_callback);
|
||||
// IRQ_CALLBACK_MEMBER(compis_irq_callback);
|
||||
void compis_irq_set(UINT8 irq);
|
||||
void compis_keyb_update();
|
||||
void compis_keyb_init();
|
||||
|
||||
@ -6,6 +6,7 @@
|
||||
2009-11-29.
|
||||
*/
|
||||
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "machine/z80sio.h"
|
||||
#include "machine/wd17xx.h"
|
||||
#include "machine/scsicb.h"
|
||||
@ -403,14 +404,14 @@ public:
|
||||
{
|
||||
}
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i80186_cpu_device> m_maincpu;
|
||||
required_device<msm5205_device> m_msm;
|
||||
required_device<ay8910_device> m_ay8910;
|
||||
required_device<scsicb_device> m_scsibus;
|
||||
required_device<ram_device> m_ram;
|
||||
|
||||
UINT32 m_debug_machine;
|
||||
i186_state m_i186;
|
||||
// i186_state m_i186;
|
||||
keyboard_t m_keyboard;
|
||||
nimbus_drives_t m_nimbus_drives;
|
||||
ipc_interface_t m_ipc_interface;
|
||||
@ -427,8 +428,9 @@ public:
|
||||
UINT16 m_pixel_mask;
|
||||
UINT8 m_hs_count;
|
||||
UINT32 m_debug_video;
|
||||
DECLARE_READ16_MEMBER(nimbus_i186_internal_port_r);
|
||||
DECLARE_WRITE16_MEMBER(nimbus_i186_internal_port_w);
|
||||
UINT8 m_vector;
|
||||
// DECLARE_READ16_MEMBER(nimbus_i186_internal_port_r);
|
||||
// DECLARE_WRITE16_MEMBER(nimbus_i186_internal_port_w);
|
||||
DECLARE_READ8_MEMBER(nimbus_mcu_r);
|
||||
DECLARE_WRITE8_MEMBER(nimbus_mcu_w);
|
||||
DECLARE_READ16_MEMBER(nimbus_io_r);
|
||||
@ -459,8 +461,8 @@ public:
|
||||
virtual void palette_init();
|
||||
UINT32 screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void screen_eof_nimbus(screen_device &screen, bool state);
|
||||
TIMER_CALLBACK_MEMBER(internal_timer_int);
|
||||
TIMER_CALLBACK_MEMBER(dma_timer_callback);
|
||||
// TIMER_CALLBACK_MEMBER(internal_timer_int);
|
||||
// TIMER_CALLBACK_MEMBER(dma_timer_callback);
|
||||
TIMER_CALLBACK_MEMBER(keyscan_callback);
|
||||
TIMER_CALLBACK_MEMBER(mouse_callback);
|
||||
DECLARE_WRITE_LINE_MEMBER(sio_interrupt);
|
||||
@ -500,16 +502,17 @@ public:
|
||||
void write_reg_01E();
|
||||
void write_reg_026();
|
||||
void change_palette(UINT8 bank, UINT16 colours, UINT8 regno);
|
||||
void update_interrupt_state();
|
||||
void handle_eoi(int data);
|
||||
// void update_interrupt_state();
|
||||
// void handle_eoi(int data);
|
||||
void external_int(UINT16 intno, UINT8 vector);
|
||||
void nimbus_recalculate_ints();
|
||||
void internal_timer_sync(int which);
|
||||
void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
|
||||
void update_dma_control(int which, int new_control);
|
||||
void drq_callback(int which);
|
||||
void nimbus_cpu_init();
|
||||
void nimbus_cpu_reset();
|
||||
DECLARE_READ8_MEMBER(cascade_callback);
|
||||
// void nimbus_recalculate_ints();
|
||||
// void internal_timer_sync(int which);
|
||||
// void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
|
||||
// void update_dma_control(int which, int new_control);
|
||||
// void drq_callback(int which);
|
||||
// void nimbus_cpu_init();
|
||||
// void nimbus_cpu_reset();
|
||||
void *get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si);
|
||||
void nimbus_bank_memory();
|
||||
void memory_reset();
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "cpu/mcs48/mcs48.h"
|
||||
#include "imagedev/harddriv.h"
|
||||
#include "machine/ctronics.h"
|
||||
@ -63,7 +63,7 @@ public:
|
||||
m_char_ram(*this, "char_ram")
|
||||
{ }
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i80186_cpu_device> m_maincpu;
|
||||
required_device<i8251_device> m_uart;
|
||||
required_device<pit8253_device> m_pit;
|
||||
required_device<i8272a_device> m_fdc;
|
||||
|
||||
@ -339,6 +339,7 @@ WRITE16_MEMBER( compis_state::compis_usart_w )
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
/*************************************
|
||||
*
|
||||
* 80186 interrupt controller
|
||||
@ -1226,7 +1227,7 @@ WRITE16_MEMBER( compis_state::compis_i186_internal_port_w )
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
/*-------------------------------------------------------------------------*/
|
||||
/* Name: compis */
|
||||
/* Desc: CPU - Initialize the 80186 CPU */
|
||||
@ -1234,14 +1235,14 @@ WRITE16_MEMBER( compis_state::compis_i186_internal_port_w )
|
||||
void compis_state::compis_cpu_init()
|
||||
{
|
||||
/* create timers here so they stick around */
|
||||
m_i186.timer[0].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
m_i186.timer[1].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
m_i186.timer[2].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
m_i186.timer[0].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
|
||||
m_i186.timer[1].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
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||||
m_i186.timer[2].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
|
||||
m_i186.dma[0].finish_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::dma_timer_callback),this));
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||||
m_i186.dma[1].finish_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::dma_timer_callback),this));
|
||||
// m_i186.timer[0].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
// m_i186.timer[1].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
// m_i186.timer[2].int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::internal_timer_int),this));
|
||||
// m_i186.timer[0].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
|
||||
// m_i186.timer[1].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
|
||||
// m_i186.timer[2].time_timer = machine().scheduler().timer_alloc(FUNC_NULL);
|
||||
// m_i186.dma[0].finish_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::dma_timer_callback),this));
|
||||
// m_i186.dma[1].finish_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(compis_state::dma_timer_callback),this));
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
@ -1257,7 +1258,7 @@ void compis_state::compis_cpu_init()
|
||||
|
||||
WRITE_LINE_MEMBER( compis_state::compis_pic8259_master_set_int_line )
|
||||
{
|
||||
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
||||
// m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( compis_state::compis_pic8259_slave_set_int_line )
|
||||
@ -1275,15 +1276,15 @@ READ8_MEMBER( compis_state::get_slave_ack )
|
||||
}
|
||||
|
||||
|
||||
IRQ_CALLBACK_MEMBER(compis_state::compis_irq_callback)
|
||||
{
|
||||
return m_8259m->inta_r();
|
||||
}
|
||||
//IRQ_CALLBACK_MEMBER(compis_state::compis_irq_callback)
|
||||
//{
|
||||
// return m_8259m->inta_r();
|
||||
//}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(compis_state,compis)
|
||||
{
|
||||
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(compis_state::compis_irq_callback),this));
|
||||
// m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(compis_state::compis_irq_callback),this));
|
||||
memset (&m_compis, 0, sizeof (m_compis) );
|
||||
}
|
||||
|
||||
@ -1305,7 +1306,7 @@ void compis_state::machine_reset()
|
||||
compis_keyb_init();
|
||||
|
||||
/* OSP PIC 8259 */
|
||||
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(compis_state::compis_irq_callback),this));
|
||||
// m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(compis_state::compis_irq_callback),this));
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
@ -56,7 +56,7 @@ chdman createhd -o ST125N.chd -chs 407,4,26 -ss 512
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "cpu/i86/i186.h"
|
||||
#include "debug/debugcpu.h"
|
||||
#include "debug/debugcon.h"
|
||||
#include "imagedev/flopdrv.h"
|
||||
@ -152,7 +152,6 @@ static const UINT16 def_config[16] =
|
||||
|
||||
|
||||
static void execute_debug_irq(running_machine &machine, int ref, int params, const char *param[]);
|
||||
static void execute_debug_intmasks(running_machine &machine, int ref, int params, const char *param[]);
|
||||
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[]);
|
||||
|
||||
static int instruction_hook(device_t &device, offs_t curpc);
|
||||
@ -166,7 +165,7 @@ static void decode_dssi_f_plonk_char(device_t *device,UINT16 ds, UINT16 si, UIN
|
||||
static void decode_dssi_f_rw_sectors(device_t *device,UINT16 ds, UINT16 si, UINT8 raw_flag);
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
/*************************************
|
||||
*
|
||||
* 80186 interrupt controller
|
||||
@ -1199,11 +1198,39 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_i186_internal_port_w)
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void rmnimbus_state::external_int(UINT16 intno, UINT8 vector)
|
||||
{
|
||||
m_vector = vector;
|
||||
switch(intno)
|
||||
{
|
||||
case 0:
|
||||
m_maincpu->int0_w(1);
|
||||
break;
|
||||
case 1:
|
||||
m_maincpu->int1_w(1);
|
||||
break;
|
||||
case 2:
|
||||
m_maincpu->int2_w(1);
|
||||
break;
|
||||
case 3:
|
||||
m_maincpu->int3_w(1);
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::cascade_callback)
|
||||
{
|
||||
return m_vector;
|
||||
}
|
||||
|
||||
void rmnimbus_state::machine_reset()
|
||||
{
|
||||
/* CPU */
|
||||
nimbus_cpu_reset();
|
||||
// nimbus_cpu_reset();
|
||||
iou_reset();
|
||||
fdc_reset();
|
||||
hdc_reset();
|
||||
@ -1221,7 +1248,7 @@ DRIVER_INIT_MEMBER(rmnimbus_state,nimbus)
|
||||
void rmnimbus_state::machine_start()
|
||||
{
|
||||
/* init cpu */
|
||||
nimbus_cpu_init();
|
||||
// nimbus_cpu_init();
|
||||
|
||||
m_keyboard.keyscan_timer=machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(rmnimbus_state::keyscan_callback),this));
|
||||
m_nimbus_mouse.m_mouse_timer=machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(rmnimbus_state::mouse_callback),this));
|
||||
@ -1230,7 +1257,6 @@ void rmnimbus_state::machine_start()
|
||||
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
|
||||
{
|
||||
debug_console_register_command(machine(), "nimbus_irq", CMDFLAG_NONE, 0, 0, 2, execute_debug_irq);
|
||||
debug_console_register_command(machine(), "nimbus_intmasks", CMDFLAG_NONE, 0, 0, 0, execute_debug_intmasks);
|
||||
debug_console_register_command(machine(), "nimbus_debug", CMDFLAG_NONE, 0, 0, 1, nimbus_debug);
|
||||
|
||||
/* set up the instruction hook */
|
||||
@ -1260,23 +1286,6 @@ static void execute_debug_irq(running_machine &machine, int ref, int params, con
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void execute_debug_intmasks(running_machine &machine, int ref, int params, const char *param[])
|
||||
{
|
||||
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
||||
int IntNo;
|
||||
|
||||
debug_console_printf(machine,"i186.intr.priority_mask=%4X\n",state->m_i186.intr.priority_mask);
|
||||
for(IntNo=0; IntNo<4; IntNo++)
|
||||
{
|
||||
debug_console_printf(machine,"extInt%d mask=%4X\n",IntNo,state->m_i186.intr.ext[IntNo]);
|
||||
}
|
||||
|
||||
debug_console_printf(machine,"i186.intr.request = %04X\n",state->m_i186.intr.request);
|
||||
debug_console_printf(machine,"i186.intr.ack_mask = %04X\n",state->m_i186.intr.ack_mask);
|
||||
debug_console_printf(machine,"i186.intr.in_service= %04X\n",state->m_i186.intr.in_service);
|
||||
}
|
||||
|
||||
static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[])
|
||||
{
|
||||
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
||||
@ -2220,7 +2229,7 @@ WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_drq_w)
|
||||
logerror("nimbus_drives_drq_w(%d)\n", state);
|
||||
|
||||
if(state && FDC_DRQ_ENABLED())
|
||||
drq_callback(1);
|
||||
m_maincpu->drq1_w(state);
|
||||
}
|
||||
|
||||
UINT8 rmnimbus_state::fdc_driveno(UINT8 drivesel)
|
||||
@ -2406,7 +2415,7 @@ void rmnimbus_state::hdc_drq()
|
||||
{
|
||||
if(HDC_DRQ_ENABLED() && m_nimbus_drives.drq_ff)
|
||||
{
|
||||
drq_callback(1);
|
||||
m_maincpu->drq1_w(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user