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i8257: updated to devcb2. nw.

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This commit is contained in:
Fabio Priuli 2014-04-12 08:36:53 +00:00
parent 1dc1ae10c1
commit 8b41330539
14 changed files with 249 additions and 204 deletions
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185
src/emu/machine/8257dma.c
View File

@ -60,6 +60,19 @@ const device_type I8257 = &device_creator<i8257_device>;
i8257_device::i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I8257, "DMA8257", tag, owner, clock, "i8257", __FILE__),
m_out_hrq_cb(*this),
m_out_tc_cb(*this),
m_out_mark_cb(*this),
m_in_memr_cb(*this),
m_out_memw_cb(*this),
m_in_ior_0_cb(*this),
m_in_ior_1_cb(*this),
m_in_ior_2_cb(*this),
m_in_ior_3_cb(*this),
m_out_iow_0_cb(*this),
m_out_iow_1_cb(*this),
m_out_iow_2_cb(*this),
m_out_iow_3_cb(*this),
m_mode(0),
m_rr(0),
m_msb(0),
@ -72,42 +85,6 @@ i8257_device::i8257_device(const machine_config &mconfig, const char *tag, devic
memset(m_rwmode, 0, sizeof(m_rwmode));
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void i8257_device::device_config_complete()
{
// inherit a copy of the static data
const i8257_interface *intf = reinterpret_cast<const i8257_interface *>(static_config());
if (intf != NULL)
{
*static_cast<i8257_interface *>(this) = *intf;
}
// or initialize to defaults if none provided
else
{
memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
memset(&m_out_tc_cb, 0, sizeof(m_out_tc_cb));
memset(&m_out_mark_cb, 0, sizeof(m_out_mark_cb));
memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
}
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
@ -118,18 +95,20 @@ void i8257_device::device_start()
assert(this != NULL);
/* resolve callbacks */
m_out_hrq_func.resolve(m_out_hrq_cb, *this);
m_out_tc_func.resolve(m_out_tc_cb, *this);
m_out_mark_func.resolve(m_out_mark_cb, *this);
m_in_memr_func.resolve(m_in_memr_cb, *this);
m_out_memw_func.resolve(m_out_memw_cb, *this);
for (int i = 0; i < I8257_NUM_CHANNELS; i++)
{
m_in_ior_func[i].resolve(m_in_ior_cb[i], *this);
m_out_iow_func[i].resolve(m_out_iow_cb[i], *this);
}
m_out_hrq_cb.resolve_safe();
m_out_tc_cb.resolve_safe();
m_out_mark_cb.resolve_safe();
m_in_memr_cb.resolve();
m_out_memw_cb.resolve();
m_in_ior_0_cb.resolve();
m_in_ior_1_cb.resolve();
m_in_ior_2_cb.resolve();
m_in_ior_3_cb.resolve();
m_out_iow_0_cb.resolve();
m_out_iow_1_cb.resolve();
m_out_iow_2_cb.resolve();
m_out_iow_3_cb.resolve();
/* set initial values */
m_timer = timer_alloc(TIMER_OPERATION);
m_msbflip_timer = timer_alloc(TIMER_MSBFLIP);
@ -162,33 +141,53 @@ void i8257_device::device_reset()
int i8257_device::i8257_do_operation(int channel)
{
int done;
UINT8 data;
UINT8 data = 0;
UINT8 mode = m_rwmode[channel];
if (m_count[channel] == 0x0000)
{
m_status |= (0x01 << channel);
m_out_tc_func(ASSERT_LINE);
m_out_tc_cb(ASSERT_LINE);
}
switch(mode) {
switch(mode)
{
case 1:
if (!m_in_memr_func.isnull())
{
data = m_in_memr_func(m_address[channel]);
}
if (!m_in_memr_cb.isnull())
data = m_in_memr_cb(m_address[channel]);
else
{
data = 0;
logerror("8257: No memory read function defined.\n");
}
if (!m_out_iow_func[channel].isnull())
switch (channel)
{
m_out_iow_func[channel](m_address[channel], data);
}
else
{
logerror("8257: No channel write function for channel %d defined.\n",channel);
case 0:
if (!m_out_iow_0_cb.isnull())
m_out_iow_0_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 1:
if (!m_out_iow_1_cb.isnull())
m_out_iow_1_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 2:
if (!m_out_iow_2_cb.isnull())
m_out_iow_2_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
case 3:
if (!m_out_iow_3_cb.isnull())
m_out_iow_3_cb((offs_t)m_address[channel], data);
else
logerror("8257: No channel write function for channel %d defined.\n", channel);
break;
}
m_address[channel]++;
@ -197,37 +196,67 @@ int i8257_device::i8257_do_operation(int channel)
break;
case 2:
if (!m_in_ior_func[channel].isnull())
switch (channel)
{
data = m_in_ior_func[channel](m_address[channel]);
}
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n",channel);
case 0:
if (!m_in_ior_0_cb.isnull())
data = m_in_ior_0_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 1:
if (!m_in_ior_1_cb.isnull())
data = m_in_ior_1_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 2:
if (!m_in_ior_2_cb.isnull())
data = m_in_ior_2_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
case 3:
if (!m_in_ior_3_cb.isnull())
data = m_in_ior_3_cb((offs_t)m_address[channel]);
else
{
data = 0;
logerror("8257: No channel read function for channel %d defined.\n", channel);
}
break;
}
if (!m_out_memw_func.isnull())
{
m_out_memw_func(m_address[channel], data);
}
if (!m_out_memw_cb.isnull())
m_out_memw_cb((offs_t)m_address[channel], data);
else
{
logerror("8257: No memory write function defined.\n");
}
m_address[channel]++;
m_count[channel]--;
done = (m_count[channel] == 0xFFFF);
done = (m_count[channel] == 0xffff);
break;
case 0: /* verify */
m_address[channel]++;
m_count[channel]--;
done = (m_count[channel] == 0xFFFF);
done = (m_count[channel] == 0xffff);
break;
default:
fatalerror("i8257_do_operation: invalid mode!\n");
break;
}
if (done)
{
if ((channel==2) && DMA_MODE_AUTOLOAD(m_mode))
@ -238,7 +267,7 @@ int i8257_device::i8257_do_operation(int channel)
m_registers[5] = m_registers[7];
}
m_out_tc_func(CLEAR_LINE);
m_out_tc_cb(CLEAR_LINE);
}
return done;
}
@ -337,7 +366,7 @@ void i8257_device::i8257_update_status()
}
/* set the halt line */
m_out_hrq_func(pending_transfer ? ASSERT_LINE : CLEAR_LINE);
m_out_hrq_cb(pending_transfer ? ASSERT_LINE : CLEAR_LINE);
}

111
src/emu/machine/8257dma.h
View File

@ -40,19 +40,54 @@
#include "emu.h"
#define I8257_NUM_CHANNELS (4)
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_I8257_ADD(_tag, _clock, _config) \
MCFG_DEVICE_ADD(_tag, I8257, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define MCFG_I8257_OUT_HRQ_CB(_devcb) \
devcb = &i8257_device::set_out_hrq_callback(*device, DEVCB2_##_devcb);
#define I8257_INTERFACE(_name) \
const i8257_interface (_name) =
#define MCFG_I8257_OUT_TC_CB(_devcb) \
devcb = &i8257_device::set_out_tc_callback(*device, DEVCB2_##_devcb);
#define I8257_NUM_CHANNELS (4)
#define MCFG_I8257_OUT_MARK_CB(_devcb) \
devcb = &i8257_device::set_out_mark_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_MEMR_CB(_devcb) \
devcb = &i8257_device::set_in_memr_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_MEMW_CB(_devcb) \
devcb = &i8257_device::set_out_memw_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_0_CB(_devcb) \
devcb = &i8257_device::set_in_ior_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_1_CB(_devcb) \
devcb = &i8257_device::set_in_ior_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_2_CB(_devcb) \
devcb = &i8257_device::set_in_ior_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_IN_IOR_3_CB(_devcb) \
devcb = &i8257_device::set_in_ior_3_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_0_CB(_devcb) \
devcb = &i8257_device::set_out_iow_0_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_1_CB(_devcb) \
devcb = &i8257_device::set_out_iow_1_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_2_CB(_devcb) \
devcb = &i8257_device::set_out_iow_2_callback(*device, DEVCB2_##_devcb);
#define MCFG_I8257_OUT_IOW_3_CB(_devcb) \
devcb = &i8257_device::set_out_iow_3_callback(*device, DEVCB2_##_devcb);
/***************************************************************************
@ -60,34 +95,31 @@
***************************************************************************/
// ======================> i8257_interface
struct i8257_interface
{
devcb_write_line m_out_hrq_cb;
devcb_write_line m_out_tc_cb;
devcb_write_line m_out_mark_cb;
/* accessors to main memory */
devcb_read8 m_in_memr_cb; // TODO m_in_memr_cb[I8257_NUM_CHANNELS];
devcb_write8 m_out_memw_cb; // TODO m_out_memw_cb[I8257_NUM_CHANNELS];
/* channel accesors */
devcb_read8 m_in_ior_cb[I8257_NUM_CHANNELS];
devcb_write8 m_out_iow_cb[I8257_NUM_CHANNELS];
};
// ======================> i8257_device
class i8257_device : public device_t,
public i8257_interface
class i8257_device : public device_t
{
public:
// construction/destruction
i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _Object> static devcb2_base &set_out_hrq_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_hrq_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_tc_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_tc_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_mark_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_mark_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_memr_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_memr_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_memw_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_memw_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_ior_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_3_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_2_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_iow_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_3_cb.set_callback(object); }
/* register access */
DECLARE_READ8_MEMBER( i8257_r );
DECLARE_WRITE8_MEMBER( i8257_w );
@ -107,7 +139,6 @@ public:
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@ -121,13 +152,23 @@ private:
void i8257_update_status();
void i8257_prepare_msb_flip();
devcb_resolved_write_line m_out_hrq_func;
devcb_resolved_write_line m_out_tc_func;
devcb_resolved_write_line m_out_mark_func;
devcb_resolved_read8 m_in_memr_func;
devcb_resolved_write8 m_out_memw_func;
devcb_resolved_read8 m_in_ior_func[I8257_NUM_CHANNELS];
devcb_resolved_write8 m_out_iow_func[I8257_NUM_CHANNELS];
devcb2_write_line m_out_hrq_cb;
devcb2_write_line m_out_tc_cb;
devcb2_write_line m_out_mark_cb;
/* accessors to main memory */
devcb2_read8 m_in_memr_cb;
devcb2_write8 m_out_memw_cb;
/* channel accesors */
devcb2_read8 m_in_ior_0_cb;
devcb2_read8 m_in_ior_1_cb;
devcb2_read8 m_in_ior_2_cb;
devcb2_read8 m_in_ior_3_cb;
devcb2_write8 m_out_iow_0_cb;
devcb2_write8 m_out_iow_1_cb;
devcb2_write8 m_out_iow_2_cb;
devcb2_write8 m_out_iow_3_cb;
emu_timer *m_timer;
emu_timer *m_msbflip_timer;

32
src/mame/drivers/dkong.c
View File

@ -370,28 +370,6 @@ static Z80DMA_INTERFACE( dk3_dma )
DEVCB_NULL
};
static I8257_INTERFACE( dk_dma )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(dkong_state, memory_read_byte),
DEVCB_DRIVER_MEMBER(dkong_state, memory_write_byte),
{ DEVCB_NULL, DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_r), DEVCB_NULL, DEVCB_NULL },
{ DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_w), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
};
static I8257_INTERFACE( hb_dma )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(dkong_state, hb_dma_read_byte),
DEVCB_DRIVER_MEMBER(dkong_state, hb_dma_write_byte),
{ DEVCB_NULL, DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_r), DEVCB_NULL, DEVCB_NULL },
{ DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_w), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
};
/*************************************
*
* VBLANK and IRQ generation
@ -1657,7 +1635,12 @@ static MACHINE_CONFIG_START( dkong_base, dkong_state )
MCFG_MACHINE_START_OVERRIDE(dkong_state,dkong2b)
MCFG_MACHINE_RESET_OVERRIDE(dkong_state,dkong)
MCFG_I8257_ADD("dma8257", CLOCK_1H, dk_dma)
MCFG_DEVICE_ADD("dma8257", I8257, CLOCK_1H)
MCFG_I8257_OUT_HRQ_CB(INPUTLINE("maincpu", INPUT_LINE_HALT))
MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, memory_write_byte))
MCFG_I8257_IN_IOR_1_CB(READ8(dkong_state, p8257_ctl_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(dkong_state, p8257_ctl_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -1784,7 +1767,8 @@ static MACHINE_CONFIG_DERIVED( s2650, dkong2b )
MCFG_CPU_VBLANK_INT_DRIVER("screen", dkong_state, s2650_interrupt)
MCFG_DEVICE_MODIFY("dma8257")
MCFG_DEVICE_CONFIG(hb_dma)
MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, hb_dma_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, hb_dma_write_byte))
MCFG_MACHINE_START_OVERRIDE(dkong_state,s2650)
MACHINE_CONFIG_END

6
src/mess/drivers/apogee.c
View File

@ -237,7 +237,11 @@ static MACHINE_CONFIG_START( apogee, apogee_state )
MCFG_SOUND_CONFIG(apogee_speaker_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
MCFG_CASSETTE_ADD( "cassette", apogee_cassette_interface )
MCFG_SOFTWARE_LIST_ADD("cass_list","apogee")

15
src/mess/drivers/fanucspmg.c
View File

@ -710,17 +710,6 @@ WRITE8_MEMBER(fanucspmg_state::memory_write_byte)
return prog_space.write_byte(offset, data);
}
I8257_INTERFACE( fanucspmg_dma )
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(fanucspmg_state, memory_read_byte),
DEVCB_DRIVER_MEMBER(fanucspmg_state, memory_write_byte),
{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
};
static MC6845_UPDATE_ROW( fanuc_update_row )
{
fanucspmg_state *state = downcast<fanucspmg_state *>(device->owner());
@ -819,7 +808,9 @@ static MACHINE_CONFIG_START( fanucspmg, fanucspmg_state )
MCFG_PIT8253_CLK1(XTAL_15MHz/12)
MCFG_PIT8253_CLK2(XTAL_15MHz/12)
MCFG_I8257_ADD(DMAC_TAG, XTAL_15MHz / 5, fanucspmg_dma)
MCFG_DEVICE_ADD(DMAC_TAG, I8257, XTAL_15MHz / 5)
MCFG_I8257_IN_MEMR_CB(READ8(fanucspmg_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(fanucspmg_state, memory_write_byte))
MCFG_PIC8259_ADD(PIC0_TAG, INPUTLINE("maincpu", 0), VCC, NULL)
MCFG_PIC8259_ADD(PIC1_TAG, INPUTLINE("maincpu", 0), VCC, NULL)

6
src/mess/drivers/mikrosha.c
View File

@ -209,7 +209,11 @@ static MACHINE_CONFIG_START( mikrosha, mikrosha_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
MCFG_CASSETTE_ADD( "cassette", mikrosha_cassette_interface )
MCFG_SOFTWARE_LIST_ADD("cass_list","mikrosha")

8
src/mess/drivers/partner.c
View File

@ -215,7 +215,13 @@ static MACHINE_CONFIG_START( partner, partner_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, partner_dma)
MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(partner_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
MCFG_I8257_IN_IOR_0_CB(READ8(partner_state, partner_fdc_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(partner_state, partner_fdc_w))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
MCFG_CASSETTE_ADD( "cassette", partner_cassette_interface )
MCFG_SOFTWARE_LIST_ADD("cass_list","partner_cass")

38
src/mess/drivers/pc8001.c
View File

@ -444,16 +444,6 @@ WRITE8_MEMBER( pc8001_state::dma_io_w )
program.write_byte(offset, data);
}
static I8257_INTERFACE( dmac_intf )
{
DEVCB_DRIVER_LINE_MEMBER(pc8001_state, hrq_w),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(pc8001_state, dma_mem_w),
{ DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r) },
{ DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w) },
};
/* Machine Initialization */
@ -545,7 +535,19 @@ static MACHINE_CONFIG_START( pc8001, pc8001_state )
MCFG_DEVICE_ADD(I8251_TAG, I8251, 0)
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
MCFG_I8257_OUT_MEMW_CB(WRITE8(pc8001_state, dma_mem_w))
MCFG_I8257_IN_IOR_0_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_1_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_2_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_3_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_1_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_2_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_3_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
@ -589,7 +591,19 @@ static MACHINE_CONFIG_START( pc8001mk2, pc8001mk2_state )
MCFG_DEVICE_ADD(I8251_TAG, I8251, 0)
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
MCFG_I8257_OUT_MEMW_CB(WRITE8(pc8001_state, dma_mem_w))
MCFG_I8257_IN_IOR_0_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_1_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_2_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_IN_IOR_3_CB(READ8(pc8001_state, dma_io_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_1_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_2_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_I8257_OUT_IOW_3_CB(WRITE8(pc8001_state, dma_io_w))
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)

6
src/mess/drivers/radio86.c
View File

@ -372,7 +372,11 @@ static MACHINE_CONFIG_START( radio86, radio86_state )
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
MCFG_CASSETTE_ADD( "cassette", radio86_cassette_interface )
MCFG_SOFTWARE_LIST_ADD("cass_list","radio86")

18
src/mess/drivers/unior.c
View File

@ -393,17 +393,6 @@ READ8_MEMBER(unior_state::dma_r)
return m_p_vram[offset & 0x7ff];
}
static I8257_INTERFACE( dma_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", I8085_HALT),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DEVICE_MEMBER("crtc", i8275_device, dack_w),
{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(unior_state, dma_r), DEVCB_NULL },
{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
};
WRITE8_MEMBER( unior_state::cpu_status_callback )
{
m_dma->i8257_hlda_w(BIT(data, 3));
@ -462,7 +451,12 @@ static MACHINE_CONFIG_START( unior, unior_state )
MCFG_I8255_ADD( "ppi0", ppi0_intf )
MCFG_I8255_ADD( "ppi1", ppi1_intf )
MCFG_I8257_ADD("dma", XTAL_20MHz / 9, dma_intf) // unknown clock
MCFG_DEVICE_ADD("dma", I8257, XTAL_20MHz / 9) // unknown clock
MCFG_I8257_OUT_HRQ_CB(INPUTLINE("maincpu", I8085_HALT))
MCFG_I8257_OUT_MEMW_CB(DEVWRITE8("crtc", i8275_device, dack_w))
MCFG_I8257_IN_IOR_2_CB(READ8(unior_state, dma_r))
MCFG_I8275_ADD("crtc", crtc_intf)
MACHINE_CONFIG_END

1
src/mess/includes/partner.h
View File

@ -47,7 +47,6 @@ public:
/*----------- defined in machine/partner.c -----------*/
extern const i8257_interface partner_dma;
extern const wd17xx_interface partner_wd17xx_interface;
#endif /* partner_H_ */

3
src/mess/includes/radio86.h
View File

@ -133,9 +133,6 @@ extern const i8275_interface partner_i8275_interface;
extern const i8275_interface mikrosha_i8275_interface;
extern const i8275_interface apogee_i8275_interface;
extern const i8257_interface radio86_dma;
extern void radio86_init_keyboard(running_machine &machine);

13
src/mess/machine/partner.c
View File

@ -362,23 +362,12 @@ READ8_MEMBER(partner_state::partner_fdc_r)
{
return m_fdc->data_r(space,offset);
}
WRITE8_MEMBER(partner_state::partner_fdc_w)
{
m_fdc->data_w(space,offset,data);
}
I8257_INTERFACE( partner_dma )
{
DEVCB_DRIVER_LINE_MEMBER(partner_state,hrq_w),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(radio86_state, memory_read_byte),
DEVCB_DRIVER_MEMBER(radio86_state, memory_write_byte),
{ DEVCB_DRIVER_MEMBER(partner_state, partner_fdc_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
{ DEVCB_DRIVER_MEMBER(partner_state, partner_fdc_w), DEVCB_NULL, DEVCB_DEVICE_MEMBER("i8275", i8275_device, dack_w), DEVCB_NULL }
};
MACHINE_RESET_MEMBER(partner_state,partner)
{
m_mem_page = 0;

11
src/mess/machine/radio86.c
View File

@ -146,17 +146,6 @@ WRITE8_MEMBER(radio86_state::memory_write_byte)
return prog_space.write_byte(offset, data);
}
I8257_INTERFACE( radio86_dma )
{
DEVCB_DRIVER_LINE_MEMBER(radio86_state,hrq_w),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(radio86_state, memory_read_byte),
DEVCB_DRIVER_MEMBER(radio86_state, memory_write_byte),
{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
{ DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_MEMBER("i8275", i8275_device, dack_w), DEVCB_NULL }
};
void radio86_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)