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Added a bare bones SCUDSP core, to be improved

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This commit is contained in:
Angelo Salese 2013-10-08 21:52:56 +00:00
parent c5d9b7701e
commit 8b841cc312
7 changed files with 230 additions and 337 deletions
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2
.gitattributes vendored
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@ -4043,6 +4043,8 @@ src/mame/drivers/zodiack.c svneol=native#text/plain
src/mame/drivers/zr107.c svneol=native#text/plain
src/mame/etc/fd1094dp.c svneol=native#text/plain
src/mame/etc/jrcrypt.c svneol=native#text/plain
src/mame/etc/template_cpu.c svneol=native#text/plain
src/mame/etc/template_cpu.h svneol=native#text/plain
src/mame/etc/template_device.c svneol=native#text/plain
src/mame/etc/template_device.h svneol=native#text/plain
src/mame/etc/template_driver.c svneol=native#text/plain

4
src/emu/cpu/cpu.mak
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@ -2242,10 +2242,12 @@ $(CPUOBJ)/lc8670/lc8670.o: $(CPUSRC)/lc8670/lc8670.c \
ifneq ($(filter SCUDSP,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/scudsp
CPUOBJS += $(CPUOBJ)/scudsp/scudsp.o
DASMOBJS += $(CPUOBJ)/scudsp/scudspdasm.o
endif
$(CPUOBJ)/scudsp/scudspdasm.o: CPUOBJS += $(CPUOBJ)/scudsp/scudspdasm.c
$(CPUOBJ)/scudsp/scudsp.o: $(CPUSRC)/scudsp/scudsp.c \
$(CPUSRC)/scudsp/scudsp.h
#-------------------------------------------------

345
src/emu/cpu/scudsp/scudspdasm.c
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@ -1,346 +1,19 @@
/*
Sega Saturn SCU DSP disassembler
Written by Angelo Salese
*/
#include "emu.h"
enum
{
EA_A = 1,
EA_ALU,
EA_D0,
EA_IMM8,
EA_IMM18,
EA_IMM25,
EA_MUL,
EA_P,
EA_X,
EA_Y,
EA_SRCMEMX,
EA_SRCMEMY,
EA_SRCMEMD1,
EA_DMADSTMEM,
EA_DSTMEM,
EA_MVIDSTMEM,
EA_FLAGS,
EA_DMASRCMEM
};
struct SCUDSP_OPCODE {
char mnemonic[32];
int address_mode_1;
int address_mode_2;
int address_mode_3;
};
static const SCUDSP_OPCODE alu_table[16] =
{
{ "NOP", 0, 0, 0, }, /* 0000 */
{ "AND", 0, 0, 0, }, /* 0001 */
{ "OR ", 0, 0, 0, }, /* 0010 */
{ "XOR", 0, 0, 0, }, /* 0011 */
{ "ADD", 0, 0, 0, }, /* 0100 */
{ "SUB", 0, 0, 0, }, /* 0101 */
{ "AD2", 0, 0, 0, }, /* 0110 */
{ "???", 0, 0, 0, }, /* 0111 */
{ "SR ", 0, 0, 0, }, /* 1000 */
{ "RR ", 0, 0, 0, }, /* 1001 */
{ "SL ", 0, 0, 0, }, /* 1010 */
{ "RL ", 0, 0, 0, }, /* 1011 */
{ "???", 0, 0, 0, }, /* 1100 */
{ "???", 0, 0, 0, }, /* 1101 */
{ "???", 0, 0, 0, }, /* 1110 */
{ "RL8", 0, 0, 0, }, /* 1111 */
};
static const SCUDSP_OPCODE xbus_table[] =
{
{ "NOP", 0, 0, 0, }, /* 000 */
{ "???", 0, 0, 0, }, /* 001 */
{ "MOV", EA_MUL, EA_P, 0, }, /* 010 */
{ "MOV", EA_SRCMEMX, EA_P, 0, }, /* 011 */ //MOV %s,P
{ "MOV", EA_SRCMEMX, EA_X, 0, }, /* 100 */ //MOV %s,X
{ "???", 0, 0, 0, }, /* 101 */
{ "???", 0, 0, 0, }, /* 110 */
{ "???", 0, 0, 0, }, /* 111 */
};
static const SCUDSP_OPCODE ybus_table[] =
{
{ "NOP", 0, 0, 0, }, /* 000 */
{ "CLR", 0, EA_A, 0, }, /* 001 */
{ "MOV", EA_ALU, EA_A, 0, }, /* 010 */
{ "MOV", EA_SRCMEMY, EA_A, 0, }, /* 011 */ //MOV %s,A
{ "MOV", EA_SRCMEMY, EA_Y, 0, }, /* 100 */ //MOV %s,Y
{ "???", 0, 0, 0, }, /* 101 */
{ "???", 0, 0, 0, }, /* 110 */
{ "???", 0, 0, 0, }, /* 111 */
};
static const SCUDSP_OPCODE d1bus_table[] =
{
{ "NOP", 0, 0, 0, }, /* 00 */
{ "MOV", EA_IMM8, EA_DSTMEM, 0, }, /* 01 */ //MOV %I8,%d
{ "???", 0, 0, 0, }, /* 10 */
{ "MOV", EA_SRCMEMD1,0, 0, }, /* 11 */ //MOV %S,%d
};
static const SCUDSP_OPCODE mvi_table[] =
{
{ "MVI", EA_IMM25, EA_MVIDSTMEM, 0, }, /* 0 */ //"MVI %I,%d"
{ "MVI", EA_IMM18, EA_MVIDSTMEM, EA_FLAGS, }, /* 1 */ //"MVI %I,%d,%f"
};
static const SCUDSP_OPCODE dma_table[] =
{
{ "DMA", EA_D0, EA_DMADSTMEM, EA_IMM8, }, /* 000 */ // "DMA%H%A D0,%M,%I",
{ "DMA", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 001 */ // "DMA%H%A %s,D0,%I",
{ "DMA", 0, 0, 0, }, /* 010 */ // "DMA%H%A D0,%M,%s",
{ "DMA", 0, 0, 0, }, /* 011 */ // "DMA%H%A %s,D0,%s",
{ "DMAH", EA_D0, EA_DMADSTMEM, EA_IMM8, }, /* 100 */ // "DMA%H%A D0,%M,%I",
{ "DMAH", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 101 */ // "DMA%H%A %s,D0,%I",
{ "DMAH", 0, 0, 0, }, /* 110 */ // "DMA%H%A D0,%M,%s",
{ "DMAH", 0, 0, 0, }, /* 111 */ // "DMA%H%A %s,D0,%s",
};
static const SCUDSP_OPCODE jmp_table[] =
{
{ "JMP", EA_IMM8, 0, 0, }, /* 0 */ // unconditional
{ "JMP", EA_IMM8, 0, EA_FLAGS, }, /* 1 */ // conditional
};
static const SCUDSP_OPCODE loop_table[] =
{
{ "BTM", 0, 0, 0, }, /* 00 */
{ "LPS", 0, 0, 0, }, /* 01 */
};
static const SCUDSP_OPCODE end_table[] =
{
{ "END", 0, 0, 0, }, /* 00 */
{ "ENDI",0, 0, 0, }, /* 01 */
};
static const char *const src_mem[] =
{
"M0", /* 0000 */
"M1", /* 0001 */
"M2", /* 0010 */
"M3", /* 0011 */
"MC0", /* 0100 */
"MC1", /* 0101 */
"MC2", /* 0110 */
"MC3", /* 0111 */
"???", /* 1000 */
"ALL", /* 1001 */
"ALH", /* 1010 */
"???", /* 1011 */
"???", /* 1100 */
"???", /* 1101 */
"???", /* 1110 */
"???", /* 1111 */
};
static const char *const dst_mem[] =
{
"MC0", /* 0000 */
"MC1", /* 0001 */
"MC2", /* 0010 */
"MC3", /* 0011 */
"RX", /* 0100 */
"PL", /* 0101 */
"RA0", /* 0110 */
"WA0", /* 0111 */
"???", /* 1000 */
"???", /* 1001 */
"LOP", /* 1010 */
"TOP", /* 1011 */
"CT0", /* 1100 */
"CT1", /* 1101 */
"CT2", /* 1110 */
"CT3", /* 1111 */
};
static const char *const mvi_dst_mem[] =
{
"MC0", /* 0000 */
"MC1", /* 0001 */
"MC2", /* 0010 */
"MC3", /* 0011 */
"RX", /* 0100 */
"PL", /* 0101 */
"RA0", /* 0110 */
"WA0", /* 0111 */
"???", /* 1000 */
"???", /* 1001 */
"LOP", /* 1010 */
"???", /* 1011 */
"PC", /* 1100 */ //???
"???", /* 1101 */
"???", /* 1110 */
"???", /* 1111 */
};
static const char *const cond_flags[] =
{
"??", /* 0000 */
"Z ", /* 0001 */
"S ", /* 0010 */
"ZS", /* 0011 */
"C ", /* 0100 */
"??", /* 0101 */
"??", /* 0110 */
"??", /* 0111 */
"T0", /* 1000 */
"??", /* 1001 */
"??", /* 1010 */
"??", /* 1011 */
"??", /* 1100 */
"??", /* 1101 */
"??", /* 1110 */
"??", /* 1111 */
};
/*****************************************************************************/
static char *output;
static const UINT8 *rombase;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
{
va_list vl;
va_start(vl, fmt);
output += vsprintf(output, fmt, vl);
va_end(vl);
}
static UINT32 fetch(void)
{
return *rombase++;
}
static UINT8 add_table(UINT32 cur_opcode)
{
UINT8 res = (cur_opcode & 0x00038000) >> 15;
if(res == 0)
res = 0;
else
res = 1 << (res-1);
return res;
}
static UINT32 decode_opcode(UINT32 pc, const SCUDSP_OPCODE *op_table,UINT32 cur_opcode)
{
// INT8 rel8;
// UINT32 imm32;
// UINT8 op2;
UINT32 flags = 0;
//if (!strcmp(op_table->mnemonic, "jsr") || !strcmp(op_table->mnemonic, "bsr"))
// flags = DASMFLAG_STEP_OVER;
//else if (!strcmp(op_table->mnemonic, "rts") || !strcmp(op_table->mnemonic, "rti"))
// flags = DASMFLAG_STEP_OUT;
print("%s ", op_table->mnemonic);
switch(op_table->address_mode_1)
{
case EA_ALU: print("ALU "); break;
case EA_IMM8: print("%02X ",cur_opcode & 0xff); break;
case EA_IMM18: print("%08X ",cur_opcode & 0x7ffff); break;
case EA_IMM25: print("%08X ",cur_opcode & 0x1ffffff); break;
case EA_MUL: print("MUL "); break;
case EA_SRCMEMX: print("%s ", src_mem[(cur_opcode & 0x00700000) >> 20]); break;
case EA_SRCMEMY: print("%s ", src_mem[(cur_opcode & 0x0001c000) >> 14]); break;
case EA_SRCMEMD1: print("%s ", src_mem[(cur_opcode & 0x0000000f) >> 0]); break;
case EA_D0: print("%d D0 ",add_table(cur_opcode)); break;
case EA_DMASRCMEM: print("%d %s ",add_table(cur_opcode),src_mem[(cur_opcode & 0x00000300) >> 8]); break;
default:
break;
}
switch(op_table->address_mode_2)
{
case EA_A: print("A"); break;
case EA_P: print("P"); break;
case EA_X: print("X"); break;
case EA_Y: print("Y"); break;
case EA_DSTMEM: print("%s ", dst_mem[(cur_opcode & 0x00000f00) >> 8]); break;
case EA_DMADSTMEM: print("%s ", dst_mem[(cur_opcode & 0x00000300) >> 8]); break;
case EA_MVIDSTMEM: print("%s ", mvi_dst_mem[(cur_opcode & 0x3c000000) >> 26]); break;
case EA_D0: print("D0 "); break;
default:
break;
}
switch(op_table->address_mode_3)
{
case EA_IMM8: print("%02X ",cur_opcode & 0xff); break;
case EA_FLAGS:
if(!((cur_opcode >> 19) & 0x20))
print("N");
print("%s ", cond_flags[(cur_opcode & 0x0780000) >> 19]);
break;
default:
break;
}
return flags;
}
#include "debugger.h"
#include "scudsp.h"
CPU_DISASSEMBLE( scudsp )
{
UINT32 flags = 0;
UINT8 opcode;
UINT32 op = oprom[0];
unsigned size = 1;
// const char *sym, *sym2;
output = buffer;
rombase = oprom;
opcode = fetch();
switch((opcode & 0xc0000000) >> 30)
switch( op )
{
case 0: // operation
flags = decode_opcode(pc, &alu_table [(opcode & 0x3c000000) >> 26],opcode);
flags |= decode_opcode(pc, &xbus_table [(opcode & 0x03800000) >> 23],opcode);
flags |= decode_opcode(pc, &ybus_table [(opcode & 0x000e0000) >> 17],opcode);
flags |= decode_opcode(pc, &d1bus_table[(opcode & 0x00003000) >> 12],opcode);
break;
case 1: // unknown
print("???");
flags = 0;
break;
case 2: // move immediate
flags = decode_opcode(pc, &mvi_table [(opcode & 0x02000000) >> 25],opcode);
break;
case 3: // control
switch((opcode & 0x30000000) >> 28)
{
case 0:
flags = decode_opcode(pc, &dma_table [(opcode & 0x7000) >> 12],opcode);
break;
case 1:
flags = decode_opcode(pc, &jmp_table [(opcode & 0x2000000) >> 25],opcode);
break;
case 2:
flags = decode_opcode(pc, &loop_table [(opcode & 0x8000000) >> 27],opcode);
break;
case 3:
flags = decode_opcode(pc, &end_table [(opcode & 0x8000000) >> 27],opcode);
break;
}
default:
sprintf(buffer, "???");
break;
}
return (rombase-oprom) | flags | DASMFLAG_SUPPORTED;
return size;
}

1
src/emu/machine/saturn.c
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@ -44,6 +44,7 @@
#include "includes/stv.h"
#include "machine/scudsp.h"
#include "cpu/sh2/sh2.h"
#include "cpu/scudsp/scudsp.h"
/* TODO: do this in a verboselog style */
#define LOG_CDB 0

127
src/mame/etc/template_cpu.c Normal file
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@ -0,0 +1,127 @@
/*****************************************************************************
*
* template for CPU cores
*
*****************************************************************************/
#include "emu.h"
#include "debugger.h"
#include "xxx.h"
const device_type XXX = &device_creator<xxx_cpu_device>;
/* FLAGS */
#if 0
#define S 0x80
#define Z 0x40
#define OV 0x20
#define C 0x10
#endif
#define xxx_readop(A) m_program->read_dword(A)
#define xxx_readmem16(A) m_data->read_dword(A)
#define xxx_writemem16(A,B) m_data->write_dword((A),B)
/***********************************
* illegal opcodes
***********************************/
void xxx_cpu_device::xxx_illegal()
{
logerror("xxx illegal opcode at 0x%04x\n", m_pc);
m_icount -= 1;
}
/* Execute cycles */
void cp1610_cpu_device::execute_run()
{
UINT16 opcode;
do
{
debugger_instruction_hook(this, m_pc);
opcode = xxx_readop(m_pc);
m_pc++;
switch( opcode )
{
default:
xxx_illegal();
break;
}
} while( m_icount > 0 );
}
void xxx_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
m_data = &space(AS_DATA);
save_item(NAME(m_pc));
save_item(NAME(m_flags));
// Register state for debugger
state_add( CP1610_R0, "PC", m_pc ).formatstr("%02X");
state_add( STATE_GENPC, "curpc", m_r[7] ).noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
m_icountptr = &m_icount;
}
#if 0
void xxx_cpu_device::execute_set_input(int irqline, int state)
{
switch(irqline)
{
case XXX_INT_INTRM:
m_intrm_pending = (state == ASSERT_LINE);
m_intrm_state = state;
break;
case XXX_RESET:
if (state == ASSERT_LINE)
m_reset_pending = 1;
m_reset_state = state;
break;
case XXX_INT_INTR:
if (state == ASSERT_LINE)
m_intr_pending = 1;
m_intr_state = state;
break;
}
}
#endif
xxx_cpu_device::xxx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, XXX, "XXX", tag, owner, clock, "xxx", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 32, -1)
, m_data_config("data", ENDIANNESS_BIG, 8, 32, 0)
{
}
void xxx_cpu_device::state_string_export(const device_state_entry &entry, astring &string)
{
switch (entry.index())
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c",
m_flags & 0x80 ? 'S':'.',
m_flags & 0x40 ? 'Z':'.',
m_flags & 0x20 ? 'V':'.',
m_flags & 0x10 ? 'C':'.');
break;
}
}
offs_t xxx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT32 *oprom, const UINT32 *opram, UINT32 options)
{
extern CPU_DISASSEMBLE( xxx );
return CPU_DISASSEMBLE_NAME(xxx)(this, buffer, pc, oprom, opram, options);
}

69
src/mame/etc/template_cpu.h Normal file
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@ -0,0 +1,69 @@
/*****************************************************************************
*
* template for CPU cores
*
*****************************************************************************/
#pragma once
#ifndef __XXX_H__
#define __XXX_H__
enum
{
#if 0
XXX_R0=1, XXX_R1, XXX_R2, XXX_R3,
XXX_R4, XXX_R5, XXX_R6, XXX_R7
#endif
};
class xxx_cpu_device : public cpu_device
{
public:
// construction/destruction
xxx_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 7; }
virtual UINT32 execute_input_lines() const { return 0; }
virtual void execute_run();
virtual void execute_set_input(int inputnum, int state);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ); }
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, astring &string);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 4; }
virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
private:
address_space_config m_program_config;
UINT8 m_pc; /* registers */
UINT8 m_flags; /* flags */
address_space *m_program;
address_space *m_data;
int m_icount;
void xxx_illegal();
};
extern const device_type XXX;
CPU_DISASSEMBLE( xxx );
#endif /* __XXX_H__ */

19
src/mess/drivers/saturn.c
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@ -38,6 +38,7 @@ test1f diagnostic hacks:
#include "cpu/m68000/m68000.h"
#include "machine/eepromser.h"
#include "cpu/sh2/sh2.h"
#include "cpu/scudsp/scudsp.h"
#include "machine/scudsp.h"
#include "sound/scsp.h"
#include "sound/cdda.h"
@ -183,6 +184,16 @@ static ADDRESS_MAP_START( sound_mem, AS_PROGRAM, 16, sat_console_state )
AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp", scsp_r, scsp_w)
ADDRESS_MAP_END
#if 0
static ADDRESS_MAP_START( scudsp_mem, AS_PROGRAM, 32, sat_console_state )
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( scudsp_data, AS_DATA, 32, sat_console_state )
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
#endif
/* keyboard code */
/* TODO: needs a proper keycode table */
@ -743,6 +754,14 @@ static MACHINE_CONFIG_START( saturn, sat_console_state )
MCFG_CPU_ADD("audiocpu", M68000, 11289600) //256 x 44100 Hz = 11.2896 MHz
MCFG_CPU_PROGRAM_MAP(sound_mem)
#if 0
MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
MCFG_CPU_PROGRAM_MAP(scudsp_mem)
MCFG_CPU_DATA_MAP(scudsp_data)
// MCFG_CPU_CONFIG(scudsp_config)
#endif
// SH-1
// SMPC MCU, running at 4 MHz (+ custom RTC device that runs at 32.768 KHz)