mirror of
https://github.com/holub/mame
synced 2025-07-01 16:19:38 +03:00
Fix noexcept and NL_NOEXCEPT to pass g++ 6.x builds. (nw)
This commit is contained in:
parent
8b6f09adcc
commit
8c297602c4
@ -641,7 +641,7 @@ detail::net_t::~net_t()
|
|||||||
netlist().state().remove_save_items(this);
|
netlist().state().remove_save_items(this);
|
||||||
}
|
}
|
||||||
|
|
||||||
void detail::net_t::inc_active(core_terminal_t &term)
|
void detail::net_t::inc_active(core_terminal_t &term) NL_NOEXCEPT
|
||||||
{
|
{
|
||||||
m_active++;
|
m_active++;
|
||||||
m_list_active.push_front(&term);
|
m_list_active.push_front(&term);
|
||||||
@ -665,7 +665,7 @@ void detail::net_t::inc_active(core_terminal_t &term)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void detail::net_t::dec_active(core_terminal_t &term)
|
void detail::net_t::dec_active(core_terminal_t &term) NL_NOEXCEPT
|
||||||
{
|
{
|
||||||
--m_active;
|
--m_active;
|
||||||
nl_assert(m_active >= 0);
|
nl_assert(m_active >= 0);
|
||||||
@ -689,7 +689,7 @@ void detail::net_t::rebuild_list()
|
|||||||
m_active = cnt;
|
m_active = cnt;
|
||||||
}
|
}
|
||||||
|
|
||||||
void detail::net_t::update_devs()
|
void detail::net_t::update_devs() NL_NOEXCEPT
|
||||||
{
|
{
|
||||||
nl_assert(this->isRailNet());
|
nl_assert(this->isRailNet());
|
||||||
|
|
||||||
@ -780,11 +780,12 @@ analog_net_t::analog_net_t(netlist_t &nl, const pstring &aname, detail::core_ter
|
|||||||
// core_terminal_t
|
// core_terminal_t
|
||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
detail::core_terminal_t::core_terminal_t(core_device_t &dev, const pstring &aname, const type_t atype)
|
detail::core_terminal_t::core_terminal_t(core_device_t &dev, const pstring &aname,
|
||||||
: device_object_t(dev, dev.name() + "." + aname, atype)
|
const type_t type, const state_e state)
|
||||||
|
: device_object_t(dev, dev.name() + "." + aname, type)
|
||||||
, plib::linkedlist_t<core_terminal_t>::element_t()
|
, plib::linkedlist_t<core_terminal_t>::element_t()
|
||||||
, m_net(nullptr)
|
, m_net(nullptr)
|
||||||
, m_state(*this, "m_state", STATE_NONEX)
|
, m_state(*this, "m_state", state)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -812,7 +813,7 @@ void detail::core_terminal_t::set_net(net_t *anet)
|
|||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
terminal_t::terminal_t(core_device_t &dev, const pstring &aname)
|
terminal_t::terminal_t(core_device_t &dev, const pstring &aname)
|
||||||
: analog_t(dev, aname, TERMINAL)
|
: analog_t(dev, aname, TERMINAL, STATE_BIDIR)
|
||||||
, m_otherterm(nullptr)
|
, m_otherterm(nullptr)
|
||||||
, m_Idr1(*this, "m_Idr1", nullptr)
|
, m_Idr1(*this, "m_Idr1", nullptr)
|
||||||
, m_go1(*this, "m_go1", nullptr)
|
, m_go1(*this, "m_go1", nullptr)
|
||||||
@ -849,10 +850,9 @@ void terminal_t::schedule_after(const netlist_time &after)
|
|||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
logic_output_t::logic_output_t(core_device_t &dev, const pstring &aname)
|
logic_output_t::logic_output_t(core_device_t &dev, const pstring &aname)
|
||||||
: logic_t(dev, aname, OUTPUT)
|
: logic_t(dev, aname, OUTPUT, STATE_OUT)
|
||||||
, m_my_net(dev.netlist(), name() + ".net", this)
|
, m_my_net(dev.netlist(), name() + ".net", this)
|
||||||
{
|
{
|
||||||
set_state(STATE_OUT);
|
|
||||||
this->set_net(&m_my_net);
|
this->set_net(&m_my_net);
|
||||||
set_logic_family(dev.logic_family());
|
set_logic_family(dev.logic_family());
|
||||||
netlist().setup().register_term(*this);
|
netlist().setup().register_term(*this);
|
||||||
@ -868,9 +868,8 @@ void logic_output_t::initial(const netlist_sig_t val)
|
|||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
analog_input_t::analog_input_t(core_device_t &dev, const pstring &aname)
|
analog_input_t::analog_input_t(core_device_t &dev, const pstring &aname)
|
||||||
: analog_t(dev, aname, INPUT)
|
: analog_t(dev, aname, INPUT, STATE_INP_ACTIVE)
|
||||||
{
|
{
|
||||||
set_state(STATE_INP_ACTIVE);
|
|
||||||
netlist().setup().register_term(*this);
|
netlist().setup().register_term(*this);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -879,11 +878,10 @@ analog_input_t::analog_input_t(core_device_t &dev, const pstring &aname)
|
|||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
analog_output_t::analog_output_t(core_device_t &dev, const pstring &aname)
|
analog_output_t::analog_output_t(core_device_t &dev, const pstring &aname)
|
||||||
: analog_t(dev, aname, OUTPUT)
|
: analog_t(dev, aname, OUTPUT, STATE_OUT)
|
||||||
, m_my_net(dev.netlist(), name() + ".net", this)
|
, m_my_net(dev.netlist(), name() + ".net", this)
|
||||||
{
|
{
|
||||||
this->set_net(&m_my_net);
|
this->set_net(&m_my_net);
|
||||||
set_state(STATE_OUT);
|
|
||||||
|
|
||||||
net().m_cur_Analog = NL_FCONST(0.0);
|
net().m_cur_Analog = NL_FCONST(0.0);
|
||||||
netlist().setup().register_term(*this);
|
netlist().setup().register_term(*this);
|
||||||
@ -899,9 +897,8 @@ void analog_output_t::initial(const nl_double val)
|
|||||||
// -----------------------------------------------------------------------------
|
// -----------------------------------------------------------------------------
|
||||||
|
|
||||||
logic_input_t::logic_input_t(core_device_t &dev, const pstring &aname)
|
logic_input_t::logic_input_t(core_device_t &dev, const pstring &aname)
|
||||||
: logic_t(dev, aname, INPUT)
|
: logic_t(dev, aname, INPUT, STATE_INP_ACTIVE)
|
||||||
{
|
{
|
||||||
set_state(STATE_INP_ACTIVE);
|
|
||||||
set_logic_family(dev.logic_family());
|
set_logic_family(dev.logic_family());
|
||||||
netlist().setup().register_term(*this);
|
netlist().setup().register_term(*this);
|
||||||
}
|
}
|
||||||
|
@ -143,7 +143,7 @@ class NETLIB_NAME(name) : public device_t
|
|||||||
#define nl_assert(x) do { if (1) if (!(x)) throw nl_exception(plib::pfmt("assert: {1}:{2}: {3}")(__FILE__)(__LINE__)(#x) ); } while (0)
|
#define nl_assert(x) do { if (1) if (!(x)) throw nl_exception(plib::pfmt("assert: {1}:{2}: {3}")(__FILE__)(__LINE__)(#x) ); } while (0)
|
||||||
#define NL_NOEXCEPT
|
#define NL_NOEXCEPT
|
||||||
#else
|
#else
|
||||||
#define nl_assert(x) do { if (0) if (!(x)) throw nl_exception(plib::pfmt("assert: {1}:{2}: {3}")(__FILE__)(__LINE__)(#x) ); } while (0)
|
#define nl_assert(x) do { if (0) if (!(x)) { /*throw nl_exception(plib::pfmt("assert: {1}:{2}: {3}")(__FILE__)(__LINE__)(#x) ); */} } while (0)
|
||||||
#define NL_NOEXCEPT noexcept
|
#define NL_NOEXCEPT noexcept
|
||||||
#endif
|
#endif
|
||||||
#define nl_assert_always(x, msg) do { if (!(x)) throw nl_exception(plib::pfmt("Fatal error: {1}\nCaused by assert: {2}:{3}: {4}")(msg)(__FILE__)(__LINE__)(#x)); } while (0)
|
#define nl_assert_always(x, msg) do { if (!(x)) throw nl_exception(plib::pfmt("Fatal error: {1}\nCaused by assert: {2}:{3}: {4}")(msg)(__FILE__)(__LINE__)(#x)); } while (0)
|
||||||
@ -214,8 +214,8 @@ namespace netlist
|
|||||||
*/
|
*/
|
||||||
using model_map_t = std::unordered_map<pstring, pstring>;
|
using model_map_t = std::unordered_map<pstring, pstring>;
|
||||||
|
|
||||||
/*! Logic families descriptors are used create proxy devices.
|
/*! Logic families descriptors are used to create proxy devices.
|
||||||
* The logic family describe the analog capabilities of logic devices,
|
* The logic family describes the analog capabilities of logic devices,
|
||||||
* inputs and outputs.
|
* inputs and outputs.
|
||||||
*/
|
*/
|
||||||
class logic_family_desc_t
|
class logic_family_desc_t
|
||||||
@ -448,6 +448,11 @@ namespace netlist
|
|||||||
// core_terminal_t
|
// core_terminal_t
|
||||||
// -----------------------------------------------------------------------------
|
// -----------------------------------------------------------------------------
|
||||||
|
|
||||||
|
/*! Base class for all terminals.
|
||||||
|
*
|
||||||
|
* All terminals are derived from this class.
|
||||||
|
*
|
||||||
|
*/
|
||||||
class detail::core_terminal_t : public device_object_t, public plib::linkedlist_t<core_terminal_t>::element_t
|
class detail::core_terminal_t : public device_object_t, public plib::linkedlist_t<core_terminal_t>::element_t
|
||||||
{
|
{
|
||||||
P_PREVENT_COPYING(core_terminal_t)
|
P_PREVENT_COPYING(core_terminal_t)
|
||||||
@ -455,18 +460,17 @@ namespace netlist
|
|||||||
|
|
||||||
using list_t = std::vector<core_terminal_t *>;
|
using list_t = std::vector<core_terminal_t *>;
|
||||||
|
|
||||||
/* needed here ... */
|
|
||||||
|
|
||||||
enum state_e {
|
enum state_e {
|
||||||
STATE_INP_PASSIVE = 0,
|
STATE_INP_PASSIVE = 0,
|
||||||
STATE_INP_ACTIVE = 1,
|
STATE_INP_ACTIVE = 1,
|
||||||
STATE_INP_HL = 2,
|
STATE_INP_HL = 2,
|
||||||
STATE_INP_LH = 4,
|
STATE_INP_LH = 4,
|
||||||
STATE_OUT = 128,
|
STATE_OUT = 128,
|
||||||
STATE_NONEX = 256
|
STATE_BIDIR = 256
|
||||||
};
|
};
|
||||||
|
|
||||||
core_terminal_t(core_device_t &dev, const pstring &aname, const type_t atype);
|
core_terminal_t(core_device_t &dev, const pstring &aname,
|
||||||
|
const type_t type, const state_e state);
|
||||||
virtual ~core_terminal_t() { }
|
virtual ~core_terminal_t() { }
|
||||||
|
|
||||||
void set_net(net_t *anet);
|
void set_net(net_t *anet);
|
||||||
@ -481,11 +485,7 @@ namespace netlist
|
|||||||
|
|
||||||
bool is_state(const state_e astate) const { return (m_state == astate); }
|
bool is_state(const state_e astate) const { return (m_state == astate); }
|
||||||
state_e state() const { return m_state; }
|
state_e state() const { return m_state; }
|
||||||
void set_state(const state_e astate)
|
void set_state(const state_e astate) { m_state = astate; }
|
||||||
{
|
|
||||||
nl_assert(astate != STATE_NONEX);
|
|
||||||
m_state = astate;
|
|
||||||
}
|
|
||||||
|
|
||||||
void reset();
|
void reset();
|
||||||
|
|
||||||
@ -502,8 +502,9 @@ namespace netlist
|
|||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
|
|
||||||
analog_t(core_device_t &dev, const pstring &aname, const type_t atype)
|
analog_t(core_device_t &dev, const pstring &aname, const type_t type,
|
||||||
: core_terminal_t(dev, aname, atype)
|
const state_e state)
|
||||||
|
: core_terminal_t(dev, aname, type, state)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -580,9 +581,11 @@ namespace netlist
|
|||||||
class logic_t : public detail::core_terminal_t, public logic_family_t
|
class logic_t : public detail::core_terminal_t, public logic_family_t
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
logic_t(core_device_t &dev, const pstring &aname, const type_t atype)
|
logic_t(core_device_t &dev, const pstring &aname, const type_t type,
|
||||||
: core_terminal_t(dev, aname, atype), logic_family_t(),
|
const state_e state)
|
||||||
m_proxy(nullptr)
|
: core_terminal_t(dev, aname, type, state)
|
||||||
|
, logic_family_t()
|
||||||
|
, m_proxy(nullptr)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -610,7 +613,7 @@ namespace netlist
|
|||||||
|
|
||||||
netlist_sig_t Q() const noexcept;
|
netlist_sig_t Q() const noexcept;
|
||||||
|
|
||||||
netlist_sig_t operator()() const
|
netlist_sig_t operator()() const NL_NOEXCEPT
|
||||||
{
|
{
|
||||||
nl_assert(state() != STATE_INP_PASSIVE);
|
nl_assert(state() != STATE_INP_PASSIVE);
|
||||||
return Q();
|
return Q();
|
||||||
@ -680,7 +683,7 @@ namespace netlist
|
|||||||
void reschedule_in_queue(const netlist_time delay) noexcept;
|
void reschedule_in_queue(const netlist_time delay) noexcept;
|
||||||
bool is_queued() const { return m_in_queue == 1; }
|
bool is_queued() const { return m_in_queue == 1; }
|
||||||
|
|
||||||
void update_devs();
|
void update_devs() NL_NOEXCEPT;
|
||||||
|
|
||||||
const netlist_time time() const { return m_time; }
|
const netlist_time time() const { return m_time; }
|
||||||
void set_time(const netlist_time ntime) { m_time = ntime; }
|
void set_time(const netlist_time ntime) { m_time = ntime; }
|
||||||
@ -690,8 +693,8 @@ namespace netlist
|
|||||||
|
|
||||||
std::size_t num_cons() const noexcept { return m_core_terms.size(); }
|
std::size_t num_cons() const noexcept { return m_core_terms.size(); }
|
||||||
|
|
||||||
void inc_active(core_terminal_t &term);
|
void inc_active(core_terminal_t &term) NL_NOEXCEPT;
|
||||||
void dec_active(core_terminal_t &term);
|
void dec_active(core_terminal_t &term) NL_NOEXCEPT;
|
||||||
|
|
||||||
void rebuild_list(); /* rebuild m_list after a load */
|
void rebuild_list(); /* rebuild m_list after a load */
|
||||||
void move_connections(net_t &dest_net);
|
void move_connections(net_t &dest_net);
|
||||||
|
@ -7,7 +7,7 @@
|
|||||||
|
|
||||||
#include "pdynlib.h"
|
#include "pdynlib.h"
|
||||||
|
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
#include "windows.h"
|
#include "windows.h"
|
||||||
#include "palloc.h"
|
#include "palloc.h"
|
||||||
|
|
||||||
@ -61,7 +61,7 @@ namespace plib {
|
|||||||
dynlib::dynlib(const pstring libname)
|
dynlib::dynlib(const pstring libname)
|
||||||
: m_isLoaded(false), m_lib(nullptr)
|
: m_isLoaded(false), m_lib(nullptr)
|
||||||
{
|
{
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
//fprintf(stderr, "win: loading <%s>\n", libname.cstr());
|
//fprintf(stderr, "win: loading <%s>\n", libname.cstr());
|
||||||
TCHAR *buffer = tstring_from_utf8(libname.cstr());
|
TCHAR *buffer = tstring_from_utf8(libname.cstr());
|
||||||
if (libname != "")
|
if (libname != "")
|
||||||
@ -90,7 +90,7 @@ dynlib::dynlib(const pstring path, const pstring libname)
|
|||||||
: m_isLoaded(false), m_lib(nullptr)
|
: m_isLoaded(false), m_lib(nullptr)
|
||||||
{
|
{
|
||||||
// printf("win: loading <%s>\n", libname.cstr());
|
// printf("win: loading <%s>\n", libname.cstr());
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
TCHAR *buffer = tstring_from_utf8(libname.cstr());
|
TCHAR *buffer = tstring_from_utf8(libname.cstr());
|
||||||
if (libname != "")
|
if (libname != "")
|
||||||
m_lib = LoadLibrary(buffer);
|
m_lib = LoadLibrary(buffer);
|
||||||
@ -122,7 +122,7 @@ dynlib::~dynlib()
|
|||||||
{
|
{
|
||||||
if (m_lib != nullptr)
|
if (m_lib != nullptr)
|
||||||
{
|
{
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
#else
|
#else
|
||||||
dlclose(m_lib);
|
dlclose(m_lib);
|
||||||
//printf("Closed %s\n", dlerror());
|
//printf("Closed %s\n", dlerror());
|
||||||
@ -137,7 +137,7 @@ bool dynlib::isLoaded() const
|
|||||||
|
|
||||||
void *dynlib::getsym_p(const pstring name)
|
void *dynlib::getsym_p(const pstring name)
|
||||||
{
|
{
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
return (void *) GetProcAddress((HMODULE) m_lib, name.cstr());
|
return (void *) GetProcAddress((HMODULE) m_lib, name.cstr());
|
||||||
#else
|
#else
|
||||||
return dlsym(m_lib, name.cstr());
|
return dlsym(m_lib, name.cstr());
|
||||||
|
@ -22,7 +22,7 @@ namespace plib
|
|||||||
if (ret == "")
|
if (ret == "")
|
||||||
ret = elem;
|
ret = elem;
|
||||||
else
|
else
|
||||||
#ifdef WIN32
|
#ifdef _WIN32
|
||||||
ret = ret + '\\' + elem;
|
ret = ret + '\\' + elem;
|
||||||
#else
|
#else
|
||||||
ret = ret + '/' + elem;
|
ret = ret + '/' + elem;
|
||||||
|
Loading…
Reference in New Issue
Block a user