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Moved blitter status around, function cleanups

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This commit is contained in:
angelosa 2016-02-09 22:22:07 +01:00
parent 63dee56d13
commit 8c8cf1df87
4 changed files with 65 additions and 77 deletions
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15
src/devices/video/jangou_blitter.cpp
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@ -96,7 +96,7 @@ void jangou_blitter_device::plot_gfx_pixel( UINT8 pix, int x, int y )
m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
}
WRITE8_MEMBER( jangou_blitter_device::blitter_process_w )
WRITE8_MEMBER( jangou_blitter_device::process_w )
{
int src, x, y, h, w, flipx;
m_blit_data[offset] = data;
@ -168,22 +168,27 @@ WRITE8_MEMBER( jangou_blitter_device::blitter_process_w )
}
// Sexy Gal swaps around upper src address
WRITE8_MEMBER( jangou_blitter_device::blitter_alt_process_w)
WRITE8_MEMBER( jangou_blitter_device::alt_process_w )
{
const UINT8 translate_addr[7] = { 0, 1, 6, 2, 3, 4, 5 };
blitter_process_w(space,translate_addr[offset],data);
process_w(space,translate_addr[offset],data);
}
WRITE8_MEMBER( jangou_blitter_device::blitter_vregs_w)
WRITE8_MEMBER( jangou_blitter_device::vregs_w )
{
// bit 5 set by Jangou, left-over?
m_pen_data[offset] = data & 0x0f;
}
WRITE8_MEMBER( jangou_blitter_device::blitter_bltflip_w)
WRITE8_MEMBER( jangou_blitter_device::bltflip_w )
{
// TODO: unsure about how this works, Charles says it swaps the nibble but afaik it's used for CPU tiles in Night Gal Summer/Sexy Gal and they seems fine?
// Maybe flipx is actually bltflip for later HW?
m_bltflip = true;
}
READ_LINE_MEMBER( jangou_blitter_device::status_r )
{
return false;
}

9
src/devices/video/jangou_blitter.h
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@ -33,10 +33,11 @@ public:
jangou_blitter_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// I/O operations
DECLARE_WRITE8_MEMBER( blitter_process_w );
DECLARE_WRITE8_MEMBER( blitter_alt_process_w );
DECLARE_WRITE8_MEMBER( blitter_vregs_w );
DECLARE_WRITE8_MEMBER( blitter_bltflip_w );
DECLARE_WRITE8_MEMBER( process_w );
DECLARE_WRITE8_MEMBER( alt_process_w );
DECLARE_WRITE8_MEMBER( vregs_w );
DECLARE_WRITE8_MEMBER( bltflip_w );
DECLARE_READ_LINE_MEMBER( status_r );
UINT8 m_blit_buffer[256 * 256];

49
src/mame/drivers/jangou.cpp
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@ -324,11 +324,10 @@ static ADDRESS_MAP_START( cpu0_io, AS_IO, 8, jangou_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x01,0x01) AM_DEVREAD("aysnd", ay8910_device, data_r)
AM_RANGE(0x02,0x03) AM_DEVWRITE("aysnd", ay8910_device, data_address_w)
AM_RANGE(0x10,0x10) AM_READ_PORT("DSW") //dsw + blitter busy flag
AM_RANGE(0x10,0x10) AM_WRITE(output_w)
AM_RANGE(0x10,0x10) AM_READ_PORT("DSW") AM_WRITE(output_w) //dsw + blitter busy flag
AM_RANGE(0x11,0x11) AM_WRITE(mux_w)
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_vregs_w)
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, vregs_w)
AM_RANGE(0x30,0x30) AM_WRITENOP //? polls 0x03 continuously
AM_RANGE(0x31,0x31) AM_WRITE(sound_latch_w)
ADDRESS_MAP_END
@ -398,8 +397,8 @@ static ADDRESS_MAP_START( cntrygrl_cpu0_io, AS_IO, 8, jangou_state )
AM_RANGE(0x10,0x10) AM_READ_PORT("DSW") //dsw + blitter busy flag
AM_RANGE(0x10,0x10) AM_WRITE(output_w)
AM_RANGE(0x11,0x11) AM_WRITE(mux_w)
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_vregs_w)
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, vregs_w)
AM_RANGE(0x30,0x30) AM_WRITENOP //? polls 0x03 continuously
// AM_RANGE(0x31,0x31) AM_WRITE(sound_latch_w)
ADDRESS_MAP_END
@ -423,8 +422,8 @@ static ADDRESS_MAP_START( roylcrdn_cpu0_io, AS_IO, 8, jangou_state )
AM_RANGE(0x10,0x10) AM_WRITENOP /* Writes continuosly 0's in attract mode, and 1's in game */
AM_RANGE(0x11,0x11) AM_WRITE(mux_w)
AM_RANGE(0x13,0x13) AM_READNOP /* Often reads bit7 with unknown purposes */
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, blitter_vregs_w)
AM_RANGE(0x12,0x17) AM_DEVWRITE("blitter",jangou_blitter_device, process_w)
AM_RANGE(0x20,0x2f) AM_DEVWRITE("blitter",jangou_blitter_device, vregs_w)
AM_RANGE(0x30,0x30) AM_WRITENOP /* Seems to write 0x10 on each sound event */
ADDRESS_MAP_END
@ -523,7 +522,7 @@ static INPUT_PORTS_START( jangou )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") // guess
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // blitter busy flag
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
INPUT_PORTS_END
static INPUT_PORTS_START( macha )
@ -584,7 +583,7 @@ static INPUT_PORTS_START( macha )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") // guess
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // blitter busy flag
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
INPUT_PORTS_END
@ -669,7 +668,7 @@ static INPUT_PORTS_START( cntrygrl )
PORT_DIPNAME( 0x40, 0x40, "Coin B setting" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x00, "1 Coin / 10 Credits" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // blitter busy flag
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
PORT_START("IN_NOMUX")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
@ -710,7 +709,7 @@ static INPUT_PORTS_START( jngolady )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) //blitter busy flag
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
INPUT_PORTS_END
static INPUT_PORTS_START( roylcrdn )
@ -768,29 +767,9 @@ static INPUT_PORTS_START( roylcrdn )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Credit Clear") /* Credit Clear */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* Spare 1 */
PORT_START("DSW") /* Not a real DSW on PCB */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* blitter busy flag */
PORT_START("DSW")
PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
PORT_START("IN_NOMUX")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )

69
src/mame/drivers/nightgal.cpp
View File

@ -72,7 +72,6 @@ public:
required_device<cpu_device> m_subcpu;
/* memory */
DECLARE_READ8_MEMBER(blitter_status_r);
//DECLARE_WRITE8_MEMBER(sexygal_nsc_true_blitter_w);
DECLARE_WRITE8_MEMBER(royalqn_blitter_0_w);
DECLARE_WRITE8_MEMBER(royalqn_blitter_1_w);
@ -121,13 +120,6 @@ protected:
std::unique_ptr<bitmap_ind16> m_tmp_bitmap;
};
READ8_MEMBER(nightgal_state::blitter_status_r)
{
return 0x80;
}
void nightgal_state::video_start()
{
m_tmp_bitmap = std::make_unique<bitmap_ind16>(256, 256);
@ -203,23 +195,9 @@ PALETTE_INIT_MEMBER(nightgal_state, nightgal)
********************************************/
/*
(note:when I say "0x80" I just mean a negative result)
master-slave algorithm
-z80 writes the data for the mcu;
-z80 writes 0 to c200;
-it waits with the bit 0x80 on c100 clears (i.e. the z80 halts),when this happens the z80 continues his logic algorithm (so stop it until we are done!!!)
-nsc takes an irq
-puts ff to [1100]
-it waits that the bit 0x80 on [1100] clears
-(puts default clut data,only the first time around)
-reads params from z80 and puts them on the blitter chip
-expects that bit [80] is equal to 0x80;
-clears [1100] and expects that [1100] is 0
-executes a wai (i.e. halt) opcode then expects to receive another irq...
*/
/* TODO: simplify this (error in the document) */
There are three unidirectional latches that also sends an irq from z80 to MCU.
*/
// TODO: simplify this (error in the document)
WRITE8_MEMBER(nightgal_state::royalqn_blitter_0_w)
{
m_blit_raw_data[0] = data;
@ -362,11 +340,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sexygal_nsc_map, AS_PROGRAM, 8, nightgal_state )
AM_RANGE(0x0000, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x0080) AM_READ(blitter_status_r)
AM_RANGE(0x0080, 0x0080) AM_READ_PORT("BLIT_PORT")
AM_RANGE(0x0081, 0x0083) AM_READ(royalqn_nsc_blit_r)
AM_RANGE(0x0080, 0x0086) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_alt_process_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_vregs_w)
AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_bltflip_w)
AM_RANGE(0x0080, 0x0086) AM_DEVWRITE("blitter", jangou_blitter_device, alt_process_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVWRITE("blitter", jangou_blitter_device, vregs_w)
AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE("blitter", jangou_blitter_device, bltflip_w)
AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x2c00) AM_READWRITE(royalqn_comm_r, royalqn_comm_w) AM_SHARE("comms_ram")
AM_RANGE(0xc000, 0xdfff) AM_MIRROR(0x2000) AM_ROM AM_REGION("subrom", 0)
@ -400,11 +378,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( royalqn_nsc_map, AS_PROGRAM, 8, nightgal_state )
AM_RANGE(0x0000, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x0080) AM_READ(blitter_status_r)
AM_RANGE(0x0080, 0x0080) AM_READ_PORT("BLIT_PORT")
AM_RANGE(0x0081, 0x0083) AM_READ(royalqn_nsc_blit_r)
AM_RANGE(0x0080, 0x0086) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_process_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_vregs_w)
AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_bltflip_w)
AM_RANGE(0x0080, 0x0086) AM_DEVWRITE("blitter", jangou_blitter_device, process_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVWRITE("blitter", jangou_blitter_device, vregs_w)
AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE("blitter", jangou_blitter_device, bltflip_w)
AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x2c00) AM_READWRITE(royalqn_comm_r,royalqn_comm_w)
AM_RANGE(0x4000, 0x4000) AM_NOP
@ -648,6 +626,31 @@ static INPUT_PORTS_START( sexygal )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("BLIT_PORT")
PORT_DIPNAME( 0x01, 0x01, "BLIT_PORT" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("blitter", jangou_blitter_device, status_r)
INPUT_PORTS_END
void nightgal_state::machine_start()