namcos23: Hook the 3D commands DMA [O. Galibert]

This commit is contained in:
Olivier Galibert 2010-03-13 11:15:37 +00:00
parent 29c75bfefe
commit 8cc804bb91

View File

@ -1204,6 +1204,8 @@ static UINT32 c421_adr = 0;
static INT16 s23_c422_regs[0x10]; static INT16 s23_c422_regs[0x10];
static int s23_subcpu_running; static int s23_subcpu_running;
static UINT32 p3d_address, p3d_size;
static UINT16 nthword( const UINT32 *pSource, int offs ) static UINT16 nthword( const UINT32 *pSource, int offs )
{ {
pSource += offs/2; pSource += offs/2;
@ -1241,6 +1243,9 @@ static VIDEO_UPDATE( ss23 )
bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine)); bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
bitmap_fill(screen->machine->priority_bitmap, cliprect, 0); bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
gfx_element *gfx = screen->machine->gfx[0];
memset(gfx->dirty, 1, gfx->total_elements);
tilemap_draw( bitmap, cliprect, bgtilemap, 0/*flags*/, 0/*priority*/ ); /* opaque */ tilemap_draw( bitmap, cliprect, bgtilemap, 0/*flags*/, 0/*priority*/ ); /* opaque */
return 0; return 0;
} }
@ -1283,7 +1288,7 @@ static WRITE32_HANDLER( namcos23_paletteram_w )
static READ16_HANDLER(s23_c417_r) static READ16_HANDLER(s23_c417_r)
{ {
switch(offset) { switch(offset) {
case 0: return 0x8e | (video_screen_get_vblank(space->machine->primary_screen) ? 0x8000 : 0); case 0: return 0x8e | (video_screen_get_vblank(space->machine->primary_screen) ? 0x0000 : 0x8000);
case 1: return c417_adr; case 1: return c417_adr;
case 4: case 4:
// logerror("c417_r %04x = %04x (%08x, %08x)\n", c417_adr, c417_ram[c417_adr], cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31)); // logerror("c417_r %04x = %04x (%08x, %08x)\n", c417_adr, c417_ram[c417_adr], cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
@ -1580,11 +1585,6 @@ static WRITE32_HANDLER( s23_mcuen_w )
} }
} }
static READ32_HANDLER( gorgon_magic_r )
{
return 0xffffffff; // must be non-zero (rapidrvr @ 8000229C)
}
/* /*
Final Furlong has a bug: it forgets to halt the H8/3002 before it zeros out the shared RAM Final Furlong has a bug: it forgets to halt the H8/3002 before it zeros out the shared RAM
which contains the H8's stack and other working set. This crashes MAME due to the PC going which contains the H8's stack and other working set. This crashes MAME due to the PC going
@ -1614,14 +1614,43 @@ static READ32_HANDLER( s23_unk_status_r )
return 0x00020002; return 0x00020002;
} }
static void p3d_packet(const address_space *space, UINT32 adr, UINT32 size)
{
logerror("p3d dma %08x %08x [%08x]\n", adr, size, (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
}
static READ32_HANDLER( p3d_r )
{
switch(offset) {
case 0xa: return 1; // Busy flag
}
logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
return 0;
}
static WRITE32_HANDLER( p3d_w)
{
switch(offset) {
case 0x7: COMBINE_DATA(&p3d_address); return;
case 0x8: COMBINE_DATA(&p3d_size); return;
case 0x9:
if(data & 1)
p3d_packet(space, p3d_address, p3d_size);
return;
case 0x17: return;
}
logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(space->cpu), (unsigned int)cpu_get_reg(space->cpu, MIPS3_R31));
}
static ADDRESS_MAP_START( gorgon_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( gorgon_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_RANGE(0x00000000, 0x003fffff) AM_RAM
AM_RANGE(0x01000000, 0x010000ff) AM_READ( gorgon_magic_r ) AM_RANGE(0x01000000, 0x010000ff) AM_READWRITE( p3d_r, p3d_w )
AM_RANGE(0x02000000, 0x0200000f) AM_READWRITE16( s23_c417_r, s23_c417_w, 0xffffffff ) AM_RANGE(0x02000000, 0x0200000f) AM_READWRITE16( s23_c417_r, s23_c417_w, 0xffffffff )
AM_RANGE(0x04400000, 0x0440ffff) AM_READWRITE( gorgon_sharedram_r, gorgon_sharedram_w ) AM_BASE(&namcos23_shared_ram) AM_RANGE(0x04400000, 0x0440ffff) AM_READWRITE( gorgon_sharedram_r, gorgon_sharedram_w ) AM_BASE(&namcos23_shared_ram)
AM_RANGE(0x04c3ff08, 0x04c3ff0b) AM_WRITE( s23_mcuen_w ) AM_RANGE(0x04c3ff08, 0x04c3ff0b) AM_WRITE( s23_mcuen_w )
AM_RANGE(0x04c3ff0c, 0x04c3ff0f) AM_RAM // 3d FIFO AM_RANGE(0x04c3ff0c, 0x04c3ff0f) AM_RAM
AM_RANGE(0x06080000, 0x06081fff) AM_RAM AM_RANGE(0x06080000, 0x06081fff) AM_RAM
@ -1647,11 +1676,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ss23_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( ss23_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_RANGE(0x00000000, 0x003fffff) AM_RAM
AM_RANGE(0x01000000, 0x010000ff) AM_READ( gorgon_magic_r ) AM_RANGE(0x01000000, 0x010000ff) AM_READWRITE( p3d_r, p3d_w )
AM_RANGE(0x02000000, 0x0200000f) AM_READWRITE16( s23_c417_r, s23_c417_w, 0xffffffff ) AM_RANGE(0x02000000, 0x0200000f) AM_READWRITE16( s23_c417_r, s23_c417_w, 0xffffffff )
AM_RANGE(0x04400000, 0x0440ffff) AM_RAM AM_BASE(&namcos23_shared_ram) AM_RANGE(0x04400000, 0x0440ffff) AM_RAM AM_BASE(&namcos23_shared_ram)
AM_RANGE(0x04c3ff08, 0x04c3ff0b) AM_WRITE( s23_mcuen_w ) AM_RANGE(0x04c3ff08, 0x04c3ff0b) AM_WRITE( s23_mcuen_w )
AM_RANGE(0x04c3ff0c, 0x04c3ff0f) AM_RAM // 3d FIFO AM_RANGE(0x04c3ff0c, 0x04c3ff0f) AM_RAM
AM_RANGE(0x06000000, 0x0600ffff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // Backup AM_RANGE(0x06000000, 0x0600ffff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // Backup
AM_RANGE(0x06200000, 0x06203fff) AM_RAM // C422 AM_RANGE(0x06200000, 0x06203fff) AM_RAM // C422
AM_RANGE(0x06400000, 0x0640000f) AM_READWRITE16( s23_c422_r, s23_c422_w, 0xffffffff ) // C422 registers AM_RANGE(0x06400000, 0x0640000f) AM_READWRITE16( s23_c422_r, s23_c422_w, 0xffffffff ) // C422 registers
@ -1659,7 +1688,8 @@ static ADDRESS_MAP_START( ss23_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x06804000, 0x0681dfff) AM_RAM AM_RANGE(0x06804000, 0x0681dfff) AM_RAM
AM_RANGE(0x0681e000, 0x0681ffff) AM_RAM_WRITE( namcos23_textram_w ) AM_BASE(&namcos23_textram) AM_RANGE(0x0681e000, 0x0681ffff) AM_RAM_WRITE( namcos23_textram_w ) AM_BASE(&namcos23_textram)
AM_RANGE(0x06820000, 0x0682000f) AM_READWRITE16( s23_c361_r, s23_c361_w, 0xffffffff ) // C361 AM_RANGE(0x06820000, 0x0682000f) AM_READWRITE16( s23_c361_r, s23_c361_w, 0xffffffff ) // C361
AM_RANGE(0x06a08000, 0x06a0ffff) AM_RAM // GAMMA (C404) AM_RANGE(0x06a08000, 0x06a081ff) AM_RAM // Blending control (C404 too?)
AM_RANGE(0x06a08200, 0x06a087ff) AM_RAM // GAMMA (C404)
AM_RANGE(0x06a10000, 0x06a3ffff) AM_RAM_WRITE( namcos23_paletteram_w ) AM_BASE_GENERIC(paletteram) AM_RANGE(0x06a10000, 0x06a3ffff) AM_RAM_WRITE( namcos23_paletteram_w ) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x08000000, 0x08ffffff) AM_ROM AM_REGION("data", 0x0000000) AM_MIRROR(0x01000000) // data ROMs AM_RANGE(0x08000000, 0x08ffffff) AM_ROM AM_REGION("data", 0x0000000) AM_MIRROR(0x01000000) // data ROMs
AM_RANGE(0x0a000000, 0x0affffff) AM_ROM AM_REGION("data", 0x1000000) AM_MIRROR(0x01000000) AM_RANGE(0x0a000000, 0x0affffff) AM_ROM AM_REGION("data", 0x1000000) AM_MIRROR(0x01000000)
@ -2016,13 +2046,13 @@ static INPUT_PORTS_START( ss23 )
PORT_START("H8PORT") PORT_START("H8PORT")
// No idea if start is actually there, but we need buttons to pass error screens // No idea if start is actually there, but we need buttons to pass error screens
// You can go to the pcb test mode by pressing start, but it crashes...
PORT_START("P1") PORT_START("P1")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0xffe, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0xff7, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("P2") PORT_START("P2")
PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0xfff, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0xffe, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("TC2P0") PORT_START("TC2P0")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_COIN1 )