Hook up protection MCU in bballsa, add to parent set as BAD_DUMP.

(nw) Uses a similar scheme to pushman, but doesn't use port D on the
MCU, and uses the same endianness for MCU reads/writes (pushman swaps
the bytes on writes).  As an aside, bballs has at least partial nudity
in it as seen in attract mode, although less than bballsa.
This commit is contained in:
Vas Crabb 2017-01-28 23:03:02 +11:00
parent 1558aa281a
commit 8ccebad28f
3 changed files with 28 additions and 89 deletions

View File

@ -88,14 +88,14 @@ static ADDRESS_MAP_START( pushman_map, AS_PROGRAM, 16, pushman_state )
AM_IMPORT_FROM(main_map)
AM_RANGE(0x060000, 0x060007) AM_READ(mcu_comm_r)
AM_RANGE(0x060000, 0x060003) AM_WRITE(mcu_comm_w)
AM_RANGE(0x060000, 0x060003) AM_WRITE(pushman_mcu_comm_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bballs_map, AS_PROGRAM, 16, bballs_state )
static ADDRESS_MAP_START( bballs_map, AS_PROGRAM, 16, pushman_state )
ADDRESS_MAP_GLOBAL_MASK(0xfffff)
AM_RANGE(0x00000, 0x3ffff) AM_ROM
AM_RANGE(0x60000, 0x60007) AM_READ(bballs_68705_r)
AM_RANGE(0x60000, 0x60003) AM_WRITE(bballs_68705_w)
AM_RANGE(0x60000, 0x60007) AM_READ(mcu_comm_r)
AM_RANGE(0x60000, 0x60001) AM_WRITE(bballs_mcu_comm_w)
// are these mirror addresses or does this PCB have a different addressing?
AM_RANGE(0xe0800, 0xe17ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xe4000, 0xe4001) AM_READ_PORT("P1_P2") AM_WRITE(tigeroad_videoctrl_w)
@ -704,23 +704,14 @@ static MACHINE_CONFIG_DERIVED_CLASS(pushman, f1dream_comad, pushman_state)
MACHINE_CONFIG_END
MACHINE_RESET_MEMBER(bballs_state, bballs)
{
m_mcu_semaphore = false;
m_mcu_latch = 0x0400;
}
void bballs_state::machine_start()
{
save_item(NAME(m_mcu_semaphore));
save_item(NAME(m_mcu_latch));
}
static MACHINE_CONFIG_DERIVED_CLASS(bballs, f1dream_comad, bballs_state)
static MACHINE_CONFIG_DERIVED_CLASS(bballs, f1dream_comad, pushman_state)
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(bballs_map)
MCFG_MACHINE_RESET_OVERRIDE(bballs_state, bballs)
MCFG_CPU_ADD("mcu", M68705U3, 4000000) /* No idea */
MCFG_M68705_PORTA_W_CB(WRITE8(pushman_state, mcu_pa_w))
MCFG_M68705_PORTB_W_CB(WRITE8(pushman_state, mcu_pb_w))
MCFG_M68705_PORTC_W_CB(WRITE8(pushman_state, mcu_pc_w))
MACHINE_CONFIG_END
@ -1123,8 +1114,8 @@ ROM_START( bballs )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bb13.n4", 0x00000, 0x08000, CRC(1ef78175) SHA1(2e7dcbab3a572c2a6bb67a36ba283a5faeb14a88) )
ROM_REGION( 0x01000, "cpu2", 0 )
ROM_LOAD( "68705.uc", 0x00000, 0x01000, NO_DUMP )
ROM_REGION( 0x01000, "mcu", 0 ) /* using dump from bballsa set */
ROM_LOAD( "mc68705u3.bin", 0x00000, 0x01000, CRC(4b37b853) SHA1(c95b7b1dcc6f4730fd08535001e2f02b34ea14c2) BAD_DUMP )
ROM_REGION( 0x10000, "text", 0 )
ROM_LOAD( "bb1.g20", 0x00000, 0x08000, CRC(b62dbcb8) SHA1(121613f6d2bcd226e71d4ae71830b9b0d15c2331) )
@ -1156,7 +1147,7 @@ ROM_START( bballsa )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "13.ic216", 0x00000, 0x08000, CRC(1ef78175) SHA1(2e7dcbab3a572c2a6bb67a36ba283a5faeb14a88) )
ROM_REGION( 0x01000, "cpu2", 0 )
ROM_REGION( 0x01000, "mcu", 0 )
ROM_LOAD( "mc68705u3.bin", 0x00000, 0x01000, CRC(4b37b853) SHA1(c95b7b1dcc6f4730fd08535001e2f02b34ea14c2) )
ROM_REGION( 0x10000, "text", 0 )

View File

@ -83,7 +83,8 @@ public:
}
DECLARE_READ16_MEMBER(mcu_comm_r);
DECLARE_WRITE16_MEMBER(mcu_comm_w);
DECLARE_WRITE16_MEMBER(pushman_mcu_comm_w);
DECLARE_WRITE16_MEMBER(bballs_mcu_comm_w);
DECLARE_WRITE8_MEMBER(mcu_pa_w);
DECLARE_WRITE8_MEMBER(mcu_pb_w);
@ -99,27 +100,3 @@ protected:
u16 m_mcu_output;
u8 m_mcu_latch_ctl;
};
class bballs_state : public tigeroad_state
{
public:
bballs_state(const machine_config &mconfig, device_type type, const char *tag)
: tigeroad_state(mconfig, type, tag)
, m_mcu_semaphore(false)
, m_mcu_latch(0xffff)
{
m_has_coinlock = false;
}
DECLARE_READ16_MEMBER(bballs_68705_r);
DECLARE_WRITE16_MEMBER(bballs_68705_w);
DECLARE_MACHINE_RESET(bballs);
protected:
virtual void machine_start() override;
bool m_mcu_semaphore;
u16 m_mcu_latch;
};

View File

@ -133,19 +133,20 @@ READ16_MEMBER(pushman_state::mcu_comm_r)
m_mcu_semaphore = false;
return m_mcu_latch;
case 2: // expects bit 0 to be high when MCU has accepted command (other bits ignored)
return m_host_semaphore ? 0x0000 : 0x0001;
return m_host_semaphore ? 0xfffe : 0xffff;
case 3: // expects bit 0 to be low when MCU has sent response (other bits ignored)
return m_mcu_semaphore ? 0x0000 : 0x0001;
return m_mcu_semaphore ? 0xfffe : 0xffff;
}
logerror("unknown MCU read offset %X & %04X\n", offset, mem_mask);
return 0x0000;
return 0xffff;
}
WRITE16_MEMBER(pushman_state::mcu_comm_w)
WRITE16_MEMBER(pushman_state::pushman_mcu_comm_w)
{
switch (offset & 0x01)
{
case 0:
data = flipendian_int16(data);
COMBINE_DATA(&m_host_latch);
break;
case 1:
@ -156,6 +157,13 @@ WRITE16_MEMBER(pushman_state::mcu_comm_w)
}
}
WRITE16_MEMBER(pushman_state::bballs_mcu_comm_w)
{
COMBINE_DATA(&m_host_latch);
m_host_semaphore = true;
m_mcu->set_input_line(M68705_IRQ_LINE, ASSERT_LINE);
}
WRITE8_MEMBER(pushman_state::mcu_pa_w)
{
m_mcu_output = (m_mcu_output & 0xff00) | (u16(data) & 0x00ff);
@ -177,8 +185,8 @@ WRITE8_MEMBER(pushman_state::mcu_pc_w)
{
m_host_semaphore = false;
m_mcu->set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
m_mcu->pa_w(space, 0, (m_host_latch >> 8) & 0x00ff);
m_mcu->pb_w(space, 0, (m_host_latch >> 0) & 0x00ff);
m_mcu->pa_w(space, 0, (m_host_latch >> 0) & 0x00ff);
m_mcu->pb_w(space, 0, (m_host_latch >> 8) & 0x00ff);
}
if (BIT(m_mcu_latch_ctl, 1) && !BIT(data, 1))
@ -189,40 +197,3 @@ WRITE8_MEMBER(pushman_state::mcu_pc_w)
m_mcu_latch_ctl = data;
}
/* ElSemi - Bouncing balls protection. */
READ16_MEMBER(bballs_state::bballs_68705_r)
{
switch (offset)
{
case 0: // read and acknowledge MCU reply
if (!space.debugger_access())
m_mcu_semaphore = false;
return m_mcu_latch;
case 2: // pretend MCU accepts command instantly
return 0x0001;
case 3: // expects bit 0 to be low when MCU has sent response (other bits ignored)
return m_mcu_semaphore ? 0x0000 : 0x0001;
}
logerror("unknown 68705 read offset %X & %04X\n", offset, mem_mask);
return 0x0000;
}
WRITE16_MEMBER(bballs_state::bballs_68705_w)
{
m_mcu_latch = 0;
if ((data >> 8) <= 0x0f)
{
m_mcu_latch = (data >> 6) & 0x03fc;
if (data & 0x00ff)
m_mcu_latch |= 2;
m_mcu_semaphore = true;
}
else if (data >> 8)
{
if (data & 0x00ff)
m_mcu_latch |= 2;
m_mcu_semaphore = true;
}
}