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https://github.com/holub/mame
synced 2025-04-25 01:40:16 +03:00
h83337: add readback of wscr and stcr
This commit is contained in:
parent
8528c4c14b
commit
8d8da3e93a
@ -88,6 +88,9 @@ void h83217_device::map(address_map &map)
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map(0xffaa, 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
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map(0xffaa, 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
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map(0xffac, 0xffac).rw(m_port[0], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
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map(0xffad, 0xffad).rw(m_port[1], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
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map(0xffae, 0xffae).rw(m_port[2], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
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map(0xffb0, 0xffb0).w(m_port[0], FUNC(h8_port_device::ddr_w));
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map(0xffb0, 0xffb0).w(m_port[0], FUNC(h8_port_device::ddr_w));
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map(0xffb1, 0xffb1).w(m_port[1], FUNC(h8_port_device::ddr_w));
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map(0xffb1, 0xffb1).w(m_port[1], FUNC(h8_port_device::ddr_w));
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map(0xffb2, 0xffb2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
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map(0xffb2, 0xffb2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
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@ -8,7 +8,11 @@
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TODO:
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TODO:
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- 16-bit timer module is different from how it's implemented in h8_timer16.cpp
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- 16-bit timer module is different from how it's implemented in h8_timer16.cpp
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- PWM timer module
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- Host Interface module
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- finish WSCR emulation, CKDBL flag would need support in peripherals
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- finish WSCR emulation, CKDBL flag would need support in peripherals
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- finish STCR emulation
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- finish SYSCR emulation
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***************************************************************************/
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***************************************************************************/
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@ -38,7 +42,6 @@ h83337_device::h83337_device(const machine_config &mconfig, device_type type, co
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m_timer16(*this, "timer16"),
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m_timer16(*this, "timer16"),
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m_timer16_0(*this, "timer16:0"),
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m_timer16_0(*this, "timer16:0"),
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m_watchdog(*this, "watchdog"),
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m_watchdog(*this, "watchdog"),
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m_syscr(0),
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m_ram_start(start)
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m_ram_start(start)
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{
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{
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}
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}
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@ -193,12 +196,22 @@ void h83337_device::internal_update(u64 current_time)
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void h83337_device::device_start()
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void h83337_device::device_start()
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{
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{
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h8_device::device_start();
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h8_device::device_start();
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m_wscr = 0;
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m_stcr = 0;
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m_syscr = 0;
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save_item(NAME(m_wscr));
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save_item(NAME(m_stcr));
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save_item(NAME(m_syscr));
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save_item(NAME(m_syscr));
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}
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}
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void h83337_device::device_reset()
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void h83337_device::device_reset()
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{
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{
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h8_device::device_reset();
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h8_device::device_reset();
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m_wscr = 0x08;
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m_stcr = 0x00;
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m_syscr = 0x09;
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m_syscr = 0x09;
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}
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}
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@ -209,30 +222,35 @@ u8 h83337_device::syscr_r()
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void h83337_device::syscr_w(u8 data)
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void h83337_device::syscr_w(u8 data)
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{
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{
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m_syscr = data;
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logerror("syscr = %02x\n", data);
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logerror("syscr = %02x\n", data);
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m_syscr = (m_syscr & 0x08) | (data & 0xf7);
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}
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}
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u8 h83337_device::wscr_r()
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u8 h83337_device::wscr_r()
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{
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{
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return 0x00;
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return m_wscr;
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}
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}
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void h83337_device::wscr_w(u8 data)
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void h83337_device::wscr_w(u8 data)
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{
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{
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logerror("wscr = %02x\n", data);
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logerror("wscr = %02x\n", data);
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m_wscr = data;
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}
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}
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u8 h83337_device::stcr_r()
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u8 h83337_device::stcr_r()
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{
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{
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return 0x00;
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return m_stcr;
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}
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}
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void h83337_device::stcr_w(u8 data)
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void h83337_device::stcr_w(u8 data)
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{
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{
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logerror("stcr = %02x\n", data);
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logerror("stcr = %02x\n", data);
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// ICKS0/1
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m_timer8_0->set_extra_clock_bit(BIT(data, 0));
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m_timer8_0->set_extra_clock_bit(BIT(data, 0));
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m_timer8_1->set_extra_clock_bit(BIT(data, 1));
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m_timer8_1->set_extra_clock_bit(BIT(data, 1));
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m_stcr = data;
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}
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}
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u8 h83337_device::mdcr_r()
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u8 h83337_device::mdcr_r()
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@ -83,8 +83,10 @@ protected:
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required_device<h8_timer16_channel_device> m_timer16_0;
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required_device<h8_timer16_channel_device> m_timer16_0;
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required_device<h8_watchdog_device> m_watchdog;
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required_device<h8_watchdog_device> m_watchdog;
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u8 m_syscr;
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u32 m_ram_start;
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u32 m_ram_start;
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u8 m_wscr;
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u8 m_stcr;
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u8 m_syscr;
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virtual void update_irq_filter() override;
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virtual void update_irq_filter() override;
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virtual void interrupt_taken() override;
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virtual void interrupt_taken() override;
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