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aica.cpp, aicadsp.cpp : Updates (#4858)

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* aica.cpp, aicadsp.cpp : Updates
device_rom_interface for PCM and DSP memory, Fix code styles, Fix some namings, Reduce unnecessary lines, Reduce unused values, Use shorter/correct type values, Simplify handlers

* aica.cpp : Add save state

* aica.cpp : Updates
device_memory_interface'd memory handlers, Reduce memset, Fix spacing
This commit is contained in:
cam900 2019-04-06 05:45:17 +09:00 committed by R. Belmont
parent 28a0152d7f
commit 8e062e927f
9 changed files with 1005 additions and 991 deletions
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460
src/devices/sound/aica.cpp
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@ -20,16 +20,18 @@
#include "emu.h"
#include "aica.h"
static constexpr int32_t clip16(int x) { return std::min(32767, std::max(-32768, x)); }
static constexpr int32_t clip18(int x) { return std::min(131071, std::max(-131072, x)); }
#include <algorithm>
static constexpr s32 clip16(int x) { return std::min(32767, std::max(-32768, x)); }
static constexpr s32 clip18(int x) { return std::min(131071, std::max(-131072, x)); }
#define SHIFT 12
#define FIX(v) ((uint32_t) ((float) (1<<SHIFT)*(v)))
#define FIX(v) ((u32)((float)(1 << SHIFT) * (v)))
#define EG_SHIFT 16
#define LFO_SHIFT 8
#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
#define LFIX(v) ((u32)((float)(1 << LFO_SHIFT) * (v)))
//Convert DB to multiply amplitude
#define DB(v) LFIX(powf(10.0f, v / 20.0f))
@ -141,11 +143,10 @@ static constexpr double DRTimes[64]={100000/*infinity*/,100000/*infinity*/,11820
static constexpr float SDLT[16] = {-1000000.0,-42.0,-39.0,-36.0,-33.0,-30.0,-27.0,-24.0,-21.0,-18.0,-15.0,-12.0,-9.0,-6.0,-3.0,0.0};
unsigned char aica_device::DecodeSCI(unsigned char irq)
u8 aica_device::DecodeSCI(u8 irq)
{
unsigned char SCI=0;
unsigned char v;
v=(SCILV0((AICA))&(1<<irq))?1:0;
u8 SCI = 0;
u8 v = (SCILV0((AICA)) & (1 << irq)) ? 1 : 0;
SCI |= v;
v = (SCILV1((AICA)) & (1 << irq)) ? 1 : 0;
SCI |= v << 1;
@ -157,7 +158,7 @@ unsigned char aica_device::DecodeSCI(unsigned char irq)
void aica_device::ResetInterrupts()
{
#if 0
uint32_t reset = m_udata.data[0xa4/2];
u32 reset = m_udata.data[0xa4 / 2];
if (reset & 0x40)
m_irq_cb(-m_IrqTimA);
@ -168,8 +169,8 @@ void aica_device::ResetInterrupts()
void aica_device::CheckPendingIRQ()
{
uint32_t pend=m_udata.data[0xa0/2];
uint32_t en=m_udata.data[0x9c/2];
u32 pend = m_udata.data[0xa0 / 2];
u32 en = m_udata.data[0x9c / 2];
if (m_MidiW != m_MidiR)
{
@ -338,10 +339,10 @@ int aica_device::EG_Update(AICA_SLOT *slot)
return (slot->EG.volume >> EG_SHIFT) << (SHIFT - 10);
}
uint32_t aica_device::Step(AICA_SLOT *slot)
u32 aica_device::Step(AICA_SLOT *slot)
{
int octave = (OCT(slot) ^ 8) - 8 + SHIFT - 10;
uint32_t Fn=FNS(slot) + (0x400);
u32 Fn = FNS(slot) + 0x400;
if (octave >= 0)
Fn <<= octave;
else
@ -353,9 +354,9 @@ uint32_t aica_device::Step(AICA_SLOT *slot)
void aica_device::Compute_LFO(AICA_SLOT *slot)
{
if (PLFOS(slot) != 0)
AICALFO_ComputeStep(&(slot->PLFO),LFOF(slot),PLFOWS(slot),PLFOS(slot),0);
LFO_ComputeStep(&(slot->PLFO), LFOF(slot), PLFOWS(slot), PLFOS(slot), 0);
if (ALFOS(slot) != 0)
AICALFO_ComputeStep(&(slot->ALFO),LFOF(slot),ALFOWS(slot),ALFOS(slot),1);
LFO_ComputeStep(&(slot->ALFO), LFOF(slot), ALFOWS(slot), ALFOS(slot), 1);
}
#define ADPCMSHIFT 8
@ -370,7 +371,7 @@ void aica_device::InitADPCM(int *PrevSignal, int *PrevQuant)
*PrevQuant = 0x7f;
}
signed short aica_device::DecodeADPCM(int *PrevSignal, unsigned char Delta, int *PrevQuant)
s16 aica_device::DecodeADPCM(int *PrevSignal, u8 Delta, int *PrevQuant)
{
int x = (*PrevQuant * quant_mul[Delta & 7]) / 8;
if (x > 0x7FFF) x = 0x7FFF;
@ -378,7 +379,7 @@ signed short aica_device::DecodeADPCM(int *PrevSignal, unsigned char Delta, int
x += *PrevSignal;
#if 0 // older implementation
int x = *PrevQuant * quant_mul [Delta & 15];
x = *PrevSignal + ((int)(x + ((uint32_t)x >> 29)) >> 3);
x = *PrevSignal + ((int)(x + ((u32)x >> 29)) >> 3);
#endif
*PrevSignal = clip16(x);
*PrevQuant = (*PrevQuant * TableQuant[Delta & 7]) >> ADPCMSHIFT;
@ -388,13 +389,9 @@ signed short aica_device::DecodeADPCM(int *PrevSignal, unsigned char Delta, int
void aica_device::StartSlot(AICA_SLOT *slot)
{
uint64_t start_offset;
slot->active = 1;
slot->Backwards = 0;
slot->cur_addr = 0; slot->nxt_addr = 1 << SHIFT; slot->prv_addr = -1;
start_offset = SA(slot); // AICA can play 16-bit samples from any boundary
slot->base=&m_AICARAM[start_offset];
slot->step = Step(slot);
Compute_EG(slot);
slot->EG.state = AICA_ATTACK;
@ -404,7 +401,7 @@ void aica_device::StartSlot(AICA_SLOT *slot)
if (PCMS(slot) >= 2)
{
slot->curstep = 0;
slot->adbase = (unsigned char *) (m_AICARAM+((SA(slot))&0x7fffff));
slot->adbase = SA(slot);
InitADPCM(&(slot->cur_sample), &(slot->cur_quant));
InitADPCM(&(slot->cur_lpsample), &(slot->cur_lpquant));
@ -438,18 +435,8 @@ void aica_device::Init()
m_MidiR = m_MidiW = 0;
m_MidiOutR = m_MidiOutW = 0;
// get AICA RAM
if (m_ram_region != nullptr)
{
m_AICARAM = m_ram_region->base();
m_AICARAM += m_roffset;
m_AICARAM_LENGTH = m_ram_region->bytes();
m_RAM_MASK = m_AICARAM_LENGTH-1;
m_RAM_MASK16 = m_RAM_MASK & 0x7ffffe;
m_DSP.AICARAM = (uint16_t *)m_AICARAM;
m_DSP.AICARAM_LENGTH = m_AICARAM_LENGTH/2;
}
m_DSP.space = m_data;
m_DSP.cache = m_cache;
m_timerA = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aica_device::timerA_cb), this));
m_timerB = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aica_device::timerB_cb), this));
m_timerC = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aica_device::timerC_cb), this));
@ -458,7 +445,7 @@ void aica_device::Init()
{
float envDB = ((float)(3 * (i - 0x3ff))) / 32.0f;
float scale = (float)(1 << SHIFT);
m_EG_TABLE[i]=(int32_t)(powf(10.0f,envDB/20.0f)*scale);
m_EG_TABLE[i] = (s32)(powf(10.0f, envDB / 20.0f) * scale);
}
for (i = 0; i < 0x20000; ++i)
@ -466,7 +453,6 @@ void aica_device::Init()
int iTL = (i >> 0x0) & 0xff;
int iPAN = (i >> 0x8) & 0x1f;
int iSDL = (i >> 0xD) & 0x0F;
float TL;
float SegaDB = 0;
float fSDL;
float PAN;
@ -481,7 +467,7 @@ void aica_device::Init()
if (iTL & 0x40) SegaDB -= 24.0f;
if (iTL & 0x80) SegaDB -= 48.0f;
TL=powf(10.0f,SegaDB/20.0f);
float TL = powf(10.0f, SegaDB / 20.0f);
SegaDB = 0;
if (iPAN & 0x1) SegaDB -= 3.0f;
@ -516,8 +502,8 @@ void aica_device::Init()
m_ARTABLE[1] = m_DRTABLE[1] = 0; //Infinite time
for (i=2; i < 64; ++i)
{
double t,step,scale;
t=ARTimes[i]; //In ms
double step,scale;
double t = ARTimes[i]; //In ms
if (t != 0.0)
{
step = (1023 * 1000.0) / (44100.0 * t);
@ -539,12 +525,11 @@ void aica_device::Init()
{
m_Slots[i].slot = i;
m_Slots[i].active = 0;
m_Slots[i].base=nullptr;
m_Slots[i].EG.state = AICA_RELEASE;
m_Slots[i].lpend = 1;
}
AICALFO_Init();
LFO_Init();
// no "pend"
m_udata.data[0xa0 / 2] = 0;
@ -562,14 +547,13 @@ void aica_device::ClockChange()
void aica_device::UpdateSlotReg(int s,int r)
{
AICA_SLOT *slot = m_Slots + s;
int sl;
switch (r & 0x7f)
{
case 0:
case 1:
if (KEYONEX(slot))
{
for(sl=0;sl<64;++sl)
for (int sl = 0; sl < 64; ++sl)
{
AICA_SLOT *s2 = m_Slots + sl;
{
@ -615,7 +599,7 @@ void aica_device::UpdateSlotReg(int s,int r)
}
}
void aica_device::UpdateReg(address_space &space, int reg)
void aica_device::UpdateReg(int reg)
{
switch (reg & 0xff)
{
@ -628,7 +612,7 @@ void aica_device::UpdateReg(address_space &space, int reg)
break;
case 0x8:
case 0x9:
midi_in(space, 0, m_udata.data[0x8/2]&0xff, 0xffff);
midi_in(m_udata.data[0x8 / 2] & 0xff);
break;
//case 0x0c:
@ -666,14 +650,14 @@ void aica_device::UpdateReg(address_space &space, int reg)
m_dma.dlg = (m_udata.data[0x8c / 2] & 0x7ffc);
m_dma.ddir = (m_udata.data[0x8c / 2] & 0x8000) >> 15;
if (m_udata.data[0x8c / 2] & 1) // dexe
aica_exec_dma(space);
exec_dma();
break;
case 0x90:
case 0x91:
if (!m_irq_cb.isnull())
{
uint32_t time;
u32 time;
m_TimPris[0] = 1 << ((m_udata.data[0x90 / 2] >> 8) & 0x7);
m_TimCnt[0] = (m_udata.data[0x90 / 2] & 0xff) << 8;
@ -692,7 +676,7 @@ void aica_device::UpdateReg(address_space &space, int reg)
case 0x95:
if (!m_irq_cb.isnull())
{
uint32_t time;
u32 time;
m_TimPris[1] = 1 << ((m_udata.data[0x94 / 2] >> 8) & 0x7);
m_TimCnt[1] = (m_udata.data[0x94 / 2] & 0xff) << 8;
@ -711,7 +695,7 @@ void aica_device::UpdateReg(address_space &space, int reg)
case 0x99:
if (!m_irq_cb.isnull())
{
uint32_t time;
u32 time;
m_TimPris[2] = 1 << ((m_udata.data[0x98 / 2] >> 8) & 0x7);
m_TimCnt[2] = (m_udata.data[0x98 / 2] & 0xff) << 8;
@ -798,14 +782,14 @@ void aica_device::UpdateSlotRegR(int slot,int reg)
{
}
void aica_device::UpdateRegR(address_space &space, int reg)
void aica_device::UpdateRegR(int reg)
{
switch (reg & 0xff)
{
case 8:
case 9:
{
unsigned short v=m_udata.data[0x8/2];
u16 v=m_udata.data[0x8 / 2];
v &= 0xff00;
v |= m_MidiStack[m_MidiR];
m_irq_cb(0); // cancel the IRQ
@ -823,16 +807,13 @@ void aica_device::UpdateRegR(address_space &space, int reg)
{
int slotnum = MSLC();
AICA_SLOT *slot = m_Slots + slotnum;
uint16_t LP;
u16 LP;
if (!(AFSEL()))
{
uint16_t SGC;
int EG;
LP = slot->lpend ? 0x8000 : 0x0000;
slot->lpend = 0;
SGC = (slot->EG.state << 13) & 0x6000;
EG = slot->active ? slot->EG.volume : 0;
u16 SGC = (slot->EG.state << 13) & 0x6000;
int EG = slot->active ? slot->EG.volume : 0;
EG >>= (EG_SHIFT - 13);
EG = 0x1FFF - EG;
if (EG < 0) EG = 0;
@ -853,18 +834,18 @@ void aica_device::UpdateRegR(address_space &space, int reg)
//m_stream->update();
int slotnum = MSLC();
AICA_SLOT *slot = m_Slots + slotnum;
unsigned int CA;
u32 CA;
if (PCMS(slot) == 0) // 16-bit samples
{
CA = (slot->cur_addr>>(SHIFT-1))&m_RAM_MASK16;
CA = (slot->cur_addr >> (SHIFT - 1)) & ~1;
}
else // 8-bit PCM and 4-bit ADPCM
{
CA = (slot->cur_addr>>SHIFT)&m_RAM_MASK;
CA = (slot->cur_addr >> SHIFT);
}
//printf("%08x %08x\n",CA,slot->cur_addr&m_RAM_MASK16);
//printf("%08x %08x\n",CA,slot->cur_addr & ~1);
m_udata.data[0x14 / 2] = CA;
}
@ -876,7 +857,7 @@ void aica_device::UpdateRegR(address_space &space, int reg)
}
}
void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
void aica_device::w16(u32 addr,u16 val)
{
addr &= 0xffff;
if (addr < 0x2000)
@ -884,7 +865,7 @@ void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
int slot=addr / 0x80;
addr &= 0x7f;
// printf("%x to slot %d offset %x\n", val, slot, addr);
*((unsigned short *) (m_Slots[slot].udata.datab+(addr))) = val;
*((u16 *)(m_Slots[slot].udata.datab + (addr))) = val;
UpdateSlotReg(slot, addr & 0x7f);
}
else if (addr < 0x2800)
@ -900,8 +881,8 @@ void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
if (addr < 0x28be)
{
// printf("%x to AICA global @ %x\n", val, addr & 0xff);
*((unsigned short *) (m_udata.datab+((addr&0xff)))) = val;
UpdateReg(space, addr&0xff);
*((u16 *)(m_udata.datab+((addr & 0xff)))) = val;
UpdateReg(addr & 0xff);
}
else if (addr == 0x2d00)
@ -928,14 +909,14 @@ void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
{
//DSP
if (addr < 0x3200) //COEF
*((unsigned short *) (m_DSP.COEF+(addr-0x3000)/2))=val;
*((u16 *)(m_DSP.COEF+(addr - 0x3000) / 2)) = val;
else if (addr < 0x3300)
*((unsigned short *) (m_DSP.MADRS+(addr-0x3200)/2))=val;
*((u16 *)(m_DSP.MADRS+(addr - 0x3200) / 2)) = val;
else if (addr < 0x3400)
popmessage("AICADSP write to undocumented reg %04x -> %04x", addr, val);
else if (addr < 0x3c00)
{
*((unsigned short *) (m_DSP.MPRO+(addr-0x3400)/2))=val;
*((u16 *)(m_DSP.MPRO+(addr - 0x3400) / 2)) = val;
if (addr == 0x3bfe)
{
@ -968,22 +949,22 @@ void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
m_DSP.MIXS[(addr >> 3) & 0xf] = (m_DSP.MIXS[(addr >> 3) & 0xf] & 0xffff) | (val << 16);
}
else if (addr < 0x45c0)
*((unsigned short *) (m_DSP.EFREG+(addr-0x4580)/4))=val;
*((u16 *)(m_DSP.EFREG+(addr - 0x4580)/4)) = val;
//else if (addr < 0x45c8)
// *((unsigned short *) (m_DSP.EXTS+(addr-0x45c0)/2))=val; // Read only
// *((u16 *)(m_DSP.EXTS+(addr - 0x45c0) / 2)) = val; // Read only
}
}
unsigned short aica_device::r16(address_space &space, unsigned int addr)
u16 aica_device::r16(u32 addr)
{
unsigned short v=0;
u16 v = 0;
addr &= 0xffff;
if (addr < 0x2000)
{
int slot=addr / 0x80;
addr &= 0x7f;
UpdateSlotRegR(slot,addr & 0x7f);
v=*((unsigned short *) (m_Slots[slot].udata.datab+(addr)));
v=*((u16 *)(m_Slots[slot].udata.datab+(addr)));
}
else if (addr < 0x3000)
{
@ -995,8 +976,8 @@ unsigned short aica_device::r16(address_space &space, unsigned int addr)
popmessage("AICA read undocumented reg %04x", addr);
else if (addr < 0x28be)
{
UpdateRegR(space, addr&0xff);
v= *((unsigned short *) (m_udata.datab+((addr&0xff))));
UpdateRegR(addr & 0xff);
v= *((u16 *)(m_udata.datab+((addr & 0xff))));
if ((addr & 0xfffe) == 0x2810) m_udata.data[0x10 / 2] &= 0x7FFF; // reset LP on read
}
else if (addr == 0x2d00)
@ -1012,13 +993,13 @@ unsigned short aica_device::r16(address_space &space, unsigned int addr)
else
{
if (addr < 0x3200) //COEF
v= *((unsigned short *) (m_DSP.COEF+(addr-0x3000)/2));
v= *((u16 *)(m_DSP.COEF+(addr - 0x3000) / 2));
else if (addr < 0x3300)
v= *((unsigned short *) (m_DSP.MADRS+(addr-0x3200)/2));
v= *((u16 *)(m_DSP.MADRS+(addr - 0x3200) / 2));
else if (addr < 0x3400)
popmessage("AICADSP read undocumented reg %04x", addr);
else if (addr < 0x3c00)
v= *((unsigned short *) (m_DSP.MPRO+(addr-0x3400)/2));
v= *((u16 *)(m_DSP.MPRO+(addr - 0x3400) / 2));
else if (addr < 0x4000)
popmessage("AICADSP read undocumented reg %04x",addr);
else if (addr < 0x4400)
@ -1043,9 +1024,9 @@ unsigned short aica_device::r16(address_space &space, unsigned int addr)
v= m_DSP.MIXS[(addr >> 3) & 0xf] >> 16;
}
else if (addr < 0x45c0)
v = *((unsigned short *) (m_DSP.EFREG+(addr-0x4580)/4));
v = *((u16 *)(m_DSP.EFREG+(addr - 0x4580)/4));
else if (addr < 0x45c8)
v = *((unsigned short *) (m_DSP.EXTS+(addr-0x45c0)/2));
v = *((u16 *)(m_DSP.EXTS+(addr - 0x45c0) / 2));
}
return v;
}
@ -1092,14 +1073,14 @@ void aica_device::TimersAddTicks(int ticks)
}
#endif
int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
s32 aica_device::UpdateSlot(AICA_SLOT *slot)
{
int32_t sample;
s32 sample;
int step = slot->step;
uint32_t addr1,addr2,addr_select; // current and next sample addresses
uint32_t *addr[2] = {&addr1, &addr2}; // used for linear interpolation
uint32_t *slot_addr[2] = {&(slot->cur_addr), &(slot->nxt_addr)}; //
uint32_t chanlea = LEA(slot);
u32 addr1, addr2, addr_select; // current and next sample addresses
u32 *addr[2] = {&addr1, &addr2}; // used for linear interpolation
u32 *slot_addr[2] = {&(slot->cur_addr), &(slot->nxt_addr)}; //
u32 chanlea = LEA(slot);
if (SSCTL(slot) != 0) //no FM or noise yet
return 0;
@ -1109,7 +1090,7 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
if (PLFOS(slot) != 0)
{
step=step*AICAPLFO_Step(&(slot->PLFO));
step = step * PLFO_Step(&(slot->PLFO));
step >>= SHIFT;
}
@ -1120,8 +1101,8 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
}
else if (PCMS(slot) == 0)
{
addr1=(slot->cur_addr>>(SHIFT-1))&m_RAM_MASK16;
addr2=(slot->nxt_addr>>(SHIFT-1))&m_RAM_MASK16;
addr1 = (slot->cur_addr >> (SHIFT - 1)) & ~1;
addr2 = (slot->nxt_addr >> (SHIFT - 1)) & ~1;
}
else
{
@ -1131,40 +1112,37 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
if (PCMS(slot) == 1) // 8-bit signed
{
int8_t *p1=(signed char *) (m_AICARAM+(((SA(slot)+addr1))&m_RAM_MASK));
int8_t *p2=(signed char *) (m_AICARAM+(((SA(slot)+addr2))&m_RAM_MASK));
int32_t s;
int32_t fpart=slot->cur_addr&((1<<SHIFT)-1);
s=(int) (p1[0]<<8)*((1<<SHIFT)-fpart)+(int) (p2[0]<<8)*fpart;
s8 p1 = m_cache->read_byte(SA(slot) + addr1);
s8 p2 = m_cache->read_byte(SA(slot) + addr2);
s32 s;
s32 fpart=slot->cur_addr & ((1 << SHIFT) - 1);
s = (int)(p1 << 8) * ((1 << SHIFT) - fpart) + (int)(p2 << 8) * fpart;
sample = (s >> SHIFT);
}
else if (PCMS(slot) == 0) //16 bit signed
{
uint8_t *p1=(uint8_t *) (m_AICARAM+((SA(slot)+addr1)&m_RAM_MASK));
uint8_t *p2=(uint8_t *) (m_AICARAM+((SA(slot)+addr2)&m_RAM_MASK));
int32_t s;
int32_t fpart=slot->cur_addr&((1<<SHIFT)-1);
s=(int) ((int16_t)(p1[0] | (p1[1]<<8)))*((1<<SHIFT)-fpart)+(int) ((int16_t)(p2[0] | (p2[1]<<8)))*fpart;
s16 p1 = m_cache->read_word(SA(slot) + addr1);
s16 p2 = m_cache->read_word(SA(slot) + addr2);
s32 s;
s32 fpart = slot->cur_addr & ((1 << SHIFT) - 1);
s = (int)(p1) * ((1 << SHIFT) - fpart) + (int)(p2) * fpart;
sample = (s >> SHIFT);
}
else // 4-bit ADPCM
{
uint8_t *base= slot->adbase;
int32_t s;
u32 base = slot->adbase;
int cur_sample; //current ADPCM sample
int nxt_sample; //next ADPCM sample
int32_t fpart=slot->cur_addr&((1<<SHIFT)-1);
uint32_t steps_to_go = addr1 > addr2 ? chanlea : addr2, curstep = slot->curstep;
s32 fpart=slot->cur_addr&((1 << SHIFT)-1);
u32 steps_to_go = addr1 > addr2 ? chanlea : addr2, curstep = slot->curstep;
if (slot->adbase)
{
cur_sample = slot->cur_sample; // may already contains current decoded sample
// seek to the interpolation sample
while (curstep < steps_to_go)
{
int shift1 = 4 & (curstep << 2);
unsigned char delta1 = (*base>>shift1)&0xf;
u8 delta1 = (m_cache->read_byte(base) >> shift1) & 0xf;
DecodeADPCM(&(slot->cur_sample), delta1, &(slot->cur_quant));
if (!(++curstep & 1))
base++;
@ -1181,12 +1159,7 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
slot->adbase = base;
slot->curstep = curstep;
s=(int)cur_sample*((1<<SHIFT)-fpart)+(int)nxt_sample*fpart;
}
else
{
s = 0;
}
s32 s = (int)cur_sample * ((1 << SHIFT) - fpart) + (int)nxt_sample * fpart;
sample = (s >> SHIFT);
}
@ -1206,7 +1179,7 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
for (addr_select = 0; addr_select < 2; addr_select++)
{
int32_t rem_addr;
s32 rem_addr;
switch (LPCTL(slot))
{
case 0: //no loop
@ -1227,7 +1200,7 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
if (PCMS(slot)>=2 && addr_select == 0)
{
// restore the state @ LSA - the sampler will naturally walk to (LSA + remainder)
slot->adbase = &m_AICARAM[SA(slot)+(LSA(slot)/2)];
slot->adbase = SA(slot) + (LSA(slot) / 2);
slot->curstep = LSA(slot);
if (PCMS(slot) == 2)
{
@ -1244,7 +1217,7 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
if (ALFOS(slot) != 0)
{
sample=sample*AICAALFO_Step(&(slot->ALFO));
sample = sample * ALFO_Step(&(slot->ALFO));
sample >>= SHIFT;
}
@ -1258,33 +1231,27 @@ int32_t aica_device::UpdateSlot(AICA_SLOT *slot)
void aica_device::DoMasterSamples(int nsamples)
{
stream_sample_t *bufr,*bufl;
stream_sample_t *exts[2];
int sl, s, i;
int i;
bufr=m_bufferr;
bufl=m_bufferl;
stream_sample_t *bufr = m_bufferr;
stream_sample_t *bufl = m_bufferl;
exts[0] = m_exts0;
exts[1] = m_exts1;
for(s=0;s<nsamples;++s)
for (int s = 0; s < nsamples; ++s)
{
int32_t smpl, smpr;
smpl = smpr = 0;
s32 smpl = 0, smpr = 0;
// mix slots' direct output
for(sl=0;sl<64;++sl)
for (int sl = 0; sl < 64; ++sl)
{
AICA_SLOT *slot = m_Slots + sl;
if (m_Slots[sl].active)
{
unsigned int Enc;
signed int sample;
s32 sample = UpdateSlot(slot);
sample=UpdateSlot(slot);
Enc=((TL(slot))<<0x0)|((IMXL(slot))<<0xd);
u32 Enc = ((TL(slot)) << 0x0) | ((IMXL(slot)) << 0xd);
m_DSP.setsample((sample * m_LPANTABLE[Enc]) >> (SHIFT - 2), ISEL(slot), IMXL(slot));
Enc = ((TL(slot)) << 0x0) | ((DIPAN(slot)) << 0x8) | ((DISDL(slot)) << 0xd);
{
@ -1302,7 +1269,7 @@ void aica_device::DoMasterSamples(int nsamples)
{
if (EFSDL(i))
{
unsigned int Enc=((EFPAN(i))<<0x8)|((EFSDL(i))<<0xd);
u32 Enc = ((EFPAN(i)) << 0x8) | ((EFSDL(i)) << 0xd);
smpl += (m_DSP.EFREG[i] * m_LPANTABLE[Enc]) >> SHIFT;
smpr += (m_DSP.EFREG[i] * m_RPANTABLE[Enc]) >> SHIFT;
}
@ -1314,7 +1281,7 @@ void aica_device::DoMasterSamples(int nsamples)
if (EFSDL(i + 16)) // 16,17 for EXTS
{
m_DSP.EXTS[i] = exts[i][s];
unsigned int Enc=((EFPAN(i+16))<<0x8)|((EFSDL(i+16))<<0xd);
u32 Enc = ((EFPAN(i + 16)) << 0x8) | ((EFSDL(i + 16)) << 0xd);
smpl += (m_DSP.EXTS[i] * m_LPANTABLE[Enc]) >> SHIFT;
smpr += (m_DSP.EXTS[i] * m_RPANTABLE[Enc]) >> SHIFT;
}
@ -1337,9 +1304,9 @@ void aica_device::DoMasterSamples(int nsamples)
}
/* TODO: this needs to be timer-ized */
void aica_device::aica_exec_dma(address_space &space)
void aica_device::exec_dma()
{
static uint16_t tmp_dma[4];
static u16 tmp_dma[4];
int i;
printf("AICA: DMA transfer START\n"
@ -1362,8 +1329,7 @@ void aica_device::aica_exec_dma(address_space &space)
{
for (i = 0; i < m_dma.dlg; i+=2)
{
m_AICARAM[m_dma.dmea] = 0;
m_AICARAM[m_dma.dmea+1] = 0;
m_data->write_word(m_dma.dmea, 0);
m_dma.dmea += 2;
}
}
@ -1371,10 +1337,9 @@ void aica_device::aica_exec_dma(address_space &space)
{
for (i = 0; i < m_dma.dlg; i+=2)
{
uint16_t tmp;
tmp = r16(space, m_dma.drga);;
m_AICARAM[m_dma.dmea] = tmp & 0xff;
m_AICARAM[m_dma.dmea+1] = tmp>>8;
u16 tmp;
tmp = r16(m_dma.drga);
m_data->write_word(m_dma.dmea, tmp);
m_dma.dmea += 4;
m_dma.drga += 4;
}
@ -1386,7 +1351,7 @@ void aica_device::aica_exec_dma(address_space &space)
{
for (i = 0; i < m_dma.dlg; i+=2)
{
w16(space, m_dma.drga, 0);
w16(m_dma.drga, 0);
m_dma.drga += 4;
}
}
@ -1394,10 +1359,8 @@ void aica_device::aica_exec_dma(address_space &space)
{
for (i = 0; i < m_dma.dlg; i+=2)
{
uint16_t tmp;
tmp = m_AICARAM[m_dma.dmea];
tmp|= m_AICARAM[m_dma.dmea+1]<<8;
w16(space, m_dma.drga, tmp);
u16 tmp = m_cache->read_word(m_dma.dmea);
w16(m_dma.drga, tmp);
m_dma.dmea += 4;
m_dma.drga += 4;
}
@ -1436,7 +1399,6 @@ void aica_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
m_bufferr = outputs[1];
m_exts0 = inputs[0];
m_exts1 = inputs[1];
m_length = samples;
DoMasterSamples(samples);
}
@ -1446,6 +1408,10 @@ void aica_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
void aica_device::device_start()
{
m_data = &space(0);
// Find our direct access
m_cache = space().cache<1, 0, ENDIANNESS_LITTLE>();
// init the emulation
Init();
@ -1456,18 +1422,84 @@ void aica_device::device_start()
m_stream = machine().sound().stream_alloc(*this, 2, 2, (int)m_rate);
// save state
save_item(NAME(m_udata.data));
save_item(NAME(m_IRQL));
save_item(NAME(m_IRQR));
save_item(NAME(m_EFSPAN));
for (int slot = 0; slot < 64; slot++)
{
save_item(NAME(m_Slots[slot].udata.data), slot);
save_item(NAME(m_Slots[slot].active), slot);
save_item(NAME(m_Slots[slot].prv_addr), slot);
save_item(NAME(m_Slots[slot].cur_addr), slot);
save_item(NAME(m_Slots[slot].nxt_addr), slot);
save_item(NAME(m_Slots[slot].step), slot);
save_item(NAME(m_Slots[slot].Backwards), slot);
save_item(NAME(m_Slots[slot].EG.volume), slot);
save_item(NAME(m_Slots[slot].EG.step), slot);
save_item(NAME(m_Slots[slot].EG.AR), slot);
save_item(NAME(m_Slots[slot].EG.D1R), slot);
save_item(NAME(m_Slots[slot].EG.D2R), slot);
save_item(NAME(m_Slots[slot].EG.RR), slot);
save_item(NAME(m_Slots[slot].EG.DL), slot);
save_item(NAME(m_Slots[slot].PLFO.phase), slot);
save_item(NAME(m_Slots[slot].PLFO.phase_step), slot);
save_item(NAME(m_Slots[slot].ALFO.phase), slot);
save_item(NAME(m_Slots[slot].ALFO.phase_step), slot);
save_item(NAME(m_Slots[slot].slot), slot);
save_item(NAME(m_Slots[slot].cur_sample), slot);
save_item(NAME(m_Slots[slot].cur_quant), slot);
save_item(NAME(m_Slots[slot].curstep), slot);
save_item(NAME(m_Slots[slot].cur_lpquant), slot);
save_item(NAME(m_Slots[slot].cur_lpsample), slot);
save_item(NAME(m_Slots[slot].cur_lpstep), slot);
save_item(NAME(m_Slots[slot].adbase), slot);
save_item(NAME(m_Slots[slot].lpend), slot);
}
save_item(NAME(m_IrqTimA));
save_item(NAME(m_IrqTimBC));
save_item(NAME(m_IrqMidi));
save_item(NAME(m_MidiOutW));
save_item(NAME(m_MidiOutR));
save_item(NAME(m_MidiStack),16);
save_item(NAME(m_MidiStack));
save_item(NAME(m_MidiW));
save_item(NAME(m_MidiR));
save_item(NAME(m_LPANTABLE),0x20000);
save_item(NAME(m_RPANTABLE),0x20000);
save_item(NAME(m_TimPris),3);
save_item(NAME(m_TimCnt),3);
save_item(NAME(m_TimPris));
save_item(NAME(m_TimCnt));
save_item(NAME(m_mcieb));
save_item(NAME(m_mcipd));
save_item(NAME(m_dma.dmea));
save_item(NAME(m_dma.drga));
save_item(NAME(m_dma.dlg));
save_item(NAME(m_dma.dgate));
save_item(NAME(m_dma.ddir));
save_item(NAME(m_DSP.RBP));
save_item(NAME(m_DSP.RBL));
save_item(NAME(m_DSP.COEF));
save_item(NAME(m_DSP.MADRS));
save_item(NAME(m_DSP.MPRO));
save_item(NAME(m_DSP.TEMP));
save_item(NAME(m_DSP.MEMS));
save_item(NAME(m_DSP.DEC));
save_item(NAME(m_DSP.MIXS));
save_item(NAME(m_DSP.EXTS));
save_item(NAME(m_DSP.EFREG));
save_item(NAME(m_DSP.Stopped));
save_item(NAME(m_DSP.LastStep));
}
//-------------------------------------------------
// device_post_load - called after loading a saved state
//-------------------------------------------------
void aica_device::device_post_load()
{
for (int slot = 0; slot < 64; slot++)
Compute_LFO(&m_Slots[slot]);
}
//-------------------------------------------------
@ -1481,105 +1513,95 @@ void aica_device::device_clock_changed()
m_stream->set_sample_rate((int)m_rate);
}
void aica_device::set_ram_base(void *base, int size)
//-------------------------------------------------
// memory_space_config - return a description of
// any address spaces owned by this device
//-------------------------------------------------
device_memory_interface::space_config_vector aica_device::memory_space_config() const
{
m_AICARAM = (unsigned char *)base;
m_AICARAM_LENGTH = size;
m_RAM_MASK = m_AICARAM_LENGTH-1;
m_RAM_MASK16 = m_RAM_MASK & 0x7ffffe;
m_DSP.AICARAM = (uint16_t *)base;
m_DSP.AICARAM_LENGTH = size;
return space_config_vector{ std::make_pair(0, &m_data_config) };
}
READ16_MEMBER( aica_device::read )
u16 aica_device::read(offs_t offset)
{
return r16(space,offset*2);
return r16(offset * 2);
}
WRITE16_MEMBER( aica_device::write )
void aica_device::write(offs_t offset, u16 data, u16 mem_mask)
{
uint16_t tmp;
tmp = r16(space, offset*2);
u16 tmp = r16(offset * 2);
COMBINE_DATA(&tmp);
w16(space, offset*2, tmp);
w16(offset * 2, tmp);
}
WRITE16_MEMBER( aica_device::midi_in )
void aica_device::midi_in(u8 data)
{
m_MidiStack[m_MidiW++] = data;
m_MidiW &= 15;
}
READ16_MEMBER( aica_device::midi_out_r )
u8 aica_device::midi_out_r()
{
unsigned char val;
val=m_MidiStack[m_MidiR++];
u8 val = m_MidiStack[m_MidiR++];
m_MidiR &= 7;
return val;
}
DEFINE_DEVICE_TYPE(AICA, aica_device, "aica", "Yamaha AICA")
aica_device::aica_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, AICA, tag, owner, clock),
device_sound_interface(mconfig, *this),
m_rate(44100.0),
m_roffset(0),
m_irq_cb(*this),
m_main_irq_cb(*this),
m_ram_region(*this, this->tag()),
m_IRQL(0),
m_IRQR(0),
m_AICARAM(nullptr),
m_AICARAM_LENGTH(0),
m_RAM_MASK(0),
m_RAM_MASK16(0),
m_IrqTimA(0),
m_IrqTimBC(0),
m_IrqMidi(0),
m_MidiOutW(0),
m_MidiOutR(0),
m_MidiW(0),
m_MidiR(0),
m_mcieb(0),
m_mcipd(0),
m_bufferl(nullptr),
m_bufferr(nullptr),
m_exts0(nullptr),
m_exts1(nullptr),
m_length(0)
aica_device::aica_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, AICA, tag, owner, clock)
, device_sound_interface(mconfig, *this)
, device_memory_interface(mconfig, *this)
, m_data_config("data", ENDIANNESS_LITTLE, 16, 23) // 16 bit data bus confirmed
, m_rate(44100.0)
, m_irq_cb(*this)
, m_main_irq_cb(*this)
, m_IRQL(0)
, m_IRQR(0)
, m_IrqTimA(0)
, m_IrqTimBC(0)
, m_IrqMidi(0)
, m_MidiOutW(0)
, m_MidiOutR(0)
, m_MidiW(0)
, m_MidiR(0)
, m_mcieb(0)
, m_mcipd(0)
, m_bufferl(nullptr)
, m_bufferr(nullptr)
, m_exts0(nullptr)
, m_exts1(nullptr)
{
memset(&m_udata.data, 0, sizeof(m_udata.data));
memset(m_EFSPAN, 0, sizeof(m_EFSPAN));
std::fill(std::begin(m_EFSPAN), std::end(m_EFSPAN), 0);
memset(m_Slots, 0, sizeof(m_Slots));
memset(m_MidiStack, 0, sizeof(m_MidiStack));
std::fill(std::begin(m_MidiStack), std::end(m_MidiStack), 0);
memset(m_LPANTABLE, 0, sizeof(m_LPANTABLE));
memset(m_RPANTABLE, 0, sizeof(m_RPANTABLE));
std::fill(std::begin(m_LPANTABLE), std::end(m_LPANTABLE), 0);
memset(m_TimPris, 0, sizeof(m_TimPris));
memset(m_TimCnt, 0, sizeof(m_TimCnt));
std::fill(std::begin(m_TimPris), std::end(m_TimPris), 0);
std::fill(std::begin(m_TimCnt), std::end(m_TimCnt), 0);
memset(&m_dma, 0, sizeof(m_dma));
memset(m_ARTABLE, 0, sizeof(m_ARTABLE));
memset(m_DRTABLE, 0, sizeof(m_DRTABLE));
std::fill(std::begin(m_ARTABLE), std::end(m_ARTABLE), 0);
std::fill(std::begin(m_DRTABLE), std::end(m_DRTABLE), 0);
memset(&m_DSP, 0, sizeof(m_DSP));
memset(m_EG_TABLE, 0, sizeof(m_EG_TABLE));
memset(m_PLFO_TRI, 0, sizeof(m_PLFO_TRI));
memset(m_PLFO_SQR, 0, sizeof(m_PLFO_SQR));
memset(m_PLFO_SAW, 0, sizeof(m_PLFO_SAW));
memset(m_PLFO_NOI, 0, sizeof(m_PLFO_NOI));
std::fill(std::begin(m_EG_TABLE), std::end(m_EG_TABLE), 0);
std::fill(std::begin(m_PLFO_TRI), std::end(m_PLFO_TRI), 0);
std::fill(std::begin(m_PLFO_SQR), std::end(m_PLFO_SQR), 0);
std::fill(std::begin(m_PLFO_SAW), std::end(m_PLFO_SAW), 0);
std::fill(std::begin(m_PLFO_NOI), std::end(m_PLFO_NOI), 0);
memset(m_ALFO_TRI, 0, sizeof(m_ALFO_TRI));
memset(m_ALFO_SQR, 0, sizeof(m_ALFO_SQR));
memset(m_ALFO_SAW, 0, sizeof(m_ALFO_SAW));
memset(m_ALFO_NOI, 0, sizeof(m_ALFO_NOI));
std::fill(std::begin(m_ALFO_TRI), std::end(m_ALFO_TRI), 0);
std::fill(std::begin(m_ALFO_SQR), std::end(m_ALFO_SQR), 0);
std::fill(std::begin(m_ALFO_SAW), std::end(m_ALFO_SAW), 0);
std::fill(std::begin(m_ALFO_NOI), std::end(m_ALFO_NOI), 0);
memset(m_PSCALES, 0, sizeof(m_PSCALES));
memset(m_ASCALES, 0, sizeof(m_ASCALES));
@ -1591,7 +1613,7 @@ static const float LFOFreq[32]={0.17f,0.19f,0.23f,0.27f,0.34f,0.39f,0.45f,0.55f,
static const float ASCALE[8] = {0.0f,0.4f,0.8f,1.5f,3.0f,6.0f,12.0f,24.0f};
static const float PSCALE[8] = {0.0f,7.0f,13.5f,27.0f,55.0f,112.0f,230.0f,494.0f};
void aica_device::AICALFO_Init()
void aica_device::LFO_Init()
{
int i, s;
for (i = 0; i < 256; ++i)
@ -1660,7 +1682,7 @@ void aica_device::AICALFO_Init()
}
}
signed int aica_device::AICAPLFO_Step(AICA_LFO_t *LFO)
s32 aica_device::PLFO_Step(AICA_LFO_t *LFO)
{
int p;
@ -1673,7 +1695,7 @@ signed int aica_device::AICAPLFO_Step(AICA_LFO_t *LFO)
return p << (SHIFT - LFO_SHIFT);
}
signed int aica_device::AICAALFO_Step(AICA_LFO_t *LFO)
s32 aica_device::ALFO_Step(AICA_LFO_t *LFO)
{
int p;
LFO->phase += LFO->phase_step;
@ -1685,10 +1707,10 @@ signed int aica_device::AICAALFO_Step(AICA_LFO_t *LFO)
return p << (SHIFT - LFO_SHIFT);
}
void aica_device::AICALFO_ComputeStep(AICA_LFO_t *LFO,uint32_t LFOF,uint32_t LFOWS,uint32_t LFOS,int ALFO)
void aica_device::LFO_ComputeStep(AICA_LFO_t *LFO,u32 LFOF,u32 LFOWS,u32 LFOS,int ALFO)
{
float step = (float) LFOFreq[LFOF]*256.0f/44100.0f;
LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
LFO->phase_step = (u32)((float)(1 << LFO_SHIFT)*step);
if (ALFO)
{
switch (LFOWS)

114
src/devices/sound/aica.h
View File

@ -14,42 +14,44 @@
#include "aicadsp.h"
class aica_device : public device_t, public device_sound_interface
class aica_device : public device_t, public device_sound_interface, public device_memory_interface
{
public:
static constexpr feature_type imperfect_features() { return feature::SOUND; }
aica_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
aica_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
void set_roffset(int roffset) { m_roffset = roffset; }
auto irq() { return m_irq_cb.bind(); }
auto main_irq() { return m_main_irq_cb.bind(); }
// AICA register access
DECLARE_READ16_MEMBER( read );
DECLARE_WRITE16_MEMBER( write );
u16 read(offs_t offset);
void write(offs_t offset, u16 data, u16 mem_mask = ~0);
// MIDI I/O access
DECLARE_WRITE16_MEMBER( midi_in );
DECLARE_READ16_MEMBER( midi_out_r );
void set_ram_base(void *base, int size);
void midi_in(u8 data);
u8 midi_out_r();
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_post_load() override;
virtual void device_clock_changed() override;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
// device_memory_interface configuration
virtual space_config_vector memory_space_config() const override;
address_space_config m_data_config;
private:
enum AICA_STATE {AICA_ATTACK,AICA_DECAY1,AICA_DECAY2,AICA_RELEASE};
struct AICA_LFO_t
{
unsigned short phase;
uint32_t phase_step;
u16 phase;
u32 phase_step;
int *table;
int *scale;
};
@ -72,16 +74,15 @@ private:
{
union
{
uint16_t data[0x40]; //only 0x1a bytes used
uint8_t datab[0x80];
u16 data[0x40]; //only 0x1a bytes used
u8 datab[0x80];
} udata;
uint8_t active; //this slot is currently playing
uint8_t *base; //samples base address
uint32_t prv_addr; // previous play address (for ADPCM)
uint32_t cur_addr; //current play address (24.8)
uint32_t nxt_addr; //next play address
uint32_t step; //pitch step (24.8)
uint8_t Backwards; //the wave is playing backwards
u8 active; //this slot is currently playing
u32 prv_addr; // previous play address (for ADPCM)
u32 cur_addr; //current play address (24.8)
u32 nxt_addr; //next play address
u32 step; //pitch step (24.8)
u8 Backwards; //the wave is playing backwards
AICA_EG_t EG; //Envelope
AICA_LFO_t PLFO; //Phase LFO
AICA_LFO_t ALFO; //Amplitude LFO
@ -90,12 +91,12 @@ private:
int cur_quant; //current ADPCM step
int curstep;
int cur_lpquant, cur_lpsample, cur_lpstep;
uint8_t *adbase, *adlpbase;
uint8_t lpend;
u32 adbase;
u8 lpend;
};
unsigned char DecodeSCI(unsigned char irq);
u8 DecodeSCI(u8 irq);
void ResetInterrupts();
void CheckPendingIRQ();
@ -108,56 +109,55 @@ private:
int Get_RR(int base,int R);
void Compute_EG(AICA_SLOT *slot);
int EG_Update(AICA_SLOT *slot);
uint32_t Step(AICA_SLOT *slot);
u32 Step(AICA_SLOT *slot);
void Compute_LFO(AICA_SLOT *slot);
void InitADPCM(int *PrevSignal, int *PrevQuant);
inline signed short DecodeADPCM(int *PrevSignal, unsigned char Delta, int *PrevQuant);
inline s16 DecodeADPCM(int *PrevSignal, u8 Delta, int *PrevQuant);
void StartSlot(AICA_SLOT *slot);
void StopSlot(AICA_SLOT *slot,int keyoff);
void Init();
void ClockChange();
void UpdateSlotReg(int s,int r);
void UpdateReg(address_space &space, int reg);
void UpdateReg(int reg);
void UpdateSlotRegR(int slot,int reg);
void UpdateRegR(address_space &space, int reg);
void w16(address_space &space,unsigned int addr,unsigned short val);
unsigned short r16(address_space &space, unsigned int addr);
inline int32_t UpdateSlot(AICA_SLOT *slot);
void UpdateRegR(int reg);
void w16(u32 addr,u16 val);
u16 r16(u32 addr);
inline s32 UpdateSlot(AICA_SLOT *slot);
void DoMasterSamples(int nsamples);
void aica_exec_dma(address_space &space);
void exec_dma();
void AICALFO_Init();
inline signed int AICAPLFO_Step(AICA_LFO_t *LFO);
inline signed int AICAALFO_Step(AICA_LFO_t *LFO);
void AICALFO_ComputeStep(AICA_LFO_t *LFO,uint32_t LFOF,uint32_t LFOWS,uint32_t LFOS,int ALFO);
void LFO_Init();
inline s32 PLFO_Step(AICA_LFO_t *LFO);
inline s32 ALFO_Step(AICA_LFO_t *LFO);
void LFO_ComputeStep(AICA_LFO_t *LFO,u32 LFOF,u32 LFOWS,u32 LFOS,int ALFO);
double m_rate;
int m_roffset; /* offset in the region */
devcb_write_line m_irq_cb;
devcb_write_line m_main_irq_cb;
optional_memory_region m_ram_region;
union
{
uint16_t data[0xc0/2];
uint8_t datab[0xc0];
u16 data[0xc0/2];
u8 datab[0xc0];
} m_udata;
uint16_t m_IRQL, m_IRQR;
uint16_t m_EFSPAN[0x48];
u16 m_IRQL, m_IRQR;
u16 m_EFSPAN[0x48];
AICA_SLOT m_Slots[64];
unsigned char *m_AICARAM;
uint32_t m_AICARAM_LENGTH, m_RAM_MASK, m_RAM_MASK16;
address_space *m_data;
memory_access_cache<1, 0, ENDIANNESS_LITTLE> *m_cache;
sound_stream * m_stream;
uint32_t m_IrqTimA;
uint32_t m_IrqTimBC;
uint32_t m_IrqMidi;
u32 m_IrqTimA;
u32 m_IrqTimBC;
u32 m_IrqMidi;
uint8_t m_MidiOutW,m_MidiOutR;
uint8_t m_MidiStack[16];
uint8_t m_MidiW,m_MidiR;
u8 m_MidiOutW,m_MidiOutR;
u8 m_MidiStack[16];
u8 m_MidiW,m_MidiR;
int m_LPANTABLE[0x20000];
int m_RPANTABLE[0x20000];
@ -165,18 +165,18 @@ private:
int m_TimPris[3];
int m_TimCnt[3];
uint16_t m_mcieb, m_mcipd;
u16 m_mcieb, m_mcipd;
// timers
emu_timer *m_timerA, *m_timerB, *m_timerC;
// DMA stuff
struct {
uint32_t dmea;
uint16_t drga;
uint16_t dlg;
uint8_t dgate;
uint8_t ddir;
u32 dmea;
u16 drga;
u16 dlg;
u8 dgate;
u8 ddir;
} m_dma;
@ -189,9 +189,7 @@ private:
stream_sample_t *m_exts0;
stream_sample_t *m_exts1;
int m_length;
int32_t m_EG_TABLE[0x400];
s32 m_EG_TABLE[0x400];
int m_PLFO_TRI[256],m_PLFO_SQR[256],m_PLFO_SAW[256],m_PLFO_NOI[256];
int m_ALFO_TRI[256],m_ALFO_SQR[256],m_ALFO_SAW[256],m_ALFO_NOI[256];
int m_PSCALES[8][256];

149
src/devices/sound/aicadsp.cpp
View File

@ -4,15 +4,14 @@
#include "emu.h"
#include "aicadsp.h"
static uint16_t PACK(int32_t val)
{
uint32_t temp;
int sign,exponent,k;
#include <algorithm>
sign = (val >> 23) & 0x1;
temp = (val ^ (val << 1)) & 0xFFFFFF;
exponent = 0;
for (k=0; k<12; k++)
static u16 PACK(s32 val)
{
const int sign = (val >> 23) & 0x1;
u32 temp = (val ^ (val << 1)) & 0xFFFFFF;
int exponent = 0;
for (int k = 0; k < 12; k++)
{
if (temp & 0x800000)
break;
@ -28,18 +27,15 @@ static uint16_t PACK(int32_t val)
val |= sign << 15;
val |= exponent << 11;
return (uint16_t)val;
return (u16)val;
}
static int32_t UNPACK(uint16_t val)
static s32 UNPACK(u16 val)
{
int sign,exponent,mantissa;
int32_t uval;
sign = (val >> 15) & 0x1;
exponent = (val >> 11) & 0xF;
mantissa = val & 0x7FF;
uval = mantissa << 11;
const int sign = (val >> 15) & 0x1;
int exponent = (val >> 11) & 0xF;
const int mantissa = val & 0x7FF;
u32 uval = mantissa << 11;
if (exponent > 11)
{
exponent = 11;
@ -59,72 +55,63 @@ void AICADSP::init()
{
memset(this,0,sizeof(*this));
RBL = (8 * 1024); // Initial RBL is 0
Stopped=1;
Stopped = true;
}
void AICADSP::step()
{
int32_t ACC=0; //26 bit
int32_t SHIFTED=0; //24 bit
int32_t X; //24 bit
int32_t Y=0; //13 bit
int32_t B; //26 bit
int32_t INPUTS=0; //24 bit
int32_t MEMVAL=0;
int32_t FRC_REG=0; //13 bit
int32_t Y_REG=0; //24 bit
uint32_t ADDR;
uint32_t ADRS_REG=0; //13 bit
int step;
s32 ACC=0; //26 bit
s32 MEMVAL=0;
s32 FRC_REG=0; //13 bit
s32 Y_REG=0; //24 bit
u32 ADRS_REG=0; //13 bit
if (Stopped)
return;
memset(EFREG,0,2*16);
std::fill(std::begin(EFREG), std::end(EFREG), 0);
#if 0
int dump=0;
FILE *f=nullptr;
if (dump)
f=fopen("dsp.txt","wt");
#endif
for(step=0;step</*128*/LastStep;++step)
for (int step = 0; step < /*128*/LastStep; ++step)
{
uint16_t *IPtr=MPRO+step*8;
u16 *IPtr=MPRO+step*8;
// if (IPtr[0]==0 && IPtr[1]==0 && IPtr[2]==0 && IPtr[3]==0)
// break;
uint32_t TRA=(IPtr[0]>>9)&0x7F;
uint32_t TWT=(IPtr[0]>>8)&0x01;
uint32_t TWA=(IPtr[0]>>1)&0x7F;
const u32 TRA = (IPtr[0] >> 9) & 0x7F;
const u32 TWT = (IPtr[0] >> 8) & 0x01;
const u32 TWA = (IPtr[0] >> 1) & 0x7F;
uint32_t XSEL=(IPtr[2]>>15)&0x01;
uint32_t YSEL=(IPtr[2]>>13)&0x03;
uint32_t IRA=(IPtr[2]>>7)&0x3F;
uint32_t IWT=(IPtr[2]>>6)&0x01;
uint32_t IWA=(IPtr[2]>>1)&0x1F;
const u32 XSEL = (IPtr[2] >> 15) & 0x01;
const u32 YSEL = (IPtr[2] >> 13) & 0x03;
const u32 IRA = (IPtr[2] >> 7) & 0x3F;
const u32 IWT = (IPtr[2] >> 6) & 0x01;
const u32 IWA = (IPtr[2] >> 1) & 0x1F;
uint32_t TABLE=(IPtr[4]>>15)&0x01;
uint32_t MWT=(IPtr[4]>>14)&0x01;
uint32_t MRD=(IPtr[4]>>13)&0x01;
uint32_t EWT=(IPtr[4]>>12)&0x01;
uint32_t EWA=(IPtr[4]>>8)&0x0F;
uint32_t ADRL=(IPtr[4]>>7)&0x01;
uint32_t FRCL=(IPtr[4]>>6)&0x01;
uint32_t SHIFT=(IPtr[4]>>4)&0x03;
uint32_t YRL=(IPtr[4]>>3)&0x01;
uint32_t NEGB=(IPtr[4]>>2)&0x01;
uint32_t ZERO=(IPtr[4]>>1)&0x01;
uint32_t BSEL=(IPtr[4]>>0)&0x01;
const u32 TABLE = (IPtr[4] >> 15) & 0x01;
const u32 MWT = (IPtr[4] >> 14) & 0x01;
const u32 MRD = (IPtr[4] >> 13) & 0x01;
const u32 EWT = (IPtr[4] >> 12) & 0x01;
const u32 EWA = (IPtr[4] >> 8) & 0x0F;
const u32 ADRL = (IPtr[4] >> 7) & 0x01;
const u32 FRCL = (IPtr[4] >> 6) & 0x01;
const u32 SHIFT = (IPtr[4] >> 4) & 0x03;
const u32 YRL = (IPtr[4] >> 3) & 0x01;
const u32 NEGB = (IPtr[4] >> 2) & 0x01;
const u32 ZERO = (IPtr[4] >> 1) & 0x01;
const u32 BSEL = (IPtr[4] >> 0) & 0x01;
uint32_t NOFL=(IPtr[6]>>15)&1; //????
uint32_t COEF=step;
const u32 NOFL = (IPtr[6] >> 15) & 1; //????
const u32 COEF = step;
uint32_t MASA=(IPtr[6]>>9)&0x1f; //???
uint32_t ADREB=(IPtr[6]>>8)&0x1;
uint32_t NXADR=(IPtr[6]>>7)&0x1;
int64_t v;
const u32 MASA = (IPtr[6] >> 9) & 0x1f; //???
const u32 ADREB = (IPtr[6] >> 8) & 0x1;
const u32 NXADR = (IPtr[6] >> 7) & 0x1;
//operations are done at 24 bit precision
#if 0
@ -156,6 +143,7 @@ void AICADSP::step()
#endif
//INPUTS RW
assert(IRA<0x32);
s32 INPUTS=0; //24 bit
if (IRA <= 0x1f)
INPUTS = MEMS[IRA];
else if (IRA <= 0x2F)
@ -177,6 +165,7 @@ void AICADSP::step()
//Operand sel
//B
s32 B; //26 bit
if (!ZERO)
{
if (BSEL)
@ -196,6 +185,7 @@ void AICADSP::step()
B = 0;
//X
s32 X; //24 bit
if (XSEL)
X = INPUTS;
else
@ -208,6 +198,7 @@ void AICADSP::step()
}
//Y
s32 Y = 0; //13 bit
if (YSEL == 0)
Y = FRC_REG;
else if (YSEL == 1)
@ -221,22 +212,11 @@ void AICADSP::step()
Y_REG = INPUTS;
//Shifter
s32 SHIFTED = 0; //24 bit
if (SHIFT == 0)
{
SHIFTED=ACC;
if(SHIFTED>0x007FFFFF)
SHIFTED=0x007FFFFF;
if(SHIFTED<(-0x00800000))
SHIFTED=-0x00800000;
}
SHIFTED = std::max<s32>(std::min<s32>(ACC, 0x007FFFFF), -0x00800000);
else if (SHIFT == 1)
{
SHIFTED=ACC*2;
if(SHIFTED>0x007FFFFF)
SHIFTED=0x007FFFFF;
if(SHIFTED<(-0x00800000))
SHIFTED=-0x00800000;
}
SHIFTED = std::max<s32>(std::min<s32>(ACC * 2, 0x007FFFFF), -0x00800000);
else if (SHIFT == 2)
{
SHIFTED = ACC * 2;
@ -262,7 +242,7 @@ void AICADSP::step()
//if (Y & 0x1000)
// Y |= 0xFFFFF000;
v=(((int64_t) X*(int64_t) Y)>>12);
const s64 v = (((s64)X * (s64)Y) >> 12);
ACC = (int)v + B;
if (TWT)
@ -276,6 +256,7 @@ void AICADSP::step()
FRC_REG = (SHIFTED >> 11) & 0x1FFF;
}
u32 ADDR;
if (MRD || MWT)
//if (0)
{
@ -292,21 +273,21 @@ void AICADSP::step()
ADDR &= 0xFFFF;
//ADDR <<= 1;
//ADDR += RBP << 13;
//MEMVAL=AICARAM[ADDR>>1];
//MEMVAL = space->read_word(ADDR >> 1);
ADDR += RBP << 10;
if (MRD && (step & 1)) //memory only allowed on odd? DoA inserts NOPs on even
{
if (NOFL)
MEMVAL=AICARAM[ADDR]<<8;
MEMVAL = cache->read_word(ADDR) << 8;
else
MEMVAL=UNPACK(AICARAM[ADDR]);
MEMVAL = UNPACK(cache->read_word(ADDR));
}
if (MWT && (step&1))
{
if (NOFL)
AICARAM[ADDR]=SHIFTED>>8;
space->write_word(ADDR, SHIFTED>>8);
else
AICARAM[ADDR]=PACK(SHIFTED);
space->write_word(ADDR, PACK(SHIFTED));
}
}
@ -323,12 +304,12 @@ void AICADSP::step()
}
--DEC;
memset(MIXS,0,4*16);
std::fill(std::begin(MIXS), std::end(MIXS), 0);
// if (f)
// fclose(f);
}
void AICADSP::setsample(int32_t sample,int SEL,int MXL)
void AICADSP::setsample(s32 sample, u8 SEL, s32 MXL)
{
//MIXS[SEL] += sample << (MXL + 1)/*7*/;
MIXS[SEL] += sample;
@ -339,10 +320,10 @@ void AICADSP::setsample(int32_t sample,int SEL,int MXL)
void AICADSP::start()
{
int i;
Stopped=0;
Stopped = false;
for (i = 127; i >= 0; --i)
{
uint16_t *IPtr=MPRO+i*8;
u16 *IPtr = MPRO + i * 8;
if (IPtr[0] != 0 || IPtr[2] != 0 || IPtr[4] != 0 || IPtr[6] != 0)
break;

30
src/devices/sound/aicadsp.h
View File

@ -9,33 +9,33 @@
struct AICADSP
{
void init();
void setsample(int32_t sample, int32_t SEL, int32_t MXL);
void setsample(s32 sample, u8 SEL, s32 MXL);
void step();
void start();
//Config
uint16_t *AICARAM;
uint32_t AICARAM_LENGTH;
uint32_t RBP; //Ring buf pointer
uint32_t RBL; //Delay ram (Ring buffer) size in words
address_space *space;
memory_access_cache<1, 0, ENDIANNESS_LITTLE> *cache;
u32 RBP; //Ring buf pointer
u32 RBL; //Delay ram (Ring buffer) size in words
//context
int16_t COEF[128*2]; //16 bit signed
uint16_t MADRS[64*2]; //offsets (in words), 16 bit
uint16_t MPRO[128*4*2*2]; //128 steps 64 bit
int32_t TEMP[128]; //TEMP regs,24 bit signed
int32_t MEMS[32]; //MEMS regs,24 bit signed
uint32_t DEC;
s16 COEF[128 * 2]; //16 bit signed
u16 MADRS[64 * 2]; //offsets (in words), 16 bit
u16 MPRO[128 * 4 * 2 * 2]; //128 steps 64 bit
s32 TEMP[128]; //TEMP regs,24 bit signed
s32 MEMS[32]; //MEMS regs,24 bit signed
u32 DEC;
//input
int32_t MIXS[16]; //MIXS, 24 bit signed
int16_t EXTS[2]; //External inputs (CDDA) 16 bit signed
s32 MIXS[16]; //MIXS, 24 bit signed
s16 EXTS[2]; //External inputs (CDDA) 16 bit signed
//output
int16_t EFREG[16]; //EFREG, 16 bit signed
s16 EFREG[16]; //EFREG, 16 bit signed
int Stopped;
bool Stopped;
int LastStep;
};

11
src/mame/drivers/dccons.cpp
View File

@ -392,7 +392,7 @@ void dc_cons_state::dc_map(address_map &map)
map(0x00600000, 0x006007ff).rw(FUNC(dc_cons_state::dc_modem_r), FUNC(dc_cons_state::dc_modem_w));
map(0x00700000, 0x00707fff).rw(FUNC(dc_cons_state::dc_aica_reg_r), FUNC(dc_cons_state::dc_aica_reg_w));
map(0x00710000, 0x0071000f).mirror(0x02000000).rw("aicartc", FUNC(aicartc_device::read), FUNC(aicartc_device::write)).umask64(0x0000ffff0000ffff);
map(0x00800000, 0x009fffff).rw(FUNC(dc_cons_state::sh4_soundram_r), FUNC(dc_cons_state::sh4_soundram_w));
map(0x00800000, 0x009fffff).rw(FUNC(dc_cons_state::soundram_r), FUNC(dc_cons_state::soundram_w));
// AM_RANGE(0x01000000, 0x01ffffff) G2 Ext Device #1
// AM_RANGE(0x02700000, 0x02707fff) AICA reg mirror
// AM_RANGE(0x02800000, 0x02ffffff) AICA wave mem mirror
@ -433,10 +433,16 @@ void dc_cons_state::dc_port(address_map &map)
void dc_cons_state::dc_audio_map(address_map &map)
{
map.unmap_value_high();
map(0x00000000, 0x001fffff).ram().share("dc_sound_ram"); /* shared with SH-4 */
map(0x00000000, 0x001fffff).rw(FUNC(dc_cons_state::soundram_r), FUNC(dc_cons_state::soundram_w)); /* shared with SH-4 */
map(0x00800000, 0x00807fff).rw(FUNC(dc_cons_state::dc_arm_aica_r), FUNC(dc_cons_state::dc_arm_aica_w));
}
void dc_cons_state::aica_map(address_map &map)
{
map.unmap_value_high();
map(0x000000, 0x1fffff).ram().share("dc_sound_ram");
}
static INPUT_PORTS_START( dc )
PORT_START("P1:0")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) PORT_NAME("P1 RIGHT")
@ -672,6 +678,7 @@ void dc_cons_state::dc(machine_config &config)
AICA(config, m_aica, (XTAL(33'868'800)*2)/3); // 67.7376MHz(2*33.8688MHz), div 3 for audio block
m_aica->irq().set(FUNC(dc_state::aica_irq));
m_aica->main_irq().set(FUNC(dc_state::sh4_aica_irq));
m_aica->set_addrmap(0, &dc_cons_state::aica_map);
m_aica->add_route(0, "lspeaker", 1.0);
m_aica->add_route(1, "rspeaker", 1.0);

16
src/mame/drivers/naomi.cpp
View File

@ -1728,7 +1728,7 @@ void naomi_state::naomi_map(address_map &map)
map(0x00600000, 0x006007ff).mirror(0x02000000).rw(FUNC(naomi_state::dc_modem_r), FUNC(naomi_state::dc_modem_w));
map(0x00700000, 0x00707fff).mirror(0x02000000).rw(FUNC(naomi_state::dc_aica_reg_r), FUNC(naomi_state::dc_aica_reg_w));
map(0x00710000, 0x0071000f).mirror(0x02000000).rw("aicartc", FUNC(aicartc_device::read), FUNC(aicartc_device::write)).umask64(0x0000ffff0000ffff);
map(0x00800000, 0x00ffffff).mirror(0x02000000).rw(FUNC(naomi_state::sh4_soundram_r), FUNC(naomi_state::sh4_soundram_w)); // sound RAM (8 MB)
map(0x00800000, 0x00ffffff).mirror(0x02000000).rw(FUNC(naomi_state::soundram_r), FUNC(naomi_state::soundram_w)); // sound RAM (8 MB)
/* External Device */
map(0x01000000, 0x01ffffff).mirror(0x02000000).r(FUNC(naomi_state::naomi_g2bus_r));
@ -1787,7 +1787,7 @@ void naomi2_state::naomi2_map(address_map &map)
map(0x00600000, 0x006007ff).mirror(0x02000000).rw(FUNC(naomi2_state::dc_modem_r), FUNC(naomi2_state::dc_modem_w));
map(0x00700000, 0x00707fff).mirror(0x02000000).rw(FUNC(naomi2_state::dc_aica_reg_r), FUNC(naomi2_state::dc_aica_reg_w));
map(0x00710000, 0x0071000f).mirror(0x02000000).rw("aicartc", FUNC(aicartc_device::read), FUNC(aicartc_device::write)).umask64(0x0000ffff0000ffff);
map(0x00800000, 0x00ffffff).mirror(0x02000000).rw(FUNC(naomi2_state::sh4_soundram_r), FUNC(naomi2_state::sh4_soundram_w)); // sound RAM (8 MB)
map(0x00800000, 0x00ffffff).mirror(0x02000000).rw(FUNC(naomi2_state::soundram_r), FUNC(naomi2_state::soundram_w)); // sound RAM (8 MB)
/* External Device */
map(0x01000000, 0x01ffffff).mirror(0x02000000).r(FUNC(naomi2_state::naomi_g2bus_r));
@ -1964,7 +1964,7 @@ void atomiswave_state::aw_map(address_map &map)
map(0x00600000, 0x006007ff).rw(FUNC(atomiswave_state::aw_modem_r), FUNC(atomiswave_state::aw_modem_w));
map(0x00700000, 0x00707fff).rw(FUNC(atomiswave_state::dc_aica_reg_r), FUNC(atomiswave_state::dc_aica_reg_w));
map(0x00710000, 0x0071000f).mirror(0x02000000).rw("aicartc", FUNC(aicartc_device::read), FUNC(aicartc_device::write)).umask64(0x0000ffff0000ffff);
map(0x00800000, 0x00ffffff).rw(FUNC(atomiswave_state::sh4_soundram_r), FUNC(atomiswave_state::sh4_soundram_w)); // sound RAM (8 MB)
map(0x00800000, 0x00ffffff).rw(FUNC(atomiswave_state::soundram_r), FUNC(atomiswave_state::soundram_w)); // sound RAM (8 MB)
/* Area 1 - half the texture memory, like dreamcast, not naomi */
map(0x04000000, 0x047fffff).ram().mirror(0x00800000).share("dc_texture_ram"); // texture memory 64 bit access
@ -2008,10 +2008,16 @@ void atomiswave_state::aw_port(address_map &map)
void dc_state::dc_audio_map(address_map &map)
{
map.unmap_value_high();
map(0x00000000, 0x007fffff).ram().share("dc_sound_ram"); /* shared with SH-4 */
map(0x00000000, 0x007fffff).rw(FUNC(naomi_state::soundram_r), FUNC(naomi_state::soundram_w)); /* shared with SH-4 */
map(0x00800000, 0x00807fff).rw(FUNC(dc_state::dc_arm_aica_r), FUNC(dc_state::dc_arm_aica_w));
}
void dc_state::aica_map(address_map &map)
{
map.unmap_value_high();
map(0x000000, 0x7fffff).ram().share("dc_sound_ram");
}
/*
* Input ports
*/
@ -2908,7 +2914,6 @@ INPUT_PORTS_END
MACHINE_RESET_MEMBER(naomi_state,naomi)
{
naomi_state::machine_reset();
m_aica->set_ram_base(dc_sound_ram, 8*1024*1024);
}
/*
@ -2953,6 +2958,7 @@ void dc_state::naomi_aw_base(machine_config &config)
AICA(config, m_aica, (XTAL(33'868'800)*2)/3); // 67.7376MHz(2*33.8688MHz), div 3 for audio block
m_aica->irq().set(FUNC(dc_state::aica_irq));
m_aica->main_irq().set(FUNC(dc_state::sh4_aica_irq));
m_aica->set_addrmap(0, &dc_state::aica_map);
m_aica->add_route(0, "lspeaker", 1.0);
m_aica->add_route(1, "rspeaker", 1.0);

7
src/mame/includes/dc.h
View File

@ -35,7 +35,7 @@ class dc_state : public driver_device
required_shared_ptr<uint64_t> dc_framebuffer_ram; // '32-bit access area'
required_shared_ptr<uint64_t> dc_texture_ram; // '64-bit access area'
required_shared_ptr<uint32_t> dc_sound_ram;
required_shared_ptr<uint16_t> dc_sound_ram;
required_shared_ptr<uint64_t> dc_ram;
/* machine related */
@ -80,8 +80,8 @@ class dc_state : public driver_device
DECLARE_WRITE8_MEMBER( g1_irq );
DECLARE_WRITE8_MEMBER( pvr_irq );
DECLARE_WRITE8_MEMBER( maple_irq );
DECLARE_READ64_MEMBER( sh4_soundram_r );
DECLARE_WRITE64_MEMBER( sh4_soundram_w );
DECLARE_READ16_MEMBER( soundram_r );
DECLARE_WRITE16_MEMBER( soundram_w );
DECLARE_WRITE_LINE_MEMBER(aica_irq);
DECLARE_WRITE_LINE_MEMBER(sh4_aica_irq);
@ -98,6 +98,7 @@ class dc_state : public driver_device
DECLARE_MACHINE_RESET(dc_console);
void naomi_aw_base(machine_config &config);
void aica_map(address_map &map);
void dc_audio_map(address_map &map);
};

1
src/mame/includes/dccons.h
View File

@ -51,6 +51,7 @@ public:
static void gdrom_config(device_t *device);
void dc(machine_config &config);
void aica_map(address_map &map);
void dc_audio_map(address_map &map);
void dc_map(address_map &map);
void dc_port(address_map &map);

18
src/mame/machine/dc.cpp
View File

@ -660,7 +660,6 @@ void dc_state::machine_start()
// save states
save_pointer(NAME(dc_sysctrl_regs), 0x200/4);
save_pointer(NAME(g2bus_regs), 0x100/4);
save_pointer(NAME(dc_sound_ram.target()),dc_sound_ram.bytes()/4);
SAVE_G2DMA(0)
SAVE_G2DMA(1)
SAVE_G2DMA(2)
@ -685,7 +684,7 @@ READ32_MEMBER(dc_state::dc_aica_reg_r)
if(offset == 0x2c00/4)
return m_armrst;
return m_aica->read(space, offset*2, 0xffff);
return m_aica->read(offset*2);
}
WRITE32_MEMBER(dc_state::dc_aica_reg_w)
@ -709,29 +708,29 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
}
}
m_aica->write(space, offset*2, data, 0xffff);
m_aica->write(offset*2, data, 0xffff);
// osd_printf_verbose("%s",string_format("AICA REG: [%08x=%x] write %x to %x, mask %x\n", 0x700000+reg*4, data, offset, mem_mask).c_str());
}
READ32_MEMBER(dc_state::dc_arm_aica_r)
{
return m_aica->read(space, offset*2, 0xffff) & 0xffff;
return m_aica->read(offset*2) & 0xffff;
}
WRITE32_MEMBER(dc_state::dc_arm_aica_w)
{
m_aica->write(space, offset*2, data, mem_mask&0xffff);
m_aica->write(offset*2, data, mem_mask&0xffff);
}
READ64_MEMBER(dc_state::sh4_soundram_r )
READ16_MEMBER(dc_state::soundram_r )
{
return *((uint64_t *)dc_sound_ram.target()+offset);
return dc_sound_ram[offset];
}
WRITE64_MEMBER(dc_state::sh4_soundram_w )
WRITE16_MEMBER(dc_state::soundram_w )
{
COMBINE_DATA((uint64_t *)dc_sound_ram.target() + offset);
COMBINE_DATA(&dc_sound_ram[offset]);
}
WRITE_LINE_MEMBER(dc_state::aica_irq)
@ -753,7 +752,6 @@ MACHINE_RESET_MEMBER(dc_state,dc_console)
{
dc_state::machine_reset();
m_maincpu->sh2drc_set_options(SH2DRC_STRICT_VERIFY | SH2DRC_STRICT_PCREL);
m_aica->set_ram_base(dc_sound_ram, 2*1024*1024);
}
TIMER_DEVICE_CALLBACK_MEMBER(dc_state::dc_scanline)