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am9513, am9517a, am9519, at_keybc, cs4031, ds128x, mc141618, wd7600: Simplify read/write handlers (nw)

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Note that the VME handler installing routines can and should be redone later; this is merely enough for now.
This commit is contained in:
AJR 2019-03-07 08:14:34 -05:00
parent cc1b5720d9
commit 8e3543b398
53 changed files with 379 additions and 381 deletions
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8
src/devices/bus/bbc/rom/rtc.cpp
View File

@ -82,20 +82,20 @@ READ8_MEMBER(bbc_stlrtc_device::read)
switch (offset & 0x3fc0)
{
case 0x3e00:
data = m_rtc->read(space, 1);
data = m_rtc->read(1);
break;
case 0x3e40:
m_rtc->write(space, 0, data);
m_rtc->write(0, data);
break;
case 0x3e80:
case 0x3ec0:
data = m_rtc->read(space, 0);
data = m_rtc->read(0);
break;
case 0x3f00:
case 0x3f40:
case 0x3f80:
case 0x3fc0:
m_rtc->write(space, 1, data);
m_rtc->write(1, data);
break;
}
return data;

4
src/devices/bus/cpc/magicsound.cpp
View File

@ -115,12 +115,12 @@ void al_magicsound_device::device_reset()
READ8_MEMBER(al_magicsound_device::dmac_r)
{
return m_dmac->read(space,offset);
return m_dmac->read(offset);
}
WRITE8_MEMBER(al_magicsound_device::dmac_w)
{
m_dmac->write(space,offset,data);
m_dmac->write(offset,data);
}
WRITE8_MEMBER(al_magicsound_device::timer_w)

19
src/devices/bus/cpc/symbfac2.cpp
View File

@ -161,27 +161,12 @@ WRITE8_MEMBER(cpc_symbiface2_device::ide_cs1_w)
// #FD14 (read/write) read from or write into selected register
READ8_MEMBER(cpc_symbiface2_device::rtc_r)
{
switch(offset & 0x01)
{
case 0x00:
return m_rtc->read(space,1);
case 0x01:
return m_rtc->read(space,0);
}
return 0;
return m_rtc->read(~offset & 0x01);
}
WRITE8_MEMBER(cpc_symbiface2_device::rtc_w)
{
switch(offset & 0x01)
{
case 0x00:
m_rtc->write(space,1,data);
break;
case 0x01:
m_rtc->write(space,0,data);
break;
}
m_rtc->write(~offset & 0x01, data);
}
// PS/2 Mouse connector

8
src/devices/bus/econet/e01.cpp
View File

@ -647,7 +647,7 @@ WRITE8_MEMBER( econet_e01_device::hdc_irq_enable_w )
READ8_MEMBER( econet_e01_device::rtc_address_r )
{
return m_rtc->read(space, 0);
return m_rtc->read(0);
}
@ -657,7 +657,7 @@ READ8_MEMBER( econet_e01_device::rtc_address_r )
WRITE8_MEMBER( econet_e01_device::rtc_address_w )
{
m_rtc->write(space, 0, data);
m_rtc->write(0, data);
}
@ -667,7 +667,7 @@ WRITE8_MEMBER( econet_e01_device::rtc_address_w )
READ8_MEMBER( econet_e01_device::rtc_data_r )
{
return m_rtc->read(space, 1);
return m_rtc->read(1);
}
@ -677,7 +677,7 @@ READ8_MEMBER( econet_e01_device::rtc_data_r )
WRITE8_MEMBER( econet_e01_device::rtc_data_w )
{
m_rtc->write(space, 1, data);
m_rtc->write(1, data);
}

4
src/devices/bus/electron/cart/click.cpp
View File

@ -98,7 +98,7 @@ uint8_t electron_click_device::read(offs_t offset, int infc, int infd, int romqa
{
case 0xf8:
case 0xf9:
data = m_rtc->read(machine().dummy_space(), offset & 0x01);
data = m_rtc->read(offset & 0x01);
break;
case 0xfc:
data = m_page_register;
@ -135,7 +135,7 @@ void electron_click_device::write(offs_t offset, uint8_t data, int infc, int inf
{
case 0xf8:
case 0xf9:
m_rtc->write(machine().dummy_space(), offset & 0x01, data);
m_rtc->write(offset & 0x01, data);
break;
case 0xfc:
m_page_register = data;

4
src/devices/bus/electron/cart/cumana.cpp
View File

@ -103,7 +103,7 @@ uint8_t electron_cumana_device::read(offs_t offset, int infc, int infd, int romq
break;
case 0x98:
case 0x9c:
data = m_rtc->read(machine().dummy_space(), BIT(offset, 2));
data = m_rtc->read(BIT(offset, 2));
break;
}
}
@ -151,7 +151,7 @@ void electron_cumana_device::write(offs_t offset, uint8_t data, int infc, int in
break;
case 0x98:
case 0x9c:
m_rtc->write(machine().dummy_space(), BIT(offset, 2), data);
m_rtc->write(BIT(offset, 2), data);
break;
}
}

16
src/devices/bus/lpci/southbridge.cpp
View File

@ -219,7 +219,7 @@ void southbridge_device::device_start()
{
spaceio = &m_maincpu->space(AS_IO);
spaceio->install_readwrite_handler(0x0000, 0x001f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma8237_1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma8237_1)), 0xffffffff);
spaceio->install_readwrite_handler(0x0000, 0x001f, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma8237_1)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma8237_1)), 0xffffffff);
spaceio->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic8259_master)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic8259_master)), 0xffffffff);
spaceio->install_readwrite_handler(0x0040, 0x005f, read8sm_delegate(FUNC(pit8254_device::read), &(*m_pit8254)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_pit8254)), 0xffffffff);
spaceio->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(southbridge_device::at_portb_r), this), write8_delegate(FUNC(southbridge_device::at_portb_w), this), 0x0000ff00);
@ -493,12 +493,12 @@ WRITE_LINE_MEMBER( southbridge_device::iochck_w )
READ8_MEMBER( southbridge_device::at_dma8237_2_r )
{
return m_dma8237_2->read( space, offset / 2);
return m_dma8237_2->read(offset / 2);
}
WRITE8_MEMBER( southbridge_device::at_dma8237_2_w )
{
m_dma8237_2->write( space, offset / 2, data);
m_dma8237_2->write(offset / 2, data);
}
/***************************************************************************
@ -560,9 +560,9 @@ void southbridge_extended_device::device_start()
southbridge_device::device_start();
spaceio.install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(at_keyboard_controller_device::data_r), &(*m_keybc)), write8_delegate(FUNC(at_keyboard_controller_device::data_w), &(*m_keybc)), 0x000000ff);
spaceio.install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(at_keyboard_controller_device::status_r), &(*m_keybc)), write8_delegate(FUNC(at_keyboard_controller_device::command_w), &(*m_keybc)), 0xffffffff);
spaceio.install_readwrite_handler(0x0070, 0x007f, read8_delegate(FUNC(ds12885_device::read), &(*m_ds12885)), write8_delegate(FUNC(ds12885_device::write), &(*m_ds12885)), 0xffffffff);
spaceio.install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(at_keyboard_controller_device::data_r), &(*m_keybc)), write8smo_delegate(FUNC(at_keyboard_controller_device::data_w), &(*m_keybc)), 0x000000ff);
spaceio.install_readwrite_handler(0x0064, 0x0067, read8smo_delegate(FUNC(at_keyboard_controller_device::status_r), &(*m_keybc)), write8smo_delegate(FUNC(at_keyboard_controller_device::command_w), &(*m_keybc)), 0xffffffff);
spaceio.install_readwrite_handler(0x0070, 0x007f, read8sm_delegate(FUNC(ds12885_device::read), &(*m_ds12885)), write8sm_delegate(FUNC(ds12885_device::write), &(*m_ds12885)), 0xffffffff);
}
//-------------------------------------------------
@ -580,9 +580,9 @@ WRITE8_MEMBER( southbridge_extended_device::write_rtc )
m_nmi_enabled = BIT(data,7);
if (!m_nmi_enabled)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
m_ds12885->write(space,0,data);
m_ds12885->write(0,data);
}
else {
m_ds12885->write(space,offset,data);
m_ds12885->write(offset,data);
}
}

30
src/devices/bus/vme/vme.cpp
View File

@ -329,6 +329,36 @@ void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read8
}
}
void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler, uint32_t mask)
{
LOG("%s %s AM%d D%02x\n", tag(), FUNCNAME, amod, m_prgwidth);
LOG(" - width:%d\n", m_prgwidth);
// TODO: support address modifiers and buscycles other than single access cycles
switch(amod)
{
case A16_SC: break;
case A24_SC: break;
case A32_SC: break;
default: fatalerror("VME D8: Non supported Address modifier: AM%02x\n", amod);
}
switch(m_prgwidth)
{
case 16:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0x0000ffff));
break;
case 24:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint32_t)(mask & 0x00ffffff));
break;
case 32:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
break;
default: fatalerror("VME D8: Bus width %d not supported\n", m_prgwidth);
}
}
// D16 bit devices in A16, A24 and A32
void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask)
{

1
src/devices/bus/vme/vme.h
View File

@ -182,6 +182,7 @@ public:
AMOD_STANDARD_SUPERVIS_BLK = 0x3F
};
void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler, uint32_t mask);
// void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask);

4
src/devices/bus/vme/vme_mzr8300.cpp
View File

@ -187,8 +187,8 @@ void vme_mzr8300_card_device::device_start()
read8_delegate(FUNC(z80sio_device::ca_r), subdevice<z80sio_device>("sio0")),
write8_delegate(FUNC(z80sio_device::ca_w), subdevice<z80sio_device>("sio0")), 0x00ff);
m_vme->install_device(vme_device::A16_SC, base + 0x10, base + 0x13, // Am9513
read8_delegate(FUNC(am9513_device::read8), subdevice<am9513_device>("stc")),
write8_delegate(FUNC(am9513_device::write8), subdevice<am9513_device>("stc")), 0x00ff);
read8sm_delegate(FUNC(am9513_device::read8), subdevice<am9513_device>("stc")),
write8sm_delegate(FUNC(am9513_device::write8), subdevice<am9513_device>("stc")), 0x00ff);
}
void vme_mzr8300_card_device::device_reset()

8
src/devices/cpu/nec/v5x.cpp
View File

@ -199,8 +199,8 @@ void v53_device::install_peripheral_io()
}
else // uPD71071 mode
space(AS_IO).install_readwrite_handler(base + 0x00, base + 0x0f,
read8_delegate(FUNC(v5x_dmau_device::read), m_dmau.target()),
write8_delegate(FUNC(v5x_dmau_device::write), m_dmau.target()), 0xffff);
read8sm_delegate(FUNC(v5x_dmau_device::read), m_dmau.target()),
write8sm_delegate(FUNC(v5x_dmau_device::write), m_dmau.target()), 0xffff);
}
if (m_OPSEL & OPSEL_IS)
@ -264,8 +264,8 @@ void v50_device::install_peripheral_io()
u16 const base = ((m_OPHA << 8) | m_DULA) & 0xfffe;
space(AS_IO).install_readwrite_handler(base + 0x00, base + 0x0f,
read8_delegate(FUNC(v5x_dmau_device::read), m_dmau.target()),
write8_delegate(FUNC(v5x_dmau_device::write), m_dmau.target()), 0xffff);
read8sm_delegate(FUNC(v5x_dmau_device::read), m_dmau.target()),
write8sm_delegate(FUNC(v5x_dmau_device::write), m_dmau.target()), 0xffff);
}
if (m_OPSEL & OPSEL_IS)

8
src/devices/machine/am9513.cpp
View File

@ -1382,7 +1382,7 @@ void am9513_device::data_write(u16 data)
// read8 - 8-bit read access
//-------------------------------------------------
READ8_MEMBER(am9513_device::read8)
u8 am9513_device::read8(offs_t offset)
{
if (BIT(offset, 0))
return status_read();
@ -1395,7 +1395,7 @@ READ8_MEMBER(am9513_device::read8)
// write8 - 8-bit write access
//-------------------------------------------------
WRITE8_MEMBER(am9513_device::write8)
void am9513_device::write8(offs_t offset, u8 data)
{
if (BIT(offset, 0))
{
@ -1412,7 +1412,7 @@ WRITE8_MEMBER(am9513_device::write8)
// read16 - 16-bit read access
//-------------------------------------------------
READ16_MEMBER(am9513_device::read16)
u16 am9513_device::read16(offs_t offset)
{
if (BIT(offset, 0))
return status_read() | 0xff00;
@ -1429,7 +1429,7 @@ READ16_MEMBER(am9513_device::read16)
// write16 - 16-bit write access
//-------------------------------------------------
WRITE16_MEMBER(am9513_device::write16)
void am9513_device::write16(offs_t offset, u16 data)
{
if ((!bus_is_16_bit() || BIT(offset, 0)) && (data & 0xff00) != 0xff00)
logerror("Errant write of %02X to upper byte of %s register in %d-bit bus mode\n",

8
src/devices/machine/am9513.h
View File

@ -55,12 +55,12 @@ public:
auto fout_cb() { return m_fout_cb.bind(); }
// 8-bit data bus interface
DECLARE_READ8_MEMBER(read8);
DECLARE_WRITE8_MEMBER(write8);
u8 read8(offs_t offset);
void write8(offs_t offset, u8 data);
// 16-bit data bus interface
DECLARE_READ16_MEMBER(read16);
DECLARE_WRITE16_MEMBER(write16);
u16 read16(offs_t offset);
void write16(offs_t offset, u16 data);
// Source N inputs
DECLARE_WRITE_LINE_MEMBER(source1_w) { write_source(0, state); }

8
src/devices/machine/am9517a.cpp
View File

@ -723,7 +723,7 @@ void am9517a_device::execute_run()
// read -
//-------------------------------------------------
READ8_MEMBER( am9517a_device::read )
uint8_t am9517a_device::read(offs_t offset)
{
uint8_t data = 0;
@ -787,7 +787,7 @@ READ8_MEMBER( am9517a_device::read )
// write -
//-------------------------------------------------
WRITE8_MEMBER( am9517a_device::write )
void am9517a_device::write(offs_t offset, uint8_t data)
{
if (!BIT(offset, 3))
{
@ -1024,7 +1024,7 @@ void v5x_dmau_device::device_reset()
}
READ8_MEMBER(v5x_dmau_device::read)
uint8_t v5x_dmau_device::read(offs_t offset)
{
uint8_t ret = 0;
int channel = m_selected_channel;
@ -1108,7 +1108,7 @@ READ8_MEMBER(v5x_dmau_device::read)
return ret;
}
WRITE8_MEMBER(v5x_dmau_device::write)
void v5x_dmau_device::write(offs_t offset, uint8_t data)
{
int channel = m_selected_channel;

8
src/devices/machine/am9517a.h
View File

@ -61,8 +61,8 @@ public:
template <unsigned C> auto out_iow_callback() { return m_out_iow_cb[C].bind(); }
template <unsigned C> auto out_dack_callback() { return m_out_dack_cb[C].bind(); }
virtual DECLARE_READ8_MEMBER( read );
virtual DECLARE_WRITE8_MEMBER( write );
virtual uint8_t read(offs_t offset);
virtual void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( hack_w );
DECLARE_WRITE_LINE_MEMBER( ready_w );
@ -149,8 +149,8 @@ public:
template <unsigned C> auto in_io16r_callback() { return m_in_io16r_cb[C].bind(); }
template <unsigned C> auto out_io16w_callback() { return m_out_io16w_cb[C].bind(); }
virtual DECLARE_READ8_MEMBER( read ) override;
virtual DECLARE_WRITE8_MEMBER( write ) override;
virtual uint8_t read(offs_t offset) override;
virtual void write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides

8
src/devices/machine/am9519.cpp
View File

@ -103,7 +103,7 @@ IRQ_CALLBACK_MEMBER(am9519_device::iack_cb)
}
READ8_MEMBER( am9519_device::stat_r )
u8 am9519_device::stat_r()
{
u8 stat = 0;
for(int n = 0, irq = m_prio; n < 8; n++, irq = (irq + 1) & 7)
@ -121,7 +121,7 @@ READ8_MEMBER( am9519_device::stat_r )
return stat;
}
READ8_MEMBER( am9519_device::data_r )
u8 am9519_device::data_r()
{
switch((m_mode & 0x60) >> 5)
{
@ -137,7 +137,7 @@ READ8_MEMBER( am9519_device::data_r )
return 0;
}
WRITE8_MEMBER( am9519_device::cmd_w )
void am9519_device::cmd_w(u8 data)
{
m_cmd = data;
switch(data >> 3)
@ -222,7 +222,7 @@ WRITE8_MEMBER( am9519_device::cmd_w )
set_timer();
}
WRITE8_MEMBER( am9519_device::data_w )
void am9519_device::data_w(u8 data)
{
if((m_cmd & 0xf0) >= 0xb0)
{

8
src/devices/machine/am9519.h
View File

@ -36,10 +36,10 @@ public:
auto out_int_callback() { return m_out_int_func.bind(); }
DECLARE_READ8_MEMBER( stat_r );
DECLARE_READ8_MEMBER( data_r );
DECLARE_WRITE8_MEMBER( cmd_w );
DECLARE_WRITE8_MEMBER( data_w );
u8 stat_r();
u8 data_r();
void cmd_w(u8 data);
void data_w(u8 data);
u32 acknowledge();
DECLARE_WRITE_LINE_MEMBER( ireq0_w ) { set_irq_line(0, state); }

22
src/devices/machine/at_keybc.cpp
View File

@ -110,22 +110,22 @@ DEFINE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device, "ps2
// KEYBOARD CONTROLLER DEVICE BASE
//**************************************************************************
READ8_MEMBER(at_kbc_device_base::data_r)
uint8_t at_kbc_device_base::data_r()
{
return m_mcu->upi41_master_r(space, 0U);
return m_mcu->upi41_master_r(machine().dummy_space(), 0U);
}
READ8_MEMBER(at_kbc_device_base::status_r)
uint8_t at_kbc_device_base::status_r()
{
return m_mcu->upi41_master_r(space, 1U);
return m_mcu->upi41_master_r(machine().dummy_space(), 1U);
}
WRITE8_MEMBER(at_kbc_device_base::data_w)
void at_kbc_device_base::data_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_data), this), unsigned(data));
}
WRITE8_MEMBER(at_kbc_device_base::command_w)
void at_kbc_device_base::command_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_command), this), unsigned(data));
}
@ -265,7 +265,7 @@ ioport_constructor at_keyboard_controller_device::device_input_ports() const
return INPUT_PORTS_NAME(at_kbc);
}
WRITE8_MEMBER(at_keyboard_controller_device::p2_w)
void at_keyboard_controller_device::p2_w(uint8_t data)
{
set_hot_res(BIT(~data, 0));
set_gate_a20(BIT(data, 1));
@ -279,11 +279,11 @@ WRITE8_MEMBER(at_keyboard_controller_device::p2_w)
// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE
//**************************************************************************
READ8_MEMBER(ps2_keyboard_controller_device::data_r)
uint8_t ps2_keyboard_controller_device::data_r()
{
set_kbd_irq(0U);
set_mouse_irq(0U);
return m_mcu->upi41_master_r(space, 0U);
return m_mcu->upi41_master_r(machine().dummy_space(), 0U);
}
WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_clk_w)
@ -385,12 +385,12 @@ TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_data_in)
m_mouse_data_in = param ? 1U : 0U;
}
READ8_MEMBER(ps2_keyboard_controller_device::p1_r)
uint8_t ps2_keyboard_controller_device::p1_r()
{
return kbd_data_r() | (mouse_data_r() << 1) | 0xfcU;
}
WRITE8_MEMBER(ps2_keyboard_controller_device::p2_w)
void ps2_keyboard_controller_device::p2_w(uint8_t data)
{
set_hot_res(BIT(~data, 0));
set_gate_a20(BIT(data, 1));

16
src/devices/machine/at_keybc.h
View File

@ -30,10 +30,10 @@ public:
auto kbd_data() { return m_kbd_data_cb.bind(); } // open collector with 10kΩ pull-up
// host interface
virtual DECLARE_READ8_MEMBER(data_r);
virtual DECLARE_READ8_MEMBER(status_r);
DECLARE_WRITE8_MEMBER(data_w);
DECLARE_WRITE8_MEMBER(command_w);
virtual uint8_t data_r();
virtual uint8_t status_r();
void data_w(uint8_t data);
void command_w(uint8_t data);
// inputs from keyboard
DECLARE_WRITE_LINE_MEMBER(kbd_clk_w);
@ -93,7 +93,7 @@ protected:
private:
// MCU I/O handlers
DECLARE_WRITE8_MEMBER(p2_w);
void p2_w(uint8_t data);
};
@ -112,7 +112,7 @@ public:
auto mouse_data() { return m_mouse_data_cb.bind(); } // open collector with 10kΩ pull-up
// host interface
virtual DECLARE_READ8_MEMBER(data_r) override;
virtual uint8_t data_r() override;
// inputs from mouse
DECLARE_WRITE_LINE_MEMBER(mouse_clk_w);
@ -143,8 +143,8 @@ private:
TIMER_CALLBACK_MEMBER(set_mouse_data_in);
// MCU I/O handlers
DECLARE_READ8_MEMBER(p1_r);
DECLARE_WRITE8_MEMBER(p2_w);
uint8_t p1_r();
void p2_w(uint8_t data);
devcb_write_line m_mouse_irq_cb;
devcb_write_line m_mouse_clk_cb, m_mouse_data_cb;

78
src/devices/machine/cs4031.cpp
View File

@ -263,19 +263,19 @@ void cs4031_device::device_start()
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
// install i/o accesses
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff);
m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
m_space_io->install_write_handler(0x0020, 0x0023, write8smo_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8smo_delegate(FUNC(cs4031_device::config_data_r), this), write8smo_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(cs4031_device::sysctrl_r), this), write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(cs4031_device::keyb_data_r), this), write8smo_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(cs4031_device::portb_r), this), write8smo_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0064, 0x0067, read8smo_delegate(FUNC(cs4031_device::keyb_status_r), this), write8smo_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0070, 0x0073, read8sm_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8sm_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8sm_delegate(FUNC(cs4031_device::dma_page_r), this), write8sm_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
m_space_io->install_readwrite_handler(0x0090, 0x0093, read8smo_delegate(FUNC(cs4031_device::sysctrl_r), this), write8smo_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8sm_delegate(FUNC(cs4031_device::dma2_r),this), write8sm_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
}
//-------------------------------------------------
@ -328,7 +328,7 @@ offs_t cs4031_device::page_offset()
return 0xff0000;
}
READ8_MEMBER( cs4031_device::dma_read_byte )
uint8_t cs4031_device::dma_read_byte(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@ -336,7 +336,7 @@ READ8_MEMBER( cs4031_device::dma_read_byte )
return m_space->read_byte(page_offset() + offset);
}
WRITE8_MEMBER( cs4031_device::dma_write_byte )
void cs4031_device::dma_write_byte(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@ -344,7 +344,7 @@ WRITE8_MEMBER( cs4031_device::dma_write_byte )
m_space->write_byte(page_offset() + offset, data);
}
READ8_MEMBER( cs4031_device::dma_read_word )
uint8_t cs4031_device::dma_read_word(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@ -355,7 +355,7 @@ READ8_MEMBER( cs4031_device::dma_read_word )
return result;
}
WRITE8_MEMBER( cs4031_device::dma_write_word )
void cs4031_device::dma_write_word(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@ -431,7 +431,7 @@ void cs4031_device::trigger_nmi()
}
}
READ8_MEMBER( cs4031_device::intc1_slave_ack_r )
uint8_t cs4031_device::intc1_slave_ack_r(offs_t offset)
{
if (offset == 2) // IRQ 2
return m_intc2->acknowledge();
@ -478,13 +478,13 @@ WRITE_LINE_MEMBER( cs4031_device::ctc_out2_w )
// CHIPSET CONFIGURATION
//**************************************************************************
WRITE8_MEMBER( cs4031_device::config_address_w )
void cs4031_device::config_address_w(uint8_t data)
{
m_address = data;
m_address_valid = (m_address < 0x20) ? true : false;
}
READ8_MEMBER( cs4031_device::config_data_r )
uint8_t cs4031_device::config_data_r()
{
uint8_t result = 0xff;
@ -501,7 +501,7 @@ READ8_MEMBER( cs4031_device::config_data_r )
return result;
}
WRITE8_MEMBER( cs4031_device::config_data_w )
void cs4031_device::config_data_w(uint8_t data)
{
if (m_address_valid)
{
@ -694,21 +694,21 @@ void cs4031_device::keyboard_gatea20(int state)
update_a20m();
}
READ8_MEMBER( cs4031_device::keyb_status_r )
uint8_t cs4031_device::keyb_status_r()
{
LOGKEYBOARD("cs4031_device::keyb_status_r\n");
return m_keybc->status_r(space, 0);
return m_keybc->status_r();
}
WRITE8_MEMBER( cs4031_device::keyb_command_blocked_w )
void cs4031_device::keyb_command_blocked_w(uint8_t data)
{
// command is optionally blocked
if (!BIT(m_registers[SOFT_RESET_AND_GATEA20], 7))
m_keybc->command_w(space, 0, data);
m_keybc->command_w(data);
}
WRITE8_MEMBER( cs4031_device::keyb_command_w )
void cs4031_device::keyb_command_w(uint8_t data)
{
LOGKEYBOARD("cs4031_device::keyb_command_w: %02x\n", data);
@ -722,12 +722,12 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
emulated_gatea20(1);
// self-test is never blocked
m_keybc->command_w(space, 0, data);
m_keybc->command_w(data);
break;
case 0xd1:
m_keybc_d1_written = true;
keyb_command_blocked_w(space, 0, data);
keyb_command_blocked_w(data);
break;
case 0xf0:
@ -756,7 +756,7 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
emulated_gatea20(1);
}
keyb_command_blocked_w(space, 0, data);
keyb_command_blocked_w(data);
break;
@ -765,28 +765,28 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
if (m_keybc_data_blocked)
{
m_keybc_data_blocked = false;
keyb_command_blocked_w(space, 0, data);
keyb_command_blocked_w(data);
}
else
m_keybc->command_w(space, 0, data);
m_keybc->command_w(data);
break;
// everything else goes directly to the keyboard controller
default:
m_keybc->command_w(space, 0, data);
m_keybc->command_w(data);
break;
}
}
READ8_MEMBER( cs4031_device::keyb_data_r )
uint8_t cs4031_device::keyb_data_r()
{
LOGKEYBOARD("cs4031_device::keyb_data_r\n");
return m_keybc->data_r(space, 0);
return m_keybc->data_r();
}
WRITE8_MEMBER( cs4031_device::keyb_data_w )
void cs4031_device::keyb_data_w(uint8_t data)
{
LOGKEYBOARD("cs4031_device::keyb_data_w: %02x\n", data);
@ -800,7 +800,7 @@ WRITE8_MEMBER( cs4031_device::keyb_data_w )
else
{
m_keybc_data_blocked = false;
m_keybc->data_w(space, 0, data);
m_keybc->data_w(data);
}
}
@ -839,7 +839,7 @@ WRITE_LINE_MEMBER( cs4031_device::kbrst_w )
1 - Fast Gate A20
*/
WRITE8_MEMBER( cs4031_device::sysctrl_w )
void cs4031_device::sysctrl_w(uint8_t data)
{
LOGIO("cs4031_device::sysctrl_w: %u\n", data);
@ -855,7 +855,7 @@ WRITE8_MEMBER( cs4031_device::sysctrl_w )
m_cpureset = BIT(data, 0);
}
READ8_MEMBER( cs4031_device::sysctrl_r )
uint8_t cs4031_device::sysctrl_r()
{
uint8_t result = 0; // reserved bits read as 0?
@ -885,7 +885,7 @@ READ8_MEMBER( cs4031_device::sysctrl_r )
7 - Parity check latch (r) [not emulated]
*/
READ8_MEMBER( cs4031_device::portb_r )
uint8_t cs4031_device::portb_r()
{
if (0)
logerror("cs4031_device::portb_r: %02x\n", m_portb);
@ -893,7 +893,7 @@ READ8_MEMBER( cs4031_device::portb_r )
return m_portb;
}
WRITE8_MEMBER( cs4031_device::portb_w )
void cs4031_device::portb_w(uint8_t data)
{
if (0)
logerror("cs4031_device::portb_w: %02x\n", data);
@ -919,7 +919,7 @@ WRITE8_MEMBER( cs4031_device::portb_w )
7 - NMI mask
6:0 - RTC address
*/
WRITE8_MEMBER( cs4031_device::rtc_w )
void cs4031_device::rtc_w(offs_t offset, uint8_t data)
{
if (0)
logerror("cs4031_device::rtc_w: %02x\n", data);
@ -930,5 +930,5 @@ WRITE8_MEMBER( cs4031_device::rtc_w )
data &= 0x7f;
}
m_rtc->write(space, offset, data);
m_rtc->write(offset, data);
}

72
src/devices/machine/cs4031.h
View File

@ -59,23 +59,23 @@ public:
auto spkr() { return m_write_spkr.bind(); }
// internal io
DECLARE_WRITE8_MEMBER( config_address_w );
DECLARE_READ8_MEMBER( config_data_r );
DECLARE_WRITE8_MEMBER( config_data_w );
DECLARE_READ8_MEMBER( portb_r );
DECLARE_WRITE8_MEMBER( portb_w );
DECLARE_WRITE8_MEMBER( rtc_w );
DECLARE_WRITE8_MEMBER( sysctrl_w );
DECLARE_READ8_MEMBER( sysctrl_r );
DECLARE_READ8_MEMBER( dma_page_r ) { return m_dma_page[offset]; }
DECLARE_WRITE8_MEMBER( dma_page_w ) { m_dma_page[offset] = data; }
DECLARE_READ8_MEMBER( dma2_r ) { return m_dma2->read(space, offset / 2); }
DECLARE_WRITE8_MEMBER( dma2_w ) { m_dma2->write(space, offset / 2, data); }
DECLARE_READ8_MEMBER( keyb_data_r );
DECLARE_WRITE8_MEMBER( keyb_data_w );
DECLARE_READ8_MEMBER( keyb_status_r );
DECLARE_WRITE8_MEMBER( keyb_command_w );
DECLARE_WRITE8_MEMBER( keyb_command_blocked_w );
void config_address_w(uint8_t data);
uint8_t config_data_r();
void config_data_w(uint8_t data);
uint8_t portb_r();
void portb_w(uint8_t data);
void rtc_w(offs_t offset, uint8_t data);
void sysctrl_w(uint8_t data);
uint8_t sysctrl_r();
uint8_t dma_page_r(offs_t offset) { return m_dma_page[offset]; }
void dma_page_w(offs_t offset, uint8_t data) { m_dma_page[offset] = data; }
uint8_t dma2_r(offs_t offset) { return m_dma2->read(offset / 2); }
void dma2_w(offs_t offset, uint8_t data) { m_dma2->write(offset / 2, data); }
uint8_t keyb_data_r();
void keyb_data_w(uint8_t data);
uint8_t keyb_status_r();
void keyb_command_w(uint8_t data);
void keyb_command_blocked_w(uint8_t data);
// input lines
DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_intc1->ir1_w(state); }
@ -205,25 +205,25 @@ private:
uint8_t m_registers[0x20];
DECLARE_READ8_MEMBER( dma_read_byte );
DECLARE_WRITE8_MEMBER( dma_write_byte );
DECLARE_READ8_MEMBER( dma_read_word );
DECLARE_WRITE8_MEMBER( dma_write_word );
uint8_t dma_read_byte(offs_t offset);
void dma_write_byte(offs_t offset, uint8_t data);
uint8_t dma_read_word(offs_t offset);
void dma_write_word(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( dma1_eop_w );
DECLARE_READ8_MEMBER( dma1_ior0_r ) { return m_read_ior(0); }
DECLARE_READ8_MEMBER( dma1_ior1_r ) { return m_read_ior(1); }
DECLARE_READ8_MEMBER( dma1_ior2_r ) { return m_read_ior(2); }
DECLARE_READ8_MEMBER( dma1_ior3_r ) { return m_read_ior(3); }
DECLARE_READ8_MEMBER( dma2_ior1_r ) { uint16_t const result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
DECLARE_READ8_MEMBER( dma2_ior2_r ) { uint16_t const result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
DECLARE_READ8_MEMBER( dma2_ior3_r ) { uint16_t const result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
DECLARE_WRITE8_MEMBER( dma1_iow0_w ) { m_write_iow(0, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow1_w ) { m_write_iow(1, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow2_w ) { m_write_iow(2, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow3_w ) { m_write_iow(3, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow1_w ) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow2_w ) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow3_w ) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
uint8_t dma1_ior0_r() { return m_read_ior(0); }
uint8_t dma1_ior1_r() { return m_read_ior(1); }
uint8_t dma1_ior2_r() { return m_read_ior(2); }
uint8_t dma1_ior3_r() { return m_read_ior(3); }
uint8_t dma2_ior1_r() { uint16_t const result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
uint8_t dma2_ior2_r() { uint16_t const result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
uint8_t dma2_ior3_r() { uint16_t const result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
void dma1_iow0_w(uint8_t data) { m_write_iow(0, data, 0xffff); }
void dma1_iow1_w(uint8_t data) { m_write_iow(1, data, 0xffff); }
void dma1_iow2_w(uint8_t data) { m_write_iow(2, data, 0xffff); }
void dma1_iow3_w(uint8_t data) { m_write_iow(3, data, 0xffff); }
void dma2_iow1_w(uint8_t data) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
void dma2_iow2_w(uint8_t data) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
void dma2_iow3_w(uint8_t data) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); }
@ -234,7 +234,7 @@ private:
DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_hreq_w ) { m_write_hold(state); }
DECLARE_WRITE_LINE_MEMBER( intc1_int_w ) { m_write_intr(state); }
DECLARE_READ8_MEMBER( intc1_slave_ack_r );
uint8_t intc1_slave_ack_r(offs_t offset);
DECLARE_WRITE_LINE_MEMBER( ctc_out1_w );
DECLARE_WRITE_LINE_MEMBER( ctc_out2_w );
};

16
src/devices/machine/ds128x.cpp
View File

@ -44,38 +44,38 @@ ds12885ext_device::ds12885ext_device(const machine_config &mconfig, const char *
// ds12885ext_device - handlers that allow acces to extended memory size
//-------------------------------------------------
READ8_MEMBER(ds12885ext_device::read_extended)
uint8_t ds12885ext_device::read_extended(offs_t offset)
{
switch (offset)
{
case 0:
case 1:
return read(space, offset, mem_mask);
return read(offset);
break;
case 2:
case 3:
return read(space, offset - 2, mem_mask);
return read(offset - 2);
break;
default:
return 0xff;
}
}
WRITE8_MEMBER(ds12885ext_device::write_extended)
void ds12885ext_device::write_extended(offs_t offset, uint8_t data)
{
switch (offset)
{
case 0:
write(space, offset, data & 127, mem_mask);
write(offset, data & 127);
break;
case 1:
write(space, offset, data, mem_mask);
write(offset, data);
break;
case 2:
write(space, offset - 2, data, mem_mask);
write(offset - 2, data);
break;
case 3:
write(space, offset - 2, data, mem_mask);
write(offset - 2, data);
break;
}
}

4
src/devices/machine/ds128x.h
View File

@ -33,8 +33,8 @@ public:
ds12885ext_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
// read/write access to extended ram
DECLARE_READ8_MEMBER(read_extended);
DECLARE_WRITE8_MEMBER(write_extended);
uint8_t read_extended(offs_t offset);
void write_extended(offs_t offset, uint8_t data);
protected:
virtual int data_size() override { return 256; }

4
src/devices/machine/fdc37c93x.cpp
View File

@ -639,12 +639,12 @@ void fdc37c93x_device::map_rtc(address_map &map)
READ8_MEMBER(fdc37c93x_device::rtc_read)
{
return ds12885_rtcdev->read(space, offset, mem_mask);
return ds12885_rtcdev->read(offset);
}
WRITE8_MEMBER(fdc37c93x_device::rtc_write)
{
ds12885_rtcdev->write(space, offset, data, mem_mask);
ds12885_rtcdev->write(offset, data);
}
void fdc37c93x_device::map_rtc_addresses()

4
src/devices/machine/i82371sb.cpp
View File

@ -834,12 +834,12 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::iochck_w )
READ8_MEMBER( i82371sb_isa_device::at_dma8237_2_r )
{
return m_dma8237_2->read( space, offset / 2);
return m_dma8237_2->read(offset / 2);
}
WRITE8_MEMBER( i82371sb_isa_device::at_dma8237_2_w )
{
m_dma8237_2->write( space, offset / 2, data);
m_dma8237_2->write(offset / 2, data);
}
READ8_MEMBER(i82371sb_isa_device::eisa_irq_read)

12
src/devices/machine/mc146818.cpp
View File

@ -510,7 +510,7 @@ void mc146818_device::update_irq()
// read - I/O handler for reading
//-------------------------------------------------
READ8_MEMBER( mc146818_device::read )
uint8_t mc146818_device::read(offs_t offset)
{
uint8_t data = 0;
switch (offset)
@ -520,14 +520,14 @@ READ8_MEMBER( mc146818_device::read )
break;
case 1:
data = read_direct(space, m_index);
data = read_direct(m_index);
break;
}
return data;
}
READ8_MEMBER( mc146818_device::read_direct )
uint8_t mc146818_device::read_direct(offs_t offset)
{
uint8_t data = 0;
@ -569,7 +569,7 @@ READ8_MEMBER( mc146818_device::read_direct )
// write - I/O handler for writing
//-------------------------------------------------
WRITE8_MEMBER( mc146818_device::write )
void mc146818_device::write(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -578,12 +578,12 @@ WRITE8_MEMBER( mc146818_device::write )
break;
case 1:
write_direct(space, m_index, data);
write_direct(m_index, data);
break;
}
}
WRITE8_MEMBER( mc146818_device::write_direct )
void mc146818_device::write_direct(offs_t offset, uint8_t data)
{
LOG("mc146818_port_w(): offset=0x%02x data=0x%02x\n", offset, data);

8
src/devices/machine/mc146818.h
View File

@ -39,12 +39,12 @@ public:
void set_binary_year(int bin) { m_binyear = bin; }
// read/write access
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
// direct-mapped read/write access
DECLARE_READ8_MEMBER( read_direct );
DECLARE_WRITE8_MEMBER( write_direct );
uint8_t read_direct(offs_t offset);
void write_direct(offs_t offset, uint8_t data);
protected:
mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

12
src/devices/machine/sis85c496.cpp
View File

@ -544,19 +544,19 @@ WRITE8_MEMBER( sis85c496_host_device::at_portb_w )
READ8_MEMBER( sis85c496_host_device::at_dma8237_2_r )
{
return m_dma8237_2->read( space, offset / 2);
return m_dma8237_2->read( offset / 2);
}
WRITE8_MEMBER( sis85c496_host_device::at_dma8237_2_w )
{
m_dma8237_2->write( space, offset / 2, data);
m_dma8237_2->write( offset / 2, data);
}
READ8_MEMBER( sis85c496_host_device::at_keybc_r )
{
switch (offset)
{
case 0: return m_keybc->data_r(space, 0);
case 0: return m_keybc->data_r();
case 1: return at_portb_r(space, 0);
}
@ -567,7 +567,7 @@ WRITE8_MEMBER( sis85c496_host_device::at_keybc_w )
{
switch (offset)
{
case 0: m_keybc->data_w(space, 0, data); break;
case 0: m_keybc->data_w(data); break;
case 1: at_portb_w(space, 0, data); break;
}
}
@ -578,10 +578,10 @@ WRITE8_MEMBER( sis85c496_host_device::write_rtc )
if (offset==0) {
m_nmi_enabled = BIT(data,7);
//m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
m_ds12885->write(space,0,data);
m_ds12885->write(0,data);
}
else {
m_ds12885->write(space,offset,data);
m_ds12885->write(offset,data);
}
}

126
src/devices/machine/wd7600.cpp
View File

@ -159,46 +159,46 @@ void wd7600_device::device_start()
if (m_space_io->data_width() == 16)
{
// FIXME: are all these address ranges correct?
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffff);
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffff);
m_space_io->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0xffff);
m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffff);
m_space_io->install_readwrite_handler(0x0060, 0x0061, read8_delegate(FUNC(wd7600_device::keyb_data_r), this), write8_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x0060, 0x0061, read8_delegate(FUNC(wd7600_device::portb_r), this), write8_delegate(FUNC(wd7600_device::portb_w), this), 0xff00);
m_space_io->install_readwrite_handler(0x0064, 0x0065, read8_delegate(FUNC(wd7600_device::keyb_status_r), this), write8_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x0070, 0x007f, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(wd7600_device::rtc_w), this), 0xffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(wd7600_device::dma_page_r), this), write8_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffff);
m_space_io->install_readwrite_handler(0x0092, 0x0093, read8_delegate(FUNC(wd7600_device::a20_reset_r), this), write8_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x0060, 0x0061, read8smo_delegate(FUNC(wd7600_device::keyb_data_r), this), write8smo_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x0060, 0x0061, read8smo_delegate(FUNC(wd7600_device::portb_r), this), write8smo_delegate(FUNC(wd7600_device::portb_w), this), 0xff00);
m_space_io->install_readwrite_handler(0x0064, 0x0065, read8smo_delegate(FUNC(wd7600_device::keyb_status_r), this), write8smo_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x0070, 0x007f, read8sm_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8sm_delegate(FUNC(wd7600_device::rtc_w), this), 0xffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8sm_delegate(FUNC(wd7600_device::dma_page_r), this), write8sm_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffff);
m_space_io->install_readwrite_handler(0x0092, 0x0093, read8smo_delegate(FUNC(wd7600_device::a20_reset_r), this), write8smo_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff);
m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0xffff);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff);
m_space_io->install_readwrite_handler(0x2072, 0x2073, read16_delegate(FUNC(wd7600_device::refresh_r), this), write16_delegate(FUNC(wd7600_device::refresh_w), this));
m_space_io->install_readwrite_handler(0x2872, 0x2873, read16_delegate(FUNC(wd7600_device::chipsel_r), this), write16_delegate(FUNC(wd7600_device::chipsel_w), this));
m_space_io->install_readwrite_handler(0x3872, 0x3873, read16_delegate(FUNC(wd7600_device::mem_ctrl_r), this), write16_delegate(FUNC(wd7600_device::mem_ctrl_w), this));
m_space_io->install_readwrite_handler(0x4872, 0x4873, read16_delegate(FUNC(wd7600_device::bank_01_start_r), this), write16_delegate(FUNC(wd7600_device::bank_01_start_w), this));
m_space_io->install_readwrite_handler(0x5072, 0x5073, read16_delegate(FUNC(wd7600_device::bank_23_start_r), this), write16_delegate(FUNC(wd7600_device::bank_23_start_w), this));
m_space_io->install_readwrite_handler(0x5872, 0x5873, read16_delegate(FUNC(wd7600_device::split_addr_r), this), write16_delegate(FUNC(wd7600_device::split_addr_w), this));
m_space_io->install_readwrite_handler(0x9872, 0x9873, read16_delegate(FUNC(wd7600_device::diag_r), this), write16_delegate(FUNC(wd7600_device::diag_w), this));
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff);
m_space_io->install_readwrite_handler(0x2072, 0x2073, read16smo_delegate(FUNC(wd7600_device::refresh_r), this), write16smo_delegate(FUNC(wd7600_device::refresh_w), this));
m_space_io->install_readwrite_handler(0x2872, 0x2873, read16smo_delegate(FUNC(wd7600_device::chipsel_r), this), write16smo_delegate(FUNC(wd7600_device::chipsel_w), this));
m_space_io->install_readwrite_handler(0x3872, 0x3873, read16smo_delegate(FUNC(wd7600_device::mem_ctrl_r), this), write16smo_delegate(FUNC(wd7600_device::mem_ctrl_w), this));
m_space_io->install_readwrite_handler(0x4872, 0x4873, read16s_delegate(FUNC(wd7600_device::bank_01_start_r), this), write16s_delegate(FUNC(wd7600_device::bank_01_start_w), this));
m_space_io->install_readwrite_handler(0x5072, 0x5073, read16s_delegate(FUNC(wd7600_device::bank_23_start_r), this), write16s_delegate(FUNC(wd7600_device::bank_23_start_w), this));
m_space_io->install_readwrite_handler(0x5872, 0x5873, read16smo_delegate(FUNC(wd7600_device::split_addr_r), this), write16smo_delegate(FUNC(wd7600_device::split_addr_w), this));
m_space_io->install_readwrite_handler(0x9872, 0x9873, read16smo_delegate(FUNC(wd7600_device::diag_r), this), write16smo_delegate(FUNC(wd7600_device::diag_w), this));
}
else
{
assert(m_space_io->data_width() == 32);
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0000, 0x000f, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0x0000ffff);
m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(wd7600_device::keyb_data_r), this), write8_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(wd7600_device::portb_r), this), write8_delegate(FUNC(wd7600_device::portb_w), this), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(wd7600_device::keyb_status_r), this), write8_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0070, 0x007f, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(wd7600_device::rtc_w), this), 0x0000ffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(wd7600_device::dma_page_r), this), write8_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffffffff);
m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(wd7600_device::a20_reset_r), this), write8_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(wd7600_device::keyb_data_r), this), write8smo_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(wd7600_device::portb_r), this), write8smo_delegate(FUNC(wd7600_device::portb_w), this), 0x0000ff00);
m_space_io->install_readwrite_handler(0x0064, 0x0067, read8smo_delegate(FUNC(wd7600_device::keyb_status_r), this), write8smo_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x000000ff);
m_space_io->install_readwrite_handler(0x0070, 0x007f, read8sm_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8sm_delegate(FUNC(wd7600_device::rtc_w), this), 0x0000ffff);
m_space_io->install_readwrite_handler(0x0080, 0x008f, read8sm_delegate(FUNC(wd7600_device::dma_page_r), this), write8sm_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffffffff);
m_space_io->install_readwrite_handler(0x0090, 0x0093, read8smo_delegate(FUNC(wd7600_device::a20_reset_r), this), write8smo_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0x0000ffff);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff00ff);
m_space_io->install_readwrite_handler(0x2070, 0x2073, read16_delegate(FUNC(wd7600_device::refresh_r), this), write16_delegate(FUNC(wd7600_device::refresh_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x2870, 0x2873, read16_delegate(FUNC(wd7600_device::chipsel_r), this), write16_delegate(FUNC(wd7600_device::chipsel_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x3870, 0x3873, read16_delegate(FUNC(wd7600_device::mem_ctrl_r), this), write16_delegate(FUNC(wd7600_device::mem_ctrl_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x4870, 0x4873, read16_delegate(FUNC(wd7600_device::bank_01_start_r), this), write16_delegate(FUNC(wd7600_device::bank_01_start_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x5070, 0x5073, read16_delegate(FUNC(wd7600_device::bank_23_start_r), this), write16_delegate(FUNC(wd7600_device::bank_23_start_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x5870, 0x5873, read16_delegate(FUNC(wd7600_device::split_addr_r), this), write16_delegate(FUNC(wd7600_device::split_addr_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x9870, 0x9873, read16_delegate(FUNC(wd7600_device::diag_r), this), write16_delegate(FUNC(wd7600_device::diag_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff00ff);
m_space_io->install_readwrite_handler(0x2070, 0x2073, read16smo_delegate(FUNC(wd7600_device::refresh_r), this), write16smo_delegate(FUNC(wd7600_device::refresh_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x2870, 0x2873, read16smo_delegate(FUNC(wd7600_device::chipsel_r), this), write16smo_delegate(FUNC(wd7600_device::chipsel_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x3870, 0x3873, read16smo_delegate(FUNC(wd7600_device::mem_ctrl_r), this), write16smo_delegate(FUNC(wd7600_device::mem_ctrl_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x4870, 0x4873, read16s_delegate(FUNC(wd7600_device::bank_01_start_r), this), write16s_delegate(FUNC(wd7600_device::bank_01_start_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x5070, 0x5073, read16s_delegate(FUNC(wd7600_device::bank_23_start_r), this), write16s_delegate(FUNC(wd7600_device::bank_23_start_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x5870, 0x5873, read16smo_delegate(FUNC(wd7600_device::split_addr_r), this), write16smo_delegate(FUNC(wd7600_device::split_addr_w), this), 0xffff0000);
m_space_io->install_readwrite_handler(0x9870, 0x9873, read16smo_delegate(FUNC(wd7600_device::diag_r), this), write16smo_delegate(FUNC(wd7600_device::diag_w), this), 0xffff0000);
}
}
@ -255,7 +255,7 @@ void wd7600_device::keyboard_gatea20(int state)
a20m();
}
WRITE8_MEMBER( wd7600_device::rtc_w )
void wd7600_device::rtc_w(offs_t offset, uint8_t data)
{
if (offset == 0)
{
@ -263,10 +263,10 @@ WRITE8_MEMBER( wd7600_device::rtc_w )
data &= 0x7f;
}
m_rtc->write(space, offset, data);
m_rtc->write(offset, data);
}
READ8_MEMBER( wd7600_device::pic1_slave_ack_r )
uint8_t wd7600_device::pic1_slave_ack_r(offs_t offset)
{
if (offset == 2) // IRQ 2
return m_pic2->acknowledge();
@ -288,36 +288,36 @@ WRITE_LINE_MEMBER( wd7600_device::ctc_out2_w )
}
// Keyboard
WRITE8_MEMBER( wd7600_device::keyb_data_w )
void wd7600_device::keyb_data_w(uint8_t data)
{
// LOG("WD7600: keyboard data write %02x\n", data);
m_keybc->data_w(space,0,data);
m_keybc->data_w(data);
}
READ8_MEMBER( wd7600_device::keyb_data_r )
uint8_t wd7600_device::keyb_data_r()
{
uint8_t ret = m_keybc->data_r(space,0);
uint8_t ret = m_keybc->data_r();
// LOG("WD7600: keyboard data read %02x\n", ret);
return ret;
}
WRITE8_MEMBER( wd7600_device::keyb_cmd_w )
void wd7600_device::keyb_cmd_w(uint8_t data)
{
// LOG("WD7600: keyboard command %02x\n", data);
m_keybc->command_w(space,0,data);
m_keybc->command_w(data);
}
READ8_MEMBER( wd7600_device::keyb_status_r )
uint8_t wd7600_device::keyb_status_r()
{
return m_keybc->status_r(space,0);
return m_keybc->status_r();
}
READ8_MEMBER( wd7600_device::portb_r )
uint8_t wd7600_device::portb_r()
{
return m_portb;
}
WRITE8_MEMBER( wd7600_device::portb_w )
void wd7600_device::portb_w(uint8_t data)
{
m_portb = (m_portb & 0xf0) | (data & 0x0f);
@ -352,7 +352,7 @@ offs_t wd7600_device::page_offset()
return 0xff0000;
}
READ8_MEMBER( wd7600_device::dma_read_byte )
uint8_t wd7600_device::dma_read_byte(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@ -360,7 +360,7 @@ READ8_MEMBER( wd7600_device::dma_read_byte )
return m_space->read_byte(page_offset() + offset);
}
WRITE8_MEMBER( wd7600_device::dma_write_byte )
void wd7600_device::dma_write_byte(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@ -368,7 +368,7 @@ WRITE8_MEMBER( wd7600_device::dma_write_byte )
m_space->write_byte(page_offset() + offset, data);
}
READ8_MEMBER( wd7600_device::dma_read_word )
uint8_t wd7600_device::dma_read_word(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@ -379,7 +379,7 @@ READ8_MEMBER( wd7600_device::dma_read_word )
return result;
}
WRITE8_MEMBER( wd7600_device::dma_write_word )
void wd7600_device::dma_write_word(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@ -440,7 +440,7 @@ WRITE_LINE_MEMBER( wd7600_device::kbrst_w )
m_kbrst = state;
}
WRITE8_MEMBER( wd7600_device::a20_reset_w )
void wd7600_device::a20_reset_w(uint8_t data)
{
m_alt_a20 = BIT(data,1);
a20m();
@ -453,7 +453,7 @@ WRITE8_MEMBER( wd7600_device::a20_reset_w )
}
}
READ8_MEMBER( wd7600_device::a20_reset_r )
uint8_t wd7600_device::a20_reset_r()
{
uint8_t ret = 0;
if(m_alt_a20)
@ -462,12 +462,12 @@ READ8_MEMBER( wd7600_device::a20_reset_r )
}
// port 0x2072 - Refresh Control, and serial/parallel port address select
READ16_MEMBER(wd7600_device::refresh_r)
uint16_t wd7600_device::refresh_r()
{
return m_refresh_ctrl;
}
WRITE16_MEMBER(wd7600_device::refresh_w)
void wd7600_device::refresh_w(uint16_t data)
{
// TODO: select serial/parallel I/O port location
m_refresh_ctrl = data;
@ -475,36 +475,36 @@ WRITE16_MEMBER(wd7600_device::refresh_w)
}
// port 0x2872 - chip select
READ16_MEMBER(wd7600_device::chipsel_r)
uint16_t wd7600_device::chipsel_r()
{
return m_chip_sel;
}
WRITE16_MEMBER(wd7600_device::chipsel_w)
void wd7600_device::chipsel_w(uint16_t data)
{
m_chip_sel = data;
LOG("WD7600: Chip Select write %04x\n", data);
}
// port 0x3872 - Memory Control
READ16_MEMBER(wd7600_device::mem_ctrl_r)
uint16_t wd7600_device::mem_ctrl_r()
{
return m_memory_ctrl;
}
WRITE16_MEMBER(wd7600_device::mem_ctrl_w)
void wd7600_device::mem_ctrl_w(uint16_t data)
{
m_memory_ctrl = data;
LOG("WD7600: Memory Control write %04x\n", data);
}
// port 0x4872 - Bank 0 and 1 start address
READ16_MEMBER(wd7600_device::bank_01_start_r)
uint16_t wd7600_device::bank_01_start_r(offs_t offset, uint16_t mem_mask)
{
return (m_bank_start[1] << 8) | m_bank_start[0];
}
WRITE16_MEMBER(wd7600_device::bank_01_start_w)
void wd7600_device::bank_01_start_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if(ACCESSING_BITS_0_7)
{
@ -519,12 +519,12 @@ WRITE16_MEMBER(wd7600_device::bank_01_start_w)
}
// port 0x5072 - Bank 2 and 3 start address
READ16_MEMBER(wd7600_device::bank_23_start_r)
uint16_t wd7600_device::bank_23_start_r(offs_t offset, uint16_t mem_mask)
{
return (m_bank_start[3] << 8) | m_bank_start[2];
}
WRITE16_MEMBER(wd7600_device::bank_23_start_w)
void wd7600_device::bank_23_start_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if(ACCESSING_BITS_0_7)
{
@ -539,24 +539,24 @@ WRITE16_MEMBER(wd7600_device::bank_23_start_w)
}
// port 0x5872 - split starting address (used for BIOS shadowing)
READ16_MEMBER(wd7600_device::split_addr_r)
uint16_t wd7600_device::split_addr_r()
{
return m_split_start;
}
WRITE16_MEMBER(wd7600_device::split_addr_w)
void wd7600_device::split_addr_w(uint16_t data)
{
m_split_start = data;
LOG("WD7600: Split start address write %04x\n", data);
}
// port 0x9872 - Diagnostic
READ16_MEMBER(wd7600_device::diag_r)
uint16_t wd7600_device::diag_r()
{
return m_diagnostic | 0xe080;
}
WRITE16_MEMBER(wd7600_device::diag_w)
void wd7600_device::diag_w(uint16_t data)
{
m_diagnostic = data;
LOG("WD7600: Diagnostic write %04x\n", data);

88
src/devices/machine/wd7600.h
View File

@ -75,20 +75,20 @@ public:
DECLARE_WRITE_LINE_MEMBER( gatea20_w );
DECLARE_WRITE_LINE_MEMBER( kbrst_w );
DECLARE_READ16_MEMBER(refresh_r);
DECLARE_WRITE16_MEMBER(refresh_w);
DECLARE_READ16_MEMBER(chipsel_r);
DECLARE_WRITE16_MEMBER(chipsel_w);
DECLARE_READ16_MEMBER(mem_ctrl_r);
DECLARE_WRITE16_MEMBER(mem_ctrl_w);
DECLARE_READ16_MEMBER(bank_01_start_r);
DECLARE_WRITE16_MEMBER(bank_01_start_w);
DECLARE_READ16_MEMBER(bank_23_start_r);
DECLARE_WRITE16_MEMBER(bank_23_start_w);
DECLARE_READ16_MEMBER(split_addr_r);
DECLARE_WRITE16_MEMBER(split_addr_w);
DECLARE_READ16_MEMBER(diag_r);
DECLARE_WRITE16_MEMBER(diag_w);
uint16_t refresh_r();
void refresh_w(uint16_t data);
uint16_t chipsel_r();
void chipsel_w(uint16_t data);
uint16_t mem_ctrl_r();
void mem_ctrl_w(uint16_t data);
uint16_t bank_01_start_r(offs_t offset, uint16_t mem_mask);
void bank_01_start_w(offs_t offset, uint16_t data, uint16_t mem_mask);
uint16_t bank_23_start_r(offs_t offset, uint16_t mem_mask);
void bank_23_start_w(offs_t offset, uint16_t data, uint16_t mem_mask);
uint16_t split_addr_r();
void split_addr_w(uint16_t data);
uint16_t diag_r();
void diag_w(uint16_t data);
IRQ_CALLBACK_MEMBER(intack_cb) { return m_pic1->acknowledge(); }
@ -101,39 +101,39 @@ protected:
private:
DECLARE_WRITE_LINE_MEMBER( pic1_int_w ) { m_write_intr(state); }
DECLARE_READ8_MEMBER( pic1_slave_ack_r );
uint8_t pic1_slave_ack_r(offs_t offset);
DECLARE_WRITE_LINE_MEMBER( ctc_out1_w );
DECLARE_WRITE_LINE_MEMBER( ctc_out2_w );
DECLARE_WRITE8_MEMBER( rtc_w );
DECLARE_WRITE8_MEMBER( keyb_cmd_w );
DECLARE_WRITE8_MEMBER( keyb_data_w );
DECLARE_READ8_MEMBER( keyb_data_r );
DECLARE_READ8_MEMBER( keyb_status_r );
DECLARE_WRITE8_MEMBER( a20_reset_w );
DECLARE_READ8_MEMBER( a20_reset_r );
DECLARE_READ8_MEMBER( portb_r );
DECLARE_WRITE8_MEMBER( portb_w );
DECLARE_WRITE8_MEMBER( dma_page_w ) { m_dma_page[offset & 0x0f] = data; }
DECLARE_READ8_MEMBER( dma_page_r ) { return m_dma_page[offset & 0x0f]; }
DECLARE_READ8_MEMBER( dma_read_byte );
DECLARE_WRITE8_MEMBER( dma_write_byte );
DECLARE_READ8_MEMBER( dma_read_word );
DECLARE_WRITE8_MEMBER( dma_write_word );
void rtc_w(offs_t offset, uint8_t data);
void keyb_cmd_w(uint8_t data);
void keyb_data_w(uint8_t data);
uint8_t keyb_data_r();
uint8_t keyb_status_r();
void a20_reset_w(uint8_t data);
uint8_t a20_reset_r();
uint8_t portb_r();
void portb_w(uint8_t data);
void dma_page_w(offs_t offset, uint8_t data) { m_dma_page[offset & 0x0f] = data; }
uint8_t dma_page_r(offs_t offset) { return m_dma_page[offset & 0x0f]; }
uint8_t dma_read_byte(offs_t offset);
void dma_write_byte(offs_t offset, uint8_t data);
uint8_t dma_read_word(offs_t offset);
void dma_write_word(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( dma1_eop_w );
DECLARE_READ8_MEMBER( dma1_ior0_r ) { return m_read_ior(0); }
DECLARE_READ8_MEMBER( dma1_ior1_r ) { return m_read_ior(1); }
DECLARE_READ8_MEMBER( dma1_ior2_r ) { return m_read_ior(2); }
DECLARE_READ8_MEMBER( dma1_ior3_r ) { return m_read_ior(3); }
DECLARE_READ8_MEMBER( dma2_ior1_r ) { uint16_t result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
DECLARE_READ8_MEMBER( dma2_ior2_r ) { uint16_t result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
DECLARE_READ8_MEMBER( dma2_ior3_r ) { uint16_t result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
DECLARE_WRITE8_MEMBER( dma1_iow0_w ) { m_write_iow(0, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow1_w ) { m_write_iow(1, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow2_w ) { m_write_iow(2, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma1_iow3_w ) { m_write_iow(3, data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow1_w ) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow2_w ) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE8_MEMBER( dma2_iow3_w ) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
uint8_t dma1_ior0_r() { return m_read_ior(0); }
uint8_t dma1_ior1_r() { return m_read_ior(1); }
uint8_t dma1_ior2_r() { return m_read_ior(2); }
uint8_t dma1_ior3_r() { return m_read_ior(3); }
uint8_t dma2_ior1_r() { uint16_t result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
uint8_t dma2_ior2_r() { uint16_t result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
uint8_t dma2_ior3_r() { uint16_t result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
void dma1_iow0_w(uint8_t data) { m_write_iow(0, data, 0xffff); }
void dma1_iow1_w(uint8_t data) { m_write_iow(1, data, 0xffff); }
void dma1_iow2_w(uint8_t data) { m_write_iow(2, data, 0xffff); }
void dma1_iow3_w(uint8_t data) { m_write_iow(3, data, 0xffff); }
void dma2_iow1_w(uint8_t data) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
void dma2_iow2_w(uint8_t data) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
void dma2_iow3_w(uint8_t data) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); }

4
src/mame/drivers/apc.cpp
View File

@ -416,12 +416,12 @@ CH3_EXA == 0X3E ; CH-3 extended address (W)
READ8_MEMBER(apc_state::apc_dma_r)
{
return m_dmac->read(space, bitswap<8>(offset,7,6,5,4,2,1,0,3), 0xff);
return m_dmac->read(bitswap<4>(offset,2,1,0,3));
}
WRITE8_MEMBER(apc_state::apc_dma_w)
{
m_dmac->write(space, bitswap<8>(offset,7,6,5,4,2,1,0,3), data, 0xff);
m_dmac->write(bitswap<4>(offset,2,1,0,3), data);
}
WRITE8_MEMBER(apc_state::apc_irq_ack_w)

6
src/mame/drivers/aristmk4.cpp
View File

@ -680,7 +680,7 @@ READ8_MEMBER(aristmk4_state::mkiv_pia_ina)
{
/* uncomment this code once RTC is fixed */
//return m_rtc->read(space,1);
//return m_rtc->read(1);
return 0; // OK for now, the aussie version has no RTC on the MB so this is valid.
}
@ -689,12 +689,12 @@ WRITE8_MEMBER(aristmk4_state::mkiv_pia_outa)
{
if(m_rtc_data_strobe)
{
m_rtc->write(space,1,data);
m_rtc->write(1,data);
//logerror("rtc protocol write data: %02X\n",data);
}
else
{
m_rtc->write(space,0,data);
m_rtc->write(0,data);
//logerror("rtc protocol write address: %02X\n",data);
}
}

4
src/mame/drivers/attache.cpp
View File

@ -771,12 +771,12 @@ WRITE8_MEMBER(attache_state::memmap_w)
READ8_MEMBER(attache_state::dma_mask_r)
{
return m_dma->read(space,0x0f);
return m_dma->read(0x0f);
}
WRITE8_MEMBER(attache_state::dma_mask_w)
{
m_dma->write(space,0x0f,data);
m_dma->write(0x0f,data);
}
READ8_MEMBER(attache_state::fdc_dma_r)

4
src/mame/drivers/bebox.cpp
View File

@ -28,8 +28,8 @@
#include "formats/pc_dsk.h"
#include "machine/8042kbdc.h"
READ8_MEMBER(bebox_state::at_dma8237_1_r) { return m_dma8237[1]->read(space, offset / 2); }
WRITE8_MEMBER(bebox_state::at_dma8237_1_w) { m_dma8237[1]->write(space, offset / 2, data); }
READ8_MEMBER(bebox_state::at_dma8237_1_r) { return m_dma8237[1]->read(offset / 2); }
WRITE8_MEMBER(bebox_state::at_dma8237_1_w) { m_dma8237[1]->write(offset / 2, data); }
void bebox_state::main_mem(address_map &map)
{

8
src/mame/drivers/hotstuff.cpp
View File

@ -88,11 +88,11 @@ void hotstuff_state::hotstuff_map(address_map &map)
map(0x600000, 0x600003).rw("scc1", FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w));
map(0x620000, 0x620003).rw("scc2", FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w));
map(0x680000, 0x680001).lrw8("rtc_rw",
[this](address_space &space, offs_t offset, u8 mem_mask) {
return m_rtc->read(space, offset^1, mem_mask);
[this](offs_t offset) {
return m_rtc->read(offset^1);
},
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
m_rtc->write(space, offset^1, data, mem_mask);
[this](offs_t offset, u8 data) {
m_rtc->write(offset^1, data);
});
map(0x980000, 0x9bffff).ram().share("bitmapram");

8
src/mame/drivers/interpro.cpp
View File

@ -532,11 +532,11 @@ void interpro_state::interpro_common_map(address_map &map)
map(0x7f000400, 0x7f00040f).rw(m_scc1, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0x000000ff);
map(0x7f000410, 0x7f00041f).rw(m_scc2, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0x000000ff);
map(0x7f000500, 0x7f000503).lrw8("rtc_rw",
[this](address_space &space, offs_t offset, u8 mem_mask) {
return m_rtc->read(space, offset^1, mem_mask);
[this](offs_t offset) {
return m_rtc->read(offset^1);
},
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
m_rtc->write(space, offset^1, data, mem_mask);
[this](offs_t offset, u8 data) {
m_rtc->write(offset^1, data);
}).umask32(0x000000ff);
map(0x7f000600, 0x7f000600).w(m_rtc, FUNC(mc146818_device::write));

8
src/mame/drivers/iris3130.cpp
View File

@ -186,7 +186,7 @@ READ16_MEMBER(sgi_ip2_state::sgi_ip2_swtch_r)
READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_r)
{
uint8_t ret = m_rtc->read(space, 1);
uint8_t ret = m_rtc->read(1);
verboselog(1, "sgi_ip2_clock_ctl_r: %02x\n", ret);
return ret;
}
@ -194,12 +194,12 @@ READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_r)
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_w)
{
verboselog(1, "sgi_ip2_clock_ctl_w: %02x\n", data);
m_rtc->write(space, 1, data);
m_rtc->write(1, data);
}
READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_r)
{
uint8_t ret = m_rtc->read(space, 0);
uint8_t ret = m_rtc->read(0);
verboselog(1, "sgi_ip2_clock_data_r: %02x\n", ret);
return ret;
}
@ -207,7 +207,7 @@ READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_r)
WRITE8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_w)
{
verboselog(1, "sgi_ip2_clock_data_w: %02x\n", data);
m_rtc->write(space, 0, data);
m_rtc->write(0, data);
}

4
src/mame/drivers/jazz.cpp
View File

@ -134,8 +134,8 @@ void jazz_state::jazz_common_map(address_map &map)
map(0x80002000, 0x8000200f).m(m_scsi, FUNC(ncr53c94_device::map));
map(0x80003000, 0x8000300f).m(m_fdc, FUNC(n82077aa_device::map));
map(0x80004000, 0x80004007).lrw8("rtc",
[this](address_space &space, offs_t offset) { return m_rtc->read(space, 1); },
[this](address_space &space, offs_t offset, u8 data) { m_rtc->write(space, 1, data); }).umask64(0xff);
[this](offs_t offset) { return m_rtc->read(1); },
[this](offs_t offset, u8 data) { m_rtc->write(1, data); }).umask64(0xff);
map(0x80005000, 0x80005007).rw(m_kbdc, FUNC(at_keyboard_controller_device::data_r), FUNC(at_keyboard_controller_device::data_w)).umask64(0x00ff);
map(0x80005000, 0x80005007).rw(m_kbdc, FUNC(at_keyboard_controller_device::status_r), FUNC(at_keyboard_controller_device::command_w)).umask64(0xff00);
map(0x80006000, 0x80006007).rw(m_ace[0], FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));

6
src/mame/drivers/micronic.cpp
View File

@ -200,17 +200,17 @@ WRITE8_MEMBER( micronic_state::port_2c_w )
WRITE8_MEMBER( micronic_state::rtc_address_w )
{
m_rtc->write(space, 0, data);
m_rtc->write(0, data);
}
READ8_MEMBER( micronic_state::rtc_data_r )
{
return m_rtc->read(space, 1);
return m_rtc->read(1);
}
WRITE8_MEMBER( micronic_state::rtc_data_w )
{
m_rtc->write(space, 1, data);
m_rtc->write(1, data);
}
/***************************************************************************

4
src/mame/drivers/mikromik.cpp
View File

@ -92,7 +92,7 @@ READ8_MEMBER( mm1_state::read )
switch ((offset >> 4) & 0x07)
{
case 0:
data = m_dmac->read(space, offset & 0x0f);
data = m_dmac->read(offset & 0x0f);
break;
case 1:
@ -161,7 +161,7 @@ WRITE8_MEMBER( mm1_state::write )
switch ((offset >> 4) & 0x07)
{
case 0:
m_dmac->write(space, offset & 0x0f, data);
m_dmac->write(offset & 0x0f, data);
break;
case 1:

6
src/mame/drivers/mips.cpp
View File

@ -333,10 +333,10 @@ void rx2030_state::iop_io_map(address_map &map)
map(0x0200, 0x0201).rw(m_fio, FUNC(z8038_device::fifo_r<1>), FUNC(z8038_device::fifo_w<1>)).umask16(0xff);
map(0x0202, 0x0203).rw(m_fio, FUNC(z8038_device::reg_r<1>), FUNC(z8038_device::reg_w<1>)).umask16(0xff);
map(0x0240, 0x0241).lw8("rtc", [this](address_space &space, offs_t offset, u8 data) { m_rtc->write(space, 0, data); }).umask16(0xff00);
map(0x0240, 0x0241).lw8("rtc", [this](u8 data) { m_rtc->write(0, data); }).umask16(0xff00);
map(0x0280, 0x0281).lrw8("rtc",
[this](address_space &space, offs_t offset) { return m_rtc->read(space, 1); },
[this](address_space &space, offs_t offset, u8 data) { m_rtc->write(space, 1, data); }).umask16(0xff00);
[this]() { return m_rtc->read(1); },
[this](u8 data) { m_rtc->write(1, data); }).umask16(0xff00);
map(0x02c0, 0x2c1).lw8("cpu_interface", [this](u8 data)
{

4
src/mame/drivers/ngen.cpp
View File

@ -307,7 +307,7 @@ WRITE16_MEMBER(ngen_state::peripheral_w)
case 0x0e:
case 0x0f:
if(ACCESSING_BITS_0_7)
m_dmac->write(space,offset,data & 0xff);
m_dmac->write(offset,data & 0xff);
break;
case 0x80: // DMA page offset?
case 0x81:
@ -381,7 +381,7 @@ READ16_MEMBER(ngen_state::peripheral_r)
case 0x0e:
case 0x0f:
if(ACCESSING_BITS_0_7)
ret = m_dmac->read(space,offset);
ret = m_dmac->read(offset);
logerror("DMA read offset %04x mask %04x returning %04x\n",offset,mem_mask,ret);
break;
case 0x80: // DMA page offset?

8
src/mame/drivers/octopus.cpp
View File

@ -524,9 +524,9 @@ READ8_MEMBER(octopus_state::rtc_r)
uint8_t ret = 0xff;
if(m_rtc_data)
ret = m_rtc->read(space,1);
ret = m_rtc->read(1);
else if(m_rtc_address)
ret = m_rtc->read(space,0);
ret = m_rtc->read(0);
return ret;
}
@ -534,9 +534,9 @@ READ8_MEMBER(octopus_state::rtc_r)
WRITE8_MEMBER(octopus_state::rtc_w)
{
if(m_rtc_data)
m_rtc->write(space,1,data);
m_rtc->write(1,data);
else if(m_rtc_address)
m_rtc->write(space,0,data);
m_rtc->write(0,data);
}
// RTC/FDC control - PPI port B

4
src/mame/drivers/pc1512.cpp
View File

@ -558,11 +558,11 @@ READ8_MEMBER( pc1640_state::io_r )
offs_t addr = offset & 0x3ff;
bool decoded = false;
if ( addr <= 0x00f) { data = m_dmac->read(space, offset & 0x0f); decoded = true; }
if ( addr <= 0x00f) { data = m_dmac->read(offset & 0x0f); decoded = true; }
else if (addr >= 0x020 && addr <= 0x021) { data = m_pic->read(offset & 0x01); decoded = true; }
else if (addr >= 0x040 && addr <= 0x043) { data = m_pit->read(offset & 0x03); decoded = true; }
else if (addr >= 0x060 && addr <= 0x06f) { data = system_r(space, offset & 0x0f); decoded = true; }
else if (addr >= 0x070 && addr <= 0x073) { data = m_rtc->read(space, offset & 0x01); decoded = true; }
else if (addr >= 0x070 && addr <= 0x073) { data = m_rtc->read(offset & 0x01); decoded = true; }
else if (addr >= 0x078 && addr <= 0x07f) { data = mouse_r(space, offset & 0x07); decoded = true; }
else if (addr >= 0x378 && addr <= 0x37b) { data = printer_r(space, offset & 0x03); decoded = true; }
else if (addr >= 0x3b0 && addr <= 0x3df) { decoded = true; }

16
src/mame/drivers/pcd.cpp
View File

@ -62,8 +62,6 @@ private:
DECLARE_READ8_MEMBER( nmi_io_r );
DECLARE_WRITE8_MEMBER( nmi_io_w );
DECLARE_READ8_MEMBER( rtc_r );
DECLARE_WRITE8_MEMBER( rtc_w );
DECLARE_READ8_MEMBER( stat_r );
DECLARE_WRITE8_MEMBER( stat_w );
DECLARE_READ8_MEMBER( led_r );
@ -178,18 +176,6 @@ WRITE8_MEMBER( pcd_state::nmi_io_w )
m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
READ8_MEMBER( pcd_state::rtc_r )
{
m_rtc->write(space, 0, offset);
return m_rtc->read(space, 1);
}
WRITE8_MEMBER( pcd_state::rtc_w )
{
m_rtc->write(space, 0, offset);
m_rtc->write(space, 1, data);
}
READ8_MEMBER( pcd_state::stat_r )
{
return m_stat;
@ -443,7 +429,7 @@ void pcd_state::pcd_io(address_map &map)
map(0xf820, 0xf821).rw(m_pic2, FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0xf840, 0xf840).rw(FUNC(pcd_state::stat_r), FUNC(pcd_state::stat_w));
map(0xf841, 0xf841).rw(FUNC(pcd_state::led_r), FUNC(pcd_state::led_w));
map(0xf880, 0xf8bf).rw(FUNC(pcd_state::rtc_r), FUNC(pcd_state::rtc_w));
map(0xf880, 0xf8bf).rw(m_rtc, FUNC(mc146818_device::read_direct), FUNC(mc146818_device::write_direct));
map(0xf900, 0xf903).rw(m_fdc, FUNC(wd2793_device::read), FUNC(wd2793_device::write));
map(0xf904, 0xf905).rw(FUNC(pcd_state::dskctl_r), FUNC(pcd_state::dskctl_w));
map(0xf940, 0xf943).rw(FUNC(pcd_state::scsi_r), FUNC(pcd_state::scsi_w));

4
src/mame/drivers/qx10.cpp
View File

@ -471,12 +471,12 @@ WRITE8_MEMBER(qx10_state::memory_write_byte)
WRITE8_MEMBER(qx10_state::mc146818_w)
{
m_rtc->write(space, !offset, data);
m_rtc->write(!offset, data);
}
READ8_MEMBER(qx10_state::mc146818_r)
{
return m_rtc->read(space, !offset);
return m_rtc->read(!offset);
}
WRITE_LINE_MEMBER(qx10_state::keyboard_irq)

4
src/mame/drivers/wicat.cpp
View File

@ -584,13 +584,13 @@ WRITE8_MEMBER( wicat_state::vram_w )
READ8_MEMBER(wicat_state::video_dma_r)
{
return m_videodma->read(space,offset/2);
return m_videodma->read(offset/2);
}
WRITE8_MEMBER(wicat_state::video_dma_w)
{
if(!(offset & 0x01))
m_videodma->write(space,offset/2,data);
m_videodma->write(offset/2,data);
}
READ8_MEMBER(wicat_state::video_uart0_r)

8
src/mame/machine/amstrad.cpp
View File

@ -2485,20 +2485,18 @@ BDIR BC1 |
/* PSG function selected */
void amstrad_state::update_psg()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
if(m_aleste_mode & 0x20) // RTC selected
{
switch(m_aleste_rtc_function)
{
case 0x02: // AS
m_rtc->write(space, 0,m_ppi_port_outputs[amstrad_ppi_PortA]);
m_rtc->write(0, m_ppi_port_outputs[amstrad_ppi_PortA]);
break;
case 0x04: // DS write
m_rtc->write(space, 1,m_ppi_port_outputs[amstrad_ppi_PortA]);
m_rtc->write(1, m_ppi_port_outputs[amstrad_ppi_PortA]);
break;
case 0x05: // DS read
m_ppi_port_inputs[amstrad_ppi_PortA] = m_rtc->read(space, 1);
m_ppi_port_inputs[amstrad_ppi_PortA] = m_rtc->read(1);
break;
}
return;

14
src/mame/machine/apollo.cpp
View File

@ -317,11 +317,11 @@ static uint8_t dn3000_dma_channel2 = 5; // 5 = memory dma channel
WRITE8_MEMBER(apollo_state::apollo_dma_1_w){
SLOG1(("apollo_dma_1_w: writing DMA Controller 1 at offset %02x = %02x", offset, data));
m_dma8237_1->write(space, offset, data);
m_dma8237_1->write(offset, data);
}
READ8_MEMBER(apollo_state::apollo_dma_1_r){
uint8_t data = m_dma8237_1->read(space, offset);
uint8_t data = m_dma8237_1->read(offset);
SLOG1(("apollo_dma_1_r: reading DMA Controller 1 at offset %02x = %02x", offset, data));
return data;
}
@ -332,7 +332,7 @@ READ8_MEMBER(apollo_state::apollo_dma_1_r){
WRITE8_MEMBER(apollo_state::apollo_dma_2_w){
SLOG1(("apollo_dma_2_w: writing DMA Controller 2 at offset %02x = %02x", offset/2, data));
m_dma8237_2->write(space, offset / 2, data);
m_dma8237_2->write(offset / 2, data);
}
READ8_MEMBER(apollo_state::apollo_dma_2_r){
@ -351,7 +351,7 @@ READ8_MEMBER(apollo_state::apollo_dma_2_r){
break;
}
}
uint8_t data = m_dma8237_2->read(space, offset / 2);
uint8_t data = m_dma8237_2->read(offset / 2);
SLOG1(("apollo_dma_2_r: reading DMA Controller 2 at offset %02x = %02x", offset/2, data));
return data;
}
@ -672,8 +672,7 @@ WRITE_LINE_MEMBER(apollo_state::apollo_ptm_irq_function)
WRITE8_MEMBER(apollo_state::apollo_rtc_w)
{
m_rtc->write(space, 0, offset);
m_rtc->write(space, 1, data);
m_rtc->write_direct(offset, data);
if (offset >= 0x0b && offset <= 0x0c)
{
SLOG2(("writing MC146818 at offset %02x = %02x", offset, data));
@ -683,8 +682,7 @@ WRITE8_MEMBER(apollo_state::apollo_rtc_w)
READ8_MEMBER(apollo_state::apollo_rtc_r)
{
uint8_t data;
m_rtc->write(space, 0, offset);
data = m_rtc->read(space, 1);
data = m_rtc->read_direct(offset);
if (offset >= 0x0b && offset <= 0x0c)
{
SLOG2(("reading MC146818 at offset %02x = %02x", offset, data));

4
src/mame/machine/at.cpp
View File

@ -369,10 +369,10 @@ WRITE8_MEMBER( at_mb_device::write_rtc )
m_nmi_enabled = BIT(data,7);
if (!m_nmi_enabled)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
m_mc146818->write(space,0,data);
m_mc146818->write(0,data);
}
else {
m_mc146818->write(space,offset,data);
m_mc146818->write(offset,data);
}
}

6
src/mame/machine/bbc.cpp
View File

@ -623,18 +623,18 @@ void bbc_state::mc146818_set(address_space &space)
{
if (m_latch->q1_r()) // WR
{
m_via_system_porta = m_rtc->read(space, 1);
m_via_system_porta = m_rtc->read(1);
}
else
{
m_rtc->write(space, 1, m_via_system_porta);
m_rtc->write(1, m_via_system_porta);
}
}
/* if address select is set then set the address in the 146818 */
if (m_mc146818_as)
{
m_rtc->write(space, 0, m_via_system_porta);
m_rtc->write(0, m_via_system_porta);
}
}
}

6
src/mame/machine/mbee.cpp
View File

@ -233,17 +233,17 @@ READ8_MEMBER( mbee_state::speed_high_r )
WRITE8_MEMBER( mbee_state::port04_w ) // address
{
m_rtc->write(space, 0, data);
m_rtc->write(0, data);
}
WRITE8_MEMBER( mbee_state::port06_w ) // write
{
m_rtc->write(space, 1, data);
m_rtc->write(1, data);
}
READ8_MEMBER( mbee_state::port07_r ) // read
{
return m_rtc->read(space, 1);
return m_rtc->read(1);
}
// See it work: Run mbeett, choose RTC in the config switches, run the F3 test, press Esc.

4
src/mame/machine/orion.cpp
View File

@ -198,7 +198,7 @@ READ8_MEMBER(orion_state::orionz80_floppy_rtc_r)
{
if ((offset >= 0x60) && (offset <= 0x6f))
{
return m_rtc->read(space,offset-0x60);
return m_rtc->read(offset-0x60);
}
else
{
@ -210,7 +210,7 @@ WRITE8_MEMBER(orion_state::orionz80_floppy_rtc_w)
{
if ((offset >= 0x60) && (offset <= 0x6f))
{
m_rtc->write(space,offset-0x60,data);
m_rtc->write(offset-0x60,data);
}
else
{