Cleanups and version bump

src/devices/bus/cpc/magicsound.c

@@ -187,4 +187,3 @@ void al_magicsound_device::set_timer_gate(bool state)
 	m_timer2->write_gate1(state);
 	m_timer2->write_gate2(state);
 }
-

src/devices/bus/lpci/vt82c505.c

@@ -94,4 +94,3 @@ void vt82c505_device::device_start()
 void vt82c505_device::device_reset()
 {
 }
-

src/devices/cpu/m68000/m68kops.c

@@ -34872,5 +34872,3 @@ void m68ki_build_opcode_table(void)
 /* ======================================================================== */
 /* ============================== END OF FILE ============================= */
 /* ======================================================================== */
-
-

src/devices/machine/vt82c496.c

@@ -223,4 +223,3 @@ void vt82c496_device::update_mem_e0(UINT8 data)
 	else
 		m_space->nop_write(0xf0000,0xfffff,0,0);
 }
-

src/devices/machine/vt82c496.h

@@ -58,4 +58,3 @@ extern const device_type VT82C496;
 
 
 #endif /* __VT82C496_H__ */
-

src/devices/machine/z80scc.c

@@ -264,7 +264,7 @@ void z80scc_device::device_reset()
 
 /*
  * Interrupts
-Each of the SCC’s two channels contain three sources of interrupts, making a total of six interrupt
+Each of the SCC's two channels contain three sources of interrupts, making a total of six interrupt
 sources. These three sources of interrupts are: 1) Receiver, 2) Transmitter, and 3) External/Status
 conditions. In addition, there are several conditions that may cause these interrupts.*/
 //-------------------------------------------------
@@ -772,7 +772,6 @@ void z80scc_channel::tra_callback()
 {
 	if (!(m_wr5 & WR5_TX_ENABLE))
 	{
-
 				LOG(("%" I64FMT "d %s() \"%s \"Channel %c transmit mark 1 m_wr5:%02x\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
 		// transmit mark
 		if (m_index == z80scc_device::CHANNEL_A)

src/mame/arcade.lst

@@ -32323,4 +32323,3 @@ dumpump
 3lilpigs
 
 wackygtr   // Wacky Gator
-

src/mame/drivers/segaxbd.c

@@ -330,7 +330,6 @@ void segaxbd_state::device_start()
 
 void segaxbd_state::device_reset()
 {
-
 	m_segaic16vid->tilemap_reset(*m_screen);
 
 	// hook the RESET line, which resets CPU #1
@@ -348,7 +347,6 @@ public:
 		: driver_device(mconfig, type, tag),
 		m_mainpcb(*this, "mainpcb")
 	{
-
 	}
 
 	required_device<segaxbd_state> m_mainpcb;

src/mame/includes/model2.h

@@ -280,7 +280,6 @@ struct triangle;
 
 class model2_renderer : public poly_manager<float, m2_poly_extra_data, 4, 4000>
 {
-    
 public:
 	typedef void (model2_renderer::*scanline_render_func)(INT32 scanline, const extent_t& extent, const m2_poly_extra_data& object, int threadid);
 

src/mame/includes/segaxbd.h

@@ -239,5 +239,3 @@ protected:
 //  virtual void device_start();
 //  virtual void device_reset();
 };
-
-

src/mame/video/galastrm.c

@@ -19,7 +19,6 @@ galastrm_renderer::galastrm_renderer(galastrm_state& state)
 	, m_state(state)
 	, m_screenbits(state.m_screen->width(), state.m_screen->height())
 {
-    
 }
 
 

src/mame/video/igs017_igs031.c

@@ -446,5 +446,3 @@ WRITE8_MEMBER(igs017_igs031_device::irq_enable_w)
 	if (data & (~1))
 		logerror("%s: irq_enable = %02x\n", machine().describe_context(), data);
 }
-
-

src/mame/video/midzeus2.c

@@ -76,7 +76,6 @@ midzeus2_renderer::midzeus2_renderer(midzeus2_state &state)
 	: poly_manager<float, mz2_poly_extra_data, 4, 10000>(state.machine())
 	, m_state(state)
 {
-    
 }
 
 

src/mess/drivers/force68k.c

@@ -1,5 +1,5 @@
-// license:BSD-3-Clause
-// copyright-holders:Joakim Larsson Edstr??m
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
 /***************************************************************************
  *
  *  Force SYS68K CPU-1/CPU-6 VME SBC drivers, initially based on the 68ksbc.c
@@ -326,7 +326,7 @@ READ16_MEMBER (force68k_state::bootvect_r){
  * systems. In addition to the bus arbiter, a separate slave bus
  * arbitration allows selection of the arbitration level (0-3).
  *
- * The address modifier range .,Short 110 Access« can be selected
+ * The address modifier range .,Short 110 Access can be selected
  * via a jumper for variable system generation. The 7 interrupt
  * request levels of the VMEbus are fully supported from the
  * SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be

src/mess/drivers/mzr8105.c

@@ -1,5 +1,5 @@
 // license:BSD-3-Clause
-// copyright-holders:Joakim Larsson Edstr??m
+// copyright-holders:Joakim Larsson Edstrom
 /***************************************************************************
  *
  *  Mizar VME8105 rev D 3U SBC driver, initially derived from force68k.c
@@ -84,7 +84,7 @@
  * " Mizar provides complete OS-9 solutions for the VMEbus. Mizar's VME CPUs
  * offer (he functions and performance your application demands. Our single
  * height (3U) VME processors are uniquely configurable computing engines,
- * Through Mizar's unique MXbus™ expansion interface, standard and custom side 
+ * Through Mizar's unique MXbus expansion interface, standard and custom side
  * modules can be added to basic processors to create double-height (6U) boards
  * tor specific applications, 3U CPU options include 68010, 66020, and 63030
  * microprocessors, up to one MB of DRAM, serial I/O, real-time clock, and
@@ -98,7 +98,7 @@
  * Mizar also supports OS-9 with completely configured OS9 development systems and
  * OS-9 application server systems. For more information, call Mizar today
  *
- * 800-635-0200 MIZAR 1419 Dunn Drive • CarrolHon, TX 75006 • 214-446-2664"
+ * 800-635-0200 MIZAR 1419 Dunn Drive  CarrolHon, TX 75006  214-446-2664"
  *
  * Known boards from Mizar:
  *

src/mess/drivers/squale.c

@@ -24,7 +24,7 @@
     Memory map
     ==========
 
-	Périphériques								Adresses
+    Periphiriques                               Adresses
     =========================================================
     EPROM                                       0xF100-0xFFFF
     Extension Port                              0xF080-0xF0FF

src/version.c

@@ -8,7 +8,7 @@
 
 ***************************************************************************/
 
-#define BARE_BUILD_VERSION "0.165"
+#define BARE_BUILD_VERSION "0.166"
 
 extern const char bare_build_version[];
 extern const char build_version[];