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qtsbc: Rewrite driver based on SBC-880 schematics
This commit is contained in:
AJR
parent
a652a4d686
commit
8e56666a88
@ -1,21 +1,18 @@
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// license:BSD-3-Clause
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// copyright-holders:Robbbert
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// copyright-holders:Robbbert, AJR
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/***************************************************************************
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QT Computer Systems SBC +2/4
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2009-12-11 Skeleton driver.
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This looks like the same system as the Compu/Time SBC-880 Processor Board.
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Currently it crashes. There's a memory move routine at 50A4, and after
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a few turns it is told to move E603 bytes which corrupts everything.
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Chips: P8251, D8253C, MK3880N-4 (Z80). 3x 6-sw dips. Unmarked crystal.
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Doesn't appear to be any ram?
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EPROM: D2716-2; RAM: 2x MM2114N-3L.
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There's a blue jumper marked 4M and 2M. Assumed to be selectable CPU clock.
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Also assumed this is what the "2/4" in the name refers to.
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A blue jumper marked 4M and 2M (between U11 and U12) selects the CPU clock.
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Feature list from QT ad:
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- 1K RAM (which can be located at any 1K boundary) plus one each
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@ -47,51 +44,409 @@ public:
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qtsbc_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_pit(*this, "pit")
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, m_usart(*this, "usart")
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, m_dsw(*this, "DSW%u", 1)
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, m_jumpers(*this, "JUMPERS")
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, m_cpu_speed(*this, "SPEED")
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, m_eprom(*this, "maincpu")
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, m_p_ram(*this, "ram")
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{ }
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DECLARE_READ8_MEMBER( qtsbc_43_r );
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void qtsbc(machine_config &config);
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void io_map(address_map &map);
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void mem_map(address_map &map);
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private:
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DECLARE_READ8_MEMBER(memory_read);
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DECLARE_WRITE8_MEMBER(memory_write);
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DECLARE_READ8_MEMBER(io_read);
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DECLARE_WRITE8_MEMBER(io_write);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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required_device<pit8253_device> m_pit;
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required_device<i8251_device> m_usart;
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required_ioport_array<3> m_dsw;
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required_ioport m_jumpers;
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required_ioport m_cpu_speed;
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required_region_ptr<u8> m_eprom;
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required_shared_ptr<u8> m_p_ram;
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bool m_power_on;
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};
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READ8_MEMBER( qtsbc_state::qtsbc_43_r )
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READ8_MEMBER(qtsbc_state::memory_read)
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{
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return 0; // this controls where the new ram program gets built at. 0 = 0xE000.
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ioport_value jumpers = m_jumpers->read();
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ioport_value dsw3 = m_dsw[2]->read();
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bool eprom_addressed = (offset & (BIT(jumpers, 2) ? 0xf800 : 0xfc00)) >> 10 == dsw3;
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if (eprom_addressed && !machine().side_effects_disabled())
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m_power_on = false;
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if ((m_power_on && !BIT(jumpers, 1)) || (eprom_addressed && !BIT(jumpers, 0)))
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{
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offset &= BIT(jumpers, 2) ? 0x07ff : 0x03ff;
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return m_eprom[offset];
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}
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#ifdef NOT_IMPLEMENTED_CURRENTLY
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else if ((offset & 0xfc00) >> 10 == m_dsw[1]->read())
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{
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offset &= 0x03ff;
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return m_ram[offset];
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}
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#endif
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else
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{
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if (offset == 0xe377)
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return 0x80;
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// TODO: S-100 bus
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return m_p_ram[offset];
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}
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}
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void qtsbc_state::mem_map(address_map &map)
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WRITE8_MEMBER(qtsbc_state::memory_write)
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{
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map.unmap_value_high();
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map(0x0000, 0xffff).ram().share("ram").region("maincpu", 0);
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#ifdef NOT_IMPLEMENTED_CURRENTLY
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if ((offset & 0xfc00) >> 10 == m_dsw[1]->read())
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{
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offset &= 0x03ff;
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m_ram[offset] = data;
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}
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else
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#endif
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{
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// TODO: S-100 bus
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m_p_ram[offset] = data;
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}
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}
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void qtsbc_state::io_map(address_map &map)
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READ8_MEMBER(qtsbc_state::io_read)
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{
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map.unmap_value_high();
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map.global_mask(0xff);
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map(0x00, 0x03).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write));
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map(0x06, 0x06).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
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map(0x07, 0x07).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
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map(0x43, 0x43).r(this, FUNC(qtsbc_state::qtsbc_43_r));
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if ((offset & 0xf8) >> 3 == (m_dsw[0]->read() & 0x1f))
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{
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switch (offset & 7)
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{
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case 0:
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case 1:
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case 2:
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case 3:
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default:
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return m_pit->read(space, offset & 3);
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case 4:
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case 5:
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// TODO: 8-bit parallel input port
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return 0xff;
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case 6:
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return m_usart->data_r(space, 0);
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case 7:
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return m_usart->status_r(space, 0);
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}
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}
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else
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{
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// TODO: S-100 bus (no address mirroring)
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logerror("Input from %04X\n", offset);
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// Ports 40 and 43 are for some sort of off-board RAM
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// Bit 0 of 43 is some sort of busy signal; bits 1-3 select some memory size factor
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if ((offset & 0xff) == 0x43)
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return 0x00;
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// Ports 08, 10 and 80 also used for read access
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return 0xff;
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}
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}
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WRITE8_MEMBER(qtsbc_state::io_write)
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{
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if ((offset & 0x00f8) >> 3 == (m_dsw[0]->read() & 0x1f))
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{
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switch (offset & 7)
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{
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case 0:
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case 1:
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case 2:
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case 3:
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default:
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m_pit->write(space, offset & 3, data);
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break;
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case 4:
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case 5:
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// TODO: 8-bit parallel output port
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break;
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case 6:
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m_usart->data_w(space, 0, data);
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break;
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case 7:
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m_usart->control_w(space, 0, data);
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break;
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}
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}
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else
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{
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// TODO: S-100 bus (no address mirroring)
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logerror("Output %02X to %04X\n", data, offset);
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}
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}
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ADDRESS_MAP_START(qtsbc_state::mem_map)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0xffff) AM_RAM AM_SHARE("ram")
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(memory_read, memory_write)
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ADDRESS_MAP_END
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ADDRESS_MAP_START(qtsbc_state::io_map)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(io_read, io_write)
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ADDRESS_MAP_END
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/* Input ports */
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static INPUT_PORTS_START( qtsbc )
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PORT_START("DSW1")
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PORT_DIPNAME(0x1f, 0x00, "On-Board I/O Ports") PORT_DIPLOCATION("SW1:1,2,3,4,5")
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PORT_DIPSETTING(0x00, "00-07")
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PORT_DIPSETTING(0x01, "08-0F")
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PORT_DIPSETTING(0x02, "10-17")
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PORT_DIPSETTING(0x03, "18-1F")
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PORT_DIPSETTING(0x04, "20-27")
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PORT_DIPSETTING(0x05, "28-2F")
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PORT_DIPSETTING(0x06, "30-37")
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PORT_DIPSETTING(0x07, "38-3F")
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PORT_DIPSETTING(0x08, "40-47")
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PORT_DIPSETTING(0x09, "48-4F")
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PORT_DIPSETTING(0x0a, "50-57")
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PORT_DIPSETTING(0x0b, "58-5F")
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PORT_DIPSETTING(0x0c, "60-67")
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PORT_DIPSETTING(0x0d, "68-6F")
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PORT_DIPSETTING(0x0e, "70-77")
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PORT_DIPSETTING(0x0f, "78-7F")
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PORT_DIPSETTING(0x10, "80-87")
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PORT_DIPSETTING(0x11, "88-8F")
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PORT_DIPSETTING(0x12, "90-87")
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PORT_DIPSETTING(0x13, "98-9F")
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PORT_DIPSETTING(0x14, "A0-A7")
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PORT_DIPSETTING(0x15, "A8-AF")
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PORT_DIPSETTING(0x16, "B0-B7")
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PORT_DIPSETTING(0x17, "B8-BF")
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PORT_DIPSETTING(0x18, "C0-C7")
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PORT_DIPSETTING(0x19, "C8-CF")
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PORT_DIPSETTING(0x1a, "D0-D7")
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PORT_DIPSETTING(0x1b, "D8-DF")
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PORT_DIPSETTING(0x1c, "E0-E7")
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PORT_DIPSETTING(0x1d, "E8-EF")
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PORT_DIPSETTING(0x1e, "F0-F7")
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PORT_DIPSETTING(0x1f, "F8-FF")
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PORT_DIPUNUSED(0x20, 0x20) PORT_DIPLOCATION("SW1:6")
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PORT_START("DSW2")
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PORT_DIPNAME(0x3f, 0x37, "On-Board RAM Address") PORT_DIPLOCATION("SW2:6,5,4,3,2,1")
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PORT_DIPSETTING(0x00, "0000-03FF")
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PORT_DIPSETTING(0x01, "0400-07FF")
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PORT_DIPSETTING(0x02, "0800-0BFF")
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PORT_DIPSETTING(0x03, "0C00-0FFF")
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PORT_DIPSETTING(0x04, "1000-13FF")
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PORT_DIPSETTING(0x05, "1400-17FF")
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PORT_DIPSETTING(0x06, "1800-1BFF")
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PORT_DIPSETTING(0x07, "1C00-1FFF")
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PORT_DIPSETTING(0x08, "2000-23FF")
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PORT_DIPSETTING(0x09, "2400-27FF")
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PORT_DIPSETTING(0x0a, "2800-2BFF")
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PORT_DIPSETTING(0x0b, "2C00-2FFF")
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PORT_DIPSETTING(0x0c, "3000-33FF")
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PORT_DIPSETTING(0x0d, "3400-37FF")
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PORT_DIPSETTING(0x0e, "3800-3BFF")
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PORT_DIPSETTING(0x0f, "3C00-3FFF")
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PORT_DIPSETTING(0x10, "4000-43FF")
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PORT_DIPSETTING(0x11, "4400-47FF")
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PORT_DIPSETTING(0x12, "4800-4BFF")
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PORT_DIPSETTING(0x13, "4C00-4FFF")
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PORT_DIPSETTING(0x14, "5000-53FF")
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PORT_DIPSETTING(0x15, "5400-57FF")
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PORT_DIPSETTING(0x16, "5800-5BFF")
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PORT_DIPSETTING(0x17, "5C00-5FFF")
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PORT_DIPSETTING(0x18, "6000-63FF")
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PORT_DIPSETTING(0x19, "6400-67FF")
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PORT_DIPSETTING(0x1a, "6800-6BFF")
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PORT_DIPSETTING(0x1b, "6C00-6FFF")
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PORT_DIPSETTING(0x1c, "7000-73FF")
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PORT_DIPSETTING(0x1d, "7400-77FF")
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PORT_DIPSETTING(0x1e, "7800-7BFF")
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PORT_DIPSETTING(0x1f, "7C00-7FFF")
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PORT_DIPSETTING(0x20, "8000-83FF")
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PORT_DIPSETTING(0x21, "8400-87FF")
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PORT_DIPSETTING(0x22, "8800-8BFF")
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PORT_DIPSETTING(0x23, "8C00-8FFF")
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PORT_DIPSETTING(0x24, "9000-93FF")
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PORT_DIPSETTING(0x25, "9400-97FF")
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PORT_DIPSETTING(0x26, "9800-9BFF")
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PORT_DIPSETTING(0x27, "9C00-9FFF")
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PORT_DIPSETTING(0x28, "A000-A3FF")
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PORT_DIPSETTING(0x29, "A400-A7FF")
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PORT_DIPSETTING(0x2a, "A800-ABFF")
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PORT_DIPSETTING(0x2b, "AC00-AFFF")
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PORT_DIPSETTING(0x2c, "B000-B3FF")
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PORT_DIPSETTING(0x2d, "B400-B7FF")
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PORT_DIPSETTING(0x2e, "B800-BBFF")
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PORT_DIPSETTING(0x2f, "BC00-BFFF")
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PORT_DIPSETTING(0x30, "C000-C3FF")
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PORT_DIPSETTING(0x31, "C400-C7FF")
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PORT_DIPSETTING(0x32, "C800-CBFF")
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PORT_DIPSETTING(0x33, "CC00-CFFF")
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PORT_DIPSETTING(0x34, "D000-D3FF")
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PORT_DIPSETTING(0x35, "D400-D7FF")
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PORT_DIPSETTING(0x36, "D800-DBFF")
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PORT_DIPSETTING(0x37, "DC00-DFFF")
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PORT_DIPSETTING(0x38, "E000-E3FF")
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PORT_DIPSETTING(0x39, "E400-E7FF")
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PORT_DIPSETTING(0x3a, "E800-EBFF")
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PORT_DIPSETTING(0x3b, "EC00-EFFF")
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PORT_DIPSETTING(0x3c, "F000-F3FF")
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PORT_DIPSETTING(0x3d, "F400-F7FF")
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PORT_DIPSETTING(0x3e, "F800-FBFF")
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PORT_DIPSETTING(0x3f, "FC00-FFFF")
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PORT_START("DSW3")
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PORT_DIPNAME(0x3f, 0x14, "On-Board EPROM Address") PORT_DIPLOCATION("SW3:6,5,4,3,2,1")
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PORT_DIPSETTING(0x00, "0000-03FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x01, "0400-07FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x02, "0800-0BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x03, "0C00-0FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x04, "1000-13FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x05, "1400-17FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x06, "1800-1BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x07, "1C00-1FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x08, "2000-23FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x09, "2400-27FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0a, "2800-2BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0b, "2C00-2FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0c, "3000-33FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0d, "3400-37FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0e, "3800-3BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x0f, "3C00-3FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x10, "4000-43FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x11, "4400-47FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x12, "4800-4BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x13, "4C00-4FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x14, "5000-53FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x15, "5400-57FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x16, "5800-5BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x17, "5C00-5FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x18, "6000-63FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x19, "6400-67FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1a, "6800-6BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1b, "6C00-6FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1c, "7000-73FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1d, "7400-77FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1e, "7800-7BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
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PORT_DIPSETTING(0x1f, "7C00-7FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x20, "8000-83FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x21, "8400-87FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x22, "8800-8BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x23, "8C00-8FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x24, "9000-93FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x25, "9400-97FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x26, "9800-9BFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x27, "9C00-9FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x28, "A000-A3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x29, "A400-A7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2a, "A800-ABFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2b, "AC00-AFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2c, "B000-B3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2d, "B400-B7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2e, "B800-BBFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x2f, "BC00-BFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x30, "C000-C3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x31, "C400-C7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x32, "C800-CBFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x33, "CC00-CFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x34, "D000-D3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x35, "D400-D7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x36, "D800-DBFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x37, "DC00-DFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x38, "E000-E3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x39, "E400-E7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3a, "E800-EBFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3b, "EC00-EFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3c, "F000-F3FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3d, "F400-F7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3e, "F800-FBFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x3f, "FC00-FFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x00, "0000-07FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x02, "0800-0FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x04, "1000-17FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x06, "1800-1FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x08, "2000-27FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x0a, "2800-2FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x0c, "3000-37FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x0e, "3800-3FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x10, "4000-47FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x12, "4800-4FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x14, "5000-57FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x16, "5800-5FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x18, "6000-67FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x1a, "6800-6FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x1c, "7000-77FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x1e, "7800-7FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x20, "8000-87FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x22, "8800-8FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x24, "9000-97FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x26, "9800-9FFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x28, "A000-A7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x2a, "A800-AFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x2c, "B000-B7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x2e, "B800-BFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x30, "C000-C7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x32, "C800-CFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x34, "D000-D7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x36, "D800-DFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x38, "E000-E7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x3a, "E800-EFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x3c, "F000-F7FF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
PORT_DIPSETTING(0x3e, "F800-FFFF") PORT_CONDITION("JUMPERS", 0x04, EQUALS, 0x04)
|
||||
|
||||
PORT_START("JUMPERS")
|
||||
PORT_DIPNAME(0x02, 0x00, "Power-On Jump") PORT_DIPLOCATION("T to U:1")
|
||||
PORT_DIPSETTING(0x02, DEF_STR(Off)) // T to U open
|
||||
PORT_DIPSETTING(0x00, DEF_STR(On)) // T to U shorted
|
||||
PORT_DIPNAME(0x01, 0x01, "EPROM Phantom Mode") PORT_DIPLOCATION("Q to R:1") PORT_CONDITION("JUMPERS", 0x02, EQUALS, 0x00)
|
||||
PORT_DIPSETTING(0x00, DEF_STR(Off)) // Q to R shorted
|
||||
PORT_DIPSETTING(0x01, DEF_STR(On)) // Q to R open
|
||||
PORT_DIPNAME(0x01, 0x00, "On-Board EPROM") PORT_DIPLOCATION("Q to R:1") PORT_CONDITION("JUMPERS", 0x02, EQUALS, 0x02)
|
||||
PORT_DIPSETTING(0x01, "Disabled") // Q to R open
|
||||
PORT_DIPSETTING(0x00, "Enabled") // Q to R shorted
|
||||
PORT_DIPNAME(0x04, 0x04, "On-Board EPROM Size") PORT_DIPLOCATION("P to O:1")
|
||||
PORT_DIPSETTING(0x00, "1K x 8 (2708)") // P to O shorted
|
||||
PORT_DIPSETTING(0x04, "2K x 8 (2716)") // P to O open
|
||||
|
||||
PORT_START("SPEED")
|
||||
PORT_CONFNAME(0x01, 0x01, "CPU Speed")
|
||||
PORT_CONFSETTING(0x00, "2 MHz")
|
||||
PORT_CONFSETTING(0x01, "4 MHz")
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
void qtsbc_state::machine_start()
|
||||
{
|
||||
subdevice<i8251_device>("usart")->write_cts(0);
|
||||
|
||||
save_item(NAME(m_power_on));
|
||||
}
|
||||
|
||||
void qtsbc_state::machine_reset()
|
||||
{
|
||||
uint8_t* bios = memregion("maincpu")->base()+0x10000;
|
||||
memcpy(m_p_ram, bios, 0x800);
|
||||
m_power_on = true;
|
||||
m_maincpu->set_unscaled_clock(BIT(m_cpu_speed->read(), 0) ? 4_MHz_XTAL : 4_MHz_XTAL / 2);
|
||||
}
|
||||
|
||||
static DEVICE_INPUT_DEFAULTS_START( terminal )
|
||||
@ -105,32 +460,34 @@ DEVICE_INPUT_DEFAULTS_END
|
||||
|
||||
MACHINE_CONFIG_START(qtsbc_state::qtsbc)
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu",Z80, XTAL(4'000'000)) // Mostek MK3880
|
||||
MCFG_CPU_ADD("maincpu", Z80, 4_MHz_XTAL) // Mostek MK3880
|
||||
MCFG_CPU_PROGRAM_MAP(mem_map)
|
||||
MCFG_CPU_IO_MAP(io_map)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD("pit", PIT8253, 0) // U9
|
||||
MCFG_PIT8253_CLK0(XTAL(4'000'000) / 2) /* Timer 0: baud rate gen for 8251 */
|
||||
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("uart", i8251_device, write_txc))
|
||||
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("uart", i8251_device, write_rxc))
|
||||
MCFG_PIT8253_CLK0(4_MHz_XTAL / 2) /* Timer 0: baud rate gen for 8251 */
|
||||
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("usart", i8251_device, write_txc))
|
||||
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("usart", i8251_device, write_rxc))
|
||||
MCFG_PIT8253_CLK1(4_MHz_XTAL / 2)
|
||||
MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit", pit8253_device, write_clk2))
|
||||
|
||||
MCFG_DEVICE_ADD("uart", I8251, 0) // U8
|
||||
MCFG_DEVICE_ADD("usart", I8251, 0) // U8
|
||||
MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
|
||||
MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
|
||||
MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
|
||||
|
||||
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
|
||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", i8251_device, write_rxd))
|
||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", i8251_device, write_dsr))
|
||||
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart", i8251_device, write_cts))
|
||||
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("usart", i8251_device, write_rxd))
|
||||
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("usart", i8251_device, write_dsr)) // actually from pin 11, "Reverse Channel Transmit"
|
||||
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
|
||||
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
|
||||
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) // must be exactly here
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( qtsbc )
|
||||
ROM_REGION( 0x10800, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "qtsbc.u23", 0x10000, 0x0800, CRC(823fd942) SHA1(64c4f74dd069ae4d43d301f5e279185f32a1efa0))
|
||||
ROM_REGION( 0x0800, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "qtsbc.u23", 0x0000, 0x0800, CRC(823fd942) SHA1(64c4f74dd069ae4d43d301f5e279185f32a1efa0))
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user