using delegates instead of read/write_device_func in ppc core (nw)

src/emu/cpu/powerpc/ppc.h

@@ -165,8 +165,6 @@ typedef void (*ppc4xx_spu_tx_handler)(device_t *device, UINT8 data);
 struct powerpc_config
 {
 	UINT32      bus_frequency;
-	read32_device_func  dcr_read_func;
-	write32_device_func dcr_write_func;
 };
 
 typedef void (*ppc_dcstore_handler)(device_t *device, UINT32 address);
@@ -188,7 +186,8 @@ void ppc4xx_spu_receive_byte(device_t *device, UINT8 byteval);
 void ppc_set_dcstore_callback(device_t *device, ppc_dcstore_handler handler);
 void ppc4xx_set_dma_read_handler(device_t *device, int channel, ppc4xx_dma_read_handler handler, int rate);
 void ppc4xx_set_dma_write_handler(device_t *device, int channel, ppc4xx_dma_write_handler handler, int rate);
-
+void ppc4xx_set_dcr_read_handler(device_t *device, read32_delegate dcr_read_func);
+void ppc4xx_set_dcr_write_handler(device_t *device, write32_delegate dcr_write_func);
 
 DECLARE_LEGACY_CPU_DEVICE(PPC403GA, ppc403ga);
 DECLARE_LEGACY_CPU_DEVICE(PPC403GCX, ppc403gcx);

src/emu/cpu/powerpc/ppccom.c

@@ -326,8 +326,8 @@ void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT32 cap, int tb_d
 	ppc->program = &device->space(AS_PROGRAM);
 	ppc->direct = &ppc->program->direct();
 	ppc->system_clock = (config != NULL) ? config->bus_frequency : device->clock();
-	ppc->dcr_read_func = (config != NULL) ? config->dcr_read_func : NULL;
+	ppc->dcr_read_func = read32_delegate();
-	ppc->dcr_write_func = (config != NULL) ? config->dcr_write_func : NULL;
+	ppc->dcr_write_func = write32_delegate();
 
 	ppc->tb_divisor = (ppc->tb_divisor * device->clock() + ppc->system_clock / 2 - 1) / ppc->system_clock;
 	ppc->codexor = 0;
@@ -1120,14 +1120,14 @@ void ppccom_execute_mfdcr(powerpc_state *ppc)
 	}
 
 	/* default handling */
-	if (!ppc->dcr_read_func) {
+	if (ppc->dcr_read_func.isnull()) {
 		mame_printf_debug("DCR %03X read\n", ppc->param0);
 		if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
 			ppc->param1 = ppc->dcr[ppc->param0];
 		else
 			ppc->param1 = 0;
 	} else {
-		ppc->param1 = ppc->dcr_read_func(ppc->device,*ppc->program,ppc->param0,0xffffffff);
+		ppc->param1 = ppc->dcr_read_func(*ppc->program,ppc->param0,0xffffffff);
 	}
 }
 
@@ -1212,12 +1212,12 @@ void ppccom_execute_mtdcr(powerpc_state *ppc)
 	}
 
 	/* default handling */
-	if (!ppc->dcr_write_func) {
+	if (ppc->dcr_write_func.isnull()) {
 		mame_printf_debug("DCR %03X write = %08X\n", ppc->param0, ppc->param1);
 		if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
 			ppc->dcr[ppc->param0] = ppc->param1;
 	} else {
-		ppc->dcr_write_func(ppc->device,*ppc->program,ppc->param0,ppc->param1,0xffffffff);
+		ppc->dcr_write_func(*ppc->program,ppc->param0,ppc->param1,0xffffffff);
 	}
 }
 
@@ -2488,6 +2488,26 @@ void ppc4xx_set_dma_write_handler(device_t *device, int channel, ppc4xx_dma_writ
 	ppc->buffered_dma_rate[channel] = rate;
 }
 
+/*-------------------------------------------------
+    ppc4xx_set_dcr_read_handler 
+-------------------------------------------------*/
+
+void ppc4xx_set_dcr_read_handler(device_t *device, read32_delegate dcr_read_func)
+{
+	powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(device)->token();
+	ppc->dcr_read_func = dcr_read_func;
+
+}
+
+/*-------------------------------------------------
+    ppc4xx_set_dcr_write_handler 
+-------------------------------------------------*/
+
+void ppc4xx_set_dcr_write_handler(device_t *device, write32_delegate dcr_write_func)
+{
+	powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(device)->token();
+	ppc->dcr_write_func = dcr_write_func;
+}
 
 /*-------------------------------------------------
     ppc4xx_set_info - PowerPC 4XX-specific

src/emu/cpu/powerpc/ppccom.h

@@ -566,8 +566,8 @@ struct powerpc_state
 	/* for use by specific implementations */
 	ppcimp_state *  impstate;
 
-	read32_device_func  dcr_read_func;
+	read32_delegate  dcr_read_func;
-	write32_device_func dcr_write_func;
+	write32_delegate dcr_write_func;
 
 	ppc_dcstore_handler dcstore_handler;
 

src/mame/drivers/cobra.c

@@ -3121,16 +3121,12 @@ INPUT_PORTS_END
 
 static powerpc_config main_ppc_cfg =
 {
-	XTAL_66_6667MHz,        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+	XTAL_66_6667MHz        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
-	NULL,
-	NULL
 };
 
 static powerpc_config gfx_ppc_cfg =
 {
-	XTAL_66_6667MHz,        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+	XTAL_66_6667MHz        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
-	NULL,
-	NULL
 };
 
 

src/mame/drivers/konamim2.c

@@ -1150,9 +1150,7 @@ INPUT_PORTS_END
 
 static const powerpc_config ppc602_config =
 {
-	33000000,           /* Multiplier 2, Bus = 33MHz, Core = 66MHz */
+	33000000           /* Multiplier 2, Bus = 33MHz, Core = 66MHz */
-	NULL,
-	NULL
 };
 
 INTERRUPT_GEN_MEMBER(konamim2_state::m2)

src/mame/drivers/model3.c

@@ -5403,25 +5403,19 @@ TIMER_DEVICE_CALLBACK_MEMBER(model3_state::model3_interrupt)
 static const powerpc_config model3_10 =
 {
 	/* 603e, Stretch, 1.3 */
-	66000000,       /* Multiplier 1, Bus = 66MHz, Core = 66MHz */
+	66000000       /* Multiplier 1, Bus = 66MHz, Core = 66MHz */
-	NULL,
-	NULL
 };
 
 static const powerpc_config model3_15 =
 {
 	/* 603e, Stretch, 1.3 */
-	66000000,       /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+	66000000       /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
-	NULL,
-	NULL
 };
 
 static const powerpc_config model3_2x =
 {
 	/* 603e-PID7t, Goldeneye, 2.1 */
-	66000000,       /* Multiplier 2.5, Bus = 66MHz, Core = 166MHz */
+	66000000       /* Multiplier 2.5, Bus = 66MHz, Core = 166MHz */
-	NULL,
-	NULL
 };
 
 static MACHINE_CONFIG_START( model3_10, model3_state )

src/mame/drivers/taitopjc.c

@@ -407,9 +407,7 @@ void taitopjc_state::machine_reset()
 
 static const powerpc_config ppc603e_config =
 {
-	XTAL_66_6667MHz,        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+	XTAL_66_6667MHz        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
-	NULL,
-	NULL
 };
 
 

src/mame/drivers/taitotz.c

@@ -2660,9 +2660,7 @@ WRITE_LINE_MEMBER(taitotz_state::ide_interrupt)
 
 static const powerpc_config ppc603e_config =
 {
-	XTAL_66_6667MHz,        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+	XTAL_66_6667MHz        /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
-	NULL,
-	NULL
 };
 
 

src/mame/drivers/viper.c

@@ -1988,9 +1988,7 @@ INPUT_PORTS_END
 
 static const powerpc_config viper_ppc_cfg =
 {
-	100000000,
+	100000000
-	NULL,
-	NULL
 };
 
 INTERRUPT_GEN_MEMBER(viper_state::viper_vblank)

src/mess/drivers/dm7000.c

@@ -256,6 +256,9 @@ void dm7000_state::machine_reset()
 	dcr[DCRSTB045_DISP_MODE] = 0x00880000;
 	dcr[DCRSTB045_FRAME_BUFR_BASE] = 0x0f000000;
 	m_scc0_lsr = UART_LSR_THRE | UART_LSR_TEMT;
+	
+	ppc4xx_set_dcr_read_handler(m_maincpu, read32_delegate(FUNC(dm7000_state::dcr_r),this));
+	ppc4xx_set_dcr_write_handler(m_maincpu, write32_delegate(FUNC(dm7000_state::dcr_w),this));
 }
 
 void dm7000_state::video_start()
@@ -267,26 +270,24 @@ UINT32 dm7000_state::screen_update_dm7000(screen_device &screen, bitmap_rgb32 &b
 	return 0;
 }
 
-static READ32_DEVICE_HANDLER( dcr_r )
+READ32_MEMBER( dm7000_state::dcr_r )
 {
-	dm7000_state *state = space.machine().driver_data<dm7000_state>();
 	mame_printf_debug("DCR %03X read\n", offset);
 	if(offset>=1024) {printf("get %04X\n", offset); return 0;} else
 	switch(offset) {
 		case DCRSTB045_CMD_STAT:
 			return 0; // assume that video dev is always ready
 		default:
-			return state->dcr[offset];
+			return dcr[offset];
 	}
 
 }
 
-static WRITE32_DEVICE_HANDLER( dcr_w )
+WRITE32_MEMBER( dm7000_state::dcr_w )
 {
 	mame_printf_debug("DCR %03X write = %08X\n", offset, data);
-	dm7000_state *state = space.machine().driver_data<dm7000_state>();
 	if(offset>=1024) {printf("get %04X\n", offset); } else
-	state->dcr[offset] = data;
+	dcr[offset] = data;
 }
 
 WRITE8_MEMBER( dm7000_state::kbd_put )
@@ -303,9 +304,7 @@ static GENERIC_TERMINAL_INTERFACE( terminal_intf )
 
 static const powerpc_config ppc405_config =
 {
-	252000000,
+	252000000
-	dcr_r,
-	dcr_w
 };
 
 static MACHINE_CONFIG_START( dm7000, dm7000_state )

src/mess/includes/dm7000.h

@@ -41,6 +41,11 @@ public:
 
 	DECLARE_WRITE16_MEMBER ( dm7000_enet_w );
 	DECLARE_READ16_MEMBER ( dm7000_enet_r );
+	
+	DECLARE_READ32_MEMBER( dcr_r );
+	DECLARE_WRITE32_MEMBER( dcr_w );
+	
+	
 	UINT16          m_enet_regs[32];
 
 	UINT32          dcr[1024];