Merge branch 'master' into hil_keyboard

This commit is contained in:
R. Belmont 2017-09-03 20:15:21 -04:00 committed by GitHub
commit 8f036e3398
270 changed files with 4570 additions and 2624 deletions

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@ -4,8 +4,8 @@
-->
<manifest xmlns:android="http://schemas.android.com/apk/res/android"
package="org.mamedev.mame"
android:versionCode="188"
android:versionName="0.188"
android:versionCode="189"
android:versionName="0.189"
android:installLocation="auto">
<!-- Android 5.0 -->

56
hash/apple2_cass.xml Normal file
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@ -0,0 +1,56 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="apple2_cass" description="Apple II cassettes">
<software name="clrdlbo">
<description>Color Demosoft / Little Brickout</description>
<year>1979</year>
<publisher>Apple Computer, Inc.</publisher>
<info name="usage" value="16K ]Load" />
<part name="cass1" interface="apple2_cass">
<feature name="part_id" value="Side A: Color Demosoft"/>
<dataarea name="cass" size="1391234">
<rom name="color demosoft (1979)(apple computer).wav" size="1391234" crc="2ba255a5" sha1="3b3340d96435a8e377e897ecbfa36aa0d901188d" offset="0" />
</dataarea>
</part>
<part name="cass2" interface="apple2_cass">
<feature name="part_id" value="Side B: Little Brickout"/>
<dataarea name="cass" size="3092524">
<rom name="little brickout (1979)(apple computer).wav" size="3092524" crc="8aa1ca88" sha1="a19b143204faeb88d61001f4f57ba4d4ca8939fd" offset="0" />
</dataarea>
</part>
</software>
<software name="karma">
<description>Lords of Karma</description>
<year>1980</year>
<publisher>Microcomputer Games</publisher>
<info name="usage" value="32K 0800.7FFFR 0800G" />
<part name="cass" interface="apple2_cass">
<dataarea name="cass" size="8095936">
<rom name="lords of karma (1980)(microcomputer games).wav" size="8095936" crc="295520d8" sha1="ddaf810d7c610da485620738a506fb0436319303" offset="0" />
</dataarea>
</part>
</software>
<software name="strtstw">
<description>Startrek / Starwars</description>
<year>1978</year>
<publisher>Apple Computer, Inc.</publisher>
<info name="usage" value="16K >Load" />
<part name="cass1" interface="apple2_cass">
<feature name="part_id" value="Side A: Startrek"/>
<dataarea name="cass" size="4134574">
<rom name="startrek (1978)(apple computer).wav" size="4134574" crc="7112bff5" sha1="279545abc5bf9b57dc79e7ea322df59b733803b0" offset="0" />
</dataarea>
</part>
<part name="cass2" interface="apple2_cass">
<feature name="part_id" value="Side B: Starwars"/>
<dataarea name="cass" size="2590032">
<rom name="starwars (1978)(apple computer).wav" size="2590032" crc="d2ea22a1" sha1="823ac3669a4b98fb7ca41f90db0d562c624d4904" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -428,15 +428,15 @@ Rumoured or Unreleased files: - 3D Raceway, Centipede, Fun with Math, Galaga, Ho
</part>
</software>
<software name="football">
<software name="football"> <!-- Actually 2 x 4KB chips (D2732) inside = 8KB dump - esiting 6KB dump was stripped of FFs -->
<description>American Football</description>
<year>1982</year>
<publisher>UA Ltd.</publisher>
<info name="alt_title" value="Football Américain" />
<part name="cart" interface="arcadia_cart">
<feature name="slot" value="std" />
<dataarea name="rom" size="6144">
<rom name="football.bin" size="6144" crc="22624414" sha1="359e938391b72742643c81228713fac804ff8244" offset="0000" />
<dataarea name="rom" size="8192">
<rom name="American Football.bin" size="8192" crc="b10a08b5" sha1="2feb388ce4a6163fe7856c0d34fa42a0720dd66c" offset="0000" />
</dataarea>
</part>
</software>

View File

@ -187,6 +187,28 @@ Missing dumps:
</part>
</software>
<software name="vwrit128">
<description>VizaWrite 128</description>
<year>1985</year>
<publisher>Viza</publisher>
<sharedfeat name="compatibility" value="NTSC,PAL"/>
<part name="cart" interface="c64_cart">
<feature name="game" value="1" />
<feature name="exrom" value="1" />
<dataarea name="romh" size="0x2000">
<rom name="vizawrite 128.bin" size="0x2000" crc="b4846e5d" sha1="ab250d5bd264faacffea68fd0791d9956e7282e8" offset="0" />
</dataarea>
</part>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="819200">
<rom name="vizawrite 128.d81" size="819200" crc="e0ea7b98" sha1="2b1acf1f3916883df9216b593e64a98b03e7b957" offset="0" />
</dataarea>
</part>
</software>
<software name="partn128">
<description>PARTNER 128</description>
<year>1985</year>

View File

@ -397,6 +397,12 @@
<rom name="hackem.bin" size="0x2000" crc="8edd53a5" sha1="ac1a159e27060aa1c95669eb510c3864032968e8" offset="0x2000" />
</dataarea>
</part>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="174848">
<rom name="fast_hackem_9.5a.d64" size="174848" crc="76fcbbee" sha1="e3e5e8563989e169b28bb1c568ac88b31e7a2f14" offset="0" />
</dataarea>
</part>
</software>
<software name="hugo">

70
hash/hp85_rom.xml Normal file
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@ -0,0 +1,70 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="hp85_rom" description="HP-85 Option ROMs">
<software name="service">
<description>Service ROM</description>
<year>198?</year>
<publisher>Hewlett-Packard</publisher>
<info name="serial" value="00085-60952"/>
<part name="rom" interface="hp80_rom">
<feature name="sc" value="0xe0"/>
<dataarea name="rom" size="0x2000">
<rom name="rom340.bin" size="0x2000" crc="41441333" sha1="6e166b7b0723da126021e2b2cd572660931e066d" offset="0"/>
</dataarea>
</part>
</software>
<software name="service_fix">
<description>Service ROM (fixed)</description>
<year>198?</year>
<publisher>Hewlett-Packard</publisher>
<info name="serial" value="00085-60952"/>
<part name="rom" interface="hp80_rom">
<feature name="sc" value="0xe0"/>
<dataarea name="rom" size="0x2000">
<rom name="rom340_fixed.bin" size="0x2000" crc="3ebdd60a" sha1="efa3d3cc9e593f6fe74b1189ea4c2dd0660ae698" offset="0"/>
</dataarea>
</part>
</software>
<software name="assembler">
<description>Assembler ROM</description>
<year>1980</year>
<publisher>Hewlett-Packard</publisher>
<info name="serial" value="00085-15007"/>
<part name="rom" interface="hp80_rom">
<feature name="sc" value="0x28"/>
<dataarea name="rom" size="0x2000">
<rom name="rom050.bin" size="0x2000" crc="9827cc3c" sha1="018d6a8df68a839b4e192da957f38a5db20f8bfc" offset="0"/>
</dataarea>
</part>
</software>
<software name="matrix">
<description>Matrix ROM</description>
<year>1979</year>
<publisher>Hewlett-Packard</publisher>
<info name="serial" value="00085-15004"/>
<part name="rom" interface="hp80_rom">
<feature name="sc" value="0xB0"/>
<dataarea name="rom" size="0x2000">
<rom name="rom260.bin" size="0x2000" crc="70f83074" sha1="3ef192ecff71b967ba747bea8df483e0596988b1" offset="0"/>
</dataarea>
</part>
</software>
<software name="io">
<description>I/O ROM</description>
<year>1979</year>
<publisher>Hewlett-Packard</publisher>
<info name="serial" value="00085-15003"/>
<part name="rom" interface="hp80_rom">
<feature name="sc" value="0xC0"/>
<dataarea name="rom" size="0x2000">
<rom name="rom300.bin" size="0x2000" crc="6f904a4c" sha1="6f90899fa983e2fd63088ce516c35d07e5942f2b" offset="0"/>
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -8295,6 +8295,40 @@ Missing files come here
</part>
</software>
<software name="wngcm2s1">
<description>Wing Commander II - Vengeance of the Kilrathi - Special Operations 1</description>
<year>1991</year>
<publisher>ORIGIN Systems</publisher>
<info name="developer" value="ORIGIN Systems" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="[PC] Wing Commander II - Special Operations 1 [3.5HD] [Disk 1 of 2].img" size="1474560" crc="2a537b5e" sha1="201a34be45a82a65e03f033df0d9ad1b8b41bf4d" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="[PC] Wing Commander II - Special Operations 1 [3.5HD] [Disk 2 of 2].img" size="1474560" crc="833fe124" sha1="7934340a15126e9b7b0f142550f2215ec15f4741" offset="0"/>
</dataarea>
</part>
</software>
<software name="wngcm2s2">
<description>Wing Commander II - Vengeance of the Kilrathi - Special Operations 2</description>
<year>1992</year>
<publisher>ORIGIN Systems</publisher>
<info name="developer" value="ORIGIN Systems" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="[PC] Wing Commander II - Special Operations 2 [3.5HD] [Disk 1 of 2].img" size="1474560" crc="cb0f1e69" sha1="1b95884866eb53a87b5f40dec266f64a509069c5" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="[PC] Wing Commander II - Special Operations 2 [3.5HD] [Disk 2 of 2].img" size="1474560" crc="92f07e68" sha1="8815ed73649d9713fa8213f28b729e065ded8fe8" offset="0"/>
</dataarea>
</part>
</software>
<software name="wordresc">
<description>Word Rescue</description>
<year>1992</year>

View File

@ -248,7 +248,7 @@ Known undumped prototypes:
</part>
</software>
<software name="cmines2bt" cloneof="cmines2">
<software name="cmines2bt" cloneof="cmines2">
<description>Crystal Mines II - Buried Treasure (Euro, USA)</description>
<year>2003</year>
<publisher>Songbird Productions</publisher>

View File

@ -4387,7 +4387,7 @@
NEO-MVS PROGBK1 / NEO-MVS CHA256B
-->
<software name="tws96">
<software name="twsoc96">
<description>Tecmo World Soccer '96</description>
<year>1996</year>
<publisher>Tecmo</publisher>

View File

@ -2184,7 +2184,7 @@
<publisher>Tokuma Shoten</publisher>
<info name="serial" value="TICD-3001"/>
<info name="release" value="19931210"/>
<info name="alt_title" value="秘密の花園 "/>
<info name="alt_title" value="秘密の花園"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -2200,7 +2200,7 @@
<publisher>NEC Avenue</publisher>
<info name="serial" value="NAPR-1027"/>
<info name="release" value="19930226"/>
<info name="alt_title" value="ホラーストーリー "/>
<info name="alt_title" value="ホラーストーリー"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -2291,7 +2291,7 @@
</software>
<software name="iganin">
<description>Iga Ninden Gaiou (SCD)(Jpn)</description>
<description>Iga Ninden Gaou (SCD)(Jpn)</description>
<year>1993</year>
<publisher>Nichibutsu</publisher>
<info name="serial" value="NBCD3003"/>
@ -2301,7 +2301,7 @@
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
<diskarea name="cdrom">
<disk name="iga ninden gaiou (scd)(jpn)" sha1="b2a975b5d609009bec8a89c5c91e42e2049c982f"/>
<disk name="iga ninden gaou (scd)(jpn)" sha1="b2a975b5d609009bec8a89c5c91e42e2049c982f"/>
</diskarea>
</part>
</software>
@ -2390,7 +2390,7 @@
<publisher>NEC Home Electronics</publisher>
<info name="serial" value="HECD4017"/>
<info name="release" value="19941223"/>
<info name="alt_title" value="Jリーグ トリメンダスサッカー'94 "/>
<info name="alt_title" value="Jリーグ トリメンダスサッカー'94"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -2566,7 +2566,7 @@
<publisher>Intec</publisher>
<info name="serial" value="IGCD3007"/>
<info name="release" value="19940128"/>
<info name="alt_title" value="格闘覇王伝説アルガノス "/>
<info name="alt_title" value="格闘覇王伝説アルガノス"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -2598,7 +2598,7 @@
<publisher>Naxat Soft</publisher>
<info name="serial" value="NXCD3025"/>
<info name="release" value="19940428"/>
<info name="alt_title" value="風霧 "/>
<info name="alt_title" value="風霧"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -2711,7 +2711,7 @@
<publisher>NEC Home Electronics</publisher>
<info name="serial" value="HECD5021"/>
<info name="release" value="19950526"/>
<info name="alt_title" value="機装ルーガII "/>
<info name="alt_title" value="機装ルーガII"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -3266,7 +3266,7 @@
<publisher>NCS</publisher>
<info name="serial" value="NSCD2011"/>
<info name="release" value="19920313"/>
<info name="alt_title" value="魔物ハンター妖子 ~魔界からの転校生~ "/>
<info name="alt_title" value="魔物ハンター妖子 ~魔界からの転校生~"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="cdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -3314,7 +3314,7 @@
<publisher>Kogado Studio</publisher>
<info name="serial" value="KSCD1001"/>
<info name="release" value="19910322"/>
<info name="alt_title" value="魔晶伝記 ラ・ヴァルー "/>
<info name="alt_title" value="魔晶伝記 ラ・ヴァルー"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="cdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -4079,7 +4079,7 @@
<publisher>Riverhill Software</publisher>
<info name="serial" value="RHCD1002"/>
<info name="release" value="19911108"/>
<info name="alt_title" value="プリンスオブペルシャ "/>
<info name="alt_title" value="プリンスオブペルシャ"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -4151,7 +4151,7 @@
<publisher>NEC Home Electronics</publisher>
<info name="serial" value="HECD5019"/>
<info name="release" value="19950811"/>
<info name="alt_title" value="プライベート アイドル "/>
<info name="alt_title" value="プライベート アイドル"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="scdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -6177,7 +6177,6 @@
<publisher>Sunsoft</publisher>
<info name="serial" value="SSCD0001"/>
<info name="release" value="19910322"/>
<info name="alt_title" value="ザ・キックボクシング"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="cdsys"/>
<part name="cdrom" interface="pce_cdrom">
@ -6877,7 +6876,7 @@
<publisher>Hudson</publisher>
<info name="serial" value="HCD0015"/>
<info name="release" value="19910322"/>
<info name="alt_title" value="イースIII "/>
<info name="alt_title" value="イースIII"/>
<info name="usage" value="CD-Rom System Card required" />
<sharedfeat name="requirement" value="cdsys"/>
<part name="cdrom" interface="pce_cdrom">

View File

@ -304,7 +304,7 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
</part>
</software>
<software name="poohcornsw" cloneof="poohcorn">
<software name="poohcornsw" cloneof="poohcorn">
<description>Ett År med Nalle Puh (Swe)</description>
<year>1995</year>
<publisher>Sega</publisher>
@ -436,7 +436,7 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
</part>
</software>
<software name="anpanwpk">
<software name="anpanwpk">
<description>Anpanman Pico Wakuwaku Pan Koujou (Jpn)</description>
<year>2001</year>
<publisher>Bandai</publisher>

View File

@ -8,7 +8,7 @@ msgstr ""
"Project-Id-Version: MAME\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2017-08-25 23:38+1000\n"
"PO-Revision-Date: 2017-08-20 17:39+0300\n"
"PO-Revision-Date: 2017-08-27 10:17+0300\n"
"Last-Translator: Mame.gr\n"
"Language-Team: MAME Language Team\n"
"Language: el\n"
@ -20,17 +20,17 @@ msgstr ""
#: src/frontend/mame/ui/auditmenu.cpp:96
#, c-format
msgid "Audit ROMs for %1$u machines marked unavailable?"
msgstr ""
msgstr "Έλεγχος ROMs για %1$u μηχανήματα που δεν είναι διαθέσιμα;"
#: src/frontend/mame/ui/auditmenu.cpp:99
#, c-format
msgid "Audit ROMs for all %1$u machines?"
msgstr ""
msgstr "Έλεγχος ROMs για όλα τα %1$u μηχανήματα;"
#: src/frontend/mame/ui/auditmenu.cpp:104
#, c-format
msgid "(results will be saved to %1$s)"
msgstr ""
msgstr "(τα αποτελέσματα θα αποθηκευτούν στο %1$s)"
#: src/frontend/mame/ui/auditmenu.cpp:130
#, c-format
@ -38,10 +38,12 @@ msgid ""
"Auditing ROMs for machine %2$u of %3$u...\n"
"%1$s"
msgstr ""
"Γίνεται έλεγχος ROMs για το μηχάνημα %2$u από %3$u...\n"
"%1$s"
#: src/frontend/mame/ui/auditmenu.cpp:142
msgid "Start Audit"
msgstr ""
msgstr "Έναρξή Ελέγχου"
#: src/frontend/mame/ui/imgcntrl.cpp:116
msgid "Cannot save over directory"
@ -835,12 +837,12 @@ msgstr "[Διαχείριση αρχείων]"
#: src/frontend/mame/ui/swlist.cpp:228
msgid "Switch Item Ordering"
msgstr "Εναλλαγή σειράς στοιχείων"
msgstr "Εναλλαγή Σειράς Στοιχείων"
#: src/frontend/mame/ui/swlist.cpp:259
#, c-format
msgid "Switched Order: entries now ordered by %s"
msgstr "Εναλλακτική σειρά: οι εγγραφές είναι ταξινομημένες κατά %s"
msgstr "Εναλλακτική Σειρά: οι εγγραφές είναι ταξινομημένες κατά %s"
#: src/frontend/mame/ui/swlist.cpp:259
msgid "shortname"
@ -908,7 +910,7 @@ msgstr "Ο Οδηγός είναι Κλώνος του\t%1$-.100s\n"
#: src/frontend/mame/ui/selgame.cpp:864
msgid "Driver is Parent\t\n"
msgstr "Ο Οδηγός είναι γονικός\t\n"
msgstr "Ο Οδηγός είναι Γονικός\t\n"
#: src/frontend/mame/ui/selgame.cpp:867
msgid "Analog Controls\tYes\n"
@ -924,7 +926,7 @@ msgstr "Συνολικά\tΔΕΝ ΛΕΙΤΟΥΡΓΕΙ\n"
#: src/frontend/mame/ui/selgame.cpp:874
msgid "Overall\tUnemulated Protection\n"
msgstr "Συνολικά\tΜη εξομοιωμένη προστασία\n"
msgstr "Συνολικά\tΜη Εξομοιωμένη Προστασία\n"
#: src/frontend/mame/ui/selgame.cpp:876
msgid "Overall\tWorking\n"
@ -936,11 +938,11 @@ msgstr "Γραφικά\tΜη υλοποιημένα\n"
#: src/frontend/mame/ui/selgame.cpp:881
msgid "Graphics\tWrong Colors\n"
msgstr ""
msgstr "Γραφικά\tΛάθος Χρώματα\n"
#: src/frontend/mame/ui/selgame.cpp:883
msgid "Graphics\tImperfect Colors\n"
msgstr "Γραφικά\tΑτελή χρώματα\n"
msgstr "Γραφικά\tΑτελή Χρώματα\n"
#: src/frontend/mame/ui/selgame.cpp:885
msgid "Graphics\tImperfect\n"
@ -1184,7 +1186,7 @@ msgstr "Προσόψεις"
#: src/frontend/mame/ui/videoopt.cpp:220
msgid "CPanels"
msgstr "CPanels"
msgstr "Πίνακες Ελέγχου"
#: src/frontend/mame/ui/videoopt.cpp:228
msgid "View"
@ -1304,7 +1306,7 @@ msgstr "Διαχείριση Αρχείων"
#: src/frontend/mame/ui/mainmenu.cpp:96
msgid "Tape Control"
msgstr "Έλεγχος Κασσέτας"
msgstr "Έλεγχος Κασέτας"
#: src/frontend/mame/ui/mainmenu.cpp:102
msgid "BIOS Selection"

File diff suppressed because it is too large Load Diff

View File

@ -1114,17 +1114,17 @@ msgstr ""
#: src/frontend/mame/ui/selgame.cpp:1171
#, c-format
msgid "%1$s %2$s ( %3$d / %4$d machines (%5$d BIOS) )"
msgstr ""
msgstr "%1$s %2$s ( %3$d / %4$d систем (%5$d BIOS) )"
#: src/frontend/mame/ui/selgame.cpp:1187 src/frontend/mame/ui/selsoft.cpp:555
#, c-format
msgid "%1$s: %2$s - Search: %3$s_"
msgstr ""
msgstr "%1$s: %2$s - Поиск: %3$s_"
#: src/frontend/mame/ui/selgame.cpp:1189 src/frontend/mame/ui/selsoft.cpp:557
#, c-format
msgid "Search: %1$s_"
msgstr ""
msgstr "Поиск: %1$s_"
#: src/frontend/mame/ui/selgame.cpp:1199
#, c-format
@ -1330,7 +1330,7 @@ msgstr "Читы"
#: src/frontend/mame/ui/mainmenu.cpp:135
msgid "Plugin Options"
msgstr ""
msgstr "Настройки плагинов"
#: src/frontend/mame/ui/mainmenu.cpp:139
msgid "External DAT View"
@ -1805,11 +1805,11 @@ msgstr ""
#: src/frontend/mame/ui/selmenu.cpp:1995
msgid "Images"
msgstr ""
msgstr "Изображения"
#: src/frontend/mame/ui/selmenu.cpp:1996
msgid "Infos"
msgstr ""
msgstr "Информация"
#: src/frontend/mame/ui/selmenu.cpp:2416 src/frontend/mame/ui/miscmenu.cpp:831
msgid " (default)"

View File

@ -938,7 +938,7 @@ msgstr "Gráficos\tNo implementados\n"
#: src/frontend/mame/ui/selgame.cpp:881
msgid "Graphics\tWrong Colors\n"
msgstr ""
msgstr "Gráficos\tColores erróneos\n"
#: src/frontend/mame/ui/selgame.cpp:883
msgid "Graphics\tImperfect Colors\n"

View File

@ -638,7 +638,7 @@ msgstr "Återställ"
#: src/frontend/mame/ui/utils.cpp:57 src/frontend/mame/ui/utils.cpp:81
msgid "Unfiltered"
msgstr "Ofilrerat"
msgstr "Ofiltrerat"
#: src/frontend/mame/ui/utils.cpp:58 src/frontend/mame/ui/utils.cpp:82
msgid "Available"

View File

@ -1,5 +1,5 @@
# Turkish translations for PACKAGE package
# PACKAGE paketi i輅n T<>k軻 軻viriler.
# PACKAGE paketi için Türkçe çeviriler.
# Copyright (C) 2016 THE PACKAGE'S COPYRIGHT HOLDER
# This file is distributed under the same license as the PACKAGE package.
# Automatically generated, 2016.
@ -31,7 +31,7 @@ msgstr ""
#: src/frontend/mame/ui/auditmenu.cpp:104
#, c-format
msgid "(results will be saved to %1$s)"
msgstr ""
msgstr "(sonuçlar %1$s 'a kaydedilecek)"
#: src/frontend/mame/ui/auditmenu.cpp:130
#, c-format
@ -42,7 +42,7 @@ msgstr ""
#: src/frontend/mame/ui/auditmenu.cpp:142
msgid "Start Audit"
msgstr ""
msgstr "Denetlemeyi Başlat"
#: src/frontend/mame/ui/imgcntrl.cpp:116
msgid "Cannot save over directory"
@ -61,23 +61,23 @@ msgstr ""
#: src/frontend/mame/ui/filesel.cpp:261
msgid "[create]"
msgstr ""
msgstr "[oluştur]"
#: src/frontend/mame/ui/filesel.cpp:265 src/frontend/mame/ui/swlist.cpp:94
msgid "[software list]"
msgstr ""
msgstr "[yazılım listesi]"
#: src/frontend/mame/ui/filesel.cpp:525
msgid "Select access mode"
msgstr ""
msgstr "Erişim tipini seçin"
#: src/frontend/mame/ui/filesel.cpp:526
msgid "Read-only"
msgstr ""
msgstr "Salt-okunur"
#: src/frontend/mame/ui/filesel.cpp:528
msgid "Read-write"
msgstr ""
msgstr "Salt-yazılır"
#: src/frontend/mame/ui/filesel.cpp:529
msgid "Read this image, write to another image"
@ -89,7 +89,7 @@ msgstr ""
#: src/frontend/mame/ui/dirmenu.cpp:35
msgid "ROMs"
msgstr ""
msgstr "ROMlar"
#: src/frontend/mame/ui/dirmenu.cpp:36
msgid "Software Media"
@ -101,7 +101,7 @@ msgstr ""
#: src/frontend/mame/ui/dirmenu.cpp:38 src/frontend/mame/ui/custui.cpp:157
msgid "Language"
msgstr ""
msgstr "Dil"
#: src/frontend/mame/ui/dirmenu.cpp:39
msgid "Samples"
@ -109,27 +109,27 @@ msgstr ""
#: src/frontend/mame/ui/dirmenu.cpp:40
msgid "DATs"
msgstr ""
msgstr "DATlar"
#: src/frontend/mame/ui/dirmenu.cpp:41
msgid "INIs"
msgstr ""
msgstr "INIler"
#: src/frontend/mame/ui/dirmenu.cpp:42
msgid "Category INIs"
msgstr ""
msgstr "Kategori INIleri"
#: src/frontend/mame/ui/dirmenu.cpp:43
msgid "Icons"
msgstr ""
msgstr "Simgeler"
#: src/frontend/mame/ui/dirmenu.cpp:44 src/frontend/mame/ui/submenu.cpp:25
msgid "Cheats"
msgstr ""
msgstr "Hileler"
#: src/frontend/mame/ui/dirmenu.cpp:45 src/frontend/mame/ui/selmenu.cpp:49
msgid "Snapshots"
msgstr ""
msgstr "Ekran Görüntüleri"
#: src/frontend/mame/ui/dirmenu.cpp:46 src/frontend/mame/ui/selmenu.cpp:50
msgid "Cabinets"

View File

@ -1546,14 +1546,14 @@ endif
ifeq (posix,$(SHELLTYPE))
$(GENDIR)/version.cpp: $(GENDIR)/git_desc | $(GEN_FOLDERS)
@echo '#define BARE_BUILD_VERSION "0.188"' > $@
@echo '#define BARE_BUILD_VERSION "0.189"' > $@
@echo 'extern const char bare_build_version[];' >> $@
@echo 'extern const char build_version[];' >> $@
@echo 'const char bare_build_version[] = BARE_BUILD_VERSION;' >> $@
@echo 'const char build_version[] = BARE_BUILD_VERSION " ($(NEW_GIT_VERSION))";' >> $@
else
$(GENDIR)/version.cpp: $(GENDIR)/git_desc
@echo #define BARE_BUILD_VERSION "0.188" > $@
@echo #define BARE_BUILD_VERSION "0.189" > $@
@echo extern const char bare_build_version[]; >> $@
@echo extern const char build_version[]; >> $@
@echo const char bare_build_version[] = BARE_BUILD_VERSION; >> $@

View File

@ -20,6 +20,8 @@ function lfs.env_replace(str)
end
return str
end
_G._ = emu.lang_translate
local dir = lfs.env_replace(manager:options().entries.pluginspath:value())
package.path = dir .. "/?.lua;" .. dir .. "/?/init.lua"

View File

@ -616,7 +616,7 @@ function cheat.startplugin()
param.index = param.index - 1
param_calc(param)
cheat.cheat_env.param = param.value
if not is_oneshot() then
if not is_oneshot(cheat) then
run_if(cheat, cheat.script.change)
end
return true
@ -680,7 +680,7 @@ function cheat.startplugin()
end,
function()
return menu_populate()
end, "Cheat")
end, _("Cheat"))
emu.register_start(function()
if not stop then

View File

@ -1731,6 +1731,8 @@ if (BUSES["A2BUS"]~=null) then
MAME_DIR .. "src/devices/bus/a2bus/agat7langcard.h",
MAME_DIR .. "src/devices/bus/a2bus/agat7ram.cpp",
MAME_DIR .. "src/devices/bus/a2bus/agat7ram.h",
MAME_DIR .. "src/devices/bus/a2bus/ssprite.cpp",
MAME_DIR .. "src/devices/bus/a2bus/ssprite.h",
}
end
@ -3088,6 +3090,17 @@ if (BUSES["HP_OPTROM"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/bus/hp80_optroms/hp80_optrom.h,BUSES["HP80_OPTROM"] = true
---------------------------------------------------
if (BUSES["HP80_OPTROM"]~=null) then
files {
MAME_DIR .. "src/devices/bus/hp80_optroms/hp80_optrom.cpp",
}
end
---------------------------------------------------
--
--@src/devices/bus/hp9845_io/hp9845_io.h,BUSES["HP9845_IO"] = true

View File

@ -678,6 +678,7 @@ BUSES["IQ151"] = true
BUSES["ISA"] = true
BUSES["ISBX"] = true
BUSES["HP_OPTROM"] = true
BUSES["HP80_OPTROM"] = true
BUSES["HP9845_IO"] = true
BUSES["KC"] = true
BUSES["LPCI"] = true
@ -2465,6 +2466,8 @@ files {
MAME_DIR .. "src/mame/includes/gba.h",
MAME_DIR .. "src/mame/drivers/n64.cpp",
MAME_DIR .. "src/mame/includes/n64.h",
MAME_DIR .. "src/mame/drivers/nds.cpp",
MAME_DIR .. "src/mame/includes/nds.h",
MAME_DIR .. "src/mame/drivers/nes.cpp",
MAME_DIR .. "src/mame/includes/nes.h",
MAME_DIR .. "src/mame/machine/nes.cpp",

View File

@ -110,10 +110,12 @@ void a2bus_arcboard_device::write_c0nx(address_space &space, uint8_t offset, uin
{
switch (offset)
{
case 0:
case 2:
m_tms->vram_write(space, 0, data);
break;
case 1:
case 3:
m_tms->register_write(space, 0, data);
break;

View File

@ -145,7 +145,8 @@ MACHINE_CONFIG_MEMBER( a2bus_pcxporter_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(a2bus_pcxporter_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(a2bus_pcxporter_device, pc_dack3_w))
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("v30", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("v30", 0))
MCFG_DEVICE_ADD("isa", ISA8, 0)
MCFG_ISA8_CPU("^v30")

View File

@ -0,0 +1,151 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, Golden Child
/*********************************************************************
ssprite.cpp
Implementation of the Synetix SuperSprite
*********************************************************************/
#include "emu.h"
#include "ssprite.h"
#include "sound/tms5220.h"
#include "speaker.h"
/***************************************************************************
PARAMETERS
***************************************************************************/
#define TMS_TAG "ssprite_tms"
#define TMS5220_TAG "ssprite_tms5220"
#define AY_TAG "ssprite_ay"
#define SCREEN_TAG "screen"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
DEFINE_DEVICE_TYPE(A2BUS_SSPRITE, a2bus_ssprite_device, "a2ssprite", "Synetix SuperSprite")
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( a2bus_ssprite_device::device_add_mconfig )
MCFG_DEVICE_ADD( TMS_TAG, TMS9918A, XTAL_10_738635MHz / 2 )
MCFG_TMS9928A_VRAM_SIZE(0x4000) // 16k of VRAM
MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(a2bus_ssprite_device, tms_irq_w))
MCFG_TMS9928A_SCREEN_ADD_NTSC( SCREEN_TAG )
MCFG_SCREEN_UPDATE_DEVICE( TMS_TAG, tms9918a_device, screen_update )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(AY_TAG, AY8912, 1022727)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MCFG_SOUND_ADD(TMS5220_TAG, TMS5220, 640000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
a2bus_ssprite_device::a2bus_ssprite_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
a2bus_ssprite_device(mconfig, A2BUS_SSPRITE, tag, owner, clock)
{
}
a2bus_ssprite_device::a2bus_ssprite_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
device_a2bus_card_interface(mconfig, *this),
m_tms(*this, TMS_TAG),
m_ay(*this, AY_TAG),
m_tms5220(*this, TMS5220_TAG)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void a2bus_ssprite_device::device_start()
{
// set_a2bus_device makes m_slot valid
set_a2bus_device();
}
void a2bus_ssprite_device::device_reset()
{
}
/*
C0nx map: (info from Synetix SuperSprite Owners manual.pdf page 33 of 266)
0 - TMS9918 VDP vram read/write
1 - TMS9918 VDP register write
2 - TMS5220 Speech read/write
3 - Video Switch APPLE VIDEO IN OFF
4 - Video Switch APPLE VIDEO IN ON
5 - Video Switch APPLE ONLY OUT
6 - Video Switch MIX VDP/EXTERNAL VIDEO
7 - TMS 9918 WRITE ONLY/FRAME RESET
C - AY Sound data write
D - AY Sound data write
E - AY Sound register write or data read
F - AY Sound register write or data read
*/
uint8_t a2bus_ssprite_device::read_c0nx(address_space &space, uint8_t offset)
{
switch (offset)
{
case 0:
return m_tms->vram_read(space, 0);
case 1:
return m_tms->register_read(space, 0);
case 2:
return 0x1f | m_tms5220->status_r(space, 0); // copied this line from a2echoii.cpp
case 14:
case 15:
return m_ay->data_r(space, 0);
}
return 0xff;
}
void a2bus_ssprite_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data)
{
switch (offset)
{
case 0:
m_tms->vram_write(space, 0, data);
break;
case 1:
m_tms->register_write(space, 0, data);
break;
case 2:
m_tms5220->data_w(space, offset, data);
break;
case 12:
case 13:
m_ay->data_w(space, 0, data);
break;
case 14:
case 15:
m_ay->address_w(space, 0, data);
break;
}
}
WRITE_LINE_MEMBER( a2bus_ssprite_device::tms_irq_w )
{
if (state)
{
raise_slot_irq();
}
else
{
lower_slot_irq();
}
}

View File

@ -0,0 +1,56 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, Golden Child
/*********************************************************************
ssprite.h
Synetix SuperSprite
(code based on Third Millenium Engineering Arcade Board)
*********************************************************************/
#ifndef MAME_BUS_A2BUS_A2SSPRITE_H
#define MAME_BUS_A2BUS_A2SSPRITE_H
#pragma once
#include "a2bus.h"
#include "video/tms9928a.h"
#include "sound/ay8910.h"
#include "sound/tms5220.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class a2bus_ssprite_device:
public device_t,
public device_a2bus_card_interface
{
public:
// construction/destruction
a2bus_ssprite_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
a2bus_ssprite_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
// overrides of standard a2bus slot functions
virtual uint8_t read_c0nx(address_space &space, uint8_t offset) override;
virtual void write_c0nx(address_space &space, uint8_t offset, uint8_t data) override;
private:
DECLARE_WRITE_LINE_MEMBER( tms_irq_w );
required_device<tms9918a_device> m_tms;
required_device<ay8910_device> m_ay;
required_device<tms5220_device> m_tms5220;
};
// device type definition
DECLARE_DEVICE_TYPE(A2BUS_SSPRITE, a2bus_ssprite_device)
#endif // MAME_BUS_A2BUS_SSPRITE_H

View File

@ -179,7 +179,8 @@ MACHINE_CONFIG_MEMBER( dmv_k235_device::device_add_mconfig )
MCFG_CPU_IO_MAP(k235_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MACHINE_CONFIG_END
//-------------------------------------------------

View File

@ -0,0 +1,116 @@
// license:BSD-3-Clause
// copyright-holders: F. Ulivi
/*********************************************************************
hp80_optrom.cpp
Optional ROMs for HP80 systems
*********************************************************************/
#include "emu.h"
#include "hp80_optrom.h"
#include "softlist.h"
// Debugging
#define VERBOSE 1
#include "logmacro.h"
DEFINE_DEVICE_TYPE(HP80_OPTROM_CART, hp80_optrom_cart_device, "hp80_optrom_cart", "HP80 optional ROM cartridge")
DEFINE_DEVICE_TYPE(HP80_OPTROM_SLOT, hp80_optrom_slot_device, "hp80_optrom_slot", "HP80 optional ROM slot")
// +-----------------------+
// |hp80_optrom_cart_device|
// +-----------------------+
hp80_optrom_cart_device::hp80_optrom_cart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
device_slot_card_interface(mconfig, *this)
{
}
hp80_optrom_cart_device::hp80_optrom_cart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
hp80_optrom_cart_device(mconfig, HP80_OPTROM_CART, tag, owner, clock)
{
}
// +-----------------------+
// |hp80_optrom_slot_device|
// +-----------------------+
hp80_optrom_slot_device::hp80_optrom_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, HP80_OPTROM_SLOT, tag, owner, clock),
device_image_interface(mconfig, *this),
device_slot_interface(mconfig, *this),
m_cart(nullptr),
m_select_code(0)
{
}
hp80_optrom_slot_device::~hp80_optrom_slot_device()
{
}
void hp80_optrom_slot_device::install_read_handler(address_space& space)
{
if (loaded_through_softlist()) {
offs_t start = (offs_t)m_select_code * HP80_OPTROM_SIZE;
space.install_rom(start , start + HP80_OPTROM_SIZE - 1 , get_software_region("rom"));
}
}
void hp80_optrom_slot_device::device_start()
{
m_cart = dynamic_cast<hp80_optrom_cart_device *>(get_card_device());
}
image_init_result hp80_optrom_slot_device::call_load()
{
LOG("hp80_optrom: call_load\n");
if (m_cart == nullptr || !loaded_through_softlist()) {
LOG("hp80_optrom: must be loaded from sw list\n");
return image_init_result::FAIL;
}
const char *sc_feature = get_feature("sc");
if (sc_feature == nullptr) {
LOG("hp80_optrom: no 'sc' feature\n");
return image_init_result::FAIL;
}
unsigned sc;
if (sc_feature[ 0 ] != '0' || sc_feature[ 1 ] != 'x' || sscanf(&sc_feature[ 2 ] , "%x" , &sc) != 1) {
LOG("hp80_optrom: can't parse 'sc' feature\n");
return image_init_result::FAIL;
}
// Valid SC values: 0x01..0xff
if (sc < 1 || sc > 0xff) {
LOG("hp80_optrom: illegal select code (%x)\n" , sc);
return image_init_result::FAIL;
}
auto length = get_software_region_length("rom");
if (length != HP80_OPTROM_SIZE) {
LOG("hp80_optrom: illegal region length (%x)\n" , length);
return image_init_result::FAIL;
}
LOG("hp80_optrom: loaded SC=0x%02x\n" , sc);
m_select_code = sc;
return image_init_result::PASS;
}
void hp80_optrom_slot_device::call_unload()
{
LOG("hp80_optrom: call_unload\n");
machine().schedule_soft_reset();
}
std::string hp80_optrom_slot_device::get_default_card_software(get_default_card_software_hook &hook) const
{
return software_get_default_slot("rom");
}
SLOT_INTERFACE_START(hp80_optrom_slot_device)
SLOT_INTERFACE_INTERNAL("rom", HP80_OPTROM_CART)
SLOT_INTERFACE_END

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@ -0,0 +1,77 @@
// license:BSD-3-Clause
// copyright-holders: F. Ulivi
/*********************************************************************
hp80_optrom.h
Optional ROMs for HP80 systems
*********************************************************************/
#ifndef MAME_BUS_HP80_OPTROMS_HP80_OPTROM_H
#define MAME_BUS_HP80_OPTROMS_HP80_OPTROM_H
#pragma once
#include "softlist_dev.h"
// Size of optional ROMs (8k)
static constexpr offs_t HP80_OPTROM_SIZE = 0x2000;
class hp80_optrom_cart_device : public device_t,
public device_slot_card_interface
{
public:
// construction/destruction
hp80_optrom_cart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
hp80_optrom_cart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override { }
};
class hp80_optrom_slot_device : public device_t,
public device_image_interface,
public device_slot_interface
{
public:
// construction/destruction
hp80_optrom_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~hp80_optrom_slot_device();
void install_read_handler(address_space& space);
protected:
// device-level overrides
virtual void device_start() override;
// image-level overrides
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual const software_list_loader &get_software_list_loader() const override { return rom_software_list_loader::instance(); }
virtual iodevice_t image_type() const override { return IO_ROM; }
virtual bool is_readable() const override { return true; }
virtual bool is_writeable() const override { return false; }
virtual bool is_creatable() const override { return false; }
virtual bool must_be_loaded() const override { return false; }
virtual bool is_reset_on_load() const override { return true; }
virtual const char *image_interface() const override { return "hp80_rom"; }
virtual const char *file_extensions() const override { return "bin"; }
// slot interface overrides
virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override;
hp80_optrom_cart_device *m_cart;
uint8_t m_select_code;
};
// device type definition
DECLARE_DEVICE_TYPE(HP80_OPTROM_SLOT, hp80_optrom_slot_device)
DECLARE_DEVICE_TYPE(HP80_OPTROM_CART, hp80_optrom_cart_device)
SLOT_INTERFACE_EXTERN(hp80_optrom_slot_device);
#endif // MAME_BUS_HP80_OPTROMS_HP80_OPTROM_H

View File

@ -70,8 +70,14 @@ MACHINE_CONFIG_MEMBER( southbridge_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(southbridge_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(southbridge_device, pc_dack7_w))
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, READ8(southbridge_device, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NOOP)
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(southbridge_device, get_slave_ack))
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET))

View File

@ -88,17 +88,22 @@ WRITE_LINE_MEMBER( s100_wunderbus_device::rtc_tp_w )
MACHINE_CONFIG_MEMBER( s100_wunderbus_device::device_add_mconfig )
MCFG_PIC8259_ADD(I8259A_TAG, DEVWRITELINE(DEVICE_SELF, s100_wunderbus_device, pic_int_w), VCC, NOOP)
MCFG_DEVICE_ADD(I8259A_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(s100_wunderbus_device, pic_int_w))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_DEVICE_ADD(INS8250_1_TAG, INS8250, XTAL_18_432MHz/10)
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_dtr))
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_rts))
MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(I8259A_TAG, pic8259_device, ir3_w))
MCFG_DEVICE_ADD(INS8250_2_TAG, INS8250, XTAL_18_432MHz/10)
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE(RS232_B_TAG, rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE(RS232_B_TAG, rs232_port_device, write_dtr))
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE(RS232_B_TAG, rs232_port_device, write_rts))
MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(I8259A_TAG, pic8259_device, ir4_w))
MCFG_DEVICE_ADD(INS8250_3_TAG, INS8250, XTAL_18_432MHz/10)
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE(RS232_C_TAG, rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE(RS232_C_TAG, rs232_port_device, write_dtr))

View File

@ -45,77 +45,124 @@ void (*arm7_coproc_dt_r_callback)(arm_state *arm, uint32_t insn, uint32_t *prn,
void (*arm7_coproc_dt_w_callback)(arm_state *arm, uint32_t insn, uint32_t *prn, void (*write32)(arm_state *arm, uint32_t addr, uint32_t data));
DEFINE_DEVICE_TYPE(ARM7, arm7_cpu_device, "arm7_le", "ARM7 (little)")
DEFINE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device, "arm7_be", "ARM7 (big)")
DEFINE_DEVICE_TYPE(ARM7500, arm7500_cpu_device, "arm7500", "ARM7500")
DEFINE_DEVICE_TYPE(ARM9, arm9_cpu_device, "arm9", "ARM9")
DEFINE_DEVICE_TYPE(ARM920T, arm920t_cpu_device, "arm920t", "ARM920T")
DEFINE_DEVICE_TYPE(PXA255, pxa255_cpu_device, "pxa255", "Intel XScale PXA255")
DEFINE_DEVICE_TYPE(SA1110, sa1110_cpu_device, "sa1110", "Intel StrongARM SA-1110")
DEFINE_DEVICE_TYPE(ARM7, arm7_cpu_device, "arm7_le", "ARM7 (little)")
DEFINE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device, "arm7_be", "ARM7 (big)")
DEFINE_DEVICE_TYPE(ARM7500, arm7500_cpu_device, "arm7500", "ARM7500")
DEFINE_DEVICE_TYPE(ARM9, arm9_cpu_device, "arm9", "ARM9")
DEFINE_DEVICE_TYPE(ARM920T, arm920t_cpu_device, "arm920t", "ARM920T")
DEFINE_DEVICE_TYPE(ARM946ES, arm946es_cpu_device, "arm946es", "ARM946ES")
DEFINE_DEVICE_TYPE(PXA255, pxa255_cpu_device, "pxa255", "Intel XScale PXA255")
DEFINE_DEVICE_TYPE(SA1110, sa1110_cpu_device, "sa1110", "Intel StrongARM SA-1110")
arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7, tag, owner, clock, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE)
: arm7_cpu_device(mconfig, ARM7, tag, owner, clock, 4, ARCHFLAG_T, ENDIANNESS_LITTLE)
{
}
arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint8_t archFlags, endianness_t endianness)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", endianness, 32, 32, 0)
, m_endian(endianness)
, m_archRev(archRev)
, m_archFlags(archFlags)
, m_copro_id(0x41 | (1 << 23) | (7 << 12)) // <-- where did this come from?
, m_pc(0)
{
memset(m_r, 0x00, sizeof(m_r));
uint32_t arch = ARM9_COPRO_ID_ARCH_V4;
if (m_archFlags & ARCHFLAG_T)
arch = ARM9_COPRO_ID_ARCH_V4T;
m_copro_id = ARM9_COPRO_ID_MFR_ARM | arch | ARM9_COPRO_ID_PART_GENERICARM7;
}
arm7_be_cpu_device::arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7_BE, tag, owner, clock, 4, eARM_ARCHFLAGS_T, ENDIANNESS_BIG)
: arm7_cpu_device(mconfig, ARM7_BE, tag, owner, clock, 4, ARCHFLAG_T, ENDIANNESS_BIG)
{
}
arm7500_cpu_device::arm7500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7500, tag, owner, clock, 3, eARM_ARCHFLAGS_MODE26, ENDIANNESS_LITTLE)
: arm7_cpu_device(mconfig, ARM7500, tag, owner, clock, 4, ARCHFLAG_MODE26, ENDIANNESS_LITTLE)
{
m_copro_id = (0x41 << 24) | (0 << 20) | (1 << 16) | (0x710 << 4) | (0 << 0);
m_copro_id = ARM9_COPRO_ID_MFR_ARM
| ARM9_COPRO_ID_ARCH_V4
| ARM9_COPRO_ID_PART_ARM710;
}
arm9_cpu_device::arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM9, tag, owner, clock, 5, eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E, ENDIANNESS_LITTLE)
// ARMv5
// has TE extensions
: arm9_cpu_device(mconfig, ARM9, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE)
{
}
arm9_cpu_device::arm9_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint8_t archFlags, endianness_t endianness)
: arm7_cpu_device(mconfig, type, tag, owner, clock, archRev, archFlags, endianness)
{
uint32_t arch = ARM9_COPRO_ID_ARCH_V4;
switch (archRev)
{
case 4:
if (archFlags & ARCHFLAG_T)
arch = ARM9_COPRO_ID_ARCH_V4T;
break;
case 5:
arch = ARM9_COPRO_ID_ARCH_V5;
if (archFlags & ARCHFLAG_T)
{
arch = ARM9_COPRO_ID_ARCH_V5T;
if (archFlags & ARCHFLAG_E)
{
arch = ARM9_COPRO_ID_ARCH_V5TE;
}
}
break;
default: break;
}
m_copro_id = ARM9_COPRO_ID_MFR_ARM | arch | (0x900 << 4);
}
arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM920T, tag, owner, clock, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE)
// ARMv4
// has T extension
: arm9_cpu_device(mconfig, ARM920T, tag, owner, clock, 4, ARCHFLAG_T, ENDIANNESS_LITTLE)
{
m_copro_id = (0x41 << 24) | (1 << 20) | (2 << 16) | (0x920 << 4) | (0 << 0);
m_copro_id = ARM9_COPRO_ID_MFR_ARM
| ARM9_COPRO_ID_SPEC_REV1
| ARM9_COPRO_ID_ARCH_V4T
| ARM9_COPRO_ID_PART_ARM920
| 0; // Stepping
}
arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE)
{
m_copro_id = ARM9_COPRO_ID_MFR_ARM
| ARM9_COPRO_ID_ARCH_V5TE
| ARM9_COPRO_ID_PART_ARM946
| ARM9_COPRO_ID_STEP_ARM946_A0;
}
pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E | eARM_ARCHFLAGS_XSCALE, ENDIANNESS_LITTLE)
// ARMv5
// has TE and XScale extensions
: arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE)
{
m_copro_id = ARM9_COPRO_ID_MFR_INTEL
| ARM9_COPRO_ID_ARCH_V5TE
| ARM9_COPRO_ID_PXA255_CORE_GEN_XSCALE
| (3 << ARM9_COPRO_ID_PXA255_CORE_REV_SHIFT)
| ARM9_COPRO_ID_STEP_PXA255_A0;
}
sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, SA1110, tag, owner, clock, 4, eARM_ARCHFLAGS_SA, ENDIANNESS_LITTLE)
// ARMv4
: arm7_cpu_device(mconfig, SA1110, tag, owner, clock, 4, ARCHFLAG_SA, ENDIANNESS_LITTLE)
// has StrongARM, no Thumb, no Enhanced DSP
{
m_copro_id = ARM9_COPRO_ID_MFR_INTEL
| ARM9_COPRO_ID_ARCH_V4
| ARM9_COPRO_ID_PART_SA1110
| ARM9_COPRO_ID_STEP_SA1110_A0;
}
device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const
@ -133,7 +180,7 @@ void arm7_cpu_device::update_reg_ptr()
void arm7_cpu_device::set_cpsr(uint32_t val)
{
uint8_t old_mode = GET_CPSR & MODE_FLAG;
if (m_archFlags & eARM_ARCHFLAGS_MODE26)
if (m_archFlags & ARCHFLAG_MODE26)
{
if ((val & 0x10) != (m_r[eCPSR] & 0x10))
{
@ -815,35 +862,35 @@ READ32_MEMBER( arm7_cpu_device::arm7_rt_r_callback )
// we only handle system copro here
if (cpnum != 15)
{
if (m_archFlags & eARM_ARCHFLAGS_XSCALE)
{
// handle XScale specific CP14
if (cpnum == 14)
if (m_archFlags & ARCHFLAG_XSCALE)
{
switch( cReg )
// handle XScale specific CP14
if (cpnum == 14)
{
case 1: // clock counter
data = (uint32_t)total_cycles();
break;
switch( cReg )
{
case 1: // clock counter
data = (uint32_t)total_cycles();
break;
default:
break;
default:
break;
}
}
else
{
fatalerror("XScale: Unhandled coprocessor %d (archFlags %x)\n", cpnum, m_archFlags);
}
return data;
}
else
{
fatalerror("XScale: Unhandled coprocessor %d (archFlags %x)\n", cpnum, m_archFlags);
LOG( ("ARM7: Unhandled coprocessor %d (archFlags %x)\n", cpnum, m_archFlags) );
m_pendingUnd = true;
update_irq_state();
return 0;
}
return data;
}
else
{
LOG( ("ARM7: Unhandled coprocessor %d (archFlags %x)\n", cpnum, m_archFlags) );
m_pendingUnd = true;
update_irq_state();
return 0;
}
}
switch( cReg )
@ -859,73 +906,25 @@ READ32_MEMBER( arm7_cpu_device::arm7_rt_r_callback )
LOG( ( "arm7_rt_r_callback CR%d, RESERVED\n", cReg ) );
break;
case 0: // ID
switch(op2)
{
case 0:
switch (m_archRev)
switch(op2)
{
case 3: // ARM6 32-bit
data = 0x41;
case 0:
data = m_copro_id;
break;
case 1: // cache type
data = 0x0f0d2112; // HACK: value expected by ARMWrestler (probably Nintendo DS ARM9's value)
//data = (6 << 25) | (1 << 24) | (0x172 << 12) | (0x172 << 0); // ARM920T (S3C24xx)
break;
case 2: // TCM type
data = 0;
break;
case 3: // TLB type
data = 0;
break;
case 4: // MPU type
data = 0;
break;
case 4: // ARM7/SA11xx
if (m_archFlags & eARM_ARCHFLAGS_SA)
{
// ARM Architecture Version 4
// Part Number 0xB11 (SA1110)
// Stepping B5
data = 0x69 | ( 0x01 << 16 ) | ( 0xB11 << 4 ) | 0x9;
}
else
{
data = m_copro_id;
}
break;
case 5: // ARM9/10/XScale
data = 0x41 | (9 << 12);
if (m_archFlags & eARM_ARCHFLAGS_T)
{
if (m_archFlags & eARM_ARCHFLAGS_E)
{
if (m_archFlags & eARM_ARCHFLAGS_J)
{
data |= (6<<16); // v5TEJ
}
else
{
data |= (5<<16); // v5TE
}
}
else
{
data |= (4<<16); // v5T
}
}
/* ID from PXA-250 manual */
//data = 0x69052100;
break;
case 6: // ARM11
data = 0x41 | (10<< 12) | (7<<16); // v6
break;
}
break;
case 1: // cache type
data = 0x0f0d2112; // HACK: value expected by ARMWrestler (probably Nintendo DS ARM9's value)
//data = (6 << 25) | (1 << 24) | (0x172 << 12) | (0x172 << 0); // ARM920T (S3C24xx)
break;
case 2: // TCM type
data = 0;
break;
case 3: // TLB type
data = 0;
break;
case 4: // MPU type
data = 0;
break;
}
LOG( ( "arm7_rt_r_callback, ID %02x (%02x) -> %08x (PC=%08x)\n",op2,m_archRev,data,GET_PC ) );
break;
case 1: // Control
@ -1079,7 +1078,7 @@ WRITE32_MEMBER( arm7_cpu_device::arm7_rt_w_callback )
void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
{
uint8_t cpn = (insn >> 8) & 0xF;
if ((m_archFlags & eARM_ARCHFLAGS_XSCALE) && (cpn == 0))
if ((m_archFlags & ARCHFLAG_XSCALE) && (cpn == 0))
{
LOG( ( "arm7_dt_r_callback: DSP Coprocessor 0 (CP0) not yet emulated (PC %08x)\n", GET_PC ) );
}
@ -1094,7 +1093,7 @@ void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
void arm7_cpu_device::arm7_dt_w_callback(uint32_t insn, uint32_t *prn)
{
uint8_t cpn = (insn >> 8) & 0xF;
if ((m_archFlags & eARM_ARCHFLAGS_XSCALE) && (cpn == 0))
if ((m_archFlags & ARCHFLAG_XSCALE) && (cpn == 0))
{
LOG( ( "arm7_dt_w_callback: DSP Coprocessor 0 (CP0) not yet emulated (PC %08x)\n", GET_PC ) );
}

View File

@ -53,6 +53,52 @@ public:
arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
enum
{
ARCHFLAG_T = 1, // Thumb present
ARCHFLAG_E = 2, // extended DSP operations present (only for v5+)
ARCHFLAG_J = 4, // "Jazelle" (direct execution of Java bytecode)
ARCHFLAG_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
ARCHFLAG_SA = 16, // StrongARM extensions (enhanced TLB)
ARCHFLAG_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
ARCHFLAG_MODE26 = 64 // supports 26-bit backwards compatibility mode
};
enum
{
ARM9_COPRO_ID_STEP_SA1110_A0 = 0,
ARM9_COPRO_ID_STEP_SA1110_B0 = 4,
ARM9_COPRO_ID_STEP_SA1110_B1 = 5,
ARM9_COPRO_ID_STEP_SA1110_B2 = 6,
ARM9_COPRO_ID_STEP_SA1110_B4 = 8,
ARM9_COPRO_ID_STEP_PXA255_A0 = 6,
ARM9_COPRO_ID_STEP_ARM946_A0 = 1,
ARM9_COPRO_ID_PART_SA1110 = 0xB11 << 4,
ARM9_COPRO_ID_PART_ARM946 = 0x946 << 4,
ARM9_COPRO_ID_PART_ARM920 = 0x920 << 4,
ARM9_COPRO_ID_PART_ARM710 = 0x710 << 4,
ARM9_COPRO_ID_PART_GENERICARM7 = 0x700 << 4,
ARM9_COPRO_ID_PXA255_CORE_REV_SHIFT = 10,
ARM9_COPRO_ID_PXA255_CORE_GEN_XSCALE = 0x01 << 13,
ARM9_COPRO_ID_ARCH_V4 = 0x01 << 16,
ARM9_COPRO_ID_ARCH_V4T = 0x02 << 16,
ARM9_COPRO_ID_ARCH_V5 = 0x03 << 16,
ARM9_COPRO_ID_ARCH_V5T = 0x04 << 16,
ARM9_COPRO_ID_ARCH_V5TE = 0x05 << 16,
ARM9_COPRO_ID_SPEC_REV0 = 0x00 << 20,
ARM9_COPRO_ID_SPEC_REV1 = 0x01 << 20,
ARM9_COPRO_ID_MFR_ARM = 0x41 << 24,
ARM9_COPRO_ID_MFR_DEC = 0x44 << 24,
ARM9_COPRO_ID_MFR_INTEL = 0x69 << 24
};
arm7_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint8_t archFlags, endianness_t endianness);
// device-level overrides
@ -523,10 +569,13 @@ class arm9_cpu_device : public arm7_cpu_device
public:
// construction/destruction
arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
arm9_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint8_t archFlags, endianness_t endianness);
};
class arm920t_cpu_device : public arm7_cpu_device
class arm920t_cpu_device : public arm9_cpu_device
{
public:
// construction/destruction
@ -534,6 +583,14 @@ public:
};
class arm946es_cpu_device : public arm9_cpu_device
{
public:
// construction/destruction
arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pxa255_cpu_device : public arm7_cpu_device
{
public:
@ -550,12 +607,13 @@ public:
};
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device)
DECLARE_DEVICE_TYPE(ARM9, arm9_cpu_device)
DECLARE_DEVICE_TYPE(ARM920T, arm920t_cpu_device)
DECLARE_DEVICE_TYPE(PXA255, pxa255_cpu_device)
DECLARE_DEVICE_TYPE(SA1110, sa1110_cpu_device)
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device)
DECLARE_DEVICE_TYPE(ARM9, arm9_cpu_device)
DECLARE_DEVICE_TYPE(ARM920T, arm920t_cpu_device)
DECLARE_DEVICE_TYPE(ARM946ES, arm946es_cpu_device)
DECLARE_DEVICE_TYPE(PXA255, pxa255_cpu_device)
DECLARE_DEVICE_TYPE(SA1110, sa1110_cpu_device)
#endif // MAME_CPU_ARM7_ARM7_H

View File

@ -140,18 +140,6 @@ enum
#define COPRO_FCSE_PID m_fcsePID
enum
{
eARM_ARCHFLAGS_T = 1, // Thumb present
eARM_ARCHFLAGS_E = 2, // extended DSP operations present (only for v5+)
eARM_ARCHFLAGS_J = 4, // "Jazelle" (direct execution of Java bytecode)
eARM_ARCHFLAGS_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
eARM_ARCHFLAGS_SA = 16, // StrongARM extensions (enhanced TLB)
eARM_ARCHFLAGS_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
eARM_ARCHFLAGS_MODE26 = 64 // supports 26-bit backwards compatibility mode
};
//#define ARM7_USE_DRC
/* forward declaration of implementation-specific state */
@ -522,7 +510,8 @@ enum arm_flavor
/* ARM9 variants */
ARM_TYPE_ARM9,
ARM_TYPE_ARM920T
ARM_TYPE_ARM920T,
ARM_TYPE_ARM946ES
};
#endif /* __ARM7CORE_H__ */

View File

@ -41,7 +41,7 @@ ADDRESS_MAP_END
lpc210x_device::lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, LPC2103, tag, owner, clock, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE)
: arm7_cpu_device(mconfig, LPC2103, tag, owner, clock, 4, ARCHFLAG_T, ENDIANNESS_LITTLE)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, ADDRESS_MAP_NAME(lpc2103_map))
{
}

View File

@ -515,7 +515,10 @@ MACHINE_CONFIG_MEMBER( v53_base_device::device_add_mconfig )
MCFG_AM9517A_OUT_DACK_3_CB(WRITELINE(v53_base_device, dma_dack3_trampoline_w))
MCFG_PIC8259_ADD( "upd71059pic", WRITELINE(v53_base_device, internal_irq_w), VCC, READ8(v53_base_device, get_pic_ack))
MCFG_DEVICE_ADD("upd71059pic", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(v53_base_device, internal_irq_w))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(v53_base_device, get_pic_ack))

View File

@ -119,16 +119,12 @@ void necdsp_device::device_start()
save_item(NAME(regs.flaga.z));
save_item(NAME(regs.flaga.ov1));
save_item(NAME(regs.flaga.ov0));
save_item(NAME(regs.flaga.ov0p));
save_item(NAME(regs.flaga.ov0pp));
save_item(NAME(regs.flagb.s1));
save_item(NAME(regs.flagb.s0));
save_item(NAME(regs.flagb.c));
save_item(NAME(regs.flagb.z));
save_item(NAME(regs.flagb.ov1));
save_item(NAME(regs.flagb.ov0));
save_item(NAME(regs.flagb.ov0p));
save_item(NAME(regs.flagb.ov0pp));
save_item(NAME(regs.tr));
save_item(NAME(regs.trb));
save_item(NAME(regs.dr));
@ -251,9 +247,7 @@ void necdsp_device::state_string_export(const device_state_entry &entry, std::st
regs.flaga.c ? 'C' : 'c',
regs.flaga.z ? 'Z' : 'z',
regs.flaga.ov1 ? "OV1" : "ov1",
regs.flaga.ov0 ? "OV0" : "ov0",
regs.flaga.ov0p ? "OV0P" : "ov0p",
regs.flaga.ov0pp ? "OV0PP" : "ov0pp");
regs.flaga.ov0 ? "OV0" : "ov0");
break;
case UPD7725_FLAGB:
@ -263,9 +257,7 @@ void necdsp_device::state_string_export(const device_state_entry &entry, std::st
regs.flagb.c ? 'C' : 'c',
regs.flagb.z ? 'Z' : 'z',
regs.flagb.ov1 ? "OV1" : "ov1",
regs.flagb.ov0 ? "OV0" : "ov0",
regs.flagb.ov0p ? "OV0P" : "ov0p",
regs.flagb.ov0pp ? "OV0PP" : "ov0pp");
regs.flagb.ov0 ? "OV0" : "ov0");
break;
}
}
@ -442,8 +434,6 @@ void necdsp_device::exec_op(uint32_t opcode) {
flag.s1 = 0;
flag.ov0 = 0;
flag.ov1 = 0;
flag.ov0p = 0;
flag.ov0pp = 0;
switch(pselect) {
case 0: p = dataRAM[regs.dp]; break;
@ -469,7 +459,7 @@ void necdsp_device::exec_op(uint32_t opcode) {
case 9: r = q + 1; p = 1; break; //INC
case 10: r = ~q; break; //CMP
case 11: r = (q >> 1) | (q & 0x8000); break; //SHR1 (ASR)
case 12: r = (q << 1) | (c ? 1 : 0); break; //SHL1 (ROL)
case 12: r = (q << 1) | (c ? 1 : 0); break; //SHL1 (ROL)
case 13: r = (q << 2) | 3; break; //SHL2
case 14: r = (q << 4) | 15; break; //SHL4
case 15: r = (q << 8) | (q >> 8); break; //XCHG
@ -477,13 +467,12 @@ void necdsp_device::exec_op(uint32_t opcode) {
flag.s0 = (r & 0x8000);
flag.z = (r == 0);
flag.ov0pp = flag.ov0p;
flag.ov0p = flag.ov0;
if (!flag.ov1) flag.s1 = flag.s0;
switch(alu) {
case 1: case 2: case 3: case 10: case 13: case 14: case 15: {
flag.c = 0;
flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
flag.ov0 = flag.ov1 = 0; // OV0 and OV1 are cleared by any non-add/sub/nop operation
break;
}
case 4: case 5: case 6: case 7: case 8: case 9: {
@ -496,23 +485,20 @@ void necdsp_device::exec_op(uint32_t opcode) {
flag.ov0 = (q ^ r) & (q ^ p) & 0x8000;
flag.c = (r > q);
}
flag.ov1 = (flag.ov0 & flag.ov1) ? (flag.s1 == flag.s0) : (flag.ov0 | flag.ov1);
break;
}
case 11: {
flag.c = q & 1;
flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
flag.ov0 = flag.ov1 = 0; // OV0 and OV1 are cleared by any non-add/sub/nop operation
break;
}
case 12: {
flag.c = q >> 15;
flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
flag.ov0 = flag.ov1 = 0; // OV0 and OV1 are cleared by any non-add/sub/nop operation
break;
}
}
// flag.ov1 is only set if the number of overflows of the past 3 opcodes (of type 4,5,6,7,8,9) is odd
flag.ov1 = (flag.ov0 + flag.ov0p + flag.ov0pp) & 1;
// flag.s1 is based on ov1: s1 = ov1 ^ s0;
flag.s1 = flag.ov1 ^ flag.s0;
switch(asl) {
case 0: regs.a = r; regs.flaga = flag; break;
@ -522,15 +508,17 @@ void necdsp_device::exec_op(uint32_t opcode) {
exec_ld((regs.idb << 6) + dst);
switch(dpl) {
case 1: regs.dp = (regs.dp & 0xf0) + ((regs.dp + 1) & 0x0f); break; //DPINC
case 2: regs.dp = (regs.dp & 0xf0) + ((regs.dp - 1) & 0x0f); break; //DPDEC
case 3: regs.dp = (regs.dp & 0xf0); break; //DPCLR
if (dst != 4) {
switch(dpl) {
case 1: regs.dp = (regs.dp & 0xf0) + ((regs.dp + 1) & 0x0f); break; //DPINC
case 2: regs.dp = (regs.dp & 0xf0) + ((regs.dp - 1) & 0x0f); break; //DPDEC
case 3: regs.dp = (regs.dp & 0xf0); break; //DPCLR
}
regs.dp ^= dphm << 4;
}
regs.dp ^= dphm << 4;
if(rpdcr) regs.rp--;
if(rpdcr && (dst != 5)) regs.rp--;
}
void necdsp_device::exec_rt(uint32_t opcode) {

View File

@ -119,16 +119,16 @@ protected:
private:
struct Flag
{
bool s1, s0, c, z, ov1, ov0, ov0p, ov0pp;
bool s1, s0, c, z, ov1, ov0;
inline operator unsigned() const
{
return (s1 << 7) + (s0 << 6) + (c << 5) + (z << 4) + (ov1 << 3) + (ov0 << 2) + (ov0p << 1) + (ov0pp << 0);
return (s1 << 5) + (s0 << 4) + (c << 3) + (z << 2) + (ov1 << 1) + (ov0 << 0);
}
inline unsigned operator=(unsigned d)
{
s1 = d & 0x80; s0 = d & 0x40; c = d & 0x20; z = d & 0x10; ov1 = d & 0x08; ov0 = d & 0x04; ov0p = d & 0x02; ov0pp = d & 0x01;
s1 = d & 0x20; s0 = d & 0x10; c = d & 0x08; z = d & 0x04; ov1 = d & 0x02; ov0 = d & 0x01;
return d;
}
};

View File

@ -91,7 +91,7 @@ enum
#define Z8_P01M_P0L_MODE_MASK 0x03
#define Z8_P01M_P0L_MODE_OUTPUT 0x00
#define Z8_P01M_P0L_MODE_INPUT 0x01
#define Z8_P01M_P0L_MODE_A8_A11 0x02 /* not supported */
#define Z8_P01M_P0L_MODE_A8_A11 0x02
#define Z8_P01M_INTERNAL_STACK 0x04
#define Z8_P01M_P1_MODE_MASK 0x18
#define Z8_P01M_P1_MODE_OUTPUT 0x00
@ -102,7 +102,7 @@ enum
#define Z8_P01M_P0H_MODE_MASK 0xc0
#define Z8_P01M_P0H_MODE_OUTPUT 0x00
#define Z8_P01M_P0H_MODE_INPUT 0x40
#define Z8_P01M_P0H_MODE_A12_A15 0x80 /* not supported */
#define Z8_P01M_P0H_MODE_A12_A15 0x80
#define Z8_P3M_P2_ACTIVE_PULLUPS 0x01 /* not supported */
#define Z8_P3M_P0_STROBED 0x04 /* not supported */
@ -214,19 +214,50 @@ offs_t z8_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint
device_memory_interface::space_config_vector z8_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_DATA, &m_data_config)
};
// Separate data space is optional
if (has_configured_map(AS_DATA))
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_DATA, &m_data_config)
};
}
else
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config)
};
}
}
/***************************************************************************
INLINE FUNCTIONS
***************************************************************************/
uint16_t z8_device::mask_external_address(uint16_t addr)
{
switch (P01M & (Z8_P01M_P0L_MODE_A8_A11 | Z8_P01M_P0H_MODE_A12_A15))
{
case 0:
addr = (addr & 0x00ff) | register_read(Z8_REGISTER_P0) << 8;
break;
case Z8_P01M_P0L_MODE_A8_A11:
addr = (addr & 0x0fff) | (register_read(Z8_REGISTER_P0) & 0xf0) << 8;
break;
case Z8_P01M_P0H_MODE_A12_A15:
addr = (addr & 0xf0ff) | (register_read(Z8_REGISTER_P0) & 0x0f) << 8;
break;
}
return addr;
}
uint8_t z8_device::fetch()
{
uint8_t data = m_direct->read_byte(m_pc);
uint16_t real_pc = (m_pc < m_rom_size) ? m_pc : mask_external_address(m_pc);
uint8_t data = m_direct->read_byte(real_pc);
m_pc++;
@ -234,6 +265,29 @@ uint8_t z8_device::fetch()
}
uint8_t z8_device::fetch_opcode()
{
m_ppc = (m_pc < m_rom_size) ? m_pc : mask_external_address(m_pc);
debugger_instruction_hook(this, m_ppc);
uint8_t data = m_direct->read_byte(m_ppc);
m_pc++;
return data;
}
uint16_t z8_device::fetch_word()
{
// ensure correct order of operations by using separate instructions
uint16_t data = fetch() << 8;
data |= fetch();
return data;
}
uint8_t z8_device::register_read(uint8_t offset)
{
uint8_t data = 0xff;
@ -447,21 +501,21 @@ void z8_device::stack_push_byte(uint8_t src)
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP - 1 */
// SP <- SP - 1 (predecrement)
uint8_t sp = register_read(Z8_REGISTER_SPL) - 1;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
// @SP <- src
register_write(sp, src);
}
else
{
/* SP <- SP - 1 */
// SP <- SP - 1 (predecrement)
uint16_t sp = register_pair_read(Z8_REGISTER_SPH) - 1;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
m_data->write_byte(sp, src);
// @SP <- src
m_data->write_byte(mask_external_address(sp), src);
}
}
@ -469,21 +523,21 @@ void z8_device::stack_push_word(uint16_t src)
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP - 2 */
// SP <- SP - 2 (predecrement)
uint8_t sp = register_read(Z8_REGISTER_SPL) - 2;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
// @SP <- src
register_pair_write(sp, src);
}
else
{
/* SP <- SP - 2 */
// SP <- SP - 2 (predecrement)
uint16_t sp = register_pair_read(Z8_REGISTER_SPH) - 2;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
m_data->write_word(sp, src);
// @SP <- src
m_data->write_word(mask_external_address(sp), src);
}
}
@ -491,21 +545,25 @@ uint8_t z8_device::stack_pop_byte()
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP + 1 */
uint8_t sp = register_read(Z8_REGISTER_SPL) + 1;
register_write(Z8_REGISTER_SPL, sp);
// @SP <- src
uint8_t sp = register_read(Z8_REGISTER_SPL);
uint8_t byte = register_read(sp);
/* @SP <- src */
return register_read(sp);
// SP <- SP + 1 (postincrement)
register_write(Z8_REGISTER_SPL, sp + 1);
return byte;
}
else
{
/* SP <- SP + 1 */
uint16_t sp = register_pair_read(Z8_REGISTER_SPH) + 1;
register_pair_write(Z8_REGISTER_SPH, sp);
// @SP <- src
uint16_t sp = register_pair_read(Z8_REGISTER_SPH);
uint8_t byte = m_data->read_byte(mask_external_address(sp));
/* @SP <- src */
return m_data->read_byte(sp);
// SP <- SP + 1 (postincrement)
register_pair_write(Z8_REGISTER_SPH, sp + 1);
return byte;
}
}
@ -513,21 +571,25 @@ uint16_t z8_device::stack_pop_word()
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP + 2 */
uint8_t sp = register_read(Z8_REGISTER_SPL) + 2;
register_write(Z8_REGISTER_SPL, sp);
// @SP <- src
uint8_t sp = register_read(Z8_REGISTER_SPL);
uint16_t word = register_pair_read(sp);
/* @SP <- src */
return register_read(sp);
// SP <- SP + 2 (postincrement)
register_write(Z8_REGISTER_SPL, sp + 2);
return word;
}
else
{
/* SP <- SP + 2 */
uint16_t sp = register_pair_read(Z8_REGISTER_SPH) + 2;
register_pair_write(Z8_REGISTER_SPH, sp);
// @SP <- src
uint16_t sp = register_pair_read(Z8_REGISTER_SPH);
uint16_t word = m_data->read_word(mask_external_address(sp));
/* @SP <- src */
return m_data->read_word(sp);
// SP <- SP + 2 (postincrement)
register_pair_write(Z8_REGISTER_SPH, sp + 2);
return word;
}
}
@ -691,7 +753,7 @@ void z8_device::device_start()
{
state_add(Z8_PC, "PC", m_pc);
state_add(STATE_GENPC, "GENPC", m_pc).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_ppc).noshow();
state_add(Z8_SP, "SP", m_fake_sp).callimport().callexport();
state_add(STATE_GENSP, "GENSP", m_fake_sp).callimport().callexport().noshow();
state_add(Z8_RP, "RP", m_r[Z8_REGISTER_RP]);
@ -715,7 +777,7 @@ void z8_device::device_start()
/* find address spaces */
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
m_data = &space(AS_DATA);
m_data = has_space(AS_DATA) ? &space(AS_DATA) : m_program;
/* allocate timers */
m_t0_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8_device::t0_tick), this));
@ -755,17 +817,12 @@ void z8_device::execute_run()
{
do
{
uint8_t opcode;
int cycles;
debugger_instruction_hook(this, m_pc);
/* TODO: sample interrupts */
m_input[3] = m_input_cb[3]();
/* fetch opcode */
opcode = fetch();
cycles = Z8601_OPCODE_MAP[opcode].execution_cycles;
uint8_t opcode = fetch_opcode();
int cycles = Z8601_OPCODE_MAP[opcode].execution_cycles;
/* execute instruction */
(this->*(Z8601_OPCODE_MAP[opcode].function))(opcode, &cycles);
@ -783,10 +840,6 @@ void z8_device::device_reset()
{
m_pc = 0x000c;
// crude hack for Z8681
if (m_rom_size == 0)
m_pc |= m_input_cb[0]() << 8;
register_write(Z8_REGISTER_TMR, 0x00);
register_write(Z8_REGISTER_PRE1, PRE1 & 0xfc);
register_write(Z8_REGISTER_PRE0, PRE0 & 0xfe);

View File

@ -114,6 +114,7 @@ private:
/* registers */
uint16_t m_pc; /* program counter */
uint16_t m_ppc; /* program counter at last opcode fetch */
uint8_t m_r[256]; /* register file */
uint8_t m_input[4]; /* port input latches */
uint8_t m_output[4]; /* port output latches */
@ -137,7 +138,10 @@ private:
TIMER_CALLBACK_MEMBER( t0_tick );
TIMER_CALLBACK_MEMBER( t1_tick );
inline uint16_t mask_external_address(uint16_t addr);
inline uint8_t fetch();
inline uint8_t fetch_opcode();
inline uint16_t fetch_word();
inline uint8_t register_read(uint8_t offset);
inline uint16_t register_pair_read(uint8_t offset);
inline void register_write(uint8_t offset, uint8_t data);
@ -152,10 +156,10 @@ private:
inline void set_flag(uint8_t flag, int state);
inline void clear(uint8_t dst);
inline void load(uint8_t dst, uint8_t src);
inline void load_from_memory(address_space *space);
inline void load_to_memory(address_space *space);
inline void load_from_memory_autoinc(address_space *space);
inline void load_to_memory_autoinc(address_space *space);
inline void load_from_memory(address_space &space);
inline void load_to_memory(address_space &space);
inline void load_from_memory_autoinc(address_space &space);
inline void load_to_memory_autoinc(address_space &space);
inline void pop(uint8_t dst);
inline void push(uint8_t src);
inline void add_carry(uint8_t dst, int8_t src);

View File

@ -139,31 +139,38 @@ INSTRUCTION( ld_IR2_R1 ) { mode_IR2_R1(load) }
INSTRUCTION( ld_R1_IM ) { mode_R1_IM(load) }
INSTRUCTION( ld_IR1_IM ) { mode_IR1_IM(load) }
void z8_device::load_from_memory(address_space *space)
void z8_device::load_from_memory(address_space &space)
{
uint8_t operands = fetch();
uint8_t dst = get_working_register(operands >> 4);
uint8_t src = get_working_register(operands & 0x0f);
uint16_t address = register_pair_read(src);
uint8_t data = m_direct->read_byte(address);
uint8_t data;
if (&space == m_program && address < m_rom_size)
data = m_direct->read_byte(address);
else
data = space.read_byte(mask_external_address(address));
register_write(dst, data);
}
void z8_device::load_to_memory(address_space *space)
void z8_device::load_to_memory(address_space &space)
{
uint8_t operands = fetch();
uint8_t src = get_working_register(operands >> 4);
uint8_t dst = get_working_register(operands & 0x0f);
uint16_t address = register_pair_read(dst);
uint8_t data = register_read(src);
if (&space != m_program || address >= m_rom_size)
address = mask_external_address(address);
m_program->write_byte(address, data);
uint8_t data = register_read(src);
space.write_byte(address, data);
}
void z8_device::load_from_memory_autoinc(address_space *space)
void z8_device::load_from_memory_autoinc(address_space &space)
{
uint8_t operands = fetch();
uint8_t dst = get_working_register(operands >> 4);
@ -171,15 +178,19 @@ void z8_device::load_from_memory_autoinc(address_space *space)
uint8_t src = get_working_register(operands & 0x0f);
uint16_t address = register_pair_read(src);
uint8_t data = m_direct->read_byte(address);
uint8_t data;
if (&space == m_program && address < m_rom_size)
data = m_direct->read_byte(address);
else
data = space.read_byte(mask_external_address(address));
register_write(real_dst, data);
register_write(dst, real_dst + 1);
register_pair_write(src, address + 1);
}
void z8_device::load_to_memory_autoinc(address_space *space)
void z8_device::load_to_memory_autoinc(address_space &space)
{
uint8_t operands = fetch();
uint8_t src = get_working_register(operands >> 4);
@ -189,20 +200,22 @@ void z8_device::load_to_memory_autoinc(address_space *space)
uint16_t address = register_pair_read(dst);
uint8_t data = register_read(real_src);
m_program->write_byte(address, data);
if (&space != m_program || address >= m_rom_size)
address = mask_external_address(address);
space.write_byte(address, data);
register_pair_write(dst, address + 1);
register_write(src, real_src + 1);
}
INSTRUCTION( ldc_r1_Irr2 ) { load_from_memory(m_program); }
INSTRUCTION( ldc_r2_Irr1 ) { load_to_memory(m_program); }
INSTRUCTION( ldci_Ir1_Irr2 ) { load_from_memory_autoinc(m_program); }
INSTRUCTION( ldci_Ir2_Irr1 ) { load_to_memory_autoinc(m_program); }
INSTRUCTION( lde_r1_Irr2 ) { load_from_memory(m_data); }
INSTRUCTION( lde_r2_Irr1 ) { load_to_memory(m_data); }
INSTRUCTION( ldei_Ir1_Irr2 ) { load_from_memory_autoinc(m_data); }
INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(m_data); }
INSTRUCTION( ldc_r1_Irr2 ) { load_from_memory(*m_program); }
INSTRUCTION( ldc_r2_Irr1 ) { load_to_memory(*m_program); }
INSTRUCTION( ldci_Ir1_Irr2 ) { load_from_memory_autoinc(*m_program); }
INSTRUCTION( ldci_Ir2_Irr1 ) { load_to_memory_autoinc(*m_program); }
INSTRUCTION( lde_r1_Irr2 ) { load_from_memory(*m_data); }
INSTRUCTION( lde_r2_Irr1 ) { load_to_memory(*m_data); }
INSTRUCTION( ldei_Ir1_Irr2 ) { load_from_memory_autoinc(*m_data); }
INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(*m_data); }
void z8_device::pop(uint8_t dst)
{
@ -490,7 +503,7 @@ void z8_device::call(uint16_t dst)
}
INSTRUCTION( call_IRR1 ) { uint16_t dst = register_pair_read(get_intermediate_register(get_register(fetch()))); call(dst); }
INSTRUCTION( call_DA ) { uint16_t dst = (fetch() << 8) | fetch(); call(dst); }
INSTRUCTION( call_DA ) { uint16_t dst = fetch_word(); call(dst); }
INSTRUCTION( djnz_r1_RA )
{
@ -567,7 +580,7 @@ int z8_device::check_condition_code(int cc)
INSTRUCTION( jp_cc_DA )
{
uint16_t dst = (fetch() << 8) | fetch();
uint16_t dst = fetch_word();
/* if cc is true, then PC <- dst */
if (check_condition_code(opcode >> 4))

View File

@ -185,7 +185,7 @@ floppy_image_device::floppy_image_device(const machine_config &mconfig, device_t
motor_always_on(false),
dskchg_writable(false),
has_trk00_sensor(true),
dir(0), stp(0), wtg(0), mon(0), ss(0), idx(0), wpt(0), rdy(0), dskchg(0),
dir(0), stp(0), wtg(0), mon(0), ss(0), ds(-1), idx(0), wpt(0), rdy(0), dskchg(0),
ready(false),
rpm(0),
floppy_ratio_1(0),
@ -240,6 +240,11 @@ void floppy_image_device::setup_wpt_cb(wpt_cb cb)
cur_wpt_cb = cb;
}
void floppy_image_device::setup_led_cb(led_cb cb)
{
cur_led_cb = cb;
}
void floppy_image_device::set_formats(const floppy_format_type *formats)
{
extension_list[0] = '\0';
@ -314,6 +319,9 @@ void floppy_image_device::device_start()
dskchg_writable = false;
has_trk00_sensor = true;
// better would be an extra parameter in the MCFG macro
drive_index = atoi(owner()->basetag());
idx = 0;
/* motor off */
@ -322,6 +330,7 @@ void floppy_image_device::device_start()
cyl = 0;
subcyl = 0;
ss = 0;
ds = -1;
stp = 1;
wpt = 0;
dskchg = exists() ? 1 : 0;
@ -349,11 +358,7 @@ void floppy_image_device::device_reset()
revolution_start_time = attotime::never;
revolution_count = 0;
mon = 1;
if(!ready) {
ready = true;
if(!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
}
set_ready(true);
if(motor_always_on)
mon_w(0);
}
@ -480,11 +485,9 @@ void floppy_image_device::call_unload()
if (motor_always_on) {
// When disk is removed, stop motor
mon_w(1);
} else if(!ready) {
ready = true;
if(!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
}
set_ready(true);
}
image_init_result floppy_image_device::call_create(int format_type, util::option_resolution *format_options)
@ -535,9 +538,7 @@ void floppy_image_device::mon_w(int state)
if (motor_always_on) {
// Drives with motor that is always spinning are immediately ready when a disk is loaded
// because there is no spin-up time
ready = false;
if(!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
set_ready(false);
} else {
ready_counter = 2;
}
@ -550,11 +551,7 @@ void floppy_image_device::mon_w(int state)
commit_image();
revolution_start_time = attotime::never;
index_timer->adjust(attotime::zero);
if(!ready) {
ready = true;
if(!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
}
set_ready(true);
}
// Create a motor sound (loaded or empty)
@ -602,9 +599,7 @@ void floppy_image_device::index_resync()
ready_counter--;
if(!ready_counter) {
// logerror("Drive spun up\n");
ready = false;
if(!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
set_ready(false);
}
}
if (!cur_index_pulse_cb.isnull())
@ -617,6 +612,23 @@ bool floppy_image_device::ready_r()
return ready;
}
void floppy_image_device::set_ready(bool state)
{
if (state != ready)
{
ready = state;
check_led();
if (!cur_ready_cb.isnull())
cur_ready_cb(this, ready);
}
}
void floppy_image_device::check_led()
{
if(!cur_led_cb.isnull())
cur_led_cb(this, (ds == drive_index) && !ready ? 1 : 0);
}
double floppy_image_device::get_pos()
{
return index_timer->elapsed().as_double();

View File

@ -76,6 +76,7 @@ public:
typedef delegate<void (floppy_image_device *, int)> index_pulse_cb;
typedef delegate<void (floppy_image_device *, int)> ready_cb;
typedef delegate<void (floppy_image_device *, int)> wpt_cb;
typedef delegate<void (floppy_image_device *, int)> led_cb;
// construction/destruction
virtual ~floppy_image_device();
@ -109,12 +110,14 @@ public:
void setup_index_pulse_cb(index_pulse_cb cb);
void setup_ready_cb(ready_cb cb);
void setup_wpt_cb(wpt_cb cb);
void setup_led_cb(led_cb cb);
std::vector<uint32_t> &get_buffer() { return image->get_buffer(cyl, ss, subcyl); }
int get_cyl() { return cyl; }
void mon_w(int state);
bool ready_r();
void set_ready(bool state);
double get_pos();
bool wpt_r() { return wpt; }
@ -131,6 +134,7 @@ public:
void ss_w(int state) { ss = state; }
void inuse_w(int state) { }
void dskchg_w(int state) { if (dskchg_writable) dskchg = state; }
void ds_w(int state) { ds = state; check_led(); }
void index_resync();
attotime time_next_index();
@ -173,12 +177,15 @@ protected:
bool dskchg_writable;
bool has_trk00_sensor;
int drive_index;
/* state of input lines */
int dir; /* direction */
int stp; /* step */
int wtg; /* write gate */
int mon; /* motor on */
int ss; /* side select */
int ds; /* drive select */
/* state of output lines */
int idx; /* index pulse */
@ -203,7 +210,9 @@ protected:
index_pulse_cb cur_index_pulse_cb;
ready_cb cur_ready_cb;
wpt_cb cur_wpt_cb;
led_cb cur_led_cb;
void check_led();
uint32_t find_position(attotime &base, const attotime &when);
int find_index(uint32_t position, const std::vector<uint32_t> &buf);
void write_zone(uint32_t *buf, int &cells, int &index, uint32_t spos, uint32_t epos, uint32_t mg);

View File

@ -128,8 +128,15 @@ MACHINE_CONFIG_MEMBER( cs4031_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(cs4031_device, dma2_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(cs4031_device, dma2_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(cs4031_device, dma2_dack3_w))
MCFG_PIC8259_ADD("intc1", WRITELINE(cs4031_device, intc1_int_w), VCC, READ8(cs4031_device, intc1_slave_ack_r))
MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NOOP)
MCFG_DEVICE_ADD("intc1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(cs4031_device, intc1_int_w))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(cs4031_device, intc1_slave_ack_r))
MCFG_DEVICE_ADD("intc2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("intc1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("ctc", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL_14_31818MHz / 12.0)

View File

@ -36,11 +36,24 @@
datasheet, for example), and the /WE must be held low for the entire
write/erase duration in order to guarantee the data is written.
Though it is possible for the /OE line to be strobed directly upon
read accesses, it may also be controlled independently of /CS. For the
sake of convenience, the device here can also be configured to emulate
a small amount of external circuitry (1/2 of a LS74 flip-flop and 1
gate of a LS02 or LS08), typically used by Atari Games, that reasserts
/OE low to lock the EEPROM after each byte of data is written and upon
reset, with extra writes required to unlock the EEPROM in between.
***************************************************************************/
#include "emu.h"
#include "machine/eeprompar.h"
//#define VERBOSE 1
#include "logmacro.h"
// set this to 1 to break Prop Cycle (28C64 page write emulation needed)
#define EMULATE_POLLING 0
//**************************************************************************
@ -89,26 +102,112 @@ void eeprom_parallel_base_device::device_reset()
//-------------------------------------------------
eeprom_parallel_28xx_device::eeprom_parallel_28xx_device(const machine_config &mconfig, device_type devtype, const char *tag, device_t *owner)
: eeprom_parallel_base_device(mconfig, devtype, tag, owner)
: eeprom_parallel_base_device(mconfig, devtype, tag, owner),
m_lock_after_write(false),
m_oe(-1)
{
}
//-------------------------------------------------
// static_set_lock_after_write - configuration
// helper to enable simulation of external
// flip-flop hooked to lock EEPROM after writes
//-------------------------------------------------
void eeprom_parallel_28xx_device::static_set_lock_after_write(device_t &device, bool lock)
{
downcast<eeprom_parallel_28xx_device &>(device).m_lock_after_write = lock;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void eeprom_parallel_28xx_device::device_start()
{
// start the base class
eeprom_parallel_base_device::device_start();
save_item(NAME(m_oe));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void eeprom_parallel_28xx_device::device_reset()
{
// reset the base class
eeprom_parallel_base_device::device_reset();
if (m_lock_after_write)
m_oe = 0;
}
//-------------------------------------------------
// read/write - read/write handlers
//-------------------------------------------------
WRITE8_MEMBER(eeprom_parallel_28xx_device::write)
{
eeprom_base_device::write(offset, data);
if (m_oe == 0)
{
// Master Boy writes every byte twice, resetting a control line in between, for some reason not clear
if (internal_read(offset) != data)
LOG("%s: Write attempted while /OE active (offset = %X, data = %02X)\n", machine().describe_context(), offset, data);
}
else
{
LOG("%s: Write cycle started (offset = %X, data = %02X)\n", machine().describe_context(), offset, data);
eeprom_base_device::write(offset, data);
if (m_lock_after_write)
m_oe = 0;
}
}
READ8_MEMBER(eeprom_parallel_28xx_device::read)
{
return eeprom_base_device::read(offset);
if (m_oe == 1)
{
LOG("%s: Read attempted while /OE inactive (offset = %X)\n", machine().describe_context(), offset);
return space.unmap();
}
// if a write has not completed yet, the highest bit of data written will be read back inverted when polling the offset
if (ready() || !EMULATE_POLLING)
return eeprom_base_device::read(offset);
else
{
LOG("%s: Data read back before write completed (offset = %X)\n", machine().describe_context(), offset);
return ~internal_read(offset) & 0x80;
}
}
//-------------------------------------------------
// oe_w - direct write to /OE (true line state)
//-------------------------------------------------
WRITE_LINE_MEMBER(eeprom_parallel_28xx_device::oe_w)
{
LOG("%s: EEPROM %s for writing\n", machine().describe_context(), state ? "unlocked" : "locked");
m_oe = state ? 1 : 0;
}
//-------------------------------------------------
// unlock_write - unlock EEPROM by deasserting
// /OE line through external flip-flop
//-------------------------------------------------
WRITE8_MEMBER(eeprom_parallel_28xx_device::unlock_write) { oe_w(1); }
WRITE16_MEMBER(eeprom_parallel_28xx_device::unlock_write) { oe_w(1); }
WRITE32_MEMBER(eeprom_parallel_28xx_device::unlock_write) { oe_w(1); }
//**************************************************************************
// DERIVED TYPES

View File

@ -38,6 +38,9 @@
#define MCFG_EEPROM_28040_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, EEPROM_PARALLEL_28040, 0)
// true when external circuit is used to lock EEPROM after every write
#define MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(_lock) \
eeprom_parallel_28xx_device::static_set_lock_after_write(*device, _lock);
//**************************************************************************
@ -65,14 +68,33 @@ protected:
class eeprom_parallel_28xx_device : public eeprom_parallel_base_device
{
public:
// read/write data lines - for now we cheat and ignore the control lines, assuming
// they are handled reasonably
// static configuration helpers
static void static_set_lock_after_write(device_t &device, bool lock);
// read/write data lines
DECLARE_WRITE8_MEMBER(write);
DECLARE_READ8_MEMBER(read);
// control lines
DECLARE_WRITE_LINE_MEMBER(oe_w);
DECLARE_WRITE8_MEMBER(unlock_write);
DECLARE_WRITE16_MEMBER(unlock_write);
DECLARE_WRITE32_MEMBER(unlock_write);
protected:
// construction/destruction
eeprom_parallel_28xx_device(const machine_config &mconfig, device_type devtype, const char *tag, device_t *owner);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
private:
// configuration state
bool m_lock_after_write; // lock EEPROM after writes
// runtime state
int m_oe; // state of OE line (-1 = synchronized with read)
};

View File

@ -426,7 +426,8 @@ MACHINE_CONFIG_MEMBER( ibm5160_mb_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(ibm5160_mb_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(ibm5160_mb_device, pc_dack3_w))
MCFG_PIC8259_ADD( "pic8259", INPUTLINE(":maincpu", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(ibm5160_mb_device, pc_ppi_porta_r))

View File

@ -99,7 +99,8 @@ const tiny_rom_entry *i80130_device::device_rom_region() const
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( i80130_device::device_add_mconfig )
MCFG_PIC8259_ADD("pic", DEVWRITELINE(DEVICE_SELF, i80130_device, irq_w), VCC, NOOP)
MCFG_DEVICE_ADD("pic", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(i80130_device, irq_w))
MCFG_DEVICE_ADD("pit", PIT8254, 0)
MCFG_PIT8253_CLK0(0)

View File

@ -99,8 +99,14 @@ MACHINE_CONFIG_MEMBER( i82371sb_isa_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(i82371sb_isa_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(i82371sb_isa_device, pc_dack7_w))
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, READ8(i82371sb_isa_device, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NOOP)
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(i82371sb_isa_device, get_slave_ack))
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET))

View File

@ -144,6 +144,28 @@ void pc16552_device::device_start()
#define COM_INT_PENDING_MODEM_STATUS_REGISTER 0x0008
#define COM_INT_PENDING_CHAR_TIMEOUT 0x0011
static constexpr uint8_t INS8250_LSR_TSRE = 0x40;
static constexpr uint8_t INS8250_LSR_THRE = 0x20;
//static constexpr uint8_t INS8250_LSR_BI = 0x10;
//static constexpr uint8_t INS8250_LSR_FE = 0x08;
//static constexpr uint8_t INS8250_LSR_PE = 0x04;
static constexpr uint8_t INS8250_LSR_OE = 0x02;
static constexpr uint8_t INS8250_LSR_DR = 0x01;
static constexpr uint8_t INS8250_MCR_DTR = 0x01;
static constexpr uint8_t INS8250_MCR_RTS = 0x02;
static constexpr uint8_t INS8250_MCR_OUT1 = 0x04;
static constexpr uint8_t INS8250_MCR_OUT2 = 0x08;
static constexpr uint8_t INS8250_MCR_LOOPBACK = 0x10;
static constexpr uint8_t INS8250_LCR_BITCOUNT_MASK= 0x03;
static constexpr uint8_t INS8250_LCR_2STOP_BITS = 0x04;
//static constexpr uint8_t INS8250_LCR_PEN = 0x08;
//static constexpr uint8_t INS8250_LCR_EVEN_PAR = 0x10;
//static constexpr uint8_t INS8250_LCR_PARITY = 0x20;
//static constexpr uint8_t INS8250_LCR_BREAK = 0x40;
static constexpr uint8_t INS8250_LCR_DLAB = 0x80;
/* ints will continue to be set for as long as there are ints pending */
void ins8250_uart_device::update_interrupt()
{
@ -210,7 +232,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
switch (offset)
{
case 0:
if (m_regs.lcr & 0x80)
if (m_regs.lcr & INS8250_LCR_DLAB)
{
m_regs.dl = (m_regs.dl & 0xff00) | data;
set_rate(clock(), m_regs.dl*16);
@ -218,23 +240,23 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
else
{
m_regs.thr = data;
m_regs.lsr &= ~0x20;
m_regs.lsr &= ~INS8250_LSR_THRE;
if((m_device_type >= dev_type::NS16550) && (m_regs.fcr & 1))
push_tx(data);
clear_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
if(m_regs.lsr & 0x40)
if(m_regs.lsr & INS8250_LSR_TSRE)
tra_complete();
}
break;
case 1:
if (m_regs.lcr & 0x80)
if (m_regs.lcr & INS8250_LCR_DLAB)
{
m_regs.dl = (m_regs.dl & 0xff) | (data << 8);
set_rate(clock(), m_regs.dl*16);
}
else
{
if ((m_regs.lsr & 0x20) && (data & COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY))
if ((m_regs.lsr & INS8250_LSR_THRE) && (data & COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY))
trigger_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
m_regs.ier = data;
update_interrupt();
@ -247,7 +269,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
m_regs.lcr = data;
{
int data_bit_count = (m_regs.lcr & 3) + 5;
int data_bit_count = (m_regs.lcr & INS8250_LCR_BITCOUNT_MASK) + 5;
parity_t parity;
stop_bits_t stop_bits;
@ -274,7 +296,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
break;
}
if (!(m_regs.lcr & 4))
if (!(m_regs.lcr & INS8250_LCR_2STOP_BITS))
stop_bits = STOP_BITS_1;
else if (data_bit_count == 5)
stop_bits = STOP_BITS_1_5;
@ -291,7 +313,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
update_msr();
if (m_regs.mcr & 0x10) /* loopback test */
if (m_regs.mcr & INS8250_MCR_LOOPBACK)
{
m_out_tx_cb(1);
device_serial_interface::rx_w(m_txd);
@ -304,10 +326,10 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
{
m_out_tx_cb(m_txd);
device_serial_interface::rx_w(m_rxd);
m_out_dtr_cb((m_regs.mcr & 1) ? 0 : 1);
m_out_rts_cb((m_regs.mcr & 2) ? 0 : 1);
m_out_out1_cb((m_regs.mcr & 4) ? 0 : 1);
m_out_out2_cb((m_regs.mcr & 8) ? 0 : 1);
m_out_dtr_cb((m_regs.mcr & INS8250_MCR_DTR) ? 0 : 1);
m_out_rts_cb((m_regs.mcr & INS8250_MCR_RTS) ? 0 : 1);
m_out_out1_cb((m_regs.mcr & INS8250_MCR_OUT1) ? 0 : 1);
m_out_out2_cb((m_regs.mcr & INS8250_MCR_OUT2) ? 0 : 1);
}
}
break;
@ -317,12 +339,12 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
bits 5 - 0, you could cause an interrupt if the appropriate IER bit
is set.
*/
m_regs.lsr = (m_regs.lsr & 0x60) | (data & ~0x60);
m_regs.lsr = (m_regs.lsr & (INS8250_LSR_TSRE|INS8250_LSR_THRE)) | (data & ~(INS8250_LSR_TSRE|INS8250_LSR_THRE));
tmp = 0;
tmp |= ( m_regs.lsr & 0x01 ) ? COM_INT_PENDING_RECEIVED_DATA_AVAILABLE : 0;
tmp |= ( m_regs.lsr & INS8250_LSR_DR ) ? COM_INT_PENDING_RECEIVED_DATA_AVAILABLE : 0;
tmp |= ( m_regs.lsr & 0x1e ) ? COM_INT_PENDING_RECEIVER_LINE_STATUS : 0;
tmp |= ( m_regs.lsr & 0x20 ) ? COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY : 0;
tmp |= ( m_regs.lsr & INS8250_LSR_THRE ) ? COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY : 0;
trigger_int(tmp);
break;
@ -350,7 +372,7 @@ READ8_MEMBER( ins8250_uart_device::ins8250_r )
switch (offset)
{
case 0:
if (m_regs.lcr & 0x80)
if (m_regs.lcr & INS8250_LCR_DLAB)
data = (m_regs.dl & 0xff);
else
{
@ -359,14 +381,14 @@ READ8_MEMBER( ins8250_uart_device::ins8250_r )
else
{
clear_int(COM_INT_PENDING_RECEIVED_DATA_AVAILABLE);
if( m_regs.lsr & 0x01 )
m_regs.lsr &= ~0x01;
if( m_regs.lsr & INS8250_LSR_DR )
m_regs.lsr &= ~INS8250_LSR_DR;
}
data = m_regs.rbr;
}
break;
case 1:
if (m_regs.lcr & 0x80)
if (m_regs.lcr & INS8250_LCR_DLAB)
data = (m_regs.dl >> 8);
else
data = m_regs.ier & 0x0f;
@ -416,12 +438,12 @@ void ns16550_device::rcv_complete()
if(m_rnum == 16)
{
m_regs.lsr |= 0x02; //overrun
m_regs.lsr |= INS8250_LSR_OE; //overrun
trigger_int(COM_INT_PENDING_RECEIVER_LINE_STATUS);
return;
}
m_regs.lsr |= 0x01;
m_regs.lsr |= INS8250_LSR_DR;
m_rfifo[m_rhead] = get_received_char();
++m_rhead &= 0x0f;
m_rnum++;
@ -439,10 +461,10 @@ void ns16550_device::tra_complete()
{
transmit_register_setup(m_tfifo[m_ttail]);
++m_ttail &= 0x0f;
m_regs.lsr &= ~0x40;
m_regs.lsr &= ~INS8250_LSR_TSRE;
if(m_ttail == m_thead)
{
m_regs.lsr |= 0x20;
m_regs.lsr |= INS8250_LSR_THRE;
trigger_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
}
}
@ -452,15 +474,15 @@ void ns16550_device::tra_complete()
void ins8250_uart_device::rcv_complete()
{
if(m_regs.lsr & 0x01)
if(m_regs.lsr & INS8250_LSR_DR)
{
m_regs.lsr |= 0x02; //overrun
m_regs.lsr |= INS8250_LSR_OE; //overrun
trigger_int(COM_INT_PENDING_RECEIVER_LINE_STATUS);
receive_register_reset();
}
else
{
m_regs.lsr |= 0x01;
m_regs.lsr |= INS8250_LSR_DR;
receive_register_extract();
m_regs.rbr = get_received_char();
trigger_int(COM_INT_PENDING_RECEIVED_DATA_AVAILABLE);
@ -469,21 +491,21 @@ void ins8250_uart_device::rcv_complete()
void ins8250_uart_device::tra_complete()
{
if(!(m_regs.lsr & 0x20))
if(!(m_regs.lsr & INS8250_LSR_THRE))
{
transmit_register_setup(m_regs.thr);
m_regs.lsr &= ~0x40;
m_regs.lsr |= 0x20;
m_regs.lsr &= ~INS8250_LSR_TSRE;
m_regs.lsr |= INS8250_LSR_THRE;
trigger_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
}
else
m_regs.lsr |= 0x40;
m_regs.lsr |= INS8250_LSR_TSRE;
}
void ins8250_uart_device::tra_callback()
{
m_txd = transmit_register_get_data_bit();
if (m_regs.mcr & 0x10)
if (m_regs.mcr & INS8250_MCR_LOOPBACK)
{
device_serial_interface::rx_w(m_txd);
}
@ -498,9 +520,10 @@ void ins8250_uart_device::update_msr()
uint8_t data;
int change;
if (m_regs.mcr & 0x10)
if (m_regs.mcr & INS8250_MCR_LOOPBACK)
{
data = (((m_regs.mcr & 0x0c) << 4) | ((m_regs.mcr & 0x01) << 5) | ((m_regs.mcr & 0x02) << 3));
data = ((m_regs.mcr & (INS8250_MCR_OUT1|INS8250_MCR_OUT2) << 4) | \
((m_regs.mcr & INS8250_MCR_DTR) << 5) | ((m_regs.mcr & INS8250_MCR_RTS) << 3));
change = (m_regs.msr ^ data) >> 4;
if(!(m_regs.msr & 0x40) && (data & 0x40))
change &= ~4;
@ -545,7 +568,7 @@ WRITE_LINE_MEMBER(ins8250_uart_device::rx_w)
{
m_rxd = state;
if (!(m_regs.mcr & 0x10))
if (!(m_regs.mcr & INS8250_MCR_LOOPBACK))
device_serial_interface::rx_w(m_rxd);
}
@ -586,7 +609,7 @@ void ins8250_uart_device::device_reset()
m_regs.iir = 1;
m_regs.lcr = 0;
m_regs.mcr = 0;
m_regs.lsr = (1<<5) | (1<<6);
m_regs.lsr = INS8250_LSR_THRE | INS8250_LSR_TSRE;
update_msr();
m_regs.msr &= 0xf0;
m_int_pending = 0;
@ -661,7 +684,7 @@ uint8_t ns16550_device::pop_rx()
else
{
m_timeout->adjust(attotime::never);
m_regs.lsr &= ~1;
m_regs.lsr &= ~INS8250_LSR_DR;
}
return data;
@ -689,7 +712,7 @@ void ns16550_device::set_fcr(uint8_t data)
{
memset(&m_tfifo, '\0', sizeof(m_tfifo));
m_thead = m_ttail = 0;
m_regs.lsr |= 0x20;
m_regs.lsr |= INS8250_LSR_THRE;
trigger_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
}
m_rintlvl = bytes_per_int[(data>>6)&3];

View File

@ -340,7 +340,7 @@ void pic8259_device::device_start()
{
// resolve callbacks
m_out_int_func.resolve_safe();
m_sp_en_func.resolve_safe(1);
m_in_sp_func.resolve_safe(1);
m_read_slave_ack_func.resolve_safe(0);
// Register save state items
@ -395,7 +395,7 @@ void pic8259_device::device_reset()
m_vector_addr_low = 0;
m_vector_addr_high = 0;
m_master = m_sp_en_func();
m_master = m_in_sp_func();
}
DEFINE_DEVICE_TYPE(PIC8259, pic8259_device, "pic8259", "Intel 8259 PIC")
@ -403,7 +403,7 @@ DEFINE_DEVICE_TYPE(PIC8259, pic8259_device, "pic8259", "Intel 8259 PIC")
pic8259_device::pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, PIC8259, tag, owner, clock)
, m_out_int_func(*this)
, m_sp_en_func(*this)
, m_in_sp_func(*this)
, m_read_slave_ack_func(*this)
, m_irr(0)
, m_irq_lines(0)

View File

@ -32,11 +32,17 @@
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_PIC8259_ADD(_tag, _out_int, _sp_en, _read_slave_ack) \
MCFG_DEVICE_ADD(_tag, PIC8259, 0) \
devcb = &pic8259_device::static_set_out_int_callback( *device, DEVCB_##_out_int ); \
devcb = &pic8259_device::static_set_sp_en_callback( *device, DEVCB_##_sp_en ); \
devcb = &pic8259_device::static_set_read_slave_ack_callback( *device, DEVCB_##_read_slave_ack );
// Interrupt request output to CPU or master 8259 (active high)
#define MCFG_PIC8259_OUT_INT_CB(_devcb) \
devcb = &pic8259_device::static_set_out_int_callback(*device, DEVCB_##_devcb);
// Slave program select (VCC = master; GND = slave; pin becomes EN output in buffered mode)
#define MCFG_PIC8259_IN_SP_CB(_devcb) \
devcb = &pic8259_device::static_set_in_sp_callback(*device, DEVCB_##_devcb);
// Cascaded interrupt acknowledge request for slave 8259 to place vector on data bus
#define MCFG_PIC8259_CASCADE_ACK_CB(_devcb) \
devcb = &pic8259_device::static_set_read_slave_ack_callback(*device, DEVCB_##_devcb);
class pic8259_device : public device_t
@ -45,7 +51,7 @@ public:
pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> static devcb_base &static_set_out_int_callback(device_t &device, Object &&cb) { return downcast<pic8259_device &>(device).m_out_int_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &static_set_sp_en_callback(device_t &device, Object &&cb) { return downcast<pic8259_device &>(device).m_sp_en_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &static_set_in_sp_callback(device_t &device, Object &&cb) { return downcast<pic8259_device &>(device).m_in_sp_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &static_set_read_slave_ack_callback(device_t &device, Object &&cb) { return downcast<pic8259_device &>(device).m_read_slave_ack_func.set_callback(std::forward<Object>(cb)); }
DECLARE_READ8_MEMBER( read );
@ -86,7 +92,7 @@ private:
};
devcb_write_line m_out_int_func;
devcb_read_line m_sp_en_func;
devcb_read_line m_in_sp_func;
devcb_read8 m_read_slave_ack_func;
state_t m_state;

View File

@ -87,8 +87,14 @@ MACHINE_CONFIG_MEMBER(sis85c496_host_device::device_add_mconfig)
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(sis85c496_host_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(sis85c496_host_device, pc_dack7_w))
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, READ8(sis85c496_host_device, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NOOP)
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(sis85c496_host_device, get_slave_ack))
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL_12MHz)
MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET))

View File

@ -387,7 +387,8 @@ void smc91c9x_device::process_command(uint16_t data)
logerror(" RESET TX FIFOS\n");
break;
}
m_reg[EREG_MMU_COMMAND] &= ~0x0001;
// Set Busy (clear on next read)
m_reg[EREG_MMU_COMMAND] |= 0x0001;
}
@ -412,6 +413,11 @@ READ16_MEMBER( smc91c9x_device::read )
switch (offset)
{
case EREG_MMU_COMMAND:
// Clear busy
m_reg[EREG_MMU_COMMAND] &= ~0x0001;
break;
case EREG_PNR_ARR:
if (ACCESSING_BITS_8_15)
{
@ -556,6 +562,9 @@ WRITE16_MEMBER( smc91c9x_device::write )
case EREG_INTERRUPT:
m_reg[EREG_INTERRUPT] &= ~(data & 0x56);
// Need to clear tx int here for vegas cartfury
if (m_reg[EREG_FIFO_PORTS] & 0x0080)
m_reg[EREG_INTERRUPT] &= ~EINT_TX;
update_ethernet_irq();
break;
}

View File

@ -11,6 +11,7 @@ DEFINE_DEVICE_TYPE(UPD765A, upd765a_device, "upd765a", "NEC
DEFINE_DEVICE_TYPE(UPD765B, upd765b_device, "upd765b", "NEC uPD765B FDC")
DEFINE_DEVICE_TYPE(I8272A, i8272a_device, "i8272a", "Intel 8272A FDC")
DEFINE_DEVICE_TYPE(UPD72065, upd72065_device, "upd72065", "NEC uPD72065 FDC")
DEFINE_DEVICE_TYPE(I82072, i82072_device, "i82072", "Intel 82072 FDC")
DEFINE_DEVICE_TYPE(SMC37C78, smc37c78_device, "smc37c78", "SMC FDC73C78 FDC")
DEFINE_DEVICE_TYPE(N82077AA, n82077aa_device, "n82077aa", "Intel N82077AA FDC")
DEFINE_DEVICE_TYPE(PC_FDC_SUPERIO, pc_fdc_superio_device, "pc_fdc_superio", "PC FDC SUPERIO")
@ -40,6 +41,11 @@ DEVICE_ADDRESS_MAP_START(map, 8, upd72065_device)
AM_RANGE(0x1, 0x1) AM_READWRITE(fifo_r, fifo_w)
ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(map, 8, i82072_device)
AM_RANGE(0x0, 0x0) AM_READWRITE(msr_r, dsr_w)
AM_RANGE(0x1, 0x1) AM_READWRITE(fifo_r, fifo_w)
ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(map, 8, smc37c78_device)
AM_RANGE(0x2, 0x2) AM_READWRITE(dor_r, dor_w)
AM_RANGE(0x3, 0x3) AM_READWRITE(tdr_r, tdr_w)
@ -261,6 +267,16 @@ bool upd765_family_device::get_ready(int fid)
return !external_ready;
}
void upd765_family_device::set_ds(int state)
{
for(int i = 0; i < 4; i++)
{
floppy_info &fi = flopi[i];
if (fi.dev)
fi.dev->ds_w(state);
}
}
void upd765_family_device::set_floppy(floppy_image_device *flop)
{
for(auto & elem : flopi) {
@ -1518,6 +1534,7 @@ void upd765_family_device::read_data_start(floppy_info &fi)
st1 = ST1_MA;
st2 = 0x00;
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -1563,6 +1580,7 @@ void upd765_family_device::scan_start(floppy_info &fi)
st2 = 0x00;
scan_done = false;
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -1752,6 +1770,7 @@ void upd765_family_device::write_data_start(floppy_info &fi)
st1 = ST1_MA;
st2 = 0x00;
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -1873,6 +1892,7 @@ void upd765_family_device::read_track_start(floppy_info &fi)
st1 = ST1_MA;
st2 = 0x00;
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -2034,6 +2054,7 @@ void upd765_family_device::format_track_start(floppy_info &fi)
command[1], command[2], command[3], command[4], command[5]);
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -2111,6 +2132,7 @@ void upd765_family_device::read_id_start(floppy_info &fi)
cur_live.idbuf[i] = 0x00;
hdl_cb(1);
set_ds(command[1] & 3);
fi.ready = get_ready(command[1] & 3);
if(!fi.ready)
@ -2446,6 +2468,11 @@ upd72065_device::upd72065_device(const machine_config &mconfig, const char *tag,
dor_reset = 0x0c;
}
i82072_device::i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, I82072, tag, owner, clock)
{
dor_reset = 0x0c;
}
smc37c78_device::smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : upd765_family_device(mconfig, SMC37C78, tag, owner, clock)
{
ready_connected = false;

View File

@ -33,6 +33,10 @@
downcast<upd72065_device *>(device)->set_ready_line_connected(_ready); \
downcast<upd72065_device *>(device)->set_select_lines_connected(_select);
#define MCFG_I82072_ADD(_tag, _ready) \
MCFG_DEVICE_ADD(_tag, I82072, 0) \
downcast<i82072_device *>(device)->set_ready_line_connected(_ready);
#define MCFG_SMC37C78_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SMC37C78, 0)
@ -369,6 +373,7 @@ protected:
uint8_t fifo_pop(bool internal);
void set_drq(bool state);
bool get_ready(int fid);
void set_ds(int state);
void enable_transfer();
void disable_transfer();
@ -441,6 +446,13 @@ public:
virtual DECLARE_ADDRESS_MAP(map, 8) override;
};
class i82072_device : public upd765_family_device {
public:
i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_ADDRESS_MAP(map, 8) override;
};
class smc37c78_device : public upd765_family_device {
public:
smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -526,6 +538,7 @@ DECLARE_DEVICE_TYPE(UPD765A, upd765a_device)
DECLARE_DEVICE_TYPE(UPD765B, upd765b_device)
DECLARE_DEVICE_TYPE(I8272A, i8272a_device)
DECLARE_DEVICE_TYPE(UPD72065, upd72065_device)
DECLARE_DEVICE_TYPE(I82072, i82072_device)
DECLARE_DEVICE_TYPE(SMC37C78, smc37c78_device)
DECLARE_DEVICE_TYPE(N82077AA, n82077aa_device)
DECLARE_DEVICE_TYPE(PC_FDC_SUPERIO, pc_fdc_superio_device)

View File

@ -241,6 +241,7 @@ void vrc5074_device::device_start()
save_item(NAME(m_nile_irq_state));
save_item(NAME(m_sdram_addr));
save_item(NAME(m_uart_irq));
save_item(NAME(m_timer_period));
machine().save().register_postload(save_prepost_delegate(FUNC(vrc5074_device::postload), this));
}
@ -740,21 +741,12 @@ void vrc5074_device::update_nile_irqs()
TIMER_CALLBACK_MEMBER(vrc5074_device::nile_timer_callback)
{
int which = param;
uint32_t *regs = &m_cpu_regs[NREG_T0CTRL + which * 4];
if (LOG_TIMERS) logerror("timer %d fired\n", which);
/* adjust the timer to fire again */
{
uint32_t scale = regs[0];
if (regs[1] & 2) {
uint32_t scaleSrc = (regs[1] >> 2) & 0x3;
uint32_t *scaleReg = &m_cpu_regs[NREG_T0CTRL + scaleSrc * 4];
scale *= scaleReg[0];
//logerror("Unexpected value: timer %d is prescaled\n", which);
logerror("Timer Scaling value: timer %d is prescaled from %08X to %08X\n", which, regs[0], scale);
}
if (scale != 0)
m_timer[which]->adjust(TIMER_PERIOD * scale, which);
m_timer[which]->adjust(attotime::from_double(m_timer_period[which]), which);
}
/* trigger the interrupt */
@ -837,15 +829,8 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r)
which = (offset - NREG_T0CNTR) / 4;
if (m_cpu_regs[offset - 1] & 1)
{
//if (m_cpu_regs[offset - 1] & 2)
// logerror("Unexpected value: timer %d is prescaled\n", which);
uint32_t scale = 1;
if (m_cpu_regs[offset - 1] & 2) {
uint32_t scaleSrc = (m_cpu_regs[offset - 1] >> 2) & 0x3;
scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4];
logerror("Timer value: timer %d is prescaled by \n", which, scale);
}
result = m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * (double)SYSTEM_CLOCK / scale;
// Should check for cascaded timer
result = m_cpu_regs[offset] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK;
}
if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, result);
@ -961,37 +946,26 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_T2CTRL + 1: /* general purpose timer control (control bits) */
case NREG_T3CTRL + 1: /* watchdog timer control (control bits) */
which = (offset - NREG_T0CTRL) / 4;
if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask);
if (LOG_NILE | LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask);
logit = 0;
m_timer_period[which] = (uint64_t(m_cpu_regs[NREG_T0CTRL + which * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double();
if (m_cpu_regs[offset] & 2) {
// Cascade timer
uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3;
m_timer_period[which] += (uint64_t(m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double();
logerror("Timer scale: timer %d is scaled by %08X\n", which, m_cpu_regs[NREG_T0CTRL + which * 4]);
}
/* timer just enabled? */
if (!(olddata & 1) && (m_cpu_regs[offset] & 1))
{
uint32_t scale = m_cpu_regs[offset - 1];
//if (m_cpu_regs[offset] & 2)
// logerror("Unexpected value: timer %d is prescaled\n", which);
if (m_cpu_regs[offset] & 2) {
uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3;
scale *= m_cpu_regs[NREG_T0CTRL + scaleSrc * 4];
logerror("Timer scale: timer %d is scaled by %08X\n", which, m_cpu_regs[NREG_T0CTRL + which * 4]);
}
if (scale != 0)
m_timer[which]->adjust(TIMER_PERIOD * scale, which);
if (LOG_TIMERS) logerror("Starting timer %d at a rate of %f Hz scale = %08X\n", which, ATTOSECONDS_TO_HZ((TIMER_PERIOD * (m_cpu_regs[offset + 1] + 1)).attoseconds()), scale);
m_timer[which]->adjust(attotime::from_double(m_timer_period[which]), which);
if (LOG_TIMERS) logerror("Starting timer %d at a rate of %f Hz\n", which, ATTOSECONDS_TO_HZ(attotime::from_double(m_timer_period[which]).as_attoseconds()));
}
/* timer disabled? */
else if ((olddata & 1) && !(m_cpu_regs[offset] & 1))
{
//if (m_cpu_regs[offset] & 2)
// logerror("Unexpected value: timer %d is prescaled\n", which);
uint32_t scale = 1;
if (m_cpu_regs[offset] & 2) {
uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3;
scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4];
logerror("Timer scale: timer %d is scaled by %08X\n", which, scale);
}
m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK / scale;
m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK;
m_timer[which]->adjust(attotime::never, which);
}
break;
@ -1006,15 +980,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
if (m_cpu_regs[offset - 1] & 1)
{
//if (m_cpu_regs[offset - 1] & 2)
// logerror("Unexpected value: timer %d is prescaled\n", which);
uint32_t scale = 1;
if (m_cpu_regs[offset - 1] & 2) {
uint32_t scaleSrc = (m_cpu_regs[offset - 1] >> 2) & 0x3;
scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4];
logerror("Timer scale: timer %d is scaled by %08X\n", which, scale);
}
m_timer[which]->adjust(TIMER_PERIOD * m_cpu_regs[offset] * scale, which);
m_timer[which]->adjust(attotime::from_hz(SYSTEM_CLOCK) * m_cpu_regs[offset], which);
}
break;
}

View File

@ -24,8 +24,6 @@
class vrc5074_device : public pci_host_device {
public:
static constexpr unsigned SYSTEM_CLOCK = 100000000;
vrc5074_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
required_device<ns16550_device> m_uart;
@ -79,6 +77,9 @@ protected:
virtual void device_reset() override;
private:
// This value is not verified to be correct
static constexpr unsigned SYSTEM_CLOCK = 100000000;
enum
{
AS_PCI_MEM = 1,
@ -99,6 +100,7 @@ private:
emu_timer* m_dma_timer;
TIMER_CALLBACK_MEMBER(dma_transfer);
emu_timer *m_timer[4];
double m_timer_period[4];
TIMER_CALLBACK_MEMBER(nile_timer_callback);
required_memory_region m_romRegion;

View File

@ -53,8 +53,15 @@ MACHINE_CONFIG_MEMBER( wd7600_device::device_add_mconfig )
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(wd7600_device, dma2_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(wd7600_device, dma2_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(wd7600_device, dma2_dack3_w))
MCFG_PIC8259_ADD("intc1", WRITELINE(wd7600_device, pic1_int_w), VCC, READ8(wd7600_device, pic1_slave_ack_r))
MCFG_PIC8259_ADD("intc2", DEVWRITELINE("intc1", pic8259_device, ir2_w), GND, NOOP)
MCFG_DEVICE_ADD("intc1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(wd7600_device, pic1_int_w))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(wd7600_device, pic1_slave_ack_r))
MCFG_DEVICE_ADD("intc2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("intc1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("ctc", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL_14_31818MHz / 12.0)

View File

@ -494,10 +494,12 @@ Yamaha YM2203: 2 I/O ports
The first 16 registers are the same(?) as the YM2149.
YM2203: Unused bits in registers have unknown behavior.
I/O current source/sink behavior is unknown.
YM2203 die is unknown; two die revisions, 'F' and 'H', have been observed
from Yamaha chip/datecode silkscreen surface markings. It is unknown
what behavioral differences exist between these two revisions.
The 'F' revision only appears during the first year of production.
YM2203 die is unknown; three die revisions, 'D', 'F' and 'H', have been
observed from Yamaha chip/datecode silkscreen surface markings. It is
unknown what behavioral differences exist between these revisions.
The 'D' revision only appears during the first year of production, 1984, on chips marked 'YM2203B'
The 'F' revision exists from 1984?-1991, chips are marked 'YM2203C'
The 'H' revision exists from 1991 onward, chips are marked 'YM2203C'
Yamaha YM3439: limited info: CMOS version of YM2149?
Yamaha YMZ284: limited info: 0 I/O port, different clock divider
The chip selection logic is again simplified here: pin 1 is /WR, pin 2 is

View File

@ -350,7 +350,7 @@ WRITE8_MEMBER( saa1099_device::control_w )
if ((data & 0xff) > 0x1c)
{
/* Error! */
logerror("%s: (SAA1099 '%s') Unknown register selected\n", machine().describe_context(), tag());
logerror("%s: Unknown register selected\n", machine().describe_context());
}
m_selected_reg = data & 0x1f;
@ -435,7 +435,7 @@ WRITE8_MEMBER( saa1099_device::data_w )
int i;
/* Synch & Reset generators */
logerror("%s: (SAA1099 '%s') -reg 0x1c- Chip reset\n", machine().describe_context(), tag());
logerror("%s: -reg 0x1c- Chip reset\n", machine().describe_context());
for (i = 0; i < 6; i++)
{
m_channels[i].level = 0;
@ -445,7 +445,7 @@ WRITE8_MEMBER( saa1099_device::data_w )
break;
default: /* Error! */
if (data != 0)
logerror("%s: (SAA1099 '%s') Unknown operation (reg:%02x, data:%02x)\n", machine().describe_context(), tag(), reg, data);
logerror("%s: Unknown operation (reg:%02x, data:%02x)\n", machine().describe_context(), reg, data);
}
}

View File

@ -283,8 +283,10 @@ READ8_MEMBER( mb_vcu_device::load_gfx )
uint8_t pen = 0;
uint8_t cur_layer;
// printf("%02x %02x\n",m_mode >> 2,m_mode & 3);
// cur_layer = (m_mode & 0x3);
cur_layer = 0;
cur_layer = (m_mode & 2) >> 1;
switch(m_mode >> 2)
{
@ -375,7 +377,10 @@ READ8_MEMBER( mb_vcu_device::load_gfx )
return 0; // open bus?
}
/*
Read-Modify-Write operation, not fully understood
---0 -111 (0x07) write to i/o?
---0 -011 (0x03) read to i/o?
---1 -011 (0x13) read to vram?
@ -386,7 +391,8 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
int dstx,dsty;
// uint8_t dot;
int bits = 0;
if(m_mode == 0x13 || m_mode == 0x03)
#if 0
if(m_mode == 0x13) //|| m_mode == 0x03)
{
printf("[0] %02x ",m_ram[m_param_offset_latch]);
printf("X: %04x ",m_xpos);
@ -399,11 +405,14 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
printf("VB:%02x ",m_vbank);
printf("\n");
}
#endif
switch(m_mode)
{
case 0x13:
case 0x03:
{
for (yi = 0; yi < m_pix_ysize; yi++)
{
for (xi = 0; xi < m_pix_xsize; xi++)
@ -413,6 +422,11 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
if(dstx < 256 && dsty < 256)
{
if(m_mode == 0x03)
write_byte(dstx|dsty<<8|0<<16|(m_vbank)<<18, 0xf);
// else
// write_byte(dstx|dsty<<8|1<<16|(m_vbank)<<18, 0xf);
#if 0
dot = m_cpu->space(AS_PROGRAM).read_byte(((offset + (bits >> 3)) & 0x1fff) + 0x4000) >> (6-(bits & 7));
dot&= 3;
@ -441,6 +455,7 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
}
}
break;
}
case 0x07:
for(int i=0;i<m_pix_xsize;i++)
@ -500,13 +515,13 @@ uint32_t mb_vcu_device::screen_update(screen_device &screen, bitmap_rgb32 &bitma
int x,y;
uint8_t dot;
bitmap.fill(0x100,cliprect);
bitmap.fill(m_palette->pen(0x100),cliprect);
for(y=0;y<256;y++)
{
for(x=0;x<256;x++)
{
dot = read_byte((x >> 0)|(y<<8)|0<<16|(m_vbank ^ 1)<<18);
dot = read_byte((x >> 0)|(y<<8)|1<<16|(m_vbank ^ 1)<<18);
//if(dot != 0xf)
{
dot|= m_vregs[1] << 4;
@ -516,62 +531,32 @@ uint32_t mb_vcu_device::screen_update(screen_device &screen, bitmap_rgb32 &bitma
}
}
#if 0
for(y=0;y<256;y++)
{
for(x=0;x<256;x++)
{
dot = read_byte((x >> 0)|(y<<8)|3<<16);
dot = read_byte((x >> 0)|(y<<8)|0<<16|(m_vbank ^ 1)<<18);
if(dot != 0xf)
{
dot|= m_vregs[1] << 4;
bitmap.pix32(y,x) = machine().pens[dot];
bitmap.pix32(y,x) = m_palette->pen(dot);
}
}
}
for(y=0;y<256;y++)
{
for(x=0;x<256;x++)
{
dot = read_byte((x >> 0)|(y<<8)|0<<16);
if(dot != 0xf)
{
dot|= m_vregs[1] << 4;
bitmap.pix32(y,x) = machine().pens[dot];
}
}
}
for(y=0;y<256;y++)
{
for(x=0;x<256;x++)
{
dot = read_byte((x >> 0)|(y<<8)|1<<16);
if(dot != 0xf)
{
dot|= m_vregs[1] << 4;
bitmap.pix32(y,x) = machine().pens[dot];
}
}
}
#endif
return 0;
}
void mb_vcu_device::screen_eof(void)
{
//for(int i=0;i<0x10000;i++)
#if 0
for(int i=0;i<0x10000;i++)
{
//write_byte(i|0x00000|m_vbank<<18,0x0f);
write_byte(i|0x00000|m_vbank<<18,0x0f);
//write_byte(i|0x10000|m_vbank<<18,0x0f);
//write_byte(i|0x30000|m_vbank<<18,0x0f);
}
#endif
}

View File

@ -2651,7 +2651,7 @@ void voodoo_device::raster_##name(void *destbase, int32_t y, const poly_extent *
/* determine the screen Y */ \
scry = y; \
if (FBZMODE_Y_ORIGIN(FBZMODE)) \
scry = (vd->fbi.yorigin - y) & 0x3ff; \
scry = (vd->fbi.yorigin - y); \
\
/* compute dithering */ \
COMPUTE_DITHER_POINTERS(FBZMODE, y, FOGMODE); \

View File

@ -2860,6 +2860,7 @@ int32_t voodoo_device::register_w(voodoo_device *vd, offs_t offset, uint32_t dat
break;
case trexInit1:
vd->logerror("VOODOO.%d.REG:%s(%d) write = %08X\n", vd->index, (regnum < 0x384 / 4) ? vd->regnames[regnum] : "oob", chips, data);
/* send tmu config data to the frame buffer */
vd->send_config = (TREXINIT_SEND_TMU_CONFIG(data) > 0);
goto default_case;
@ -3189,7 +3190,7 @@ int32_t voodoo_device::lfb_w(voodoo_device* vd, offs_t offset, uint32_t data, ui
/* determine the screen Y */
scry = y;
if (LFBMODE_Y_ORIGIN(vd->reg[lfbMode].u))
scry = (vd->fbi.yorigin - y) & 0x3ff;
scry = (vd->fbi.yorigin - y);
/* advance pointers to the proper row */
bufoffs = scry * vd->fbi.rowpixels + x;
@ -3247,7 +3248,7 @@ int32_t voodoo_device::lfb_w(voodoo_device* vd, offs_t offset, uint32_t data, ui
/* determine the screen Y */
scry = y;
if (FBZMODE_Y_ORIGIN(vd->reg[fbzMode].u))
scry = (vd->fbi.yorigin - y) & 0x3ff;
scry = (vd->fbi.yorigin - y);
/* advance pointers to the proper row */
dest += scry * vd->fbi.rowpixels;
@ -4055,7 +4056,7 @@ static uint32_t lfb_r(voodoo_device *vd, offs_t offset, bool lfb_3d)
/* determine the screen Y */
scry = y;
if (LFBMODE_Y_ORIGIN(vd->reg[lfbMode].u))
scry = (vd->fbi.yorigin - y) & 0x3ff;
scry = (vd->fbi.yorigin - y);
} else {
// Direct lfb access
buffer = (uint16_t *)(vd->fbi.ram + vd->fbi.lfb_base*4);
@ -5884,7 +5885,7 @@ void voodoo_device::raster_fastfill(void *destbase, int32_t y, const poly_extent
/* determine the screen Y */
scry = y;
if (FBZMODE_Y_ORIGIN(vd->reg[fbzMode].u))
scry = (vd->fbi.yorigin - y) & 0x3ff;
scry = (vd->fbi.yorigin - y);
/* fill this RGB row */
if (FBZMODE_RGB_BUFFER_MASK(vd->reg[fbzMode].u))

View File

@ -675,17 +675,28 @@ private:
// internal helpers
void load_bitmap()
{
// load the basic bitmap
assert(m_file != nullptr);
m_hasalpha = render_load_png(m_bitmap, *m_file, m_dirname.c_str(), m_imagefile.c_str());
// load the alpha bitmap if specified
if (m_bitmap.valid() && !m_alphafile.empty())
render_load_png(m_bitmap, *m_file, m_dirname.c_str(), m_alphafile.c_str(), true);
ru_imgformat const format = render_detect_image(*m_file, m_dirname.c_str(), m_imagefile.c_str());
switch (format)
{
case RENDUTIL_IMGFORMAT_ERROR:
break;
// PNG failed, let's try JPG
if (!m_bitmap.valid())
render_load_jpeg(m_bitmap, *m_file, m_dirname.c_str(), m_imagefile.c_str());
case RENDUTIL_IMGFORMAT_PNG:
// load the basic bitmap
m_hasalpha = render_load_png(m_bitmap, *m_file, m_dirname.c_str(), m_imagefile.c_str());
// load the alpha bitmap if specified
if (m_bitmap.valid() && !m_alphafile.empty())
render_load_png(m_bitmap, *m_file, m_dirname.c_str(), m_alphafile.c_str(), true);
break;
default:
// try JPG
render_load_jpeg(m_bitmap, *m_file, m_dirname.c_str(), m_imagefile.c_str());
break;
}
// if we can't load the bitmap, allocate a dummy one and report an error
if (!m_bitmap.valid())

View File

@ -5,6 +5,7 @@
rendutil.c
Core rendering utilities.
***************************************************************************/
#include "emu.h"
@ -795,3 +796,35 @@ static bool copy_png_alpha_to_bitmap(bitmap_argb32 &bitmap, const png_info &png)
// set the hasalpha flag
return (accumalpha != 0xff);
}
/*-------------------------------------------------
render_detect_image - detect image format
-------------------------------------------------*/
ru_imgformat render_detect_image(emu_file &file, const char *dirname, const char *filename)
{
// open the file
std::string fname;
if (dirname)
fname.assign(dirname).append(PATH_SEPARATOR).append(filename);
else
fname.assign(filename);
osd_file::error const filerr = file.open(fname.c_str());
if (filerr != osd_file::error::NONE)
return RENDUTIL_IMGFORMAT_ERROR;
// PNG: check for valid header
png_error const result = png_info::verify_header(file);
if (result == PNGERR_NONE)
{
file.close();
return RENDUTIL_IMGFORMAT_PNG;
}
file.seek(0, SEEK_SET);
// TODO: add more when needed
file.close();
return RENDUTIL_IMGFORMAT_UNKNOWN;
}

View File

@ -5,6 +5,7 @@
rendutil.h
Core rendering utilities.
***************************************************************************/
#ifndef MAME_EMU_RENDUTIL_H
@ -17,6 +18,18 @@
#include <math.h>
/* ----- image formats ----- */
enum ru_imgformat
{
RENDUTIL_IMGFORMAT_PNG,
RENDUTIL_IMGFORMAT_UNKNOWN,
RENDUTIL_IMGFORMAT_ERROR
};
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
@ -29,6 +42,7 @@ bool render_clip_quad(render_bounds *bounds, const render_bounds *clip, render_q
void render_line_to_quad(const render_bounds *bounds, float width, float length_extension, render_bounds *bounds0, render_bounds *bounds1);
void render_load_jpeg(bitmap_argb32 &bitmap, emu_file &file, const char *dirname, const char *filename);
bool render_load_png(bitmap_argb32 &bitmap, emu_file &file, const char *dirname, const char *filename, bool load_as_alpha_to_existing = false);
ru_imgformat render_detect_image(emu_file &file, const char *dirname, const char *filename);

View File

@ -746,6 +746,7 @@ void lua_engine::initialize()
* emu.print_info(str) -- output to stderr at info level
* emu.print_debug(str) -- output to stderr at debug level
* emu.driver_find(driver) -- find and return game_driver for driver
* emu.wait(len) -- wait from len within coroutine
*/
sol::table emu = sol().create_named_table("emu");
emu["app_name"] = &emulator_info::get_appname_lower;
@ -806,6 +807,7 @@ void lua_engine::initialize()
engine->machine().scheduler().timer_set(attotime::from_double(lua_tonumber(L, 1)), timer_expired_delegate(FUNC(lua_engine::resume), engine), 0, L);
return lua_yield(L, 0);
});
emu["lang_translate"] = &lang_translate;
/*
* emu.file([opt] searchpath, flags) - flags can be as in osdcore "OPEN_FLAG_*" or lua style with 'rwc' with addtional c for create *and truncate* (be careful)

View File

@ -180,7 +180,7 @@ std::string machine_info::warnings_string() const
buf << m_machine.rom_load().software_load_warnings_message();
// if we have at least one warning flag, print the general header
if ((m_machine.rom_load().knownbad() > 0) || (machine_flags() & (MACHINE_WARNINGS | MACHINE_BTANB)) || unemulated_features() || imperfect_features())
if ((m_machine.rom_load().knownbad() > 0) || (machine_flags() & (MACHINE_ERRORS | MACHINE_WARNINGS | MACHINE_BTANB)) || unemulated_features() || imperfect_features())
{
if (!buf.str().empty())
buf << '\n';

View File

@ -171,7 +171,7 @@ void strreplacechr(std::string& str, char ch, char newch)
}
}
static std::string internal_strtrimspace(std::string& str, bool right_only)
static std::string &internal_strtrimspace(std::string& str, bool right_only)
{
// identify the start
std::string::iterator start = str.begin();
@ -196,33 +196,33 @@ static std::string internal_strtrimspace(std::string& str, bool right_only)
return str;
}
std::string strtrimspace(std::string& str)
std::string &strtrimspace(std::string& str)
{
return internal_strtrimspace(str, false);
}
std::string strtrimrightspace(std::string& str)
std::string &strtrimrightspace(std::string& str)
{
return internal_strtrimspace(str, true);
}
std::string strmakeupper(std::string& str)
std::string &strmakeupper(std::string& str)
{
std::transform(str.begin(), str.end(), str.begin(), ::toupper);
return str;
}
/**
* @fn std::string strmakelower(std::string& str)
* @fn std::string &strmakelower(std::string& str)
*
* @brief Strmakelowers the given string.
* @brief Changes the given string to lower case.
*
* @param [in,out] str The string.
* @param [in,out] str The string to make lower case
*
* @return A std::string.
* @return A reference to the original std::string having been changed to lower case
*/
std::string strmakelower(std::string& str)
std::string &strmakelower(std::string& str)
{
std::transform(str.begin(), str.end(), str.begin(), ::tolower);
return str;

View File

@ -66,10 +66,10 @@ int strcatvprintf(std::string &str, const char *format, va_list args);
void strdelchr(std::string& str, char chr);
void strreplacechr(std::string& str, char ch, char newch);
std::string strtrimspace(std::string& str);
std::string strtrimrightspace(std::string& str);
std::string strmakeupper(std::string& str);
std::string strmakelower(std::string& str);
std::string &strtrimspace(std::string& str);
std::string &strtrimrightspace(std::string& str);
std::string &strmakeupper(std::string& str);
std::string &strmakelower(std::string& str);
int strreplace(std::string &str, const std::string& search, const std::string& replace);
#endif /* __CORESTR_H__ */

View File

@ -66,7 +66,7 @@ void png_info::free_data()
namespace {
#define PNG_Signature "\x89\x50\x4E\x47\x0D\x0A\x1A\x0A"
constexpr std::uint8_t PNG_SIGNATURE[] = { 0x89, 0x50, 0x4e, 0x47, 0x0d, 0x0a, 0x1a, 0x0a };
#define MNG_Signature "\x8A\x4D\x4E\x47\x0D\x0A\x1A\x0A"
// Chunk names
@ -413,21 +413,6 @@ private:
return ((samples[pnginfo.color_type] * pnginfo.bit_depth) + 7) >> 3;
}
static png_error verify_header(util::core_file &fp)
{
uint8_t signature[8];
/* read 8 bytes */
if (fp.read(signature, 8) != 8)
return PNGERR_FILE_TRUNCATED;
/* return an error if we don't match */
if (memcmp(signature, PNG_Signature, 8) != 0)
return PNGERR_BAD_SIGNATURE;
return PNGERR_NONE;
}
static png_error read_chunk(util::core_file &fp, std::unique_ptr<std::uint8_t []> &data, std::uint32_t &type, std::uint32_t &length)
{
std::uint8_t tempbuff[4];
@ -741,6 +726,21 @@ public:
return error;
}
static png_error verify_header(util::core_file &fp)
{
EQUIVALENT_ARRAY(PNG_SIGNATURE, std::uint8_t) signature;
// read 8 bytes
if (fp.read(signature, sizeof(signature)) != sizeof(signature))
return PNGERR_FILE_TRUNCATED;
// return an error if we don't match
if (std::memcmp(signature, PNG_SIGNATURE, sizeof(PNG_SIGNATURE)))
return PNGERR_BAD_SIGNATURE;
return PNGERR_NONE;
}
};
constexpr unsigned png_private::ADAM7_X_BIAS[7];
@ -755,6 +755,17 @@ constexpr unsigned png_private::ADAM7_Y_OFFS[7];
/*-------------------------------------------------
verify_header - verify PNG file header from a
core stream
-------------------------------------------------*/
png_error png_info::verify_header(util::core_file &fp)
{
return png_private::verify_header(fp);
}
/*-------------------------------------------------
read_file - read a PNG from a core stream
-------------------------------------------------*/
@ -1219,7 +1230,7 @@ png_error png_write_bitmap(util::core_file &fp, png_info *info, bitmap_t const &
info = &pnginfo;
// write the PNG signature
if (fp.write(PNG_Signature, 8) != 8)
if (fp.write(PNG_SIGNATURE, sizeof(PNG_SIGNATURE)) != sizeof(PNG_SIGNATURE))
return PNGERR_FILE_ERROR;
/* write the rest of the PNG data */

View File

@ -66,6 +66,8 @@ public:
void free_data();
void reset() { free_data(); operator=(png_info()); }
static png_error verify_header(util::core_file &fp);
std::unique_ptr<std::uint8_t []> image;
std::uint32_t width, height;
std::uint32_t xres = 0, yres = 0;

View File

@ -56,6 +56,13 @@ WRITE8_MEMBER(starwars_state::r6532_porta_w)
*
*************************************/
WRITE_LINE_MEMBER(starwars_state::boost_interleave_hack)
{
if (state)
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
}
READ8_MEMBER(starwars_state::starwars_main_ready_flag_r)
{
return m_riot->porta_in_get() & 0xc0; /* only upper two flag bits mapped */

View File

@ -418,7 +418,8 @@ static MACHINE_CONFIG_START( a7150 )
MCFG_CPU_IO_MAP(a7150_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
// IFSP port on processor card
MCFG_DEVICE_ADD("ppi8255", I8255, 0)

View File

@ -3045,7 +3045,7 @@ GAME( 1991, spikes91, pspikes, spikes91, pspikes, aerofgt_state, 0, ROT0, "
GAME( 1991, spikes91b, pspikes, spikes91, pspikes, aerofgt_state, 0, ROT0, "bootleg", "1991 Spikes (Italian bootleg, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND | MACHINE_NO_COCKTAIL )
GAME( 1991, pspikesc, pspikes, pspikesc, pspikesc, aerofgt_state, 0, ROT0, "bootleg", "Power Spikes (China)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_SOUND )
GAME( 1997, wbbc97, 0, wbbc97, wbbc97, aerofgt_state, 0, ROT0, "Comad", "Beach Festival World Championship 1997", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL ) // based on power spikes codebase
GAME( 1998, kickball, 0, kickball, pspikes, aerofgt_state, kickball, ROT0, "Seoung Youn", "Kick Ball", MACHINE_NOT_WORKING ) // based on power spikes codebase
GAME( 1998, kickball, 0, kickball, pspikes, aerofgt_state, kickball, ROT0, "Seoung Youn", "Kick Ball", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) // based on power spikes codebase, wrong priorities
GAME( 1991, karatblz, 0, karatblz, karatblz, aerofgt_state, 0, ROT0, "Video System Co.", "Karate Blazers (World, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
GAME( 1991, karatblza, karatblz, karatblz, karatblz, aerofgt_state, 0, ROT0, "Video System Co.", "Karate Blazers (World, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )

View File

@ -292,32 +292,7 @@ WRITE8_MEMBER(airbustr_state::sound_bankswitch_w)
READ8_MEMBER(airbustr_state::soundcommand_status_r)
{
// bits: 2 <-> ? 1 <-> soundlatch full 0 <-> soundlatch2 empty
return 4 + m_soundlatch_status * 2 + (1 - m_soundlatch2_status);
}
READ8_MEMBER(airbustr_state::soundcommand_r)
{
m_soundlatch_status = 0; // soundlatch has been read
return m_soundlatch->read(space, 0);
}
READ8_MEMBER(airbustr_state::soundcommand2_r)
{
m_soundlatch2_status = 0; // soundlatch2 has been read
return m_soundlatch2->read(space, 0);
}
WRITE8_MEMBER(airbustr_state::soundcommand_w)
{
m_soundlatch->write(space, 0, data);
m_soundlatch_status = 1; // soundlatch has been written
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); // cause a nmi to sub cpu
}
WRITE8_MEMBER(airbustr_state::soundcommand2_w)
{
m_soundlatch2->write(space, 0, data);
m_soundlatch2_status = 1; // soundlatch2 has been written
return 4 | (m_soundlatch->pending_r() << 1) | !m_soundlatch2->pending_r();
}
@ -362,7 +337,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_io_map, AS_IO, 8, airbustr_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(slave_bankswitch_w)
AM_RANGE(0x02, 0x02) AM_READWRITE(soundcommand2_r, soundcommand_w)
AM_RANGE(0x02, 0x02) AM_DEVREAD("soundlatch2", generic_latch_8_device, read) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0x04, 0x0c) AM_WRITE(scrollregs_w)
AM_RANGE(0x0e, 0x0e) AM_READ(soundcommand_status_r)
AM_RANGE(0x20, 0x20) AM_READ_PORT("P1")
@ -383,7 +358,7 @@ static ADDRESS_MAP_START( sound_io_map, AS_IO, 8, airbustr_state )
AM_RANGE(0x00, 0x00) AM_WRITE(sound_bankswitch_w)
AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ymsnd", ym2203_device, read, write)
AM_RANGE(0x04, 0x04) AM_DEVREADWRITE("oki", okim6295_device, read, write)
AM_RANGE(0x06, 0x06) AM_READWRITE(soundcommand_r, soundcommand2_w)
AM_RANGE(0x06, 0x06) AM_DEVREAD("soundlatch", generic_latch_8_device, read) AM_DEVWRITE("soundlatch2", generic_latch_8_device, write)
ADDRESS_MAP_END
/* Input Ports */
@ -550,8 +525,6 @@ void airbustr_state::machine_start()
membank("slavebank")->configure_entries(0, 8, memregion("slave")->base(), 0x4000);
membank("audiobank")->configure_entries(0, 8, memregion("audiocpu")->base(), 0x4000);
save_item(NAME(m_soundlatch_status));
save_item(NAME(m_soundlatch2_status));
save_item(NAME(m_bg_scrollx));
save_item(NAME(m_bg_scrolly));
save_item(NAME(m_fg_scrollx));
@ -561,7 +534,6 @@ void airbustr_state::machine_start()
void airbustr_state::machine_reset()
{
m_soundlatch_status = m_soundlatch2_status = 0;
m_bg_scrollx = 0;
m_bg_scrolly = 0;
m_fg_scrollx = 0;
@ -617,6 +589,8 @@ static MACHINE_CONFIG_START( airbustr )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("audiocpu", INPUT_LINE_NMI))
MCFG_GENERIC_LATCH_8_ADD("soundlatch2")
MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_12MHz/4) /* verified on pcb */

View File

@ -6,12 +6,19 @@
skeleton driver
- sh-4 clocked with 200MHz
- 2 x Panasonic MN677511DE chips (MPEG2 decoders)
Main board:
- Hitachi SH-4 HD6417750S at 200MHz
- 2 x Fujitsu MB86292 Graphics Controller
- Altera ACEX 1K PLD
- M48T35Y timekeeper device
- CF interface
- YMZ770B-F
Upper board (game specific):
- CF interface
- 2 x Panasonic MN677511DE MPEG2 decoders (optional)
Known undumped games:
- Donkey Kong: Jungle Fever (c) 2005 Capcom / Nintendo / Namco
- Donkey Kong: Banana Kingdom (c) 2006 Capcom / Nintendo / Namco
***********************************************************************************/

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@ -129,7 +129,11 @@ static MACHINE_CONFIG_START( altos486 )
MCFG_CPU_PROGRAM_MAP(altos486_z80_mem)
MCFG_CPU_IO_MAP(altos486_z80_io)
MCFG_PIC8259_ADD("pic8259", DEVWRITELINE("maincpu", i80186_cpu_device, int0_w), VCC, READ8(altos486_state, read_rmx_ack))
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("maincpu", i80186_cpu_device, int0_w))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(altos486_state, read_rmx_ack))
MCFG_DEVICE_ADD("ppi8255", I8255, 0)
MCFG_UPD765A_ADD("fdc", false, false)

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@ -134,7 +134,7 @@ READ16_MEMBER(altos8600_state::errhi_r)
WRITE16_MEMBER(altos8600_state::clear_w)
{
m_mmuerr = 0xff;
m_mmuerr = 0xffff;
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
m_nmistat = false;
}
@ -281,6 +281,7 @@ void altos8600_state::xlate_w(address_space &space, offs_t offset, u16 data, u16
else if(m_user && BIT(flags, 3) && ((offset & 0x7ff) < 64))
seterr(offset, mem_mask, 8);
COMBINE_DATA(&((u16 *)(m_ram->pointer()))[(page << 11) | (offset & 0x7ff)]);
m_mmuflags[offset >> 11] |= 4;
}
READ16_MEMBER(altos8600_state::cpuram_r)
@ -365,6 +366,7 @@ WRITE16_MEMBER(altos8600_state::dmacram_w)
return;
}
COMBINE_DATA(&((u16 *)(m_ram->pointer()))[(page << 11) | (offset & 0x7ff)]);
m_mmuflags[offset >> 11] |= 4;
}
READ16_MEMBER(altos8600_state::nmi_r)
@ -454,9 +456,18 @@ static MACHINE_CONFIG_START(altos8600)
MCFG_I8089_SINTR1(DEVWRITELINE("pic8259_2", pic8259_device, ir3_w))
MCFG_I8089_SINTR2(DEVWRITELINE("pic8259_2", pic8259_device, ir4_w))
MCFG_PIC8259_ADD("pic8259_1", INPUTLINE("maincpu", 0), VCC, READ8(altos8600_state, get_slave_ack))
MCFG_PIC8259_ADD("pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NOOP)
MCFG_PIC8259_ADD("pic8259_3", DEVWRITELINE("pic8259_1", pic8259_device, ir3_w), GND, NOOP)
MCFG_DEVICE_ADD("pic8259_1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(altos8600_state, get_slave_ack))
MCFG_DEVICE_ADD("pic8259_2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("pic8259_3", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_1", pic8259_device, ir3_w))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("1M")
@ -508,4 +519,4 @@ ROM_START(altos8600)
ROMX_LOAD("11753_1.5_hi.bin", 0x0001, 0x1000, CRC(9b5e812c) SHA1(c2ef24859edd48d2096db47e16855c9bc01dae75), ROM_SKIP(1) | ROM_BIOS(1))
ROM_END
COMP(1981, altos8600, 0, 0, altos8600, 0, altos8600_state, 0, "Altos", "8600", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP(1981, altos8600, 0, 0, altos8600, 0, altos8600_state, 0, "Altos Computer Systems", "ACS8600", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)

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@ -477,7 +477,8 @@ static MACHINE_CONFIG_START( amusco )
MCFG_CPU_IO_MAP(amusco_io_map)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(PIT_CLOCK0)

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@ -923,8 +923,15 @@ static MACHINE_CONFIG_START( apc )
MCFG_PIT8253_CLK1(MAIN_CLOCK) /* Memory Refresh */
MCFG_PIT8253_CLK2(MAIN_CLOCK) /* RS-232c */
MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(apc_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NOOP) // TODO: check ir7_w
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(apc_state, get_slave_ack))
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(DEVWRITELINE("pic8259_master", pic8259_device, ir7_w)) // TODO: check ir7_w
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD("i8237", AM9517A, MAIN_CLOCK)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(apc_state, apc_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(apc_state, apc_tc_w))

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@ -76,6 +76,7 @@ II Plus: RAM options reduced to 16/32/48 KB.
#include "bus/a2bus/ramcard128k.h"
#include "bus/a2bus/ramcard16k.h"
#include "bus/a2bus/timemasterho.h"
#include "bus/a2bus/ssprite.h"
#include "screen.h"
#include "softlist.h"
@ -1318,6 +1319,7 @@ static SLOT_INTERFACE_START(apple2_cards)
SLOT_INTERFACE("ezcgi", A2BUS_EZCGI) /* E-Z Color Graphics Interface */
SLOT_INTERFACE("ezcgi9938", A2BUS_EZCGI_9938) /* E-Z Color Graphics Interface (TMS9938) */
SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
SLOT_INTERFACE("ssprite", A2BUS_SSPRITE) /* Synetix SuperSprite Board */
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE_END
@ -1396,9 +1398,11 @@ static MACHINE_CONFIG_START( apple2_common )
MCFG_A2BUS_SLOT_ADD(A2_BUS_TAG, "sl7", apple2_cards, nullptr)
MCFG_SOFTWARE_LIST_ADD("flop525_list","apple2")
MCFG_SOFTWARE_LIST_ADD("cass_list", "apple2_cass")
MCFG_CASSETTE_ADD(A2_CASSETTE_TAG)
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED)
MCFG_CASSETTE_INTERFACE("apple2_cass")
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( apple2, apple2_common )

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@ -146,6 +146,7 @@ Address bus A0-A11 is Y0-Y11
#include "bus/a2bus/a2estd80col.h"
#include "bus/a2bus/a2eext80col.h"
#include "bus/a2bus/a2eramworks3.h"
#include "bus/a2bus/ssprite.h"
#include "bus/rs232/rs232.h"
@ -3734,6 +3735,7 @@ static SLOT_INTERFACE_START(apple2_cards)
SLOT_INTERFACE("ezcgi9958", A2BUS_EZCGI_9958) /* E-Z Color Graphics Interface (TMS9958) */
// SLOT_INTERFACE("magicmusician", A2BUS_MAGICMUSICIAN) /* Magic Musician Card */
SLOT_INTERFACE("pcxport", A2BUS_PCXPORTER) /* Applied Engineering PC Transporter */
SLOT_INTERFACE("ssprite", A2BUS_SSPRITE) /* Synetix SuperSprite Board */
SLOT_INTERFACE_END
static SLOT_INTERFACE_START(apple2eaux_cards)

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@ -395,7 +395,8 @@ static MACHINE_CONFIG_START( apricot )
MCFG_I8255_IN_PORTC_CB(READ8(apricot_state, i8255_portc_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(apricot_state, i8255_portc_w))
MCFG_PIC8259_ADD("ic31", INPUTLINE("ic91", 0), VCC, NOOP)
MCFG_DEVICE_ADD("ic31", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("ic91", 0))
MCFG_DEVICE_ADD("ic16", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL_4MHz / 16)

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@ -619,11 +619,14 @@ static MACHINE_CONFIG_START( fp )
/* Devices */
MCFG_DEVICE_ADD(APRICOT_KEYBOARD_TAG, APRICOT_KEYBOARD, 0)
MCFG_DEVICE_ADD(I8237_TAG, AM9517A, 250000)
MCFG_I8237_OUT_EOP_CB(DEVWRITELINE(I8259A_TAG, pic8259_device, ir7_w))
MCFG_I8237_IN_IOR_1_CB(DEVREAD8(WD2797_TAG, wd_fdc_device_base, data_r))
MCFG_I8237_OUT_IOW_1_CB(DEVWRITE8(WD2797_TAG, wd_fdc_device_base, data_w))
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NOOP)
MCFG_DEVICE_ADD(I8259A_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(I8253A5_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(2000000)

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@ -59,27 +59,10 @@ Notes:
#include "speaker.h"
READ16_MEMBER(aquarium_state::aquarium_coins_r)
WRITE8_MEMBER(aquarium_state::aquarium_watchdog_w)
{
int data;
data = (ioport("SYSTEM")->read() & 0x7fff);
data |= m_aquarium_snd_ack;
m_aquarium_snd_ack = 0;
return data;
}
WRITE8_MEMBER(aquarium_state::aquarium_snd_ack_w)
{
m_aquarium_snd_ack = 0x8000;
}
WRITE16_MEMBER(aquarium_state::aquarium_sound_w)
{
// popmessage("sound write %04x",data);
m_soundlatch->write(space, 1, data & 0xff);
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE );
m_watchdog->write_line_ck(BIT(data, 7));
// bits 0 & 1 also used
}
WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w)
@ -99,18 +82,7 @@ WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w)
uint8_t aquarium_state::aquarium_snd_bitswap( uint8_t scrambled_data )
{
uint8_t data = 0;
data |= ((scrambled_data & 0x01) << 7);
data |= ((scrambled_data & 0x02) << 5);
data |= ((scrambled_data & 0x04) << 3);
data |= ((scrambled_data & 0x08) << 1);
data |= ((scrambled_data & 0x10) >> 1);
data |= ((scrambled_data & 0x20) >> 3);
data |= ((scrambled_data & 0x40) >> 5);
data |= ((scrambled_data & 0x80) >> 7);
return data;
return BITSWAP8(scrambled_data, 0, 1, 2, 3, 4, 5, 6, 7);
}
READ8_MEMBER(aquarium_state::aquarium_oki_r)
@ -139,9 +111,9 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, aquarium_state )
AM_RANGE(0xd80080, 0xd80081) AM_READ_PORT("DSW")
AM_RANGE(0xd80082, 0xd80083) AM_READNOP /* stored but not read back ? check code at 0x01f440 */
AM_RANGE(0xd80084, 0xd80085) AM_READ_PORT("INPUTS")
AM_RANGE(0xd80086, 0xd80087) AM_READ(aquarium_coins_r)
AM_RANGE(0xd80088, 0xd80089) AM_WRITENOP /* ?? video related */
AM_RANGE(0xd8008a, 0xd8008b) AM_WRITE(aquarium_sound_w)
AM_RANGE(0xd80086, 0xd80087) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd80088, 0xd80089) AM_WRITE8(aquarium_watchdog_w, 0xff00)
AM_RANGE(0xd8008a, 0xd8008b) AM_DEVWRITE8("soundlatch", generic_latch_8_device, write, 0x00ff)
AM_RANGE(0xff0000, 0xffffff) AM_RAM
ADDRESS_MAP_END
@ -156,7 +128,7 @@ static ADDRESS_MAP_START( snd_portmap, AS_IO, 8, aquarium_state )
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
AM_RANGE(0x02, 0x02) AM_READWRITE(aquarium_oki_r, aquarium_oki_w)
AM_RANGE(0x04, 0x04) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
AM_RANGE(0x06, 0x06) AM_WRITE(aquarium_snd_ack_w)
AM_RANGE(0x06, 0x06) AM_DEVWRITE("soundlatch", generic_latch_8_device, acknowledge_w) // only written with 0 for some reason
AM_RANGE(0x08, 0x08) AM_WRITE(aquarium_z80_bank_w)
ADDRESS_MAP_END
@ -225,7 +197,7 @@ static INPUT_PORTS_START( aquarium )
PORT_SERVICE( 0x1000, IP_ACTIVE_LOW )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* sound status */
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("soundlatch", generic_latch_8_device, pending_r)
INPUT_PORTS_END
static const gfx_layout char5bpplayout =
@ -312,16 +284,6 @@ static GFXDECODE_START( aquarium )
GFXDECODE_ENTRY( "gfx4", 0, char5bpplayout, 0x400, 32 )
GFXDECODE_END
void aquarium_state::machine_start()
{
save_item(NAME(m_aquarium_snd_ack));
}
void aquarium_state::machine_reset()
{
m_aquarium_snd_ack = 0;
}
static MACHINE_CONFIG_START( aquarium )
/* basic machine hardware */
@ -333,6 +295,9 @@ static MACHINE_CONFIG_START( aquarium )
MCFG_CPU_PROGRAM_MAP(snd_map)
MCFG_CPU_IO_MAP(snd_portmap)
// Is this the actual IC type? Some other Excellent games from this period use a MAX693.
MCFG_DEVICE_ADD("watchdog", MB3773, 0)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -352,6 +317,8 @@ static MACHINE_CONFIG_START( aquarium )
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("audiocpu", INPUT_LINE_NMI))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_YM2151_ADD("ymsnd", XTAL_14_31818MHz/4) // clock not verified on pcb
MCFG_YM2151_IRQ_HANDLER(INPUTLINE("audiocpu", 0))

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@ -71,6 +71,7 @@
#include "emu.h"
#include "includes/arcadecl.h"
#include "cpu/m68000/m68000.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "sound/okim6295.h"
#include "video/atarimo.h"
@ -161,8 +162,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, arcadecl_state )
AM_RANGE(0x640024, 0x640025) AM_READ_PORT("TRACKX1")
AM_RANGE(0x640026, 0x640027) AM_READ_PORT("TRACKY1")
AM_RANGE(0x640040, 0x64004f) AM_WRITE(latch_w)
AM_RANGE(0x640060, 0x64006f) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0x641000, 0x641fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0x640060, 0x64006f) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0x641000, 0x641fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
AM_RANGE(0x642000, 0x642001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0xff00)
AM_RANGE(0x646000, 0x646fff) AM_WRITE(scanline_int_ack_w)
AM_RANGE(0x647000, 0x647fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
@ -325,7 +326,9 @@ static MACHINE_CONFIG_START( arcadecl )
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", atarigen_state, video_int_gen)
MCFG_MACHINE_RESET_OVERRIDE(arcadecl_state,arcadecl)
MCFG_ATARI_EEPROM_2804_ADD("eeprom")
MCFG_EEPROM_2804_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_WATCHDOG_ADD("watchdog")

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@ -455,13 +455,6 @@ WRITE8_MEMBER(astrocde_state::demndrgn_sound_w)
*
*************************************/
WRITE8_MEMBER(astrocde_state::tenpindx_sound_w)
{
m_soundlatch->write(space, offset, data);
m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
WRITE8_MEMBER(astrocde_state::tenpindx_lamp_w)
{
/* lamps */
@ -671,6 +664,20 @@ static ADDRESS_MAP_START( port_map_16col_pattern_nosound, AS_IO, 8, astrocde_sta
ADDRESS_MAP_END
static ADDRESS_MAP_START( port_map_16col_pattern_tenpindx, AS_IO, 8, astrocde_state )
AM_RANGE(0x0060, 0x0060) AM_MIRROR(0xff00) AM_READ_PORT("P60")
AM_RANGE(0x0061, 0x0061) AM_MIRROR(0xff00) AM_READ_PORT("P61")
AM_RANGE(0x0062, 0x0062) AM_MIRROR(0xff00) AM_READ_PORT("P62")
AM_RANGE(0x0063, 0x0063) AM_MIRROR(0xff00) AM_READ_PORT("P63")
AM_RANGE(0x0064, 0x0064) AM_MIRROR(0xff00) AM_READ_PORT("P64")
AM_RANGE(0x0065, 0x0066) AM_MIRROR(0xff00) AM_WRITE(tenpindx_lamp_w)
AM_RANGE(0x0067, 0x0067) AM_MIRROR(0xff00) AM_WRITE(tenpindx_counter_w)
AM_RANGE(0x0068, 0x0068) AM_MIRROR(0xff00) AM_WRITE(tenpindx_lights_w)
AM_RANGE(0x0097, 0x0097) AM_MIRROR(0xff00) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_IMPORT_FROM(port_map_16col_pattern_nosound)
ADDRESS_MAP_END
static ADDRESS_MAP_START( tenpin_sub_io_map, AS_IO, 8, astrocde_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x90, 0x93) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
@ -1443,7 +1450,7 @@ static MACHINE_CONFIG_DERIVED( tenpindx, astrocade_16color_base )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(profpac_map)
MCFG_CPU_IO_MAP(port_map_16col_pattern_nosound)
MCFG_CPU_IO_MAP(port_map_16col_pattern_tenpindx)
MCFG_CPU_ADD("sub", Z80, ASTROCADE_CLOCK/4) /* real clock unknown */
MCFG_Z80_DAISY_CHAIN(tenpin_daisy_chain)
@ -1457,6 +1464,7 @@ static MACHINE_CONFIG_DERIVED( tenpindx, astrocade_16color_base )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("sub", INPUT_LINE_NMI))
MCFG_SOUND_ADD("aysnd", AY8912, ASTROCADE_CLOCK/4) /* real clock unknown */
MCFG_AY8910_PORT_A_READ_CB(IOPORT("DIPSW"))
@ -1767,18 +1775,7 @@ DRIVER_INIT_MEMBER(astrocde_state,demndrgn)
DRIVER_INIT_MEMBER(astrocde_state,tenpindx)
{
address_space &iospace = m_maincpu->space(AS_IO);
m_video_config = 0x00;
iospace.install_read_port(0x60, 0x60, 0xff00, "P60");
iospace.install_read_port(0x61, 0x61, 0xff00, "P61");
iospace.install_read_port(0x62, 0x62, 0xff00, "P62");
iospace.install_read_port(0x63, 0x63, 0xff00, "P63");
iospace.install_read_port(0x64, 0x64, 0xff00, "P64");
iospace.install_write_handler(0x65, 0x66, 0, 0xff00, 0x0000, write8_delegate(FUNC(astrocde_state::tenpindx_lamp_w), this));
iospace.install_write_handler(0x67, 0x67, 0, 0xff00, 0x0000, write8_delegate(FUNC(astrocde_state::tenpindx_counter_w), this));
iospace.install_write_handler(0x68, 0x68, 0, 0xff00, 0x0000, write8_delegate(FUNC(astrocde_state::tenpindx_lights_w), this));
iospace.install_write_handler(0x97, 0x97, 0, 0xff00, 0x0000, write8_delegate(FUNC(astrocde_state::tenpindx_sound_w), this));
/* configure banking */
m_bank8000->configure_entries(0, 4, memregion("banks")->base() + 0x4000, 0x8000);
@ -1818,5 +1815,5 @@ GAME( 1981, robby, 0, robby, robby, astrocde_state, robby, ROT0,
GAME( 1983, profpac, 0, profpac, profpac, astrocde_state, profpac, ROT0, "Dave Nutting Associates / Bally Midway", "Professor Pac-Man", MACHINE_SUPPORTS_SAVE )
/* 91465 CPU board + 91699 game board + 91466 RAM board + 91488 pattern board + 91467 memory board */
GAME( 1982, demndrgn, 0, demndrgn, demndrgn, astrocde_state, demndrgn, ROT0, "Dave Nutting Associates / Bally Midway", "Demons & Dragons (prototype)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1982, demndrgn, 0, demndrgn, demndrgn, astrocde_state, demndrgn, ROT0, "Dave Nutting Associates / Bally Midway", "Demons & Dragons (prototype)", MACHINE_IS_INCOMPLETE | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
GAMEL(1983, tenpindx, 0, tenpindx, tenpindx, astrocde_state, tenpindx, ROT0, "Dave Nutting Associates / Bally Midway", "Ten Pin Deluxe", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_MECHANICAL, layout_tenpindx )

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@ -22,6 +22,7 @@
#include "emu.h"
#include "includes/atarig1.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "speaker.h"
@ -195,7 +196,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarig1_state )
AM_RANGE(0x040000, 0x077fff) AM_ROM
AM_RANGE(0x078000, 0x07ffff) AM_ROM /* hydra slapstic goes here */
AM_RANGE(0xf80000, 0xf80001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0xf88000, 0xf8ffff) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xf88000, 0xf8ffff) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xf90000, 0xf90001) AM_DEVWRITE8("jsa", atari_jsa_ii_device, main_command_w, 0xff00)
AM_RANGE(0xf98000, 0xf98001) AM_DEVWRITE("jsa", atari_jsa_ii_device, sound_reset_w)
AM_RANGE(0xfa0000, 0xfa0001) AM_DEVWRITE8("rle", atari_rle_objects_device, control_write, 0x00ff)
@ -203,7 +204,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarig1_state )
AM_RANGE(0xfc0000, 0xfc0001) AM_READ(special_port0_r)
AM_RANGE(0xfc8000, 0xfc8007) AM_READWRITE(a2d_data_r, a2d_select_w)
AM_RANGE(0xfd0000, 0xfd0001) AM_DEVREAD8("jsa", atari_jsa_ii_device, main_response_r, 0xff00)
AM_RANGE(0xfd8000, 0xfdffff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0xfd8000, 0xfdffff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
/* AM_RANGE(0xfe0000, 0xfe7fff) AM_READ(from_r)*/
AM_RANGE(0xfe8000, 0xfe89ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
AM_RANGE(0xff0000, 0xff0fff) AM_RAM AM_SHARE("rle")
@ -433,7 +434,8 @@ static MACHINE_CONFIG_START( atarig1 )
MCFG_MACHINE_START_OVERRIDE(atarig1_state,atarig1)
MCFG_MACHINE_RESET_OVERRIDE(atarig1_state,atarig1)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_WATCHDOG_ADD("watchdog")

View File

@ -21,6 +21,7 @@
#include "emu.h"
#include "includes/atarig42.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "speaker.h"
@ -329,14 +330,14 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarig42_state )
AM_RANGE(0xe00030, 0xe00031) AM_DEVREAD8("jsa", atari_jsa_iii_device, main_response_r, 0x00ff)
AM_RANGE(0xe00040, 0xe00041) AM_DEVWRITE8("jsa", atari_jsa_iii_device, main_command_w, 0x00ff)
AM_RANGE(0xe00050, 0xe00051) AM_WRITE(io_latch_w)
AM_RANGE(0xe00060, 0xe00061) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xe00060, 0xe00061) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xe03000, 0xe03001) AM_WRITE(video_int_ack_w)
AM_RANGE(0xe03800, 0xe03801) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0xe80000, 0xe80fff) AM_RAM
AM_RANGE(0xf40000, 0xf40001) AM_DEVREAD("asic65", asic65_device, io_r)
AM_RANGE(0xf60000, 0xf60001) AM_DEVREAD("asic65", asic65_device, read)
AM_RANGE(0xf80000, 0xf80003) AM_DEVWRITE("asic65", asic65_device, data_w)
AM_RANGE(0xfa0000, 0xfa0fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0xfa0000, 0xfa0fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
AM_RANGE(0xfc0000, 0xfc0fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
AM_RANGE(0xff0000, 0xff0fff) AM_RAM AM_SHARE("rle")
AM_RANGE(0xff2000, 0xff5fff) AM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
@ -531,7 +532,8 @@ static MACHINE_CONFIG_START( atarig42 )
MCFG_MACHINE_START_OVERRIDE(atarig42_state,atarig42)
MCFG_MACHINE_RESET_OVERRIDE(atarig42_state,atarig42)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_WATCHDOG_ADD("watchdog")
@ -632,7 +634,7 @@ ROM_START( roadriot )
ROM_LOAD( "136089-1050.15e", 0x40000, 0x20000, CRC(64d410bb) SHA1(877bccca7ff37a9dd8294bc1453487a2f516ca7d) )
ROM_LOAD( "136089-1051.12e", 0x60000, 0x20000, CRC(bffd01c8) SHA1(f6de000f61ea0c1ddb31ee5301506e5e966638c2) )
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
ROM_REGION( 0x800, "eeprom", 0 )
ROM_LOAD( "roadriot-eeprom.5c", 0x0000, 0x800, CRC(8d9b957d) SHA1(9d895c5977a3f405130594a10d530a82a6aa265f) )
ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
@ -689,7 +691,7 @@ ROM_START( roadriota )
ROM_LOAD( "136089-1050.15e", 0x40000, 0x20000, CRC(64d410bb) SHA1(877bccca7ff37a9dd8294bc1453487a2f516ca7d) )
ROM_LOAD( "136089-1051.12e", 0x60000, 0x20000, CRC(bffd01c8) SHA1(f6de000f61ea0c1ddb31ee5301506e5e966638c2) )
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
ROM_REGION( 0x800, "eeprom", 0 )
ROM_LOAD( "roadriot-eeprom.5c", 0x0000, 0x800, CRC(8d9b957d) SHA1(9d895c5977a3f405130594a10d530a82a6aa265f) )
ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
@ -746,7 +748,7 @@ ROM_START( roadriotb )
ROM_LOAD( "136089-1050.15e", 0x40000, 0x20000, CRC(64d410bb) SHA1(877bccca7ff37a9dd8294bc1453487a2f516ca7d) )
ROM_LOAD( "136089-1051.12e", 0x60000, 0x20000, CRC(bffd01c8) SHA1(f6de000f61ea0c1ddb31ee5301506e5e966638c2) )
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
ROM_REGION( 0x800, "eeprom", 0 )
ROM_LOAD( "roadriot-eeprom.5c", 0x0000, 0x800, CRC(8d9b957d) SHA1(9d895c5977a3f405130594a10d530a82a6aa265f) )
ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
@ -794,7 +796,7 @@ ROM_START( guardian )
ROM_REGION( 0x80000, "jsa:oki1", 0 )
ROM_LOAD( "136092-0010-snd.19e", 0x00000, 0x80000, CRC(bca27f40) SHA1(91a41eac116eb7d9a790abc590eb06328726d1c2) )
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
ROM_REGION( 0x800, "eeprom", 0 )
ROM_LOAD( "guardian-eeprom.5c", 0x0000, 0x800, CRC(85835fab) SHA1(747e2851c8baa0e7f1c0784b0d6900514230ab07) )
ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */

View File

@ -56,6 +56,7 @@
#include "includes/atarigt.h"
#include "cpu/m68000/m68000.h"
#include "machine/eeprompar.h"
#define LOG_PROTECTION (0)
@ -600,8 +601,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, atarigt_state )
AM_RANGE(0xc00000, 0xc00003) AM_READWRITE(sound_data_r, sound_data_w)
AM_RANGE(0xd00014, 0xd00017) AM_READ(analog_port0_r)
AM_RANGE(0xd0001c, 0xd0001f) AM_READ(analog_port1_r)
AM_RANGE(0xd20000, 0xd20fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0xff00ff00)
AM_RANGE(0xd40000, 0xd4ffff) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xd20000, 0xd20fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0xff00ff00)
AM_RANGE(0xd40000, 0xd4ffff) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xd72000, 0xd75fff) AM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
AM_RANGE(0xd76000, 0xd76fff) AM_DEVWRITE("alpha", tilemap_device, write) AM_SHARE("alpha")
AM_RANGE(0xd78000, 0xd78fff) AM_RAM AM_SHARE("rle")
@ -809,7 +810,8 @@ static MACHINE_CONFIG_START( atarigt )
MCFG_MACHINE_RESET_OVERRIDE(atarigt_state,atarigt)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", atarigt)

View File

@ -28,6 +28,7 @@
#include "includes/atarigx2.h"
#include "cpu/m68000/m68000.h"
#include "machine/eeprompar.h"
#include "speaker.h"
@ -1200,14 +1201,14 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, atarigx2_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0xc80000, 0xc80fff) AM_RAM
AM_RANGE(0xd00000, 0xd1ffff) AM_READ(a2d_data_r)
AM_RANGE(0xd20000, 0xd20fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0xff00ff00)
AM_RANGE(0xd20000, 0xd20fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0xff00ff00)
AM_RANGE(0xd40000, 0xd40fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
AM_RANGE(0xd72000, 0xd75fff) AM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
AM_RANGE(0xd76000, 0xd76fff) AM_DEVWRITE("alpha", tilemap_device, write) AM_SHARE("alpha")
AM_RANGE(0xd78000, 0xd78fff) AM_RAM AM_SHARE("rle")
AM_RANGE(0xd7a200, 0xd7a203) AM_WRITE(mo_command_w) AM_SHARE("mo_command")
AM_RANGE(0xd70000, 0xd7ffff) AM_RAM
AM_RANGE(0xd80000, 0xd9ffff) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xd80000, 0xd9ffff) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xe06000, 0xe06003) AM_DEVWRITE8("jsa", atari_jsa_iiis_device, main_command_w, 0xff000000)
AM_RANGE(0xe08000, 0xe08003) AM_WRITE(latch_w)
AM_RANGE(0xe0c000, 0xe0c003) AM_WRITE16(video_int_ack_w, 0xffffffff)
@ -1502,7 +1503,8 @@ static MACHINE_CONFIG_START( atarigx2 )
MCFG_MACHINE_RESET_OVERRIDE(atarigx2_state,atarigx2)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", atarigx2)

View File

@ -194,8 +194,8 @@ RoadBlasters (aka Future Vette):005*
#include "includes/atarisy1.h"
#include "cpu/m68000/m68000.h"
#include "cpu/m6502/m6502.h"
#include "machine/atarigen.h"
#include "machine/6522via.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "sound/pokey.h"
#include "sound/ym2151.h"
@ -456,13 +456,13 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarisy1_state )
AM_RANGE(0x860000, 0x860001) AM_WRITE(atarisy1_bankselect_w) AM_SHARE("bankselect")
AM_RANGE(0x880000, 0x880001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0x8a0000, 0x8a0001) AM_WRITE(video_int_ack_w)
AM_RANGE(0x8c0000, 0x8c0001) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0x8c0000, 0x8c0001) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0x900000, 0x9fffff) AM_RAM
AM_RANGE(0xa00000, 0xa01fff) AM_RAM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
AM_RANGE(0xa02000, 0xa02fff) AM_RAM_WRITE(atarisy1_spriteram_w) AM_SHARE("mob")
AM_RANGE(0xa03000, 0xa03fff) AM_RAM_DEVWRITE("alpha", tilemap_device, write) AM_SHARE("alpha")
AM_RANGE(0xb00000, 0xb007ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
AM_RANGE(0xf00000, 0xf00fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0xf00000, 0xf00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
AM_RANGE(0xf20000, 0xf20007) AM_READ(trakball_r)
AM_RANGE(0xf40000, 0xf4001f) AM_READWRITE(joystick_r, joystick_w)
AM_RANGE(0xf60000, 0xf60003) AM_READ_PORT("F60000")
@ -738,7 +738,8 @@ static MACHINE_CONFIG_START( atarisy1 )
MCFG_MACHINE_START_OVERRIDE(atarisy1_state,atarisy1)
MCFG_MACHINE_RESET_OVERRIDE(atarisy1_state,atarisy1)
MCFG_ATARI_EEPROM_2804_ADD("eeprom")
MCFG_EEPROM_2804_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 15H (TTL) or 14F (LSI)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("ymsnd", ym2151_device, reset_w))

View File

@ -127,6 +127,8 @@
#include "emu.h"
#include "includes/atarisy2.h"
#include "machine/eeprompar.h"
#include "speaker.h"

View File

@ -227,7 +227,8 @@ static MACHINE_CONFIG_START( b2m )
MCFG_I8255_OUT_PORTB_CB(WRITE8(b2m_state, b2m_romdisk_portb_w))
MCFG_I8255_OUT_PORTC_CB(WRITE8(b2m_state, b2m_romdisk_portc_w))
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
/* sound */
MCFG_SPEAKER_STANDARD_MONO("mono")

View File

@ -168,6 +168,7 @@ Measurements -
#include "cpu/z80/z80.h"
#include "cpu/m68000/m68000.h"
#include "cpu/m6502/m6502.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "sound/ym2151.h"
#include "speaker.h"
@ -377,7 +378,7 @@ WRITE8_MEMBER(badlands_state::audio_io_w)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0xfc0000, 0xfc1fff) AM_READ(sound_busy_r) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_reset_w)
AM_RANGE(0xfd0000, 0xfd1fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0xfd0000, 0xfd1fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
AM_RANGE(0xfe0000, 0xfe1fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0xfe2000, 0xfe3fff) AM_WRITE(video_int_ack_w)
AM_RANGE(0xfe4000, 0xfe5fff) AM_READ_PORT("FE4000")
@ -388,7 +389,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0xfe8000, 0xfe9fff) AM_DEVWRITE8("soundcomm", atari_sound_comm_device, main_command_w, 0xff00)
AM_RANGE(0xfea000, 0xfebfff) AM_DEVREAD8("soundcomm", atari_sound_comm_device, main_response_r, 0xff00)
AM_RANGE(0xfec000, 0xfedfff) AM_WRITE(badlands_pf_bank_w)
AM_RANGE(0xfee000, 0xfeffff) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xfee000, 0xfeffff) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xffc000, 0xffc3ff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0xff00) AM_SHARE("palette")
AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
AM_RANGE(0xfff000, 0xfff1ff) AM_RAM AM_SHARE("mob")
@ -513,7 +514,8 @@ static MACHINE_CONFIG_START( badlands )
MCFG_MACHINE_START_OVERRIDE(badlands_state,badlands)
MCFG_MACHINE_RESET_OVERRIDE(badlands_state,badlands)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_WATCHDOG_ADD("watchdog")
@ -660,7 +662,7 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0xfc0000, 0xfc0001) AM_READ(badlandsb_unk_r ) // sound comms?
AM_RANGE(0xfd0000, 0xfd1fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0xfd0000, 0xfd1fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
//AM_RANGE(0xfe0000, 0xfe1fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xfe2000, 0xfe3fff) AM_WRITE(video_int_ack_w)
@ -669,7 +671,7 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0xfe4004, 0xfe4005) AM_READ_PORT("P1")
AM_RANGE(0xfe4006, 0xfe4007) AM_READ_PORT("P2")
AM_RANGE(0xfe4008, 0xfe4009) AM_WRITE(badlands_pf_bank_w)
AM_RANGE(0xfe400c, 0xfe400d) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xfe400c, 0xfe400d) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0xffc000, 0xffc3ff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0xff00) AM_SHARE("palette")
AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("playfield", tilemap_device, write) AM_SHARE("playfield")
@ -768,7 +770,8 @@ static MACHINE_CONFIG_START( badlandsb )
MCFG_MACHINE_START_OVERRIDE(badlands_state,badlands)
MCFG_MACHINE_RESET_OVERRIDE(badlands_state,badlandsb)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", badlandsb)

View File

@ -22,6 +22,7 @@
#include "emu.h"
#include "includes/batman.h"
#include "cpu/m68000/m68000.h"
#include "machine/eeprompar.h"
#include "machine/watchdog.h"
#include "video/atarimo.h"
#include "speaker.h"
@ -99,14 +100,14 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, batman_state )
ADDRESS_MAP_GLOBAL_MASK(0x3fffff)
AM_RANGE(0x000000, 0x0bffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x010000) AM_RAM
AM_RANGE(0x120000, 0x120fff) AM_MIRROR(0x01f000) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
AM_RANGE(0x120000, 0x120fff) AM_MIRROR(0x01f000) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
AM_RANGE(0x260000, 0x260001) AM_MIRROR(0x11ff8c) AM_READ_PORT("260000")
AM_RANGE(0x260002, 0x260003) AM_MIRROR(0x11ff8c) AM_READ_PORT("260002")
AM_RANGE(0x260010, 0x260011) AM_MIRROR(0x11ff8e) AM_READ_PORT("260010")
AM_RANGE(0x260030, 0x260031) AM_MIRROR(0x11ff8e) AM_DEVREAD8("jsa", atari_jsa_iii_device, main_response_r, 0x00ff)
AM_RANGE(0x260040, 0x260041) AM_MIRROR(0x11ff8e) AM_DEVWRITE8("jsa", atari_jsa_iii_device, main_command_w, 0x00ff)
AM_RANGE(0x260050, 0x260051) AM_MIRROR(0x11ff8e) AM_WRITE(latch_w)
AM_RANGE(0x260060, 0x260061) AM_MIRROR(0x11ff8e) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0x260060, 0x260061) AM_MIRROR(0x11ff8e) AM_DEVWRITE("eeprom", eeprom_parallel_28xx_device, unlock_write)
AM_RANGE(0x2a0000, 0x2a0001) AM_MIRROR(0x11fffe) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0x2e0000, 0x2e0fff) AM_MIRROR(0x100000) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
AM_RANGE(0x2effc0, 0x2effff) AM_MIRROR(0x100000) AM_DEVREADWRITE("vad", atari_vad_device, control_read, control_write)
@ -205,7 +206,8 @@ static MACHINE_CONFIG_START( batman )
MCFG_MACHINE_START_OVERRIDE(batman_state,batman)
MCFG_MACHINE_RESET_OVERRIDE(batman_state,batman)
MCFG_ATARI_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_2816_ADD("eeprom")
MCFG_EEPROM_28XX_LOCK_AFTER_WRITE(true)
MCFG_WATCHDOG_ADD("watchdog")
@ -287,7 +289,7 @@ ROM_START( batman )
ROM_LOAD( "136085-1043.15e", 0x40000, 0x20000, CRC(51812d3b) SHA1(6748fecef753179a9257c0da5a7b7c9648437208) )
ROM_LOAD( "136085-1044.12e", 0x60000, 0x20000, CRC(5e2d7f31) SHA1(737c7204d91f5dd5c9ed0321fc6c0d6194a18f8a) )
ROM_REGION( 0x800, "eeprom:eeprom", 0 )
ROM_REGION( 0x800, "eeprom", 0 )
ROM_LOAD( "batman-eeprom.bin", 0x0000, 0x800, CRC(c859b535) SHA1(b7f37aab1e869e92fbcc69af98a9c14f7cf2b418) )
ROM_REGION( 0x1000, "plds", 0 )

View File

@ -172,9 +172,14 @@ static MACHINE_CONFIG_START( bebox )
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, XTAL_14_31818MHz/3 )
MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(bebox_state,bebox_pic8259_master_set_int_line), VCC, READ8(bebox_state,get_slave_ack) )
MCFG_DEVICE_ADD("pic8259_1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(bebox_state, bebox_pic8259_master_set_int_line))
MCFG_PIC8259_IN_SP_CB(VCC)
MCFG_PIC8259_CASCADE_ACK_CB(READ8(bebox_state, get_slave_ack))
MCFG_PIC8259_ADD( "pic8259_2", WRITELINE(bebox_state,bebox_pic8259_slave_set_int_line), GND, NOOP)
MCFG_DEVICE_ADD("pic8259_2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(bebox_state, bebox_pic8259_slave_set_int_line))
MCFG_PIC8259_IN_SP_CB(GND)
MCFG_DEVICE_ADD( "ns16550_0", NS16550, 0 ) /* TODO: Verify model */
MCFG_DEVICE_ADD( "ns16550_1", NS16550, 0 ) /* TODO: Verify model */

View File

@ -31,26 +31,18 @@ DIP Locations verified for:
READ8_MEMBER(bking_state::bking_sndnmi_disable_r)
{
m_sound_nmi_enable = 0;
m_soundnmi->in_w<1>(0);
return 0;
}
WRITE8_MEMBER(bking_state::bking_sndnmi_enable_w)
{
m_sound_nmi_enable = 1;
m_soundnmi->in_w<1>(1);
}
WRITE8_MEMBER(bking_state::bking_soundlatch_w)
{
int i, code = 0;
for (i = 0;i < 8;i++)
if (data & (1 << i))
code |= 0x80 >> i;
m_soundlatch->write(space, offset, code);
if (m_sound_nmi_enable)
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
m_soundlatch->write(space, offset, BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7));
}
WRITE8_MEMBER(bking_state::bking3_addr_l_w)
@ -347,9 +339,6 @@ void bking_state::machine_start()
save_item(NAME(m_palette_bank));
save_item(NAME(m_controller));
save_item(NAME(m_hit));
/* sound */
save_item(NAME(m_sound_nmi_enable));
}
MACHINE_START_MEMBER(bking_state,bking3)
@ -384,7 +373,7 @@ void bking_state::machine_reset()
m_hit = 0;
/* sound */
m_sound_nmi_enable = 1;
m_soundnmi->in_w<1>(0);
}
MACHINE_RESET_MEMBER(bking_state,bking3)
@ -432,6 +421,10 @@ static MACHINE_CONFIG_START( bking )
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(DEVWRITELINE("soundnmi", input_merger_device, in_w<0>))
MCFG_INPUT_MERGER_ALL_HIGH("soundnmi")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("audiocpu", INPUT_LINE_NMI))
MCFG_SOUND_ADD("ay1", AY8910, XTAL_6MHz/4)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25)

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