srcclean (nw)

This commit is contained in:
Vas Crabb 2017-02-19 10:42:13 +11:00
parent bc1065a311
commit 8f15315a52
111 changed files with 996 additions and 996 deletions

View File

@ -1382,7 +1382,7 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
</dataarea>
</part>
</software>
<software name="eccojri" cloneof="eccojr">
<description>Ecco Jr. e la Grande Caccia al Tesoro nell'Oceano! (Ita)</description>
<year>1994</year>

View File

@ -172,7 +172,7 @@
</dataarea>
<!-- The following are the levels and should be stored in z88 memory on the default device/directory, you don't
have to keep all 60 of them on the z88 just the ones you want to play and drag over more when required. -->
have to keep all 60 of them on the z88 just the ones you want to play and drag over more when required. -->
<dataarea name="ram01" size="2695">
<rom name="lemlevel.01" size="2695" crc="b3ddde7d" sha1="ac2a1d6cd5b121bc33d516bed0d9d4e37c74ece0" offset="0"/>

View File

@ -177,7 +177,7 @@ function env.charset_conv(bytes, charset)
if type(charset) == "string" then
local chartype, offset, delta = charset:match("CS_(%w*)%[?(%-?%d?%d?),?(%d?%d?)%]?")
if chartype == "NUMBER" then
end
emu.print_verbose("data_hiscore: charset " .. chartype .. " unimplemented\n")
return bytes
@ -285,7 +285,7 @@ function dat.check(set, softlist)
local function parse_table(xml)
local total_size = 0
local s = { "local data = open('" .. xml.structure[1].file .. "', size)\nlocal offset = 1\nlocal arr = {}",
"local elem, bytes, offset, value, lastindex, output"}
"local elem, bytes, offset, value, lastindex, output"}
local fparam = {}
if xml.bitmask then
local bitmask = "local bitmask = {"

View File

@ -744,7 +744,7 @@ project "bx"
"__STDC_FORMAT_MACROS",
"__STDC_CONSTANT_MACROS",
}
configuration { "vs*" }
includedirs {
MAME_DIR .. "3rdparty/bx/include/compat/msvc",
@ -768,13 +768,13 @@ project "bx"
includedirs {
MAME_DIR .. "3rdparty/bx/include/compat/freebsd",
}
configuration { }
includedirs {
MAME_DIR .. "3rdparty/bx/include",
}
files {
MAME_DIR .. "3rdparty/bx/src/commandline.cpp",
MAME_DIR .. "3rdparty/bx/src/crt.cpp",

View File

@ -14,16 +14,16 @@ project "netlist"
kind (LIBTYPE)
if _OPTIONS["targetos"]=="windows" then
configuration { "mingw* or vs*" }
defines {
"UNICODE",
"_UNICODE",
"_WIN32_WINNT=0x0501",
"WIN32_LEAN_AND_MEAN",
"NOMINMAX",
}
configuration { "mingw* or vs*" }
defines {
"UNICODE",
"_UNICODE",
"_WIN32_WINNT=0x0501",
"WIN32_LEAN_AND_MEAN",
"NOMINMAX",
}
end
addprojectflags()
defines {
@ -62,13 +62,13 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/plib/plists.h",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.cpp",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
MAME_DIR .. "src/lib/netlist/plib/poptions.h",
MAME_DIR .. "src/lib/netlist/plib/pparser.cpp",
MAME_DIR .. "src/lib/netlist/plib/pparser.h",
MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
MAME_DIR .. "src/lib/netlist/plib/pstate.cpp",
MAME_DIR .. "src/lib/netlist/plib/pstate.h",
MAME_DIR .. "src/lib/netlist/plib/pstring.cpp",
@ -86,11 +86,11 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/analog/nld_bjt.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_fourterm.cpp",
MAME_DIR .. "src/lib/netlist/analog/nlid_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_switches.cpp",
MAME_DIR .. "src/lib/netlist/analog/nld_switches.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.cpp",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_opamps.cpp",
MAME_DIR .. "src/lib/netlist/analog/nld_opamps.h",

View File

@ -88,7 +88,7 @@ project("mametests")
MAME_DIR .. "src/emu/video/rgbvmx.cpp",
MAME_DIR .. "src/emu/video/rgbvmx.h",
}
files {
MAME_DIR .. "tests/main.cpp",
MAME_DIR .. "tests/lib/util/corestr.cpp",

View File

@ -518,11 +518,11 @@ files {
configuration { "mingw*" }
linkoptions{
"-municode",
"-municode",
}
configuration { "vs*" }
flags {
"Unicode",
"Unicode",
}
configuration { "mingw*" or "vs*" }
@ -562,11 +562,11 @@ files {
configuration { "mingw*" }
linkoptions{
"-municode",
"-municode",
}
configuration { "vs*" }
flags {
"Unicode",
"Unicode",
}
configuration { "mingw*" or "vs*" }

View File

@ -2,55 +2,55 @@
// copyright-holders: F. Ulivi
/*********************************************************************
hp9895.cpp
hp9895.cpp
HP9895 floppy disk drive
HP9895 floppy disk drive
Phew, this one was tough!
Phew, this one was tough!
This is a dual 8" floppy disk drive that interfaces through
HPIB/IEEE-488 bus. It implements the so-called "Amigo" command
set.
This is a dual 8" floppy disk drive that interfaces through
HPIB/IEEE-488 bus. It implements the so-called "Amigo" command
set.
Its main components are:
* A Z80A CPU @ 4 MHz with 8 kB of firmware ROM and 1 kB of
static RAM
* A HP PHI chip that interfaces CPU to HPIB bus
* A disk controller implemented with a lot of discrete TTLs
* 2 MPI 8" disk drives
Its main components are:
* A Z80A CPU @ 4 MHz with 8 kB of firmware ROM and 1 kB of
static RAM
* A HP PHI chip that interfaces CPU to HPIB bus
* A disk controller implemented with a lot of discrete TTLs
* 2 MPI 8" disk drives
Data I/O with the disk is carried out through 2 shift registers,
one for data bits (@ 0x60 address) and one for clock bits (@ 0x61
address). CPU is stalled by setting WAIT/ to 0 whenever it accesses
the data register and the hw is not ready for the byte. Once
the next byte boundary is reached (the SDOK signal activates) the
CPU is released and either the data byte is read from shift register
or written into it. At the same time clock shift register is
copied into clock register when reading or viceversa when writing.
Data I/O with the disk is carried out through 2 shift registers,
one for data bits (@ 0x60 address) and one for clock bits (@ 0x61
address). CPU is stalled by setting WAIT/ to 0 whenever it accesses
the data register and the hw is not ready for the byte. Once
the next byte boundary is reached (the SDOK signal activates) the
CPU is released and either the data byte is read from shift register
or written into it. At the same time clock shift register is
copied into clock register when reading or viceversa when writing.
The 9895 drive can operate in 2 modes: HP/High density or IBM/low
density. This table summarizes the differences between the modes.
See also page 2-12 of service manual.
The 9895 drive can operate in 2 modes: HP/High density or IBM/low
density. This table summarizes the differences between the modes.
See also page 2-12 of service manual.
| Characteristic | HP mode | IBM mode |
|----------------+----------+-----------|
| Bit cell size | 2 µs | 4 µs |
| Modulation | MMFM | FM |
| Bit order | LS first | MS first |
| Sync bytes | 4x FF | 6x 00 |
| Formatted size | 1155 kB | 250.25 kB |
| Characteristic | HP mode | IBM mode |
|----------------+----------+-----------|
| Bit cell size | 2 µs | 4 µs |
| Modulation | MMFM | FM |
| Bit order | LS first | MS first |
| Sync bytes | 4x FF | 6x 00 |
| Formatted size | 1155 kB | 250.25 kB |
Reference manual:
HP 09895-90030, feb 81, 9895A Flexible Disc Memory Service Manual
Reference manual:
HP 09895-90030, feb 81, 9895A Flexible Disc Memory Service Manual
Reference manual for the floppy drives:
Magnetic Peripherals, inc., feb 83, 9406-4 Flexible Disk Drive
Hardware Maintenance Manual
Reference manual for the floppy drives:
Magnetic Peripherals, inc., feb 83, 9406-4 Flexible Disk Drive
Hardware Maintenance Manual
TODO/Issues:
* floppy_image_device sometimes reports the wrong state for wpt
signal
* IBM mode hasn't been tested yet
TODO/Issues:
* floppy_image_device sometimes reports the wrong state for wpt
signal
* IBM mode hasn't been tested yet
*********************************************************************/
@ -69,51 +69,51 @@
#define BIT_SET(w , n) ((w) |= BIT_MASK(n))
// Bits in RESET register
#define REG_RESET_TIMEOUT_START_BIT 0 // Start TIMEOUT oneshot (1)
#define REG_RESET_OVERUN_CLEAR_BIT 1 // Clear OVERUN (sic) (1)
#define REG_RESET_PROGRES_BIT 3 // PROGRES (1)
#define REG_RESET_TIMEOUT_START_BIT 0 // Start TIMEOUT oneshot (1)
#define REG_RESET_OVERUN_CLEAR_BIT 1 // Clear OVERUN (sic) (1)
#define REG_RESET_PROGRES_BIT 3 // PROGRES (1)
// Bits in CNTL register
#define REG_CNTL_READON_BIT 1 // Enable reading (1)
#define REG_CNTL_WRITON_BIT 2 // Enable writing (1)
#define REG_CNTL_WRITDRV_BIT 3 // Enable writing to floppy (1)
#define REG_CNTL_CRCOUT_BIT 4 // Enable output of CRC word (1)
#define REG_CNTL_CRCON_BIT 5 // Enable updating of CRC word (1) or preset CRC to 0xffff (0)
#define REG_CNTL_READON_BIT 1 // Enable reading (1)
#define REG_CNTL_WRITON_BIT 2 // Enable writing (1)
#define REG_CNTL_WRITDRV_BIT 3 // Enable writing to floppy (1)
#define REG_CNTL_CRCOUT_BIT 4 // Enable output of CRC word (1)
#define REG_CNTL_CRCON_BIT 5 // Enable updating of CRC word (1) or preset CRC to 0xffff (0)
// Bits in DRV register
#define REG_DRV_STEP_BIT 0 // Step pulse to drive (1)
#define REG_DRV_MOVEIN_BIT 1 // Move heads inward (1)
#define REG_DRV_MGNENA_BIT 2 // Enable checking of bit cell margins (1)
#define REG_DRV_IN_USE_BIT 3 // "In use" signal to drive (1)
#define REG_DRV_LOWCURR_BIT 4 // Reduce write current in inner tracks (1)
#define REG_DRV_HEADSEL_BIT 7 // Head selection (1 = Head 1)
#define REG_DRV_STEP_BIT 0 // Step pulse to drive (1)
#define REG_DRV_MOVEIN_BIT 1 // Move heads inward (1)
#define REG_DRV_MGNENA_BIT 2 // Enable checking of bit cell margins (1)
#define REG_DRV_IN_USE_BIT 3 // "In use" signal to drive (1)
#define REG_DRV_LOWCURR_BIT 4 // Reduce write current in inner tracks (1)
#define REG_DRV_HEADSEL_BIT 7 // Head selection (1 = Head 1)
// Bits in XV register
#define REG_XV_DRIVE3_BIT 0 // Select drive #3 (1)
#define REG_XV_DRIVE2_BIT 1 // Select drive #2 (1)
#define REG_XV_DRIVE1_BIT 2 // Select drive #1 (1)
#define REG_XV_DRIVE0_BIT 3 // Select drive #0 (1)
#define REG_XV_HIDEN_BIT 4 // Select HP/High density mode (1) or IBM/Low density mode (0)
#define REG_XV_PRECMP_BIT 5 // Enable pre-compensation
#define REG_XV_DRIVE3_BIT 0 // Select drive #3 (1)
#define REG_XV_DRIVE2_BIT 1 // Select drive #2 (1)
#define REG_XV_DRIVE1_BIT 2 // Select drive #1 (1)
#define REG_XV_DRIVE0_BIT 3 // Select drive #0 (1)
#define REG_XV_HIDEN_BIT 4 // Select HP/High density mode (1) or IBM/Low density mode (0)
#define REG_XV_PRECMP_BIT 5 // Enable pre-compensation
// Bits in DRIVSTAT register
#define REG_DRIVSTAT_INDEX_BIT 0 // Index pulse from drive (1)
#define REG_DRIVSTAT_DISCHNG_BIT 1 // Disk changed (1)
#define REG_DRIVSTAT_TRACK0_BIT 2 // Heads on track #0 (1)
#define REG_DRIVSTAT_WRPROT_BIT 3 // Disk is write-protected (1)
#define REG_DRIVSTAT_READY_BIT 4 // Disk is ready (1)
#define REG_DRIVSTAT_CRCERR_BIT 5 // Error in CRC (1)
#define REG_DRIVSTAT_OVERUN_BIT 6 // I/O overrun between disk and CPU (1)
#define REG_DRIVSTAT_TWOSIDE_BIT 7 // 2-sided disk (1)
#define REG_DRIVSTAT_INDEX_BIT 0 // Index pulse from drive (1)
#define REG_DRIVSTAT_DISCHNG_BIT 1 // Disk changed (1)
#define REG_DRIVSTAT_TRACK0_BIT 2 // Heads on track #0 (1)
#define REG_DRIVSTAT_WRPROT_BIT 3 // Disk is write-protected (1)
#define REG_DRIVSTAT_READY_BIT 4 // Disk is ready (1)
#define REG_DRIVSTAT_CRCERR_BIT 5 // Error in CRC (1)
#define REG_DRIVSTAT_OVERUN_BIT 6 // I/O overrun between disk and CPU (1)
#define REG_DRIVSTAT_TWOSIDE_BIT 7 // 2-sided disk (1)
// Bits in SWITCHES(2) registers
#define REG_SWITCHES_HPIB_ADDR_SHIFT 0 // LSB of HPIB address
#define REG_SWITCHES_HPIB_ADDR_MASK 7 // Mask of HPIB address
#define REG_SWITCHES_W_TEST_BIT 3 // "W" test push-button (1)
#define REG_SWITCHES_S_TEST_BIT 4 // "S" test push-button (1)
#define REG_SWITCHES_LOOP_BIT 5 // Test loop option (1)
#define REG_SWITCHES_TIMEOUT_BIT 6 // TIMEOUT (1)
#define REG_SWITCHES_AMDT_BIT 7 // Address mark detected (1)
#define REG_SWITCHES_HPIB_ADDR_SHIFT 0 // LSB of HPIB address
#define REG_SWITCHES_HPIB_ADDR_MASK 7 // Mask of HPIB address
#define REG_SWITCHES_W_TEST_BIT 3 // "W" test push-button (1)
#define REG_SWITCHES_S_TEST_BIT 4 // "S" test push-button (1)
#define REG_SWITCHES_LOOP_BIT 5 // Test loop option (1)
#define REG_SWITCHES_TIMEOUT_BIT 6 // TIMEOUT (1)
#define REG_SWITCHES_AMDT_BIT 7 // Address mark detected (1)
// Timers
enum {
@ -123,11 +123,11 @@ enum {
};
// Timings
#define TIMEOUT_MSEC 450 // Timeout duration (ms)
#define HPMODE_BIT_FREQ 500000 // HP-mode bit frequency (Hz)
#define IBMMODE_BIT_FREQ 250000 // IBM-mode bit frequency (Hz)
#define TIMEOUT_MSEC 450 // Timeout duration (ms)
#define HPMODE_BIT_FREQ 500000 // HP-mode bit frequency (Hz)
#define IBMMODE_BIT_FREQ 250000 // IBM-mode bit frequency (Hz)
#define MIN_SYNC_BITS 29 // Number of bits to synchronize
#define MIN_SYNC_BITS 29 // Number of bits to synchronize
// device type definition
const device_type HP9895 = &device_creator<hp9895_device>;
@ -225,7 +225,7 @@ void hp9895_device::device_reset()
m_data_sr = 0;
m_wr_context = 0;
m_had_transition = false;
m_lckup = true; // Because READON = 0
m_lckup = true; // Because READON = 0
m_amdt = false;
m_sync_cnt = 0;
m_hiden = false;
@ -819,11 +819,11 @@ void hp9895_device::write_bit(bool data_bit , bool clock_bit)
if (m_hiden) {
// **** HP mode ****
// m_wr_context delays data bits by 2 bit cells
// Bit Content
// Bit Content
// ============
// 2 Data @ t-2
// 1 Data @ t-1
// 0 Data @ t
// 2 Data @ t-2
// 1 Data @ t-1
// 0 Data @ t
m_wr_context = (m_wr_context << 1) | data_bit;
data_bit = BIT(m_wr_context , 2);
clock_bit = !data_bit && (clock_bit || !m_had_transition);

View File

@ -92,20 +92,20 @@ private:
floppy_image_device *m_current_drive;
unsigned m_current_drive_idx;
bool m_dskchg[ 2 ];
uint16_t m_crc; // U77
uint16_t m_crc; // U77
bool m_crcerr_syn;
bool m_overrun;
bool m_accdata;
bool m_timeout;
uint8_t m_cntl_reg; // U31
uint8_t m_clock_sr; // U22 & U4
uint8_t m_clock_reg; // U23 & U5
uint8_t m_data_sr; // U24 & U6
uint8_t m_cntl_reg; // U31
uint8_t m_clock_sr; // U22 & U4
uint8_t m_clock_reg; // U23 & U5
uint8_t m_data_sr; // U24 & U6
uint8_t m_wr_context;
bool m_had_transition;
bool m_lckup;
bool m_amdt;
uint8_t m_sync_cnt; // U28 & U73
uint8_t m_sync_cnt; // U28 & U73
bool m_hiden;
bool m_mgnena;

View File

@ -19,7 +19,7 @@
#define VIDEORAM_SIZE 0x800
#define RAM_SIZE 0x10000
#define MC6845_TAG "mc6845"
#define MC6845_TAG "mc6845"
#define MC6845_SCREEN_TAG "screen80"
@ -314,14 +314,14 @@ void vic20_video_pak_t::vic20_cd_w(address_space &space, offs_t offset, uint8_t
case 0x1bfc:
/*
bit description
bit description
0 0 = upper case, 1 = lower case
1 bank size: 0 = 2x24KB, 1 = 4x16KB
2 16KB mode address LSB
3 memory address MSB
4 0 = enable RAM, 1 = disable RAM
5 0 = 40 columns, 1 = 80 columns (Data 20 Video Manager)
0 0 = upper case, 1 = lower case
1 bank size: 0 = 2x24KB, 1 = 4x16KB
2 16KB mode address LSB
3 memory address MSB
4 0 = enable RAM, 1 = disable RAM
5 0 = 40 columns, 1 = 80 columns (Data 20 Video Manager)
*/

View File

@ -219,9 +219,9 @@ void vme_device::static_set_cputag(device_t &device, const char *tag)
vme.m_cputag = tag;
}
// static_set_use_owner_spaces - disables use of the memory interface and use the address spaces
// static_set_use_owner_spaces - disables use of the memory interface and use the address spaces
// of the owner instead. This is useful for VME buses where no address modifiers or arbitration is
// being used and gives some gain in performance.
// being used and gives some gain in performance.
void vme_device::static_use_owner_spaces(device_t &device)
{
LOG("%s %s\n", device.tag(), FUNCNAME);
@ -288,9 +288,9 @@ void vme_device::add_vme_card(device_vme_card_interface *card)
}
#if 0
/*
/*
* Install UB (Utility Bus) handlers for this board
*
*
* The Utility Bus signal lines
*------------------------------
* System Clock (SYSCLK)
@ -306,7 +306,7 @@ void vme_device::install_ub_handler(offs_t start, offs_t end, read8_delegate rha
}
#endif
/*
/*
* Install DTB (Data Transfer Bus) handlers for this board
*/
@ -331,11 +331,11 @@ void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read8
case 16:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0x0000ffff));
break;
case 24:
case 24:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint32_t)(mask & 0x00ffffff));
break;
case 32:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
break;
default: fatalerror("VME D8: Bus width %d not supported\n", m_prgwidth);
}
@ -362,11 +362,11 @@ void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read1
case 16:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0x0000ffff));
break;
case 24:
case 24:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint32_t)(mask & 0x00ffffff));
break;
case 32:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
break;
default: fatalerror("VME D16: Bus width %d not supported\n", m_prgwidth);
}
@ -393,11 +393,11 @@ void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read3
case 16:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0x0000ffff));
break;
case 24:
case 24:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint32_t)(mask & 0x00ffffff));
break;
case 32:
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
break;
default: fatalerror("VME D32: Bus width %d not supported\n", m_prgwidth);
}

View File

@ -131,7 +131,7 @@ extern const device_type VME;
class vme_card_interface;
class vme_device : public device_t,
class vme_device : public device_t,
public device_memory_interface
{
public:
@ -172,13 +172,13 @@ public:
enum vme_amod_t
{ // Defined and User Defined Address Modifier Values (long bnames from VME standard text. please use short)
AMOD_EXTENDED_NON_PRIV_DATA = 0x09, //A32 SC (Single Cycle)
A32_SC = 0x09, //A32 SC (Single Cycle)
A32_SC = 0x09, //A32 SC (Single Cycle)
AMOD_EXTENDED_NON_PRIV_PRG = 0x0A,
AMOD_EXTENDED_NON_PRIV_BLK = 0x0B,
AMOD_EXTENDED_SUPERVIS_DATA = 0x0D,
AMOD_EXTENDED_SUPERVIS_PRG = 0x0E,
AMOD_EXTENDED_SUPERVIS_BLK = 0x0F,
AMOD_USER_DEFINED_FIRST = 0x10,
AMOD_USER_DEFINED_FIRST = 0x10,
AMOD_USER_DEFINED_LAST = 0x1F,
AMOD_SHORT_NON_PRIV_ACCESS = 0x29, //A16 SC
A16_SC = 0x29, //A16 SC
@ -192,7 +192,7 @@ public:
AMOD_STANDARD_SUPERVIS_BLK = 0x3F
};
void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask);
// void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
// void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask);
@ -240,11 +240,11 @@ public:
};
#define MCFG_VME_SLOT_ADD(_tag, _slotnbr, _slot_intf,_def_slot) \
{ std::string stag = "slot" + std::to_string(_slotnbr); \
MCFG_DEVICE_ADD(stag.c_str(), VME_SLOT, 0); \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false); \
{ std::string stag = "slot" + std::to_string(_slotnbr); \
MCFG_DEVICE_ADD(stag.c_str(), VME_SLOT, 0); \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false); \
vme_slot_device::static_set_vme_slot(*device, _tag, stag.c_str()); \
vme_slot_device::static_update_vme_chains(*device, _slotnbr); \
vme_slot_device::static_update_vme_chains(*device, _slotnbr); \
}
#define MCFG_VME_SLOT_REMOVE(_tag) \

View File

@ -275,7 +275,7 @@ static MACHINE_CONFIG_FRAGMENT (fccpu20)
MCFG_MPCC_OUT_RTS_CB(DEVWRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
MCFG_MPCC_OUT_INT_CB(DEVWRITELINE("bim", bim68153_device, int1_w))
/* Additional MPCC sits on FLME boards like SRAM-22,
/* Additional MPCC sits on FLME boards like SRAM-22,
TODO: install MPCC2/MPCC3 in FLME slot device */
// MPCC2
MCFG_MPCC68561_ADD ("mpcc2", CLOCK32 / 4, 0, 0)
@ -306,49 +306,49 @@ static MACHINE_CONFIG_FRAGMENT (fccpu20)
MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("mpcc3", mpcc68561_device, cts_w))
MACHINE_CONFIG_END
// SYS68K/CPU-21S Part No.1 01 041 - 68020 CPU board + FPU 68881 at 12.5 MHz, 512 KB RAM
// SYS68K/CPU-21S Part No.1 01 041 - 68020 CPU board + FPU 68881 at 12.5 MHz, 512 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21s, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK50 / 4)
MACHINE_CONFIG_END
// SYS68K/CPU-21 Part No.1 01 001 - 68020 CPU board (CPU-20) + FPU 68881 at 16.7 MHz, 512 KB RAM
// SYS68K/CPU-21 Part No.1 01 001 - 68020 CPU board (CPU-20) + FPU 68881 at 16.7 MHz, 512 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK50 / 3)
MACHINE_CONFIG_END
// SYS68K/CPU-21A Part No.1 01 011 - 68020 CPU board + FPU 68881 at 20 MHz, 512 KB RAM
// SYS68K/CPU-21A Part No.1 01 011 - 68020 CPU board + FPU 68881 at 20 MHz, 512 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21a, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK40 / 2)
MACHINE_CONFIG_END
// SYS68K/CPU-21YA Part No.1 01 061 - 68020 CPU board + FPU 68881 at 20 MHz, 2048 KB RAM
// SYS68K/CPU-21YA Part No.1 01 061 - 68020 CPU board + FPU 68881 at 20 MHz, 2048 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21ya, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK40 / 2)
MACHINE_CONFIG_END
// SYS68K/CPU-21B Part No.1 01 021 - 68020 CPU board + FPU 68881 at 25 MHz, 512 KB RAM
// SYS68K/CPU-21B Part No.1 01 021 - 68020 CPU board + FPU 68881 at 25 MHz, 512 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21b, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK50 / 2)
MACHINE_CONFIG_END
// SYS68K/CPU-21YB Part No.1 01 071 - 68020 CPU board + FPU 68881 at 25 MHz, 2048 KB RAM
// SYS68K/CPU-21YB Part No.1 01 071 - 68020 CPU board + FPU 68881 at 25 MHz, 2048 KB RAM
static MACHINE_CONFIG_DERIVED( fccpu21yb, fccpu20 )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_CLOCK( CLOCK50 / 2)
MACHINE_CONFIG_END
machine_config_constructor vme_fccpu20_device::device_mconfig_additions() const
machine_config_constructor vme_fccpu20_device::device_mconfig_additions() const
{
LOG("%s %s\n", tag(), FUNCNAME);
switch (m_board_id)
{
case cpu20: return MACHINE_CONFIG_NAME( fccpu20 ); break;
case cpu20: return MACHINE_CONFIG_NAME( fccpu20 ); break;
case cpu21a: return MACHINE_CONFIG_NAME( fccpu21a ); break;
case cpu21ya: return MACHINE_CONFIG_NAME( fccpu21ya ); break;
case cpu21b: return MACHINE_CONFIG_NAME( fccpu21b ); break;
@ -366,7 +366,7 @@ machine_config_constructor vme_fccpu20_device::device_mconfig_additions() const
//**************************************************************************
vme_fccpu20_device::vme_fccpu20_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, fc_board_t board_id) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source)
, device_vme_card_interface(mconfig, *this)
, device_vme_card_interface(mconfig, *this)
, m_maincpu (*this, "maincpu")
, m_pit (*this, "pit")
, m_bim (*this, "bim")
@ -435,7 +435,7 @@ void vme_fccpu20_device::device_start()
save_pointer (NAME (m_sysrom), sizeof(m_sysrom));
save_pointer (NAME (m_sysram), sizeof(m_sysram));
// save_item(NAME(m_board_id)); // TODO: Save this "non base type" item
// save_item(NAME(m_board_id)); // TODO: Save this "non base type" item
/* TODO: setup this RAM from (not yet) optional SRAM-2x board and also support 2MB versions */
//m_maincpu->space(AS_PROGRAM).install_ram(0x80000, m_ram->size() + 0x7ffff, m_ram->pointer());
@ -568,15 +568,15 @@ READ8_MEMBER (vme_fccpu20_device::pitc_r)
switch (m_board_id)
{
case cpu20:
board_id = CPU20;
case cpu20:
board_id = CPU20;
break;
case cpu21a:
case cpu21ya:
case cpu21b:
case cpu21yb:
case cpu21s:
case cpu21:
case cpu21:
board_id = CPU21;
break;
default: logerror("Attempt to set unknown board type %02x, defaulting to CPU20\n", board_id);
@ -603,13 +603,13 @@ ROM_END
#define rom_fccpu21b rom_fccpu20
#define rom_fccpu21yb rom_fccpu20
const tiny_rom_entry *vme_fccpu20_device::device_rom_region() const
const tiny_rom_entry *vme_fccpu20_device::device_rom_region() const
{
LOG("%s\n", FUNCNAME);
LOG("%s\n", FUNCNAME);
switch (m_board_id)
{
case cpu20: return ROM_NAME( fccpu20 ); break;
case cpu20: return ROM_NAME( fccpu20 ); break;
case cpu21a: return ROM_NAME( fccpu21a ); break;
case cpu21ya: return ROM_NAME( fccpu21ya ); break;
case cpu21b: return ROM_NAME( fccpu21b ); break;
@ -617,7 +617,7 @@ const tiny_rom_entry *vme_fccpu20_device::device_rom_region() const
case cpu21s: return ROM_NAME( fccpu21s ); break;
case cpu21: return ROM_NAME( fccpu21 ); break;
default: logerror("Attempt to get rom set for unknown board type %02x, defaulting to CPU20\n", m_board_id);
return ROM_NAME( fccpu20 );
return ROM_NAME( fccpu20 );
}
}

View File

@ -36,7 +36,7 @@ enum fc_board_t {
//**************************************************************************
// Base Device declaration
//**************************************************************************
class vme_fccpu20_device : public device_t, public device_vme_card_interface
class vme_fccpu20_device : public device_t, public device_vme_card_interface
{
public:
vme_fccpu20_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, fc_board_t board_id);
@ -68,10 +68,10 @@ private:
required_device<mpcc68561_device> m_mpcc3;
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
uint32_t *m_sysrom;
uint32_t m_sysram[2];
void update_irq_to_maincpu();
fc_board_t m_board_id;
uint32_t *m_sysrom;
uint32_t m_sysram[2];
void update_irq_to_maincpu();
fc_board_t m_board_id;
// Below replaces machine_start and machine_reset from src/mame/drivers/fccpu20.cpp
protected:

View File

@ -171,7 +171,7 @@ void vme_mzr8300_card_device::device_start()
/* Setup r/w handlers for first SIO in A16 */
uint32_t base = 0xFF0000;
// m_vme->static_set_custom_spaces(*this);
// m_vme->static_set_custom_spaces(*this);
m_vme->install_device(vme_device::A16_SC, base + 0, base + 1, // Channel B - Data
read8_delegate(FUNC(z80sio_device::db_r), subdevice<z80sio_device>("sio0")),

View File

@ -140,7 +140,7 @@ void clipper_device::device_start()
void clipper_device::device_reset()
{
/*
/*
* From C300 documentation, on reset:
* psw: T cleared, BIG set from hardware, others undefined
* ssw: EI, TP, M, U, K, KU, UU, P cleared, ID set from hardware, others undefined
@ -155,7 +155,7 @@ void clipper_device::device_reset()
memset(m_f, 0, sizeof(m_f));
// FIXME: figure out how to branch to the boot code properly
m_pc = 0x7f100000;
m_pc = 0x7f100000;
m_irq = 0;
m_nmi = 0;
}
@ -165,7 +165,7 @@ void clipper_device::state_string_export(const device_state_entry &entry, std::s
switch (entry.index())
{
case STATE_GENFLAGS:
str = string_format("%c%c%c%c",
str = string_format("%c%c%c%c",
PSW(C) ? 'C' : '.',
PSW(V) ? 'V' : '.',
PSW(Z) ? 'Z' : '.',
@ -393,7 +393,7 @@ int clipper_device::execute_instruction ()
case 0x00: // noop
break;
case 0x10:
case 0x10:
// movwp: move word to processor register
// treated as a noop if target ssw in user mode
// R1 == 3 means "fast" mode - avoids pipeline flush
@ -406,7 +406,7 @@ int clipper_device::execute_instruction ()
}
// FLAGS: CVZN
break;
case 0x11:
case 0x11:
// movpw: move processor register to word
switch (R1)
{
@ -414,24 +414,24 @@ int clipper_device::execute_instruction ()
case 1: m_r[R2] = m_ssw; break;
}
break;
case 0x12:
case 0x12:
// calls: call supervisor
next_pc = intrap(EXCEPTION_SUPERVISOR_CALL_BASE + (m_info.subopcode & 0x7f) * 8, next_pc);
break;
case 0x13:
case 0x13:
// ret: return from subroutine
next_pc = m_data->read_dword(m_r[R2]);
m_r[R2] += 4;
// TRAPS: C,U,A,P,R
break;
case 0x14:
case 0x14:
// pushw: push word
m_r[R1] -= 4;
m_data->write_dword(m_r[R1], m_r[R2]);
// TRAPS: A,P,W
break;
case 0x16:
case 0x16:
// popw: pop word
m_r[R2] = m_data->read_dword(m_r[R1]);
m_r[R1] += 4;
@ -445,22 +445,22 @@ int clipper_device::execute_instruction ()
break;
case 0x21:
// subs: subtract single floating
*((float *)&m_f[R2]) -= *((float *)&m_f[R1]);
*((float *)&m_f[R2]) -= *((float *)&m_f[R1]);
// TRAPS: F_IVUX
break;
case 0x22:
// addd: add double floating
m_f[R2] += m_f[R1];
m_f[R2] += m_f[R1];
// TRAPS: F_IVUX
break;
case 0x23:
// subd: subtract double floating
m_f[R2] -= m_f[R1];
m_f[R2] -= m_f[R1];
// TRAPS: F_IVUX
break;
case 0x24:
// movs: move single floating
*((float *)&m_f[R2]) = *((float *)&m_f[R1]);
*((float *)&m_f[R2]) = *((float *)&m_f[R1]);
break;
case 0x25:
// cmps: compare single floating
@ -468,7 +468,7 @@ int clipper_device::execute_instruction ()
break;
case 0x26:
// movd: move double floating
m_f[R2] = m_f[R1];
m_f[R2] = m_f[R1];
break;
case 0x27:
// cmpd: compare double floating
@ -487,7 +487,7 @@ int clipper_device::execute_instruction ()
break;
case 0x2a:
// muld: multiply double floating
m_f[R2] *= m_f[R1];
m_f[R2] *= m_f[R1];
// TRAPS: F_IVUX
break;
case 0x2b:
@ -497,21 +497,21 @@ int clipper_device::execute_instruction ()
break;
case 0x2c:
// movsw: move single floating to word
m_r[R2] = *((s32 *)&m_f[R1]);
m_r[R2] = *((s32 *)&m_f[R1]);
break;
case 0x2d:
// movws: move word to single floating
*((s32 *)&m_f[R2]) = m_r[R1];
*((s32 *)&m_f[R2]) = m_r[R1];
break;
case 0x2e:
// movdl: move double floating to longword
((double *)m_r)[R2 >> 1] = m_f[R1];
((double *)m_r)[R2 >> 1] = m_f[R1];
break;
case 0x2f:
// movld: move longword to double floating
m_f[R2] = ((double *)m_r)[R1 >> 1];
m_f[R2] = ((double *)m_r)[R1 >> 1];
break;
case 0x30:
case 0x30:
// shaw: shift arithmetic word
if (m_r[R1] > 0)
{
@ -530,7 +530,7 @@ int clipper_device::execute_instruction ()
}
// FLAGS: 0VZN
break;
case 0x31:
case 0x31:
// shal: shift arithmetic longword
if (m_r[R1] > 0)
{
@ -549,7 +549,7 @@ int clipper_device::execute_instruction ()
}
// FLAGS: 0VZN
break;
case 0x32:
case 0x32:
// shlw: shift logical word
if (m_r[R1] > 0)
m_r[R2] <<= m_r[R1];
@ -558,7 +558,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0);
break;
case 0x33:
case 0x33:
// shll: shift logical longword
if (m_r[R1] > 0)
((u64 *)m_r)[R2 >> 1] <<= m_r[R1];
@ -567,7 +567,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
FLAGS(0, 0, ((s64 *)m_r)[R2 >> 1] == 0, ((s64 *)m_r)[R2 >> 1] < 0);
break;
case 0x34:
case 0x34:
// rotw: rotate word
if (m_r[R1] > 0)
m_r[R2] = rotl32(m_r[R2], m_r[R1]);
@ -576,7 +576,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0);
break;
case 0x35:
case 0x35:
// rotl: rotate longword
if (m_r[R1] > 0)
((u64 *)m_r)[R2 >> 1] = rotl64(((u64 *)m_r)[R2 >> 1], m_r[R1]);
@ -586,7 +586,7 @@ int clipper_device::execute_instruction ()
FLAGS(0, 0, ((s64 *)m_r)[R2 >> 1] == 0, ((s64 *)m_r)[R2 >> 1] < 0);
break;
case 0x38:
case 0x38:
// shai: shift arithmetic immediate
if (m_info.imm > 0)
{
@ -606,7 +606,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0VZN
// TRAPS: I
break;
case 0x39:
case 0x39:
// shali: shift arithmetic longword immediate
if (m_info.imm > 0)
{
@ -626,7 +626,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0VZN
// TRAPS: I
break;
case 0x3a:
case 0x3a:
// shli: shift logical immediate
if (m_info.imm > 0)
m_r[R2] <<= m_info.imm;
@ -636,7 +636,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
// TRAPS: I
break;
case 0x3b:
case 0x3b:
// shlli: shift logical longword immediate
if (m_info.imm > 0)
((u64 *)m_r)[R2 >> 1] <<= m_info.imm;
@ -646,7 +646,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
// TRAPS: I
break;
case 0x3c:
case 0x3c:
// roti: rotate immediate
if (m_info.imm > 0)
m_r[R2] = rotl32(m_r[R2], m_info.imm);
@ -656,7 +656,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
// TRAPS: I
break;
case 0x3d:
case 0x3d:
// rotli: rotate longword immediate
if (m_info.imm > 0)
((u64 *)m_r)[R2 >> 1] = rotl64(((u64 *)m_r)[R2 >> 1], m_info.imm);
@ -667,8 +667,8 @@ int clipper_device::execute_instruction ()
// TRAPS: I
break;
case 0x44:
case 0x45:
case 0x44:
case 0x45:
// call: call subroutine
m_r[R2] -= 4;
m_data->write_dword(m_r[R2], next_pc);
@ -713,8 +713,8 @@ int clipper_device::execute_instruction ()
break;
#endif
case 0x60:
case 0x61:
case 0x60:
case 0x61:
// loadw: load word
m_r[R2] = m_data->read_dword(m_info.address);
// TRAPS: C,U,A,P,R,I
@ -725,13 +725,13 @@ int clipper_device::execute_instruction ()
m_r[R2] = m_info.address;
// TRAPS: I
break;
case 0x64:
case 0x64:
case 0x65:
// loads: load single floating
((u64 *)&m_f)[R2] = m_data->read_dword(m_info.address);
// TRAPS: C,U,A,P,R,I
break;
case 0x66:
case 0x66:
case 0x67:
// loadd: load double floating
((u64 *)&m_f)[R2] = m_data->read_qword(m_info.address);
@ -743,13 +743,13 @@ int clipper_device::execute_instruction ()
m_r[R2] = (s8)m_data->read_byte(m_info.address);
// TRAPS: C,U,A,P,R,I
break;
case 0x6a:
case 0x6a:
case 0x6b:
// loadbu: load byte unsigned
m_r[R2] = m_data->read_byte(m_info.address);
// TRAPS: C,U,A,P,R,I
break;
case 0x6c:
case 0x6c:
case 0x6d:
// loadh: load halfword
m_r[R2] = (s16)m_data->read_word(m_info.address);
@ -761,7 +761,7 @@ int clipper_device::execute_instruction ()
m_r[R2] = m_data->read_word(m_info.address);
// TRAPS: C,U,A,P,R,I
break;
case 0x70:
case 0x70:
case 0x71:
// storw: store word
m_data->write_dword(m_info.address, m_r[R2]);
@ -800,7 +800,7 @@ int clipper_device::execute_instruction ()
// TRAPS: A,P,W,I
break;
case 0x80:
case 0x80:
// addw: add word
FLAGS_CV(C_ADD(m_r[R2], m_r[R1]), V_ADD(m_r[R2], m_r[R1]))
m_r[R2] += m_r[R1];
@ -864,7 +864,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 00ZN
break;
case 0x8f:
case 0x8f:
// ori: or immediate
m_r[R2] |= m_info.imm;
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0)
@ -886,7 +886,7 @@ int clipper_device::execute_instruction ()
// FLAGS: CVZN
break;
case 0x93:
case 0x93:
// negw: negate word
FLAGS_CV(m_r[R1] != 0, m_r[R1] == INT32_MIN)
m_r[R2] = -m_r[R1];
@ -894,7 +894,7 @@ int clipper_device::execute_instruction ()
// FLAGS: CVZN
break;
case 0x98:
case 0x98:
// mulw: multiply word
m_r[R2] = m_r[R2] * m_r[R1];
// FLAGS: 0V00
@ -904,7 +904,7 @@ int clipper_device::execute_instruction ()
((s64 *)m_r)[R2 >> 1] = (s64)m_r[R2] * (s64)m_r[R1];
// FLAGS: 0V00
break;
case 0x9a:
case 0x9a:
// mulwu: multiply word unsigned
m_r[R2] = (u32)m_r[R2] * (u32)m_r[R1];
// FLAGS: 0V00
@ -914,7 +914,7 @@ int clipper_device::execute_instruction ()
((u64 *)m_r)[R2 >> 1] = (u64)m_r[R2] * (u64)m_r[R1];
// FLAGS: 0V00
break;
case 0x9c:
case 0x9c:
// divw: divide word
if (m_r[R1] != 0)
{
@ -926,7 +926,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0V00
// TRAPS: D
break;
case 0x9d:
case 0x9d:
// modw: modulus word
if (m_r[R1] != 0)
{
@ -938,7 +938,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0V00
// TRAPS: D
break;
case 0x9e:
case 0x9e:
// divwu: divide word unsigned
if ((u32)m_r[R1] != 0)
m_r[R2] = (u32)m_r[R2] / (u32)m_r[R1];
@ -948,7 +948,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0000
// TRAPS: D
break;
case 0x9f:
case 0x9f:
// modwu: modulus word unsigned
if ((u32)m_r[R1] != 0)
m_r[R2] = (u32)m_r[R2] % (u32)m_r[R1];
@ -958,7 +958,7 @@ int clipper_device::execute_instruction ()
// FLAGS: 0000
// TRAPS: D
break;
case 0xa0:
case 0xa0:
// subw: subtract word
FLAGS_CV(C_SUB(m_r[R2], m_r[R1]), V_SUB(m_r[R2], m_r[R1]))
m_r[R2] -= m_r[R1];
@ -987,39 +987,39 @@ int clipper_device::execute_instruction ()
// FLAGS: CVZN
break;
case 0xa6:
case 0xa6:
// cmpq: compare quick
FLAGS(C_SUB(m_r[R2], R1), V_SUB(m_r[R2], R1), m_r[R2] == (s32)R1, m_r[R2] < (s32)R1)
// FLAGS: CVZN
break;
case 0xa7:
case 0xa7:
// cmpi: compare immediate
FLAGS(C_SUB(m_r[R2], m_info.imm), V_SUB(m_r[R2], m_info.imm), m_r[R2] == m_info.imm, m_r[R2] < m_info.imm)
// FLAGS: CVZN
// TRAPS: I
break;
case 0xa8:
case 0xa8:
// xorw: exclusive or word
m_r[R2] ^= m_r[R1];
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0)
// FLAGS: 00ZN
break;
case 0xab:
case 0xab:
// xori: exclusive or immediate
m_r[R2] ^= m_info.imm;
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0)
// FLAGS: 00ZN
// TRAPS: I
break;
case 0xac:
case 0xac:
// notw: not word
m_r[R2] = ~m_r[R1];
FLAGS(0, 0, m_r[R2] == 0, m_r[R2] < 0)
// FLAGS: 00ZN
break;
case 0xae:
case 0xae:
// notq: not quick
m_r[R2] = ~R1;
FLAGS(0, 0, 0, 1)
@ -1121,7 +1121,7 @@ int clipper_device::execute_instruction ()
// TRAPS: C,U,A,P,R
break;
case 0x20: case 0x21: case 0x22: case 0x23:
case 0x20: case 0x21: case 0x22: case 0x23:
case 0x24: case 0x25: case 0x26: case 0x27:
// saved0..saved7: push registers fN:f7
@ -1212,14 +1212,14 @@ int clipper_device::execute_instruction ()
{
switch (m_info.subopcode)
{
case 0x00:
case 0x00:
// movus: move user to supervisor
m_rs[m_info.macro & 0xf] = m_ru[(m_info.macro >> 4) & 0xf];
FLAGS(0, 0, m_rs[m_info.macro & 0xf] == 0, m_rs[m_info.macro & 0xf] < 0)
// FLAGS: 00ZN
// TRAPS: S
break;
case 0x01:
case 0x01:
// movsu: move supervisor to user
m_ru[m_info.macro & 0xf] = m_rs[(m_info.macro >> 4) & 0xf];
FLAGS(0, 0, m_ru[m_info.macro & 0xf] == 0, m_ru[m_info.macro & 0xf] < 0)
@ -1242,7 +1242,7 @@ int clipper_device::execute_instruction ()
m_rs[(m_info.macro >> 4) & 0xf] += 64;
// TRAPS: C,U,A,P,R,S
break;
case 0x04:
case 0x04:
// reti: restore psw, ssw and pc from supervisor stack
LOG_INTERRUPT("reti r%d, ssp = %08x, pc = %08x, next_pc = %08x\n",
(macro >> 4) & 0xf, m_rs[(m_info.macro >> 4) & 0xf], m_pc, m_program->read_dword(m_rs[(m_info.macro >> 4) & 0xf] + 8));
@ -1316,10 +1316,10 @@ u32 clipper_device::intrap(u32 vector, u32 pc, u32 cts, u32 mts)
// decrement supervisor stack pointer
// NOTE: while not explicitly stated anywhere, it seems the InterPro boot code has been
// developed with the assumption that the SSP is decremented by 24 bytes during an exception,
// developed with the assumption that the SSP is decremented by 24 bytes during an exception,
// rather than the 12 bytes that might otherwise be expected. This means the exception handler
// code must explicitly increment the SSP by 12 prior to executing the RETI instruction,
// as otherwise the SSP will not be pointing at a valid return frame. It's possible this
// as otherwise the SSP will not be pointing at a valid return frame. It's possible this
// behaviour might vary with some other version of the CPU, but this is all we know for now.
m_rs[15] -= 24;

View File

@ -15,7 +15,7 @@ enum clipper_registers
CLIPPER_F0, CLIPPER_F1, CLIPPER_F2, CLIPPER_F3, CLIPPER_F4, CLIPPER_F5, CLIPPER_F6, CLIPPER_F7,
CLIPPER_F8, CLIPPER_F9, CLIPPER_F10, CLIPPER_F11, CLIPPER_F12, CLIPPER_F13, CLIPPER_F14, CLIPPER_F15,
CLIPPER_PSW,
CLIPPER_PSW,
CLIPPER_SSW,
CLIPPER_PC,
};
@ -71,7 +71,7 @@ enum clipper_psw
PSW_EFI = 0x00002000, // enable floating invalid operation trap
PSW_EFT = 0x00004000, // enable floating trap
PSW_FR = 0x00018000, // floating rounding mode (2 bits)
// unused (3 bits)
// unused (3 bits)
PSW_DSP = 0x00300000, // c400 - delay slot pointer (2 bits)
PSW_BIG = 0x00400000, // c400 - big endian (hardware)
PSW_T = 0x00800000, // trace trap
@ -85,7 +85,7 @@ enum clipper_ssw
SSW_IL = 0x000000f0, // interrupt level (4 bits)
SSW_EI = 0x00000100, // enable interrupts
SSW_ID = 0x0001fe00, // cpu rev # and type (8 bits)
// unused (5 bits)
// unused (5 bits)
SSW_FRD = 0x00400000, // floating registers dirty
SSW_TP = 0x00800000, // trace trap pending
SSW_ECM = 0x01000000, // enabled corrected memory error

View File

@ -42,7 +42,7 @@ enum
#define ADDR_RX ((insn[1] & 0xf0) >> 4)
#define ADDR_I12 (((int16_t)insn[1]) >> 4)
/*
/*
* Branch condition code mnemonics - the forms beginning with 'c' are
* supposed to be used for branches following comparison instructions,
* while those beginning with 'r' are for use after move or logical
@ -70,7 +70,7 @@ static const char *const cc[] =
};
/*
* Decode an addressing mode into a string.
* Decode an addressing mode into a string.
*/
char *address (offs_t pc, u16 *insn)
{
@ -108,16 +108,16 @@ CPU_DISASSEMBLE(clipper)
switch (insn[0] >> 8)
{
case 0x00:
case 0x00:
if (oprom[0] == 0)
util::stream_format(stream, "noop");
else
util::stream_format(stream, "noop $%d", oprom[0]);
bytes = 2;
bytes = 2;
break;
case 0x10: util::stream_format(stream, "movwp r%d,%s", R2, R1 == 0 ? "psw" : R1 == 1 ? "ssw" : "sswf"); bytes = 2; break;
case 0x11: util::stream_format(stream, "movpw %s,r%d", R1 == 0 ? "psw" : "ssw", R2); bytes = 2; break;
case 0x11: util::stream_format(stream, "movpw %s,r%d", R1 == 0 ? "psw" : "ssw", R2); bytes = 2; break;
case 0x12: util::stream_format(stream, "calls $%d", insn[0] & 0x7F); bytes = 2; flags |= DASMFLAG_STEP_OVER; break;
case 0x13: util::stream_format(stream, "ret r%d", R2); bytes = 2; flags |= DASMFLAG_STEP_OUT; break;
case 0x14: util::stream_format(stream, "pushw r%d,r%d", R2, R1); bytes = 2; break;
@ -211,7 +211,7 @@ CPU_DISASSEMBLE(clipper)
case 0x7d: util::stream_format(stream, "storh r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x80: util::stream_format(stream, "addw r%d,r%d", R1, R2); bytes = 2; break;
case 0x82: util::stream_format(stream, "addq $%d,r%d", R1, R2); bytes = 2; break;
case 0x83: util::stream_format(stream, "addi $%d,r%d", IMM_VALUE, R2); bytes = 2 + IMM_SIZE; break;
case 0x84: util::stream_format(stream, "movw r%d,r%d", R1, R2); bytes = 2; break;
@ -348,4 +348,4 @@ CPU_DISASSEMBLE(clipper)
}
return bytes | flags;
}
}

View File

@ -1171,7 +1171,7 @@ void pic16c5x_device::execute_run()
m_count_pending = false;
pic16c5x_update_timer(1);
}
m_PREVPC = m_PC;
debugger_instruction_hook(this, m_PC);

View File

@ -2780,7 +2780,7 @@ inline void sh34_base_device::FMOVFR(const uint16_t opcode)
{
uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_sz == 0) { /* SZ = 0 */
if (m_fpu_sz == 0) { /* SZ = 0 */
#ifdef LSB_FIRST
n ^= m_fpu_pr;
m ^= m_fpu_pr;

View File

@ -4,11 +4,11 @@
Toshiba TLCS-870 Series MCUs
The TLCS-870/X expands on this instruction set using the same base encoding.
The TLCS-870/X expands on this instruction set using the same base encoding.
The TLCS-870/C appears to have a completely different encoding.
The TLCS-870/C appears to have a completely different encoding.
loosely baesd on the tlcs90 core by Luca Elia
loosely baesd on the tlcs90 core by Luca Elia
*************************************************************************************************************/
@ -157,13 +157,13 @@ static ADDRESS_MAP_START(tmp87ph40an_mem, AS_PROGRAM, 8, tlcs870_device)
// 0x33 reserved
AM_RANGE(0x0034, 0x0034) AM_WRITE(wdtcr1_w) // WDT control
AM_RANGE(0x0035, 0x0035) AM_WRITE(wdtcr2_w) //
AM_RANGE(0x0036, 0x0036) AM_READWRITE(tbtcr_r, tbtcr_w) // TBT / TG / DVO control
AM_RANGE(0x0037, 0x0037) AM_READWRITE(eintcr_r, eintcr_w) // External interrupt control
AM_RANGE(0x0038, 0x0038) AM_READWRITE(syscr1_r, syscr1_w) // System Control
AM_RANGE(0x0039, 0x0039) AM_READWRITE(syscr2_r, syscr2_w) //
AM_RANGE(0x003a, 0x003a) AM_READWRITE(eir_l_r, eir_l_w) // Interrupt enable register
AM_RANGE(0x003b, 0x003b) AM_READWRITE(eir_h_r, eir_h_w) //
@ -221,7 +221,7 @@ void tlcs870_device::decode()
uint8_t b0;
uint8_t b1;
int tmppc = m_addr;
b0 = READ8();
@ -475,7 +475,7 @@ void tlcs870_device::decode()
break;
case 0x26:
case 0x26:
// LD (x),(y) // Flags / Cycles 1Z-- / 5
m_op = LD;
m_flagsaffected |= FLAG_J | FLAG_Z;
@ -672,8 +672,8 @@ void tlcs870_device::decode()
m_param1 = 0; // A
m_param2_type = REG_8BIT;
m_param2 = b0 & 0x7;
m_param2 = b0 & 0x7;
break;
case 0x58:
@ -692,7 +692,7 @@ void tlcs870_device::decode()
m_param2 = 0; // A
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
m_param1 = b0 & 0x7;
break;
case 0x60:
@ -733,7 +733,7 @@ void tlcs870_device::decode()
case 0x77:
// (ALU OP) A,n
m_op = (b0 & 0x7)+ALU_ADDC;
m_param1_type = REG_8BIT;
m_param1 = 0; // A
@ -752,7 +752,7 @@ void tlcs870_device::decode()
case 0x7f:
// (ALU OP) A,(x)
m_op = (b0 & 0x7)+ALU_ADDC;
m_param1_type = REG_8BIT;
m_param1 = 0; // A
@ -963,7 +963,7 @@ void tlcs870_device::decode()
case 0xf0: // 1111 0000 xxxx xxxx 0101 0rrr
// destination memory prefix (dst)
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1 = READ8();
decode_dest(b0);
break;
@ -971,14 +971,14 @@ void tlcs870_device::decode()
case 0xf2: // 1111 001p 0101 0rrr
case 0xf3: // 1111 001p 0101 0rrr
// destination memory prefix (dst)
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1_type = ADDR_IN_BASE+(b0&0x7);
decode_dest(b0);
break;
case 0xf4: // 1111 0100 dddd dddd 0101 0rrr
// destination memory prefix (dst)
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1 = READ8();
decode_dest(b0);
break;
@ -986,7 +986,7 @@ void tlcs870_device::decode()
case 0xf6: // 1110 0110 0101 0rrr
case 0xf7: // 1111 0111 0101 0rrr
// destination memory prefix (dst)
m_param1_type = ADDR_IN_BASE+(b0&0x7);
m_param1_type = ADDR_IN_BASE+(b0&0x7);
decode_dest(b0);
break;
@ -1008,7 +1008,7 @@ void tlcs870_device::decode()
m_param1_type = STACKPOINTER;
//m_param1 = 0;
m_param2_type = ABSOLUTE_VAL_16;
m_param2 = READ16();
@ -1028,7 +1028,7 @@ void tlcs870_device::decode()
break;
}
break;
case 0xfc:
@ -1069,7 +1069,7 @@ void tlcs870_device::decode()
void tlcs870_device::decode_register_prefix(uint8_t b0)
{
uint8_t bx;
bx = READ8();
switch (bx)
@ -1081,7 +1081,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x01:
// SWAP g
m_op = SWAP;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
break;
@ -1089,7 +1089,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x02:
// MUL ggG, ggL
m_op = MUL;
m_param1_type = REG_16BIT; // odd syntax
m_param1 = b0 & 0x3;
break;
@ -1099,7 +1099,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
m_op = DIV;
m_param1_type = REG_16BIT;
m_param1 = b0 & 3;
m_param2_type = REG_8BIT;
m_param2 = 2; // C
@ -1143,7 +1143,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x0a:
// DAA g
m_op = DAA;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1152,7 +1152,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x0b:
// DAS g
m_op = DAS;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1170,7 +1170,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x13:
// XCH rr,gg
m_op = XCH;
m_param1_type = REG_16BIT;
m_param1 = bx & 0x3;
@ -1203,7 +1203,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x1c:
// SHLC g
m_op = SHLC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1212,7 +1212,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x1d:
// SHRC g
m_op = SHRC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1221,7 +1221,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x1e:
// ROLC g
m_op = ROLC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1230,7 +1230,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x1f:
// RORC g
m_op = RORC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1264,7 +1264,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x37:
// (ALU OP) WA,gg
m_op = (bx & 0x7)+ALU_ADDC;
m_param1_type = REG_16BIT;
m_param1 = 0;
@ -1285,7 +1285,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x3f:
// (ALU OP) gg,mn
m_op = (bx & 0x7)+ALU_ADDC;
m_param1_type = REG_16BIT;
m_param1 = b0 & 0x3;
@ -1304,7 +1304,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x47:
// SET g.b
m_op = SET;
m_param1_type = REG_8BIT | BITPOS;
m_param1 = b0 & 0x7;
m_bitpos = bx & 0x7;
@ -1322,7 +1322,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x4f:
// CLR g.b
m_op = CLR;
m_param1_type = REG_8BIT | BITPOS;
m_param1 = b0 & 0x7;
m_bitpos = bx & 0x7;
@ -1368,7 +1368,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x67:
// (ALU OP) A,g
m_op = (bx & 0x7)+ALU_ADDC;
m_param2_type = REG_8BIT;
m_param2 = b0 & 0x7;
@ -1386,7 +1386,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x6f:
// (ALU OP) g,A
m_op = (bx & 0x7)+ALU_ADDC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1404,7 +1404,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
case 0x77:
// (ALU OP) g,n
m_op = (bx & 0x7)+ALU_ADDC;
m_param1_type = REG_8BIT;
m_param1 = b0 & 0x7;
@ -1484,7 +1484,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
break;
case 0x9a:
case 0x9b:
case 0x9b:
// LD (pp).g,CF
m_op = LD; // Flags / Cycles 1--- / 5
m_flagsaffected |= FLAG_J;
@ -1663,7 +1663,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
// b0 & 4 would be invalid?
m_param1_type = STACKPOINTER;
// m_param1 = 0;
// m_param1 = 0;
break;
@ -1671,13 +1671,13 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
// LD gg,SP
m_op = LD; // Flags / Cycles 1--- / 3
m_flagsaffected |= FLAG_J;
m_param1_type = REG_16BIT;
m_param1 = b0 & 3;
// b0 & 4 would be invalid?
m_param2_type = STACKPOINTER;
// m_param2 = 0;
// m_param2 = 0;
break;
case 0xfc:
@ -1716,7 +1716,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
void tlcs870_device::decode_source(int type, uint16_t val)
{
uint8_t bx;
bx = READ8();
switch (bx)
@ -1824,7 +1824,7 @@ void tlcs870_device::decode_source(int type, uint16_t val)
m_param1_type = ADDR_IN_HL;
//m_param1 = 0;
m_param2_type = type;
m_param2 = val;
break;
@ -1884,7 +1884,7 @@ void tlcs870_device::decode_source(int type, uint16_t val)
case 0x47:
// SET (src).b
m_op = SET;
m_param1_type = type | BITPOS;
m_param1 = val;
m_bitpos = bx & 0x7;
@ -1900,7 +1900,7 @@ void tlcs870_device::decode_source(int type, uint16_t val)
case 0x4f:
// CLR (src).b
m_op = CLR;
m_param1_type = type | BITPOS;
m_param1 = val;
m_bitpos = bx & 0x7;
@ -2091,7 +2091,7 @@ void tlcs870_device::decode_source(int type, uint16_t val)
case 0xc7:
// CPL (src).b
m_op = CPL;
m_param1_type = type | BITPOS;
m_param1 = val;
m_bitpos = bx & 0x7;
@ -2219,7 +2219,7 @@ void tlcs870_device::decode_source(int type, uint16_t val)
void tlcs870_device::decode_dest(uint8_t b0)
{
uint8_t bx;
bx = READ8();
switch (bx)
@ -2239,7 +2239,7 @@ void tlcs870_device::decode_dest(uint8_t b0)
m_param2 = bx&0x3;
break;
case 0x2c:
case 0x2c:
// LD (dst),n // (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings?
m_op = LD; // Flags / Cycles 1--- / x
m_flagsaffected |= FLAG_J;
@ -2421,7 +2421,7 @@ void tlcs870_device::set_dest_val(uint16_t param_type, uint16_t param_val, uint1
case (STACKPOINTER):
m_sp.d = dest_val;
break;
}
}
}
else
{
@ -2669,13 +2669,13 @@ void tlcs870_device::execute_run()
break;
/*
case DI:
break;
break;
*/
case DIV:
break;
/*
case EI:
break;
break;
*/
case INC:
{
@ -2730,7 +2730,7 @@ void tlcs870_device::execute_run()
}
/*
case J:
break;
break;
*/
case JP:
case JR:
@ -2798,7 +2798,7 @@ void tlcs870_device::execute_run()
else
{
fatalerror("8-bit jump destination?");
// val = RM8(addr);
// val = RM8(addr);
}
}
else
@ -2808,7 +2808,7 @@ void tlcs870_device::execute_run()
m_pc.d = val;
}
SET_JF;
break;
@ -2819,13 +2819,13 @@ void tlcs870_device::execute_run()
{
// bit operations, including the 'TEST' style bit instruction
uint8_t bit = 0;
if (m_param2_type == CARRYFLAG)
{
bit = IS_CF;
setbit_param(m_param1_type,m_param1,bit, false);
// for this type of operation ( LD *.b, CF ) the Jump Flag always ends up being 1
SET_JF;
@ -2910,8 +2910,8 @@ void tlcs870_device::execute_run()
break;
case RORD:
break;
case SET:
if ((m_param1_type & BITPOS))
{
@ -2938,15 +2938,15 @@ void tlcs870_device::execute_run()
if (m_param1_type & ADDR_IN_BASE)
{
addr = get_addr(m_param1_type,m_param1);
if (m_param1_type & IS16BIT)
WM16(addr, val);
else
WM8(addr, val);
addr = get_addr(m_param1_type,m_param1);
if (m_param1_type & IS16BIT)
WM16(addr, val);
else
WM8(addr, val);
}
else
{
set_dest_val(m_param1_type,m_param1, val);
set_dest_val(m_param1_type,m_param1, val);
}
*/
@ -2964,7 +2964,7 @@ void tlcs870_device::execute_run()
break;
/*
case TEST:
break;
break;
*/
case XCH:
break;
@ -3088,7 +3088,7 @@ void tlcs870_device::state_import(const device_state_entry &entry)
case DEBUGGER_REG_A:
set_reg8(REG_A, m_debugger_temp);
break;
case DEBUGGER_REG_W:
set_reg8(REG_W, m_debugger_temp);
break;
@ -3194,7 +3194,7 @@ void tlcs870_device::state_export(const device_state_entry &entry)
void tlcs870_device::device_start()
{
// int i, p;
// int i, p;
m_sp.d = 0x0000;
m_F = 0;
@ -3231,7 +3231,7 @@ void tlcs870_device::state_string_export(const device_state_entry &entry, std::s
switch (entry.index())
{
case STATE_GENFLAGS:
str = string_format("%c%c%c%c",
F & 0x80 ? 'J':'.',
@ -3241,5 +3241,5 @@ void tlcs870_device::state_string_export(const device_state_entry &entry, std::s
);
break;
}
}

View File

@ -194,7 +194,7 @@ private:
uint8_t m_cycles;
uint32_t m_addr;
uint16_t m_F;
/* CPU registers */

View File

@ -23,7 +23,7 @@
timer init, reset, read changed
2017-Feb-15 Edstrom
Fixed shift registers to be more accurate, eg 50/50 duty cycle, latching
Fixed shift registers to be more accurate, eg 50/50 duty cycle, latching
on correct flanks and leading and trailing flanks added + logging.
*/
@ -426,11 +426,11 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
{
shift_in(); // close latch
// Shift in also on the last flanks
// Shift in also on the last flanks
if (m_shift_counter == 0)
{
m_shift_state = SHIFTER_FINISH;
m_shift_timer->adjust(clocks_to_attotime(1));
m_shift_state = SHIFTER_FINISH;
m_shift_timer->adjust(clocks_to_attotime(1));
}
}
}
@ -714,7 +714,7 @@ READ8_MEMBER( via6522_device::read )
break;
}
LOGR(" * %s Reg %02x -> %02x - %s\n", tag(), offset, val, std::array<char const *, 16>
{{"IRB", "IRA", "DDRB", "DDRA", "T1CL","T1CH","T1LL","T1LH","T2CL","T2CH","SR","ACR","PCR","IFR","IER","IRA (nh)"}}[offset]);
{{"IRB", "IRA", "DDRB", "DDRA", "T1CL","T1CH","T1LL","T1LH","T2CL","T2CH","SR","ACR","PCR","IFR","IER","IRA (nh)"}}[offset]);
return val;
}
@ -1073,7 +1073,7 @@ WRITE_LINE_MEMBER( via6522_device::write_cb1 )
}
else // shift is not controlled by m_pcr
{
if (!state && SO_EXT_CONTROL(m_acr))
if (!state && SO_EXT_CONTROL(m_acr))
{
shift_out();
}

View File

@ -209,10 +209,10 @@ private:
uint8_t m_shift_counter;
enum m_shift_state_t
{
SHIFTER_IDLE,
SHIFTER_SHIFT,
SHIFTER_FINISH,
SHIFTER_IRQ
SHIFTER_IDLE,
SHIFTER_SHIFT,
SHIFTER_FINISH,
SHIFTER_IRQ
};
m_shift_state_t m_shift_state;
};

View File

@ -704,7 +704,7 @@ void mpcc_device::check_interrupts()
}
// update IRQ line
// If we are not serving any interrupt we need to check for a new interrupt or
// If we are not serving any interrupt we need to check for a new interrupt or
// otherwise the IRQ line is asserted already and we need to do nothing
if ((state & INT_ACK) == 0)
{

View File

@ -157,19 +157,19 @@ protected:
void trigger_interrupt(int source);
enum
{
INT_TX, // TX int category, used for update of SR
INT_TX, // TX int category, used for update of SR
INT_TX_TDRA, // Tx char available
INT_TX_TFC, // Tx frame complete
INT_TX_TUNRN, // Tx underrun detected
INT_TX_TFERR, // Tx frame error detected
INT_RX, // RX int category, used for update of SR
INT_RX, // RX int category, used for update of SR
INT_RX_RDA, // Rx interrupt on Receiver Data Available
INT_RX_EOF, // Rx interrupt on End of frame
INT_RX_CPERR, // Rx interrupt on CRC or Parity error
INT_RX_FRERR, // Rx interrupt on Frame error
INT_RX_ROVRN, // Rx interrupt on Receiver overrun
INT_RX_RAB, // Rx interrupt on Abort/Break
INT_SR, // SR int category, used for update of SR
INT_SR, // SR int category, used for update of SR
INT_SR_CTS, // Serial interface interrupt on CTS asserted
INT_SR_DSR, // Serial interface interrupt on DSR asserted
INT_SR_DCD, // Serial interface interrupt on DCD asserted
@ -184,7 +184,7 @@ protected:
enum
{
INT_NONE = 0x00, // No interrupts
INT_NONE = 0x00, // No interrupts
INT_REQ = 0x01, // Interrupt requested
INT_ACK = 0x02 // Interrupt acknowledged
};

View File

@ -82,7 +82,7 @@ akiko_device::akiko_device(const machine_config &mconfig, const char *tag, devic
m_frame_timer(nullptr),
m_cdrom_is_device(0),
m_mem_r(*this), m_mem_w(*this), m_int_w(*this),
m_scl_w(*this), m_sda_r(*this), m_sda_w(*this)
m_scl_w(*this), m_sda_r(*this), m_sda_w(*this)
{
for (int i = 0; i < 8; i++)
{

View File

@ -24,7 +24,7 @@ void fdc_pll_t::set_clock(const attotime &_period)
void fdc_pll_t::reset(const attotime &when)
{
read_reset(when);
read_reset(when);
write_position = 0;
write_start_time = attotime::never;
}
@ -61,9 +61,9 @@ void fdc_pll_t::commit(floppy_image_device *floppy, const attotime &tm)
int fdc_pll_t::get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit)
{
attotime edge = floppy ? floppy->get_next_transition(ctime) : attotime::never;
attotime edge = floppy ? floppy->get_next_transition(ctime) : attotime::never;
return feed_read_data(tm , edge , limit);
return feed_read_data(tm , edge , limit);
}
int fdc_pll_t::feed_read_data(attotime &tm, const attotime& edge, const attotime &limit)

View File

@ -20,9 +20,9 @@ public:
void set_clock(const attotime &period);
void reset(const attotime &when);
void read_reset(const attotime &when);
void read_reset(const attotime &when);
int get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit);
int feed_read_data(attotime &tm, const attotime& edge, const attotime &limit);
int feed_read_data(attotime &tm, const attotime& edge, const attotime &limit);
bool write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit);
void start_writing(const attotime &tm);
void commit(floppy_image_device *floppy, const attotime &tm);

View File

@ -266,7 +266,7 @@ void t10mmc::ExecCommand()
m_device->logerror("T10MMC: play audio from current not implemented!\n");
}
m_device->logerror("T10MMC: PLAY AUDIO MSF at LBA %x for %x blocks (MSF %i:%i:%i - %i:%i:%i)\n",
m_device->logerror("T10MMC: PLAY AUDIO MSF at LBA %x for %x blocks (MSF %i:%i:%i - %i:%i:%i)\n",
m_lba, m_blocks, command[3], command[4], command[5], command[6], command[7], command[8]);
trk = cdrom_get_track(m_cdrom, m_lba);

View File

@ -126,9 +126,9 @@ void c352_device::fetch_sample(c352_voice_t* v)
void c352_device::ramp_volume(c352_voice_t* v,int ch,uint8_t val)
{
int16_t vol_delta = v->curr_vol[ch] - val;
if(vol_delta != 0)
v->curr_vol[ch] += (vol_delta>0) ? -1 : 1;
int16_t vol_delta = v->curr_vol[ch] - val;
if(vol_delta != 0)
v->curr_vol[ch] += (vol_delta>0) ? -1 : 1;
}
void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
@ -162,7 +162,7 @@ void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
{
fetch_sample(v);
}
if((next_counter^v->counter) & 0x18000)
{
ramp_volume(v,0,v->vol_f>>8);
@ -170,7 +170,7 @@ void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
ramp_volume(v,2,v->vol_r>>8);
ramp_volume(v,3,v->vol_r&0xff);
}
v->counter = next_counter&0xffff;
s = v->sample;
@ -263,7 +263,7 @@ void c352_device::write_reg16(unsigned long address, unsigned short val)
m_c352_v[i].flags |= C352_FLG_BUSY;
m_c352_v[i].flags &= ~(C352_FLG_KEYON|C352_FLG_LOOPHIST);
m_c352_v[i].curr_vol[0] = m_c352_v[i].curr_vol[1] = 0;
m_c352_v[i].curr_vol[2] = m_c352_v[i].curr_vol[3] = 0;
}
@ -288,7 +288,7 @@ void c352_device::device_clock_changed()
void c352_device::device_start()
{
int i;
m_sample_rate_base = clock() / m_divider;
m_stream = machine().sound().stream_alloc(*this, 0, 4, m_sample_rate_base);

View File

@ -82,7 +82,7 @@ private:
uint16_t vol_f;
uint16_t vol_r;
uint8_t curr_vol[4];
uint16_t freq;
uint16_t flags;

View File

@ -280,7 +280,7 @@ void saa1099_device::sound_stream_update(sound_stream &stream, stream_sample_t *
for (ch = 0; ch < 2; ch++)
{
/* update the state of the noise generator
/* update the state of the noise generator
* polynomial is x^18 + x^11 + x (i.e. 0x20400) and is a plain XOR, initial state is probably all 1s
* see http://www.vogons.org/viewtopic.php?f=9&t=51695 */
m_noise[ch].counter -= m_noise[ch].freq;

View File

@ -117,7 +117,7 @@ WRITE16_MEMBER(cesblit_device::regs_w)
switch (offset)
{
// case 0x00/2: // bit 15: FPGA programming serial in (lsb first)
// case 0x00/2: // bit 15: FPGA programming serial in (lsb first)
case 0x10/2:
if (!m_blit_irq_cb.isnull() && !BIT(olddata, 3) && BIT(newdata, 3))

View File

@ -19,7 +19,7 @@
MCFG_DEVICE_ADD(_tag, CESBLIT, _clock) \
MCFG_VIDEO_SET_SCREEN(_screen)
#define MCFG_CESBLIT_MAP MCFG_DEVICE_PROGRAM_MAP
#define MCFG_CESBLIT_MAP MCFG_DEVICE_PROGRAM_MAP
#define MCFG_CESBLIT_COMPUTE_ADDR(_compute_addr) \
cesblit_device::static_set_compute_addr(*device, _compute_addr);
@ -33,7 +33,7 @@
// ======================> cesblit_device
class cesblit_device : public device_t,
class cesblit_device : public device_t,
public device_video_interface,
public device_memory_interface
{
@ -44,7 +44,7 @@ public:
cesblit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration
void set_compute_addr(compute_addr_t compute_addr) { m_compute_addr = compute_addr; }
void set_compute_addr(compute_addr_t compute_addr) { m_compute_addr = compute_addr; }
static void static_set_compute_addr(device_t &device, compute_addr_t compute_addr) { downcast<cesblit_device &>(device).set_compute_addr(compute_addr); }
template<class _Object> static devcb_base &static_set_irq_callback(device_t &device, _Object object) { return downcast<cesblit_device &>(device).m_blit_irq_cb.set_callback(object); }
@ -65,7 +65,7 @@ protected:
address_space_config m_space_config;
address_space *m_space;
devcb_write_line m_blit_irq_cb; // blit finished irq
devcb_write_line m_blit_irq_cb; // blit finished irq
bitmap_ind16 m_bitmap[2][2];
uint16_t m_regs[0x12/2];

View File

@ -3,7 +3,7 @@
/*
Hughes HLCD 0515/0569 LCD Driver
0515: 25 columns(also size of buffer/ram)
0569: 24 columns, no DATA OUT pin, display blank has no effect
@ -176,7 +176,7 @@ WRITE_LINE_MEMBER(hlcd0515_device::write_clock)
else
clock_data(m_count - 5);
if (m_count < (m_colmax + 5))
m_count++;
}
@ -195,7 +195,7 @@ WRITE_LINE_MEMBER(hlcd0515_device::write_cs)
// transfer to ram
if (~m_control & 1)
m_ram[m_rowsel] = m_buffer;
m_count = 0;
m_control = 0;
}

View File

@ -46,7 +46,7 @@
GND 20 |___________| 21 COL12
HLCD 0569 doesn't have DATA OUT, instead it has what seems like OSC OUT on pin 34.
OSC is tied to a capacitor, the result frequency is 50000 * cap(in uF), eg. 0.01uF cap = 500Hz.
Internally, this is divided by 2, and by number of rows to get display refresh frequency.
*/
@ -75,7 +75,7 @@ protected:
void clock_data(int col);
u8 m_colmax; // number of column pins
int m_cs; // input pin state
int m_clock; // "
int m_data; // "

View File

@ -27,7 +27,7 @@ const device_type HUC6261 = &device_creator<huc6261_device>;
huc6261_device::huc6261_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, HUC6261, "HuC6261", tag, owner, clock, "huc6261", __FILE__),
device_video_interface(mconfig, *this),
device_video_interface(mconfig, *this),
m_huc6270_a_tag(nullptr), m_huc6270_b_tag(nullptr), m_huc6272_tag(nullptr),
m_huc6270_a(nullptr), m_huc6270_b(nullptr), m_huc6272(nullptr),
m_last_h(0), m_last_v(0), m_height(0), m_address(0), m_palette_latch(0), m_register(0), m_control(0), m_pixels_per_clock(0), m_pixel_data_a(0), m_pixel_data_b(0), m_pixel_clock(0), m_timer(nullptr), m_bmp(nullptr)
@ -44,7 +44,7 @@ huc6261_device::huc6261_device(const machine_config &mconfig, const char *tag, d
r = + 1.13983 * v;
g = -0.35465 * u - 0.58060 * v;
b = 2.03211 * u;
m_uv_lookup[ ( ur << 8 ) | vr ][0] = r;
m_uv_lookup[ ( ur << 8 ) | vr ][1] = g;
m_uv_lookup[ ( ur << 8 ) | vr ][2] = b;
@ -94,7 +94,7 @@ void huc6261_device::device_timer(emu_timer &timer, device_timer_id id, int para
int h = m_last_h;
int v = m_last_v;
uint32_t *bitmap_line = &m_bmp->pix32(v);
while ( h != hpos || v != vpos )
{
if ( m_pixel_clock == 0 )

View File

@ -70,9 +70,9 @@ const address_space_config *huc6271_device::memory_space_config(address_spacenum
{
switch(spacenum)
{
// case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
// case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
}
}

View File

@ -4,9 +4,9 @@
Hudson/NEC HuC6272 "King" device
TODO:
- Use NSCSI instead of legacy one!
TODO:
- Use NSCSI instead of legacy one!
***************************************************************************/
#include "emu.h"
@ -99,9 +99,9 @@ const address_space_config *huc6272_device::memory_space_config(address_spacenum
{
switch(spacenum)
{
case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
}
}
@ -169,13 +169,13 @@ READ32_MEMBER( huc6272_device::read )
case 0x00: // SCSI data in
res = m_scsi_data_in->read() & 0xff;
break;
case 0x05: // SCSI bus status
res = m_scsi_ctrl_in->read() & 0xff;
res|= (m_scsi_data_in->read() << 8);
break;
/*
x--- ---- ---- ---- ----
*/
@ -207,7 +207,7 @@ WRITE32_MEMBER( huc6272_device::write )
if((offset & 1) == 0)
m_register = data & 0x7f;
else
{
{
switch(m_register)
{
case 0x00: // SCSI data out
@ -219,9 +219,9 @@ WRITE32_MEMBER( huc6272_device::write )
m_scsibus->write_sel(BIT(data, 2));
m_scsibus->write_ack(BIT(data, 4));
m_scsibus->write_rst(BIT(data, 7));
break;
case 0x02: // SCSI mode
break;
@ -230,12 +230,12 @@ WRITE32_MEMBER( huc6272_device::write )
m_scsibus->write_cd(BIT(data, 1));
m_scsibus->write_msg(BIT(data, 2));
break;
case 0x05: // SCSI bus status
// bits 7-0: SCSI DMA trigger?
m_scsi_data_out->write((data >> 8) & 0xff);
break;
case 0x06: // SCSI input data
case 0x07: // SCSI DMA trigger
case 0x08: // SCSI subcode
@ -260,7 +260,7 @@ WRITE32_MEMBER( huc6272_device::write )
case 0x0e: // KRAM write data
// TODO: handle non-dword cases?
write_dword((m_kram_addr_w)|(m_kram_page_w<<18),data);
write_dword((m_kram_addr_w)|(m_kram_page_w<<18),data);
m_kram_addr_w += (m_kram_inc_w & 0x200) ? ((m_kram_inc_w & 0x1ff) - 0x200) : (m_kram_inc_w & 0x1ff);
break;
@ -308,7 +308,7 @@ WRITE32_MEMBER( huc6272_device::write )
// TODO: rotation enable
break;
case 0x13:
m_micro_prg.index = data & 0xf;
break;
@ -323,9 +323,9 @@ WRITE32_MEMBER( huc6272_device::write )
m_micro_prg.ctrl = data & 1;
break;
// case 0x16: wrap-around enable
// BAT and CG address setters
case 0x20: m_bg[0].bat_address = data * 1024; break;
case 0x21: m_bg[0].cg_address = data * 1024; break;
@ -339,8 +339,8 @@ WRITE32_MEMBER( huc6272_device::write )
case 0x29: m_bg[3].cg_address = data * 1024; break;
// Height & Width setters
case 0x2c:
case 0x2d:
case 0x2c:
case 0x2d:
case 0x2e:
case 0x2f:
{
@ -354,7 +354,7 @@ WRITE32_MEMBER( huc6272_device::write )
}
break;
}
// X & Y scroll values
case 0x30:
case 0x31:
@ -373,7 +373,7 @@ WRITE32_MEMBER( huc6272_device::write )
m_bg[reg_offs].xscroll = data & 0xffff;
break;
}
//default: printf("%04x %04x %08x\n",m_register,data,mem_mask);
}
}
@ -395,7 +395,7 @@ static MACHINE_CONFIG_FRAGMENT( king_scsi_intf )
MCFG_DEVICE_ADD("scsi_ctrl_in", INPUT_BUFFER, 0)
MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "cdrom", SCSICD, SCSI_ID_1)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "cdrom", SCSICD, SCSI_ID_1)
MACHINE_CONFIG_END
//-------------------------------------------------

View File

@ -68,7 +68,7 @@ private:
uint16_t m_kram_inc_r,m_kram_inc_w;
uint8_t m_kram_page_r,m_kram_page_w;
uint32_t m_page_setting;
struct{
uint32_t bat_address;
uint32_t cg_address;
@ -79,22 +79,22 @@ private:
uint16_t yscroll;
uint8_t priority;
}m_bg[4];
struct{
uint32_t bat_address;
uint32_t cg_address;
uint16_t height;
uint16_t width;
}m_bg0sub;
struct{
uint8_t index;
uint8_t ctrl;
}m_micro_prg;
const address_space_config m_program_space_config;
const address_space_config m_data_space_config;
required_shared_ptr<uint16_t> m_microprg_ram;
required_shared_ptr<uint16_t> m_microprg_ram;
required_shared_ptr<uint32_t> m_kram_page0;
required_shared_ptr<uint32_t> m_kram_page1;
required_device<SCSI_PORT_DEVICE> m_scsibus;
@ -104,7 +104,7 @@ private:
/* Callback for when the irq line may have changed (mandatory) */
devcb_write_line m_irq_changed_cb;
uint32_t read_dword(offs_t address);
void write_dword(offs_t address, uint32_t data);
void write_microprg_data(offs_t address, uint16_t data);

View File

@ -273,7 +273,7 @@ int tms9927_device::cursor_bounds(rectangle &bounds)
void tms9927_device::recompute_parameters(bool postload)
{
attoseconds_t refresh;
attoseconds_t refresh;
rectangle visarea;
if (m_reset)
@ -309,10 +309,10 @@ void tms9927_device::recompute_parameters(bool postload)
/* update */
if (!m_valid_config)
return;
/* create a visible area */
visarea.set(0, m_overscan_left + m_visible_hpix + m_overscan_right - 1,
0, m_overscan_top + m_visible_vpix + m_overscan_bottom - 1);
visarea.set(0, m_overscan_left + m_visible_hpix + m_overscan_right - 1,
0, m_overscan_top + m_visible_vpix + m_overscan_bottom - 1);
refresh = HZ_TO_ATTOSECONDS(m_clock) * m_total_hpix * m_total_vpix;

View File

@ -21,7 +21,7 @@
#define MCFG_TMS9927_OVERSCAN(_left, _right, _top, _bottom) \
tms9927_device::set_overscan(*device, _left, _right, _top, _bottom);
class tms9927_device : public device_t,
public device_video_interface
{
@ -41,7 +41,7 @@ public:
dev.m_overscan_top = top;
dev.m_overscan_bottom = bottom;
}
DECLARE_WRITE8_MEMBER(write);
DECLARE_READ8_MEMBER(read);
@ -72,7 +72,7 @@ private:
uint16_t m_overscan_right;
uint16_t m_overscan_top;
uint16_t m_overscan_bottom;
// internal state
optional_region_ptr<uint8_t> m_selfload;
@ -81,13 +81,13 @@ private:
uint8_t m_reg[9];
uint8_t m_start_datarow;
uint8_t m_reset;
/* derived state; no need to save */
uint8_t m_valid_config;
uint16_t m_total_hpix, m_total_vpix;
uint16_t m_visible_hpix, m_visible_vpix;
int m_vsyn;
emu_timer *m_vsync_timer;

View File

@ -568,7 +568,7 @@ void cli_frontend::listroms(const char *gamename)
osd_printf_info("\n");
first = false;
osd_printf_info("ROMs required for driver \"%s\".\n"
"%-32s %10s %s\n",drivlist.driver().name, "Name", "Size", "Checksum");
"%-32s %10s %s\n",drivlist.driver().name, "Name", "Size", "Checksum");
// iterate through roms
for (device_t &device : device_iterator(drivlist.config()->root_device()))

View File

@ -2,9 +2,9 @@
// copyright-holders:Sergey Svishchev
/*********************************************************************
formats/ms0515_dsk.cpp
formats/ms0515_dsk.cpp
ms0515 format
ms0515 format
*********************************************************************/

View File

@ -95,7 +95,7 @@ private:
* | | KF | flicker-noise coefficient | - | 0 | | |
* | | AF | flicker-noise exponent | - | 1 | | |
* | | FC | coefficient for forward-bias depletion capacitance formula | - | 0.5 | | |
* | | TNOM | Parameter measurement temperature | C | 27 | 50 | | */
* | | TNOM | Parameter measurement temperature | C | 27 | 50 | | */
class bjt_model_t : public param_model_t
{

View File

@ -38,20 +38,20 @@ PROJECT_NAME = Netlist documentation
# could be handy for archiving the generated documentation or if some version
# control system is used.
PROJECT_NUMBER =
PROJECT_NUMBER =
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
# quick idea about the purpose of the project. Keep the description short.
PROJECT_BRIEF =
PROJECT_BRIEF =
# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
# in the documentation. The maximum height of the logo should not exceed 55
# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy
# the logo to the output directory.
PROJECT_LOGO =
PROJECT_LOGO =
# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
# into which the generated documentation will be written. If a relative path is
@ -118,7 +118,7 @@ REPEAT_BRIEF = YES
# the entity):The $name class, The $name widget, The $name file, is, provides,
# specifies, contains, represents, a, an and the.
ABBREVIATE_BRIEF =
ABBREVIATE_BRIEF =
# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
# doxygen will generate a detailed section even if there is only a brief
@ -161,7 +161,7 @@ STRIP_FROM_PATH = ../..
# specify the list of include paths that are normally passed to the compiler
# using the -I flag.
STRIP_FROM_INC_PATH =
STRIP_FROM_INC_PATH =
# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
# less readable) file names. This can be useful is your file systems doesn't
@ -228,13 +228,13 @@ TAB_SIZE = 4
# "Side Effects:". You can put \n's in the value part of an alias to insert
# newlines.
ALIASES =
ALIASES =
# This tag can be used to specify a number of word-keyword mappings (TCL only).
# A mapping has the form "name=value". For example adding "class=itcl::class"
# will allow you to use the command class in the itcl::class meaning.
TCL_SUBST =
TCL_SUBST =
# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
# only. Doxygen will then generate output that is more tailored for C. For
@ -281,7 +281,7 @@ OPTIMIZE_OUTPUT_VHDL = NO
# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
# the files are not read by doxygen.
EXTENSION_MAPPING =
EXTENSION_MAPPING =
# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
# according to the Markdown format, which allows for more readable
@ -629,7 +629,7 @@ GENERATE_DEPRECATEDLIST = YES
# sections, marked by \if <section_label> ... \endif and \cond <section_label>
# ... \endcond blocks.
ENABLED_SECTIONS =
ENABLED_SECTIONS =
# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
# initial value of a variable or macro / define can have for it to appear in the
@ -671,7 +671,7 @@ SHOW_NAMESPACES = YES
# by doxygen. Whatever the program writes to standard output is used as the file
# version. For an example see the documentation.
FILE_VERSION_FILTER =
FILE_VERSION_FILTER =
# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
# by doxygen. The layout file controls the global structure of the generated
@ -684,7 +684,7 @@ FILE_VERSION_FILTER =
# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
# tag is left empty.
LAYOUT_FILE =
LAYOUT_FILE =
# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
# the reference definitions. This must be a list of .bib files. The .bib
@ -694,7 +694,7 @@ LAYOUT_FILE =
# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
# search path. See also \cite for info how to create references.
CITE_BIB_FILES =
CITE_BIB_FILES =
#---------------------------------------------------------------------------
# Configuration options related to warning and progress messages
@ -759,7 +759,7 @@ WARN_FORMAT = "$file:$line: $text"
# messages should be written. If left blank the output is written to standard
# error (stderr).
WARN_LOGFILE =
WARN_LOGFILE =
#---------------------------------------------------------------------------
# Configuration options related to the input files
@ -811,7 +811,7 @@ RECURSIVE = NO
# Note that relative paths are relative to the directory from which doxygen is
# run.
EXCLUDE =
EXCLUDE =
# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
# directories that are symbolic links (a Unix file system feature) are excluded
@ -827,7 +827,7 @@ EXCLUDE_SYMLINKS = NO
# Note that the wildcards are matched against the file with absolute path, so to
# exclude all test directories for example use the pattern */test/*
EXCLUDE_PATTERNS =
EXCLUDE_PATTERNS =
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
# (namespaces, classes, functions, etc.) that should be excluded from the
@ -838,20 +838,20 @@ EXCLUDE_PATTERNS =
# Note that the wildcards are matched against the file with absolute path, so to
# exclude all test directories use the pattern */test/*
EXCLUDE_SYMBOLS =
EXCLUDE_SYMBOLS =
# The EXAMPLE_PATH tag can be used to specify one or more files or directories
# that contain example code fragments that are included (see the \include
# command).
EXAMPLE_PATH = ../../../../nl_examples ../documentation
EXAMPLE_PATH = ../../../../nl_examples ../documentation
# If the value of the EXAMPLE_PATH tag contains directories, you can use the
# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
# *.h) to filter out the source-files in the directories. If left blank all
# files are included.
EXAMPLE_PATTERNS =
EXAMPLE_PATTERNS =
# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
# searched for input files to be used with the \include or \dontinclude commands
@ -885,7 +885,7 @@ IMAGE_PATH = "../documentation"
# need to set EXTENSION_MAPPING for the extension otherwise the files are not
# properly processed by doxygen.
INPUT_FILTER =
INPUT_FILTER =
# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
# basis. Doxygen will compare the file name with each pattern and apply the
@ -898,7 +898,7 @@ INPUT_FILTER =
# need to set EXTENSION_MAPPING for the extension otherwise the files are not
# properly processed by doxygen.
FILTER_PATTERNS =
FILTER_PATTERNS =
# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
# INPUT_FILTER) will also be used to filter the input files that are used for
@ -913,14 +913,14 @@ FILTER_SOURCE_FILES = NO
# *.ext= (so without naming a filter).
# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
FILTER_SOURCE_PATTERNS =
FILTER_SOURCE_PATTERNS =
# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
# is part of the input, its contents will be placed on the main page
# (index.html). This can be useful if you have a project on for instance GitHub
# and want to reuse the introduction page also for the doxygen output.
USE_MDFILE_AS_MAINPAGE =
USE_MDFILE_AS_MAINPAGE =
#---------------------------------------------------------------------------
# Configuration options related to source browsing
@ -1025,7 +1025,7 @@ CLANG_ASSISTED_PARSING = NO
# specified with INPUT and INCLUDE_PATH.
# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
CLANG_OPTIONS =
CLANG_OPTIONS =
#---------------------------------------------------------------------------
# Configuration options related to the alphabetical class index
@ -1051,7 +1051,7 @@ COLS_IN_ALPHA_INDEX = 5
# while generating the index headers.
# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
IGNORE_PREFIX =
IGNORE_PREFIX =
#---------------------------------------------------------------------------
# Configuration options related to the HTML output
@ -1095,7 +1095,7 @@ HTML_FILE_EXTENSION = .html
# of the possible markers and block names see the documentation.
# This tag requires that the tag GENERATE_HTML is set to YES.
HTML_HEADER =
HTML_HEADER =
# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
# generated HTML page. If the tag is left blank doxygen will generate a standard
@ -1105,7 +1105,7 @@ HTML_HEADER =
# that doxygen normally uses.
# This tag requires that the tag GENERATE_HTML is set to YES.
HTML_FOOTER =
HTML_FOOTER =
# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
# sheet that is used by each HTML page. It can be used to fine-tune the look of
@ -1117,7 +1117,7 @@ HTML_FOOTER =
# obsolete.
# This tag requires that the tag GENERATE_HTML is set to YES.
HTML_STYLESHEET =
HTML_STYLESHEET =
# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
# cascading style sheets that are included after the standard style sheets
@ -1140,7 +1140,7 @@ HTML_EXTRA_STYLESHEET = "../documentation/doc.css"
# files will be copied as-is; there are no commands or markers available.
# This tag requires that the tag GENERATE_HTML is set to YES.
HTML_EXTRA_FILES =
HTML_EXTRA_FILES =
# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
# will adjust the colors in the style sheet and background images according to
@ -1269,7 +1269,7 @@ GENERATE_HTMLHELP = NO
# written to the html output directory.
# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
CHM_FILE =
CHM_FILE =
# The HHC_LOCATION tag can be used to specify the location (absolute path
# including file name) of the HTML help compiler (hhc.exe). If non-empty,
@ -1277,7 +1277,7 @@ CHM_FILE =
# The file has to be specified with full path.
# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
HHC_LOCATION =
HHC_LOCATION =
# The GENERATE_CHI flag controls if a separate .chi index file is generated
# (YES) or that it should be included in the master .chm file (NO).
@ -1290,7 +1290,7 @@ GENERATE_CHI = NO
# and project file content.
# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
CHM_INDEX_ENCODING =
CHM_INDEX_ENCODING =
# The BINARY_TOC flag controls whether a binary table of contents is generated
# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
@ -1321,7 +1321,7 @@ GENERATE_QHP = NO
# the HTML output folder.
# This tag requires that the tag GENERATE_QHP is set to YES.
QCH_FILE =
QCH_FILE =
# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
# Project output. For more information please see Qt Help Project / Namespace
@ -1346,7 +1346,7 @@ QHP_VIRTUAL_FOLDER = doc
# filters).
# This tag requires that the tag GENERATE_QHP is set to YES.
QHP_CUST_FILTER_NAME =
QHP_CUST_FILTER_NAME =
# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
# custom filter to add. For more information please see Qt Help Project / Custom
@ -1354,21 +1354,21 @@ QHP_CUST_FILTER_NAME =
# filters).
# This tag requires that the tag GENERATE_QHP is set to YES.
QHP_CUST_FILTER_ATTRS =
QHP_CUST_FILTER_ATTRS =
# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
# project's filter section matches. Qt Help Project / Filter Attributes (see:
# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
# This tag requires that the tag GENERATE_QHP is set to YES.
QHP_SECT_FILTER_ATTRS =
QHP_SECT_FILTER_ATTRS =
# The QHG_LOCATION tag can be used to specify the location of Qt's
# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
# generated .qhp file.
# This tag requires that the tag GENERATE_QHP is set to YES.
QHG_LOCATION =
QHG_LOCATION =
# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
# generated, together with the HTML files, they form an Eclipse help plugin. To
@ -1501,7 +1501,7 @@ MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
# This tag requires that the tag USE_MATHJAX is set to YES.
MATHJAX_EXTENSIONS =
MATHJAX_EXTENSIONS =
# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
# of code that will be used on startup of the MathJax code. See the MathJax site
@ -1509,7 +1509,7 @@ MATHJAX_EXTENSIONS =
# example see the documentation.
# This tag requires that the tag USE_MATHJAX is set to YES.
MATHJAX_CODEFILE =
MATHJAX_CODEFILE =
# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
# the HTML output. The underlying search engine uses javascript and DHTML and
@ -1569,7 +1569,7 @@ EXTERNAL_SEARCH = NO
# Searching" for details.
# This tag requires that the tag SEARCHENGINE is set to YES.
SEARCHENGINE_URL =
SEARCHENGINE_URL =
# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
# search data is written to a file for indexing by an external tool. With the
@ -1585,7 +1585,7 @@ SEARCHDATA_FILE = searchdata.xml
# projects and redirect the results back to the right project.
# This tag requires that the tag SEARCHENGINE is set to YES.
EXTERNAL_SEARCH_ID =
EXTERNAL_SEARCH_ID =
# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
# projects other than the one defined by this configuration file, but that are
@ -1595,7 +1595,7 @@ EXTERNAL_SEARCH_ID =
# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
# This tag requires that the tag SEARCHENGINE is set to YES.
EXTRA_SEARCH_MAPPINGS =
EXTRA_SEARCH_MAPPINGS =
#---------------------------------------------------------------------------
# Configuration options related to the LaTeX output
@ -1659,7 +1659,7 @@ PAPER_TYPE = a4
# If left blank no extra packages will be included.
# This tag requires that the tag GENERATE_LATEX is set to YES.
EXTRA_PACKAGES =
EXTRA_PACKAGES =
# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
# generated LaTeX document. The header should contain everything until the first
@ -1675,7 +1675,7 @@ EXTRA_PACKAGES =
# to HTML_HEADER.
# This tag requires that the tag GENERATE_LATEX is set to YES.
LATEX_HEADER =
LATEX_HEADER =
# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
# generated LaTeX document. The footer should contain everything after the last
@ -1686,7 +1686,7 @@ LATEX_HEADER =
# Note: Only use a user-defined footer if you know what you are doing!
# This tag requires that the tag GENERATE_LATEX is set to YES.
LATEX_FOOTER =
LATEX_FOOTER =
# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
# LaTeX style sheets that are included after the standard style sheets created
@ -1697,7 +1697,7 @@ LATEX_FOOTER =
# list).
# This tag requires that the tag GENERATE_LATEX is set to YES.
LATEX_EXTRA_STYLESHEET =
LATEX_EXTRA_STYLESHEET =
# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
# other source files which should be copied to the LATEX_OUTPUT output
@ -1705,7 +1705,7 @@ LATEX_EXTRA_STYLESHEET =
# markers available.
# This tag requires that the tag GENERATE_LATEX is set to YES.
LATEX_EXTRA_FILES =
LATEX_EXTRA_FILES =
# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
@ -1813,14 +1813,14 @@ RTF_HYPERLINKS = NO
# default style sheet that doxygen normally uses.
# This tag requires that the tag GENERATE_RTF is set to YES.
RTF_STYLESHEET_FILE =
RTF_STYLESHEET_FILE =
# Set optional variables used in the generation of an RTF document. Syntax is
# similar to doxygen's config file. A template extensions file can be generated
# using doxygen -e rtf extensionFile.
# This tag requires that the tag GENERATE_RTF is set to YES.
RTF_EXTENSIONS_FILE =
RTF_EXTENSIONS_FILE =
# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code
# with syntax highlighting in the RTF output.
@ -1865,7 +1865,7 @@ MAN_EXTENSION = .3
# MAN_EXTENSION with the initial . removed.
# This tag requires that the tag GENERATE_MAN is set to YES.
MAN_SUBDIR =
MAN_SUBDIR =
# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
# will generate one additional man file for each entity documented in the real
@ -1978,7 +1978,7 @@ PERLMOD_PRETTY = YES
# overwrite each other's variables.
# This tag requires that the tag GENERATE_PERLMOD is set to YES.
PERLMOD_MAKEVAR_PREFIX =
PERLMOD_MAKEVAR_PREFIX =
#---------------------------------------------------------------------------
# Configuration options related to the preprocessor
@ -2019,7 +2019,7 @@ SEARCH_INCLUDES = YES
# preprocessor.
# This tag requires that the tag SEARCH_INCLUDES is set to YES.
INCLUDE_PATH =
INCLUDE_PATH =
# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
# patterns (like *.h and *.hpp) to filter out the header-files in the
@ -2027,7 +2027,7 @@ INCLUDE_PATH =
# used.
# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
INCLUDE_FILE_PATTERNS =
INCLUDE_FILE_PATTERNS =
# The PREDEFINED tag can be used to specify one or more macro names that are
# defined before the preprocessor is started (similar to the -D option of e.g.
@ -2037,7 +2037,7 @@ INCLUDE_FILE_PATTERNS =
# recursively expanded use the := operator instead of the = operator.
# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
PREDEFINED =
PREDEFINED =
# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
# tag can be used to specify a list of macro names that should be expanded. The
@ -2046,7 +2046,7 @@ PREDEFINED =
# definition found in the source code.
# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
EXPAND_AS_DEFINED =
EXPAND_AS_DEFINED =
# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
# remove all references to function-like macros that are alone on a line, have
@ -2075,13 +2075,13 @@ SKIP_FUNCTION_MACROS = YES
# the path). If a tag file is not located in the directory in which doxygen is
# run, you must also specify the path to the tagfile here.
TAGFILES =
TAGFILES =
# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
# tag file that is based on the input files it reads. See section "Linking to
# external documentation" for more information about the usage of tag files.
GENERATE_TAGFILE =
GENERATE_TAGFILE =
# If the ALLEXTERNALS tag is set to YES, all external class will be listed in
# the class index. If set to NO, only the inherited external classes will be
@ -2130,14 +2130,14 @@ CLASS_DIAGRAMS = NO
# the mscgen tool resides. If left empty the tool is assumed to be found in the
# default search path.
MSCGEN_PATH =
MSCGEN_PATH =
# You can include diagrams made with dia in doxygen documentation. Doxygen will
# then run dia to produce the diagram and insert it in the documentation. The
# DIA_PATH tag allows you to specify the directory where the dia binary resides.
# If left empty dia is assumed to be found in the default search path.
DIA_PATH =
DIA_PATH =
# If set to YES the inheritance and collaboration graphs will hide inheritance
# and usage relations if the target is undocumented or is not a class.
@ -2186,7 +2186,7 @@ DOT_FONTSIZE = 10
# the path where dot can find it using this tag.
# This tag requires that the tag HAVE_DOT is set to YES.
DOT_FONTPATH =
DOT_FONTPATH =
# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
# each documented class showing the direct and indirect inheritance relations.
@ -2332,26 +2332,26 @@ INTERACTIVE_SVG = NO
# found. If left blank, it is assumed the dot tool can be found in the path.
# This tag requires that the tag HAVE_DOT is set to YES.
DOT_PATH =
DOT_PATH =
# The DOTFILE_DIRS tag can be used to specify one or more directories that
# contain dot files that are included in the documentation (see the \dotfile
# command).
# This tag requires that the tag HAVE_DOT is set to YES.
DOTFILE_DIRS =
DOTFILE_DIRS =
# The MSCFILE_DIRS tag can be used to specify one or more directories that
# contain msc files that are included in the documentation (see the \mscfile
# command).
MSCFILE_DIRS =
MSCFILE_DIRS =
# The DIAFILE_DIRS tag can be used to specify one or more directories that
# contain dia files that are included in the documentation (see the \diafile
# command).
DIAFILE_DIRS =
DIAFILE_DIRS =
# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
# path where java can find the plantuml.jar file. If left blank, it is assumed
@ -2359,12 +2359,12 @@ DIAFILE_DIRS =
# generate a warning when it encounters a \startuml command in this case and
# will not generate output for the diagram.
PLANTUML_JAR_PATH =
PLANTUML_JAR_PATH =
# When using plantuml, the specified paths are searched for files specified by
# the !include statement in a plantuml block.
PLANTUML_INCLUDE_PATH =
PLANTUML_INCLUDE_PATH =
# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
# that will be shown in the graph. If the number of nodes in a graph becomes

View File

@ -181,7 +181,7 @@ clang:
clang-5:
$(MAKE) CC=clang++-5.0 LD=clang++-5.0 CEXTRAFLAGS="-march=native -Weverything -Werror -Wno-unreachable-code -Wno-padded -Wno-weak-vtables -Wno-missing-variable-declarations -Wconversion -Wno-c++98-compat -Wno-float-equal -Wno-global-constructors -Wno-c++98-compat-pedantic -Wno-format-nonliteral -Wno-weak-template-vtables -Wno-exit-time-destructors"
#
#
# Mostly done: -Wno-weak-vtables -Wno-cast-align
# FIXME: -Wno-weak-vtables -Wno-missing-variable-declarations -Wno-conversion -Wno-exit-time-destructors
# FIXME: -Wunreachable-code : False warnings, this a documented clang bug: https://llvm.org/bugs/show_bug.cgi?id=28994

4
src/lib/netlist/devices/nlid_truthtable.cpp Executable file → Normal file
View File

@ -391,8 +391,8 @@ void truthtable_parser::parse(const std::vector<pstring> &truthtable, uint_least
/*
* FIXME: evaluation of outputs should be done in parseline to
* enable the use of inputs for output values, i.e. "I1" or "~I1"
* in addition to "0" and "1".
* enable the use of inputs for output values, i.e. "I1" or "~I1"
* in addition to "0" and "1".
*/
for (unsigned j=0; j<m_NO; j++)
{

View File

@ -612,13 +612,13 @@ static NETLIST_START(TTL_74279_DIP)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.R, /* 1R |1 ++ 16| VCC */ VCC.I,
DIPPINS( /* +--------------+ */
s1.R, /* 1R |1 ++ 16| VCC */ VCC.I,
s1.S1, /* 1S1 |2 15| 4S */ s4.S,
s1.S2, /* 1S2 |3 14| 4R */ s4.R,
s1.Q, /* 1Q |4 74279 13| 4Q */ s4.Q,
s2.R, /* 2R |5 12| 3S2 */ s3.S2,
s2.S, /* 2S |6 11| 3S1 */ s3.S1,
s2.S, /* 2S |6 11| 3S1 */ s3.S1,
s2.Q, /* 2Q |7 10| 3R */ s3.R,
GND.I, /* GND |8 9| 3Q */ s3.Q
/* +--------------+ */
@ -668,16 +668,16 @@ static NETLIST_START(DM9312_DIP)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ VCC.I,
s.D1, /* D1 |2 15| Y */ s.Y,
s.D2, /* D2 |3 14| YQ */ s.YQ,
s.D3, /* D3 |4 9312 13| C */ s.C,
s.D4, /* D4 |5 12| B */ s.B,
s.D5, /* D5 |6 11| A */ s.A,
s.D6, /* D6 |7 10| G */ s.G, //Strobe
GND.I, /* GND |8 9| D7 */ s.D7
/* +--------------+ */
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ VCC.I,
s.D1, /* D1 |2 15| Y */ s.Y,
s.D2, /* D2 |3 14| YQ */ s.YQ,
s.D3, /* D3 |4 9312 13| C */ s.C,
s.D4, /* D4 |5 12| B */ s.B,
s.D5, /* D5 |6 11| A */ s.A,
s.D6, /* D6 |7 10| G */ s.G, //Strobe
GND.I, /* GND |8 9| D7 */ s.D7
/* +--------------+ */
)
NETLIST_END()

View File

@ -504,14 +504,14 @@ void netlist_t::reset()
//x->update_dev();
}
break;
case 1: // brute force backward
case 1: // brute force backward
{
std::size_t i = m_devices.size();
while (i>0)
m_devices[--i]->update_dev();
}
break;
case 2: // brute force forward
case 2: // brute force forward
{
for (std::size_t i = 0; i < m_devices.size(); i++)
m_devices[i]->update_dev();

View File

@ -40,7 +40,7 @@
#define USE_TRUTHTABLE_7448 (0)
// How many times do we try to resolve links (connections)
#define NL_MAX_LINK_RESOLVE_LOOPS (100)
#define NL_MAX_LINK_RESOLVE_LOOPS (100)
//============================================================
// Solver defines

View File

@ -18,7 +18,7 @@
#define MF_1_UNKNOWN_PARAM_TYPE "Can not determine param_type for {1}"
#define MF_2_ERROR_CONNECTING_1_TO_2 "Error connecting {1} to {2}"
#define MF_0_NO_SOLVER "No solver found for this netlist although analog elements are present"
#define MF_1_HND_VAL_NOT_SUPPORTED "HINT_NO_DEACTIVATE value not supported: <{1}>"
#define MF_1_HND_VAL_NOT_SUPPORTED "HINT_NO_DEACTIVATE value not supported: <{1}>"
// nl_factory.cpp

View File

@ -50,7 +50,7 @@ namespace plib {
*
* @param inputs Vector of input variables, e.g. {"A","B"}
* @param expr infix or postfix expression. default is infix, postrix
* to be prefixed with rpn, e.g. "rpn:A B + 1.3 /"
* to be prefixed with rpn, e.g. "rpn:A B + 1.3 /"
*/
void compile(const std::vector<pstring> &inputs, const pstring expr);

14
src/lib/netlist/plib/ppmf.h Executable file → Normal file
View File

@ -30,10 +30,10 @@
*
* Benchmarks for ./nltool -c run -f src/mame/machine/nl_pong.cpp -t 10 -n pong_fast
*
* NL_PMF_TYPE_INTERNAL: 215% 215%
* NL_PMF_TYPE_GNUC_PMF: 163% 196%
* NL_PMF_TYPE_GNUC_PMF_CONV: 215% 215%
* NL_PMF_TYPE_VIRTUAL: 213% 209%
* NL_PMF_TYPE_INTERNAL: 215% 215%
* NL_PMF_TYPE_GNUC_PMF: 163% 196%
* NL_PMF_TYPE_GNUC_PMF_CONV: 215% 215%
* NL_PMF_TYPE_VIRTUAL: 213% 209%
*
* The whole exercise was done to avoid virtual calls. In prior versions of
* netlist, the INTERNAL and GNUC_PMF_CONV approach provided significant improvement.
@ -136,9 +136,9 @@ namespace plib {
// if odd, it's the byte offset into the vtable
int m_this_delta; // delta to apply to the 'this' pointer
int m_dummy1; // only used for visual studio x64
int m_dummy1; // only used for visual studio x64
int m_dummy2;
int m_size;
int m_size;
};
#endif
@ -181,7 +181,7 @@ namespace plib {
private:
generic_function m_func;
#if 0 && defined(_MSC_VER)
int dummy[4];
int dummy[4];
#endif
};

View File

@ -37,8 +37,8 @@ public:
opt_ttr (*this, "t", "time_to_run", 1.0, "time to run the emulation (seconds)"),
opt_logs(*this, "l", "log" , "define terminal to log. This option may be specified repeatedly."),
opt_inp(*this, "i", "input", "", "input file to process (default is none)"),
opt_loadstate(*this,"", "loadstate", "", "load state from file and continue from there"),
opt_savestate(*this,"", "savestate", "", "save state to file at end of run"),
opt_loadstate(*this,"", "loadstate", "", "load state from file and continue from there"),
opt_savestate(*this,"", "savestate", "", "save state to file at end of run"),
opt_grp4(*this, "Options for convert command", "These options are only used by the convert command."),
opt_type(*this, "y", "type", "spice", "spice:eagle:rinf", "type of file to be converted: spice,eagle,rinf"),

View File

@ -22,8 +22,8 @@ struct mat_cr_t
C diag[N]; // diagonal index pointer n
C ia[N+1]; // row index pointer n + 1
C ja[N*N]; // column index array nz_num, initially (n * n)
T A[N*N]; // Matrix elements nz_num, initially (n * n)
C ja[N*N]; // column index array nz_num, initially (n * n)
T A[N*N]; // Matrix elements nz_num, initially (n * n)
std::size_t size;
std::size_t nz_num;

View File

@ -19,7 +19,7 @@
* going forward in case we implement cuda solvers in the future.
*/
#define NL_USE_DYNAMIC_ALLOCATION (0)
#define TEST_PARALLEL (0 )
#define TEST_PARALLEL (0 )
#if TEST_PARALLEL
#include <thread>

View File

@ -341,7 +341,7 @@ unsigned matrix_solver_GCR_t<m_N, storage_N>::vsolve_non_dynamic(const bool newt
gtot_t += gt[i];
RHS_t += Idr[i];
}
for (std::size_t i = railstart; i < term_count; i++)
RHS_t += go[i] * *other_cur_analog[i];

View File

@ -239,7 +239,7 @@ unsigned matrix_solver_GMRES_t<m_N, storage_N>::solve_ilu_gmres (nl_double (& RE
unsigned itr_used = 0;
double rho_delta = 0.0;
const std::size_t n = this->N();
const std::size_t n = this->N();
if (m_use_iLU_preconditioning)
mat.incomplete_LU_factorization(m_LU);

View File

@ -89,7 +89,7 @@ namespace webpp {
void send(std::string str) { m_ostream << m_header.str() << "Content-Length: " << str.length() << "\r\n\r\n" << str; }
size_t size() const { return m_streambuf.size(); }
std::shared_ptr<socket_type> socket() { return m_socket; }
/// If true, force server to close the connection after the response have been sent.
///
/// This is useful when implementing a HTTP/1.0-server sending content
@ -435,7 +435,7 @@ namespace webpp {
}
if (response->close_connection_after_response)
return;
return;
auto range = request->header.equal_range("Connection");
case_insensitive_equals check;

View File

@ -6,31 +6,31 @@
© 1983 Tecfri
PCB connector pinout
PCB connector pinout
+5V 1 A GND
+5V 2 B GND
+12V Coin Counter 3 C +12V Coin Counter
1P Button 1 4 D 1P Up
1P Button 2 5 E 1P Down
2P Button 1 6 F 1P Left
2P Button 2 7 G 1P Right
2P Start 8 H 2P Up
1P Start 9 I 2P Down
Coin 2 10 J 2P Left
Coin 1 11 K 2P Right
Blue 12 L Counter
Red 13 M Counter
Green 14 N Counter
Sync 15 O Speaker Right
+12V 16 P Speaker Left
Speaker- 17 Q +5V
Video GND 18 R +5V
+5V 1 A GND
+5V 2 B GND
+12V Coin Counter 3 C +12V Coin Counter
1P Button 1 4 D 1P Up
1P Button 2 5 E 1P Down
2P Button 1 6 F 1P Left
2P Button 2 7 G 1P Right
2P Start 8 H 2P Up
1P Start 9 I 2P Down
Coin 2 10 J 2P Left
Coin 1 11 K 2P Right
Blue 12 L Counter
Red 13 M Counter
Green 14 N Counter
Sync 15 O Speaker Right
+12V 16 P Speaker Left
Speaker- 17 Q +5V
Video GND 18 R +5V
The bootlegs are running on a kind of extended hardware. It has
double the amount of work RAM, an updated graphics system to
accommodate the bootlegged games and the AY8912s were changed to
AY8910s.
The bootlegs are running on a kind of extended hardware. It has
double the amount of work RAM, an updated graphics system to
accommodate the bootlegged games and the AY8912s were changed to
AY8910s.
TODO:
- Verify actual Z80 and AY891x clock speeds from PCB (XTAL confirmed)
@ -81,7 +81,7 @@ protected:
required_shared_ptr<uint8_t> m_scroll_ram;
tilemap_t *m_char_tilemap;
uint8_t m_color_bank;
uint8_t m_color_bank;
};
class ambush_state : public ambush_base_state
@ -528,7 +528,7 @@ uint32_t mariobl_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
int code = ((m_sprite_ram[offs + 1] & 0x40) << 1) | (m_sprite_ram[offs + 2] & 0x7f);
int color = (m_color_bank << 4) | (m_sprite_ram[offs + 1] & 0x0f);
m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, sx, sy, 0);
m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, sx, sy, 0);
}
return 0;

View File

@ -3523,11 +3523,11 @@ ROM_START( kgbirdmk5 )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
ROM_LOAD32_WORD( "0200024v.u7", 0x000000, 0x080000, CRC(90aefddc) SHA1(610b850c1d3e882c4df9e0a09a056b0c97341a19) )
ROM_LOAD32_WORD( "0200024v.u11", 0x000002, 0x080000, CRC(52791ad8) SHA1(6e4cf553b355f03ef69ef3c4e2816bbd0cbe6599) )
ROM_LOAD32_WORD( "0200024v.u8", 0x100000, 0x080000, CRC(c0477ae3) SHA1(5005944b8b28553dd959192d614be7f1b6228a30) )
ROM_LOAD32_WORD( "0200024v.u12", 0x100002, 0x080000, CRC(df176c5a) SHA1(dcaecdefb7c880b9425a6445dbed969968fe3d1c) )
ROM_LOAD32_WORD( "0200024v.u7", 0x000000, 0x080000, CRC(90aefddc) SHA1(610b850c1d3e882c4df9e0a09a056b0c97341a19) )
ROM_LOAD32_WORD( "0200024v.u11", 0x000002, 0x080000, CRC(52791ad8) SHA1(6e4cf553b355f03ef69ef3c4e2816bbd0cbe6599) )
ROM_LOAD32_WORD( "0200024v.u8", 0x100000, 0x080000, CRC(c0477ae3) SHA1(5005944b8b28553dd959192d614be7f1b6228a30) )
ROM_LOAD32_WORD( "0200024v.u12", 0x100002, 0x080000, CRC(df176c5a) SHA1(dcaecdefb7c880b9425a6445dbed969968fe3d1c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
@ -3562,17 +3562,17 @@ ROM_END
ROM_START( toutango )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
ROM_LOAD32_WORD( "0100782v.u7", 0x000000, 0x080000, CRC(4c70120f) SHA1(e43b39c31c14d16ebf962d8dd201a882df74f595) )
ROM_LOAD32_WORD( "0100782v.u11", 0x000002, 0x080000, CRC(18519789) SHA1(95385207be6e44746b5e78aa5622afb5258419b2) )
ROM_LOAD32_WORD( "0100782v.u8", 0x100000, 0x080000, CRC(bf358a6f) SHA1(3ae3bcd486f9c6f5f2a799ed3e4f7b177a59465b) )
ROM_LOAD32_WORD( "0100782v.u12", 0x100002, 0x080000, CRC(fd366efa) SHA1(22a372f5efe43b9320199b7534e9b3a39b582e4a) )
ROM_LOAD32_WORD( "0100782v.u9", 0x200000, 0x080000, CRC(bc35aed0) SHA1(7ab25c3207c2be43cfefabe4d4bb0a98bc8e5aea) )
ROM_LOAD32_WORD( "0100782v.u13", 0x200002, 0x080000, CRC(f8a67a69) SHA1(b1a28047cb4572ae15359c30f71cafa4bd70658c) )
ROM_LOAD32_WORD( "0100782v.u10", 0x300000, 0x080000, CRC(e6528de7) SHA1(b3aa1937f0b673ba2cfa68acc7cb540ebefc66d4) )
ROM_LOAD32_WORD( "0100782v.u14", 0x300002, 0x080000, CRC(69f2acde) SHA1(cda52548e675a06677a2d9fee89b33f9abb96f64) )
ROM_LOAD32_WORD( "0100782v.u7", 0x000000, 0x080000, CRC(4c70120f) SHA1(e43b39c31c14d16ebf962d8dd201a882df74f595) )
ROM_LOAD32_WORD( "0100782v.u11", 0x000002, 0x080000, CRC(18519789) SHA1(95385207be6e44746b5e78aa5622afb5258419b2) )
ROM_LOAD32_WORD( "0100782v.u8", 0x100000, 0x080000, CRC(bf358a6f) SHA1(3ae3bcd486f9c6f5f2a799ed3e4f7b177a59465b) )
ROM_LOAD32_WORD( "0100782v.u12", 0x100002, 0x080000, CRC(fd366efa) SHA1(22a372f5efe43b9320199b7534e9b3a39b582e4a) )
ROM_LOAD32_WORD( "0100782v.u9", 0x200000, 0x080000, CRC(bc35aed0) SHA1(7ab25c3207c2be43cfefabe4d4bb0a98bc8e5aea) )
ROM_LOAD32_WORD( "0100782v.u13", 0x200002, 0x080000, CRC(f8a67a69) SHA1(b1a28047cb4572ae15359c30f71cafa4bd70658c) )
ROM_LOAD32_WORD( "0100782v.u10", 0x300000, 0x080000, CRC(e6528de7) SHA1(b3aa1937f0b673ba2cfa68acc7cb540ebefc66d4) )
ROM_LOAD32_WORD( "0100782v.u14", 0x300002, 0x080000, CRC(69f2acde) SHA1(cda52548e675a06677a2d9fee89b33f9abb96f64) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
@ -4233,7 +4233,7 @@ GAMEL( 1997, pengpay, aristmk5, aristmk5, aristmk5, aristmk5_state, aristm
GAMEL( 1996, pengpaya, pengpay, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200357V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 586/4, C - 12/11/96
GAMEL( 1997, pengpayb, pengpay, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200359V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 586/3(a), D - 03/06/97
GAMEL( 1997, pengpayu, pengpay, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (BHI0417-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 586/7(b) B - 14/07/97
GAMEL( 1998, petshop, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100731V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 618/1, A - 17/04/98
GAMEL( 1998, petshop, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100731V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 618/1, A - 17/04/98
GAMEL( 1995, phantpay, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Phantom Pays (0500005V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 570/1, E - 12/09/95
GAMEL( 1998, penpir2, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pirate II (0100869V, Victoria)", MACHINE_FLAGS, layout_aristmk5 ) // 619/3, A - 17/12/98
GAMEL( 1996, przfight, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Prize Fight (0100299V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 578/4, B - 08/08/96

View File

@ -633,7 +633,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( avt_portmap, AS_IO, 8, avt_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x00, 0x03) unk, maybe IO
// AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
// AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
// AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN0")
// AM_RANGE(0x08, 0x0b) unk, maybe IO
@ -662,7 +662,7 @@ ADDRESS_MAP_END
02D9: C9 ret
0338: DB 02 in a,($02) --> poll IN0
033A: E6 40 and $40 ------> check for IN0-7 if active.
033A: E6 40 and $40 ------> check for IN0-7 if active.
033C: 28 02 jr z,$0340 --> to continue the program.
033E: AF xor a
033F: C9 ret

View File

@ -180,11 +180,11 @@ INPUT_PORTS_END
static INPUT_PORTS_START( dodgeman )
PORT_INCLUDE( battlex )
PORT_MODIFY("SYSTEM")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL
INPUT_PORTS_END
@ -281,7 +281,7 @@ static MACHINE_CONFIG_DERIVED( dodgeman, battlex )
MCFG_CPU_IO_MAP(dodgeman_io_map)
MCFG_VIDEO_START_OVERRIDE(battlex_state, dodgeman)
MCFG_SOUND_ADD("ay2", AY8910, XTAL_10MHz/8) // ?
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
MACHINE_CONFIG_END
@ -302,7 +302,7 @@ ROM_START( battlex )
ROM_LOAD( "p-rom6.1", 0x5000, 0x1000, CRC(6923f601) SHA1(e6c33cbd8d8679299d7b2c568d56f96ed3073971) )
ROM_REGION( 0x3000, "gfx1", ROMREGION_ERASE00 ) // filled in later
ROM_REGION( 0x3000, "gfx2", 0 )
ROM_LOAD( "1a_f.6f", 0x0000, 0x1000, CRC(2b69287a) SHA1(30c0edaec44118b95ec390bd41c1bd49a2802451) )
ROM_LOAD( "1a_h.6h", 0x1000, 0x1000, CRC(9f4c3bdd) SHA1(e921ecafefe54c033d05d9cd289808e971ac7940) )
@ -317,25 +317,25 @@ ROM_END
ROM_START( dodgeman )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "dg0.7f", 0x0000, 0x001000, CRC(1219b5db) SHA1(e4050a5e52f7b125f317b6e2ef615774c81cf679) )
ROM_LOAD( "dg1.5f", 0x1000, 0x001000, CRC(fff9a086) SHA1(e4e528789d07755cf999054c191e242ea3ebe55f) )
ROM_LOAD( "dg2.4f", 0x2000, 0x001000, CRC(2ca9ac99) SHA1(7fe81626ab2b5c01189fbb578999157863fcc29f) )
ROM_LOAD( "dg3.3f", 0x3000, 0x001000, CRC(55a51c0e) SHA1(a5b253f096e1fe85ee391ad2aa0373809a3b48c2) )
ROM_LOAD( "dg4.2f", 0x4000, 0x001000, CRC(14169361) SHA1(86d3cd1fa0aa4f21029daea2eba99bdaa34372e8) )
ROM_LOAD( "dg5.1f", 0x5000, 0x001000, CRC(8f83ae2f) SHA1(daad41b61ba3d55531021d444bbe4acfc275cfc9) )
ROM_LOAD( "dg0.7f", 0x0000, 0x001000, CRC(1219b5db) SHA1(e4050a5e52f7b125f317b6e2ef615774c81cf679) )
ROM_LOAD( "dg1.5f", 0x1000, 0x001000, CRC(fff9a086) SHA1(e4e528789d07755cf999054c191e242ea3ebe55f) )
ROM_LOAD( "dg2.4f", 0x2000, 0x001000, CRC(2ca9ac99) SHA1(7fe81626ab2b5c01189fbb578999157863fcc29f) )
ROM_LOAD( "dg3.3f", 0x3000, 0x001000, CRC(55a51c0e) SHA1(a5b253f096e1fe85ee391ad2aa0373809a3b48c2) )
ROM_LOAD( "dg4.2f", 0x4000, 0x001000, CRC(14169361) SHA1(86d3cd1fa0aa4f21029daea2eba99bdaa34372e8) )
ROM_LOAD( "dg5.1f", 0x5000, 0x001000, CRC(8f83ae2f) SHA1(daad41b61ba3d55531021d444bbe4acfc275cfc9) )
ROM_REGION( 0x6000, "gfx1", ROMREGION_ERASE00 ) // filled in later
ROM_REGION( 0x6000, "gfx2", ROMREGION_ERASE00 )
ROM_LOAD( "f.6f", 0x0000, 0x002000, CRC(dfaaf4c8) SHA1(1e09f1d72e7e5e6782d73ae60bca7982fc04df0e) )
ROM_LOAD( "h.6h", 0x2000, 0x002000, CRC(e2525ffe) SHA1(a17b608b4089014be381b26f16597b83d4a66ebd) )
ROM_LOAD( "j.6j", 0x4000, 0x002000, CRC(2731ee46) SHA1(15b9350e19f31b1cea99deb9935543777644e6a8) )
ROM_LOAD( "f.6f", 0x0000, 0x002000, CRC(dfaaf4c8) SHA1(1e09f1d72e7e5e6782d73ae60bca7982fc04df0e) )
ROM_LOAD( "h.6h", 0x2000, 0x002000, CRC(e2525ffe) SHA1(a17b608b4089014be381b26f16597b83d4a66ebd) )
ROM_LOAD( "j.6j", 0x4000, 0x002000, CRC(2731ee46) SHA1(15b9350e19f31b1cea99deb9935543777644e6a8) )
ROM_REGION( 0x2000, "user1", 0 ) // gfx1 1bpp gfxdata
ROM_LOAD( "d.6d", 0x0000, 0x002000, CRC(451c1c3a) SHA1(214f775e242f7f29ac799cdd554708acddd1e34f) )
ROM_REGION( 0x2000, "user2", 0 ) // gfx1 colormask, bad?
ROM_LOAD( "e.6e", 0x0000, 0x002000, CRC(c9a515df) SHA1(5232d2d1bd02b89cb651d817995daf33469f0e2f) )
ROM_LOAD( "e.6e", 0x0000, 0x002000, CRC(c9a515df) SHA1(5232d2d1bd02b89cb651d817995daf33469f0e2f) )
ROM_END
@ -353,7 +353,7 @@ DRIVER_INIT_MEMBER(battlex_state,battlex)
int tile_size = memregion("gfx1")->bytes() / 24;
int tile_shift = (tile_size / 512) + 11;
int tile, line, bit;
/* convert gfx data from 1bpp + color block mask to straight 3bpp */
for (tile = 0; tile < tile_size; tile++)
{

View File

@ -233,8 +233,8 @@ Bad Dudes EI01 - EI03 EI04 - EI06 EI07 EI08 EI09 EI10 EI11
Dragon Ninja EG01 - EG03 EG04 - EG06 EG07 EG08 EG09 EG10 EG11 EG12 EG13 EG14 EG15 EG16 - EG18 - EG20 - EG22 - EG24 EG25 EG26 - EG28 - EG30 EG31
Heavy Barrel EC01 EC02 EC03 EC04 EC05 EC06 EC07 EC08 EC09 EC10 EC11 EC12 EC13 EC14 EC15 EC16 EC17 EC18 EC19 EC20 EC21 EC22 EC23 EC24 EC25 EC26 EC27 EC28 EC29 EC30 EC31
Note the games can be converted by swapping all of the ROMs and MCU. For example on a Birdie Try PCB, when the
ROMs are swapped for the 'hbarrel' set from MAME, the board will run Heavy Barrel. I can confirm the MCU dump
Note the games can be converted by swapping all of the ROMs and MCU. For example on a Birdie Try PCB, when the
ROMs are swapped for the 'hbarrel' set from MAME, the board will run Heavy Barrel. I can confirm the MCU dump
from the 'hbarrel' MAME ROM set (HB31.9A) and 'baddudes' MAME ROM set (EI31.9A) works fine on the real PCB.

View File

@ -14,10 +14,10 @@
The Dumping Union
Team Japump!!!
Hau
Jean-Francois Del Nero
Omar Cornut
Game Preservation Society
Joseph Redon
Jean-Francois Del Nero
Omar Cornut
Game Preservation Society
Joseph Redon
The DECO cassette system consists of three PCBS in a card cage:
Early boardset: (1980-1983) (proms unknown for this boardset, no schematics for this boardset)
@ -25,7 +25,7 @@
One DE-0068B-0 DSP-3 pcb with a 'DECO CPU-3' custom, two 2716 eproms. (main processor and bios, graphics, dipswitches?)
One DE-0070C-0 BIO-3 pcb with an analog ADC0908 8-bit adc.
One DE-0066B-0 card rack board that the other three boards plug into.
This boardset has two versions : MD, known as "shokase" in Japan, and MT, known as "daikase" which is using bigger data tapes. (MT was only sold in Japan, not emulated yet)
This boardset has two versions : MD, known as "shokase" in Japan, and MT, known as "daikase" which is using bigger data tapes. (MT was only sold in Japan, not emulated yet)
Later boardset: (1984 onward, schematic is dated October 1983)
One DE-0097C-0 RMS-8 pcb with a 6502 processor, two ay-3-8910s, two eproms (2716 and 2732) plus one prom, and 48k worth of 4116 16kx1 DRAMs; the 6502 processor has its own 4K of SRAM. (audio processor and RAM, Main processor's dram, dipswitches)
@ -35,9 +35,9 @@
The actual cassettes use a custom player hooked to the BIO board, and are roughly microcassette form factor, but are larger and will not fit in a conventional microcassette player.
Each cassette has one track on it and is separated into clock and data by two Magtek IC in the player, for a form of synchronous serial.
The data is stored in blocks with headers and CRC16 checksums.
The first block contains information such as the region (A:Japan, B:USA, C:UK, D:Europe) and the total number of blocks left to read.
The last physical block on the cassette is a dummy block not used by the system. (only used to mark the end of last block)
The data is stored in blocks with headers and CRC16 checksums.
The first block contains information such as the region (A:Japan, B:USA, C:UK, D:Europe) and the total number of blocks left to read.
The last physical block on the cassette is a dummy block not used by the system. (only used to mark the end of last block)
***********************************************************************/
@ -677,7 +677,7 @@ static INPUT_PORTS_START( cfboy0a1 ) /* 12 */
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPNAME( 0x08, 0x08, "Number of Alien Missiles" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Difficult ) )
PORT_DIPNAME( 0x10, 0x10, "Alien Craft Movement" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Difficult ) )

View File

@ -91,19 +91,19 @@ class cpu20_state : public driver_device
{
public:
cpu20_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device (mconfig, type, tag)
: driver_device (mconfig, type, tag)
{
}
virtual void machine_start () override { LOGSETUP("%s\n", FUNCNAME); }
// virtual void machine_reset () override;
// virtual void machine_reset () override;
DECLARE_DRIVER_INIT(cpu20) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21s) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21a) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21ya) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21b) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21yb) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu20) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21s) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21a) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21ya) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21b) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21yb) { LOGSETUP("%s\n", FUNCNAME); }
};
/* Input ports */
@ -179,16 +179,16 @@ MACHINE_CONFIG_END
ROM_START(fccpu20sbc) ROM_END
/* Boards supported by same rom set, need to do like this to avoid need for multi named rom sets */
#define rom_fccpu21ssbc rom_fccpu20sbc
#define rom_fccpu21sbc rom_fccpu20sbc
#define rom_fccpu21asbc rom_fccpu20sbc
#define rom_fccpu21yasbc rom_fccpu20sbc
#define rom_fccpu21bsbc rom_fccpu20sbc
#define rom_fccpu21ybsbc rom_fccpu20sbc
#define rom_fccpu21ssbc rom_fccpu20sbc
#define rom_fccpu21sbc rom_fccpu20sbc
#define rom_fccpu21asbc rom_fccpu20sbc
#define rom_fccpu21yasbc rom_fccpu20sbc
#define rom_fccpu21bsbc rom_fccpu20sbc
#define rom_fccpu21ybsbc rom_fccpu20sbc
/* Driver */
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
COMP (1986, fccpu20sbc, 0, 0, cpu20, cpu20, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-20", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu20sbc, 0, 0, cpu20, cpu20, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-20", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21ssbc, fccpu20sbc, 0, cpu21s, cpu20, cpu20_state, cpu21s, "Force Computers Gmbh", "SYS68K/CPU-21S", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21sbc, fccpu20sbc, 0, cpu21, cpu20, cpu20_state, cpu21, "Force Computers Gmbh", "SYS68K/CPU-21", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21asbc, fccpu20sbc, 0, cpu21a, cpu20, cpu20_state, cpu21a, "Force Computers Gmbh", "SYS68K/CPU-21A", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )

View File

@ -568,7 +568,7 @@ static INPUT_PORTS_START( funkball )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
PORT_START("IN.9")
PORT_DIPNAME( 0x01, 0x01, "9" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )

View File

@ -5499,7 +5499,7 @@ ROM_END
The encrypted CPU:
It's a DIP40 custom IC. It has inside a PLCC28 IC and 3 dies:
The PLCC28 chip is a CY7C291A (prom replacement)

View File

@ -22,15 +22,15 @@ Notes:
- 4 known game carts where produced, these are:
Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Black Jack,
Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Black Jack,
Twenty One Thunder Plus, Power Pairs, Prism Poker Plus & Have A Cow
Star Pak 2: Pac-Man, Ms.Pac-Man, Pharaoh's Tomb, Solar Solitaire, Power Pairs, Seek The peeks & Have A Cow
Star Pak 3: Centipede, Great Wall, Ker-Chunk, Diamond Derby, Word Sleuth, Pull!, Astro Blast & Sweeper
Star Pak 4: Berzerk, Neon Nightmare, Battle Checkers, Orbit, Deep Sea Shadow, Star Tiger & Orbit Freefall
Star Pak 2: Pac-Man, Ms.Pac-Man, Pharaoh's Tomb, Solar Solitaire, Power Pairs, Seek The peeks & Have A Cow
Star Pak 3: Centipede, Great Wall, Ker-Chunk, Diamond Derby, Word Sleuth, Pull!, Astro Blast & Sweeper
Star Pak 4: Berzerk, Neon Nightmare, Battle Checkers, Orbit, Deep Sea Shadow, Star Tiger & Orbit Freefall
- Allegedly there is a hard lock that SP1 and the PAC-MAN games (on SP2) cannot play together. Was a licensing issue with Namco.
The system checks for cartridges on power up by querying the PIC parts. If the system sees SP1 & SP2 it disables SP2.
***************************************************************************/
#include "emu.h"
@ -55,7 +55,7 @@ class galgames_slot_device;
// CART declaration
class galgames_cart_device : public device_t,
class galgames_cart_device : public device_t,
public device_rom_interface
{
public:
@ -63,11 +63,11 @@ public:
galgames_cart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration
static void static_set_cart(device_t &device, uint8_t cart) { downcast<galgames_cart_device &>(device).m_cart = cart; }
static void static_set_pic_bits(device_t &device, int clk, int in, int out, int dis) { downcast<galgames_cart_device &>(device).set_pic_bits(clk, in, out, dis); }
static void static_set_cart(device_t &device, uint8_t cart) { downcast<galgames_cart_device &>(device).m_cart = cart; }
static void static_set_pic_bits(device_t &device, int clk, int in, int out, int dis) { downcast<galgames_cart_device &>(device).set_pic_bits(clk, in, out, dis); }
// ROM
DECLARE_READ16_MEMBER(rom_r) { return read_word(offset*2); }
DECLARE_READ16_MEMBER(rom_r) { return read_word(offset*2); }
// EEPROM
DECLARE_READ8_MEMBER(eeprom_r);
@ -133,7 +133,7 @@ static MACHINE_CONFIG_FRAGMENT( bios )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_bios_cart_device : public galgames_cart_device
class galgames_bios_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -163,7 +163,7 @@ static MACHINE_CONFIG_FRAGMENT( starpak2 )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_starpak2_cart_device : public galgames_cart_device
class galgames_starpak2_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -195,7 +195,7 @@ static MACHINE_CONFIG_FRAGMENT( starpak3 )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_starpak3_cart_device : public galgames_cart_device
class galgames_starpak3_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -224,7 +224,7 @@ const device_type GALGAMES_STARPAK3_CART = &device_creator<galgames_starpak3_car
// SLOT declaration
class galgames_slot_device : public device_t,
class galgames_slot_device : public device_t,
public device_memory_interface
{
public:
@ -233,8 +233,8 @@ public:
DECLARE_ADDRESS_MAP(slot_map, 16);
DECLARE_READ16_MEMBER(read) { return m_space->read_word(offset * 2, mem_mask); }
DECLARE_WRITE16_MEMBER(write) { m_space->write_word(offset * 2, data, mem_mask); }
DECLARE_READ16_MEMBER(read) { return m_space->read_word(offset * 2, mem_mask); }
DECLARE_WRITE16_MEMBER(write) { m_space->write_word(offset * 2, data, mem_mask); }
// SLOT
DECLARE_WRITE8_MEMBER(cart_sel_w);
@ -322,7 +322,7 @@ void galgames_cart_device::set_pic_reset_line(int state)
if (!m_pic)
return;
// logerror("reset line = %x\n", state);
// logerror("reset line = %x\n", state);
if (!m_pic->input_state(INPUT_LINE_RESET) && state)
pic_comm_reset();
@ -332,17 +332,17 @@ void galgames_cart_device::set_pic_reset_line(int state)
void galgames_cart_device::log_cart_comm(const char *text, uint8_t data)
{
// logerror("%s: comm %-10s %02x - data:%02x bit:%02x rdy:%x clk:%02x\n", machine().describe_context(),
// text, data, m_pic_data, m_pic_data_bit, m_pic_data_rdy, m_pic_data_clk );
// logerror("%s: comm %-10s %02x - data:%02x bit:%02x rdy:%x clk:%02x\n", machine().describe_context(),
// text, data, m_pic_data, m_pic_data_bit, m_pic_data_rdy, m_pic_data_clk );
// logerror("%s: comm %-10s %02x\n", machine().describe_context(), text, data );
// logerror("%s: comm %-10s %02x\n", machine().describe_context(), text, data );
}
void galgames_cart_device::pic_comm_reset()
{
m_pic_iobits = m_pic_data = m_pic_data_rdy = m_pic_data_clk = 0;
m_pic_data_bit = 0xff;
// logerror("%s: comm reset\n", machine().describe_context());
// logerror("%s: comm reset\n", machine().describe_context());
}
// External PIC status and data interface
@ -367,34 +367,34 @@ WRITE8_MEMBER(galgames_cart_device::pic_data_w)
{
if (is_selected())
{
m_pic_data = data;
m_pic_data_rdy = 1;
m_pic_data_bit = 0xff;
m_pic_data_clk = 0;
m_pic_data = data;
m_pic_data_rdy = 1;
m_pic_data_bit = 0xff;
m_pic_data_clk = 0;
log_cart_comm("EXT WRITE", data);
}
}
/*
galgame2:
bit 0 = cleared at boot (never touched again)
bit 1 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 2 = data out
bit 3 unused
bit 4 = data in
bit 5 = clock
bit 6 n.c.
bit 7 n.c.
bit 0 = cleared at boot (never touched again)
bit 1 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 2 = data out
bit 3 unused
bit 4 = data in
bit 5 = clock
bit 6 n.c.
bit 7 n.c.
galgame3:
bit 0 = clock
bit 1 unused
bit 2 = data in
bit 3 = data out
bit 4 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 5 = 0
bit 6 = 1
bit 7 unused
bit 0 = clock
bit 1 unused
bit 2 = data in
bit 3 = data out
bit 4 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 5 = 0
bit 6 = 1
bit 7 unused
*/
void galgames_cart_device::set_pic_bits(int clk, int in, int out, int dis)
{
@ -476,7 +476,7 @@ READ8_MEMBER(galgames_cart_device::int_pic_data_r)
m_pic_iobits = (m_pic_iobits & (~m_pic_in_mask)) | (bit_in ? m_pic_in_mask : 0);
}
// log_cart_comm("PIC READ", m_pic_iobits);
// log_cart_comm("PIC READ", m_pic_iobits);
return m_pic_iobits;
}
@ -485,13 +485,13 @@ WRITE8_MEMBER(galgames_cart_device::int_pic_data_w)
{
m_pic_iobits = (m_pic_iobits & (~m_pic_out_mask)) | (data & m_pic_out_mask);
// log_cart_comm("PIC WRITE", data);
// log_cart_comm("PIC WRITE", data);
}
/*
galgame3, port A:
bit 2 = bank lsb
bit 3 = bank msb
bit 2 = bank lsb
bit 3 = bank msb
*/
WRITE8_MEMBER(galgames_cart_device::int_pic_bank_w)
{
@ -576,8 +576,8 @@ void galgames_slot_device::device_reset()
void galgames_slot_device::set_cart(int cart)
{
// if (m_cart != cart)
// logerror("%s: cart sel = %02x\n", machine().describe_context(), cart);
// if (m_cart != cart)
// logerror("%s: cart sel = %02x\n", machine().describe_context(), cart);
m_cart = cart;
}
@ -595,15 +595,15 @@ WRITE8_MEMBER(galgames_slot_device::cart_sel_w)
switch( data )
{
case 0x07: // 7 resets all
case 0x07: // 7 resets all
reset_eeproms_except(-1);
break;
case 0x00: // cart 0 (motherboard)
case 0x01: // cart 1
case 0x02: // cart 2
case 0x03: // cart 3
case 0x04: // cart 4
case 0x00: // cart 0 (motherboard)
case 0x01: // cart 1
case 0x02: // cart 2
case 0x03: // cart 3
case 0x04: // cart 4
set_cart(data);
reset_eeproms_except(data);
break;
@ -627,7 +627,7 @@ WRITE8_MEMBER(galgames_slot_device::ram_sel_w)
if ((data & 0xf7) == 0x05)
{
m_is_ram_active = true;
// logerror("%s: romram bank = %02x\n", machine().describe_context(), data);
// logerror("%s: romram bank = %02x\n", machine().describe_context(), data);
}
}
@ -739,7 +739,7 @@ protected:
WRITE_LINE_MEMBER(galgames_state::blitter_irq_callback)
{
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
m_maincpu->set_input_line(2, state);
}
@ -819,7 +819,7 @@ WRITE16_MEMBER(galgames_state::outputs_w)
machine().bookkeeping().coin_counter_w(0, data & 0x0004);
}
// popmessage("OUT %02X", data & mem_mask);
// popmessage("OUT %02X", data & mem_mask);
}
// FPGA

View File

@ -47,7 +47,7 @@ public:
static ADDRESS_MAP_START(h89_mem, AS_PROGRAM, 8, h89_state)
ADDRESS_MAP_UNMAP_HIGH
// Bank 0 - At startup has the format defined below, but software could swap it for RAM (Later H-89s and
// Bank 0 - At startup has the format defined below, but software could swap it for RAM (Later H-89s and
// Early ones with the Org-0 modification),
// TODO - define the RAM so it can swap in/out under program control.
AM_RANGE(0x0000, 0x0fff) AM_ROM // Page 0-4 - System ROM (at most 4k(MTR-90), early versions(MTR-88, MTR-89) only had 2k)
@ -62,21 +62,21 @@ static ADDRESS_MAP_START( h89_io, AS_IO, 8, h89_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x78, 0x7b) expansion 1 // Options - Cassette I/O (only uses 0x78 - 0x79) Requires MTR-88 ROM
// - H37 5-1/4" Soft-sectored Controller MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// - H37 5-1/4" Soft-sectored Controller MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// AM_RANGE(0x7c, 0x7f) expansion 2 // Options - 5-1/4" Hard-sectored Controller (works with ALL ROMs)
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// AM_RANGE(0xd0, 0xd7) 8250 UART DCE
// AM_RANGE(0xd8, 0xdf) 8250 UART DTE - MODEM
// AM_RANGE(0xe0, 0xe7) 8250 UART DCE - LP
AM_RANGE(0xe8, 0xef) AM_DEVREADWRITE("ins8250", ins8250_device, ins8250_r, ins8250_w) // 8250 UART console - this
// connects internally to a Terminal board
// that is also used in the H19. Ideally,
// the H19 code could be connected and ran
// as a separate thread.
AM_RANGE(0xe8, 0xef) AM_DEVREADWRITE("ins8250", ins8250_device, ins8250_r, ins8250_w) // 8250 UART console - this
// connects internally to a Terminal board
// that is also used in the H19. Ideally,
// the H19 code could be connected and ran
// as a separate thread.
// AM_RANGE(0xf0, 0xf1) // ports defined on the H8 - on the H89, access to these addresses causes a NMI
AM_RANGE(0xf2, 0xf2) AM_WRITE(port_f2_w) AM_READ_PORT("SW501")
// AM_RANGE(0xf3, 0xf3) // ports defined on the H8 - on the H89, access to these addresses causes a NMI
@ -85,7 +85,7 @@ ADDRESS_MAP_END
/* Input ports */
static INPUT_PORTS_START( h89 )
// Settings with the MTR-88 ROM (#444-40)
// Settings with the MTR-88 ROM (#444-40)
// PORT_START("SW501")
// PORT_DIPNAME( 0x1f, 0x00, "Unused" ) PORT_DIPLOCATION("S1:1,S1:2,S1:3,S1:4,S1:5")
// PORT_DIPNAME( 0x20, 0x20, "Perform memory test at start" ) PORT_DIPLOCATION("S1:6")
@ -97,7 +97,7 @@ static INPUT_PORTS_START( h89 )
// PORT_DIPSETTING( 0x80, "38400" )
// PORT_DIPSETTING( 0xc0, "57600" )
// Settings with the MTR-89 ROM (#444-62)
// Settings with the MTR-89 ROM (#444-62)
// PORT_START("SW501")
// PORT_DIPNAME( 0x03, 0x00, "Expansion 1" ) PORT_DIPLOCATION("S1:1,S1:2")
// PORT_DIPSETTING( 0x00, "H-88-1" )
@ -122,7 +122,7 @@ static INPUT_PORTS_START( h89 )
// PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
// PORT_DIPSETTING( 0x80, "Auto" )
// Settings with the MTR-90 ROM (#444-84 or 444-142)
// Settings with the MTR-90 ROM (#444-84 or 444-142)
PORT_START("SW501")
PORT_DIPNAME( 0x03, 0x00, "Expansion 1" ) PORT_DIPLOCATION("S1:1,S1:2")
PORT_DIPSETTING( 0x00, "H-88-1" )
@ -161,13 +161,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(h89_state::h89_irq_timer)
WRITE8_MEMBER( h89_state::port_f2_w )
{
// Bit 0 - Single-step
// Bit 1 - Enable timer interrupt (2mSec Clock)
// Bit 0 - Single-step
// Bit 1 - Enable timer interrupt (2mSec Clock)
m_port_f2 = data;
}
static DEVICE_INPUT_DEFAULTS_START( terminal )
// TODO - baud rate should be controlled by SW501 setting
// TODO - baud rate should be controlled by SW501 setting
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )

View File

@ -587,7 +587,7 @@ MACHINE_CONFIG_END
LJN I Took a Lickin' From a Chicken
* COP421 MCU label ~/005 COP421-NJC/N
* 11 leds, 1-bit sound, motor to a chicken on a spring
This toy includes 4 games: Tic Tac Toe, Chicken Sez, and Total Recall I/II.
known releases:
@ -1082,7 +1082,7 @@ MACHINE_CONFIG_END
Milton Bradley Plus One
* COP410L MCU in 8-pin DIP, label ~/029 MM 57405 (die label COP410L/B NNE)
* orientation sensor(4 directions), 1-bit sound
This is a board game, each player needs to rotate a triangular pyramid
shaped piece the same as the previous player, plus 1.

View File

@ -63,7 +63,7 @@
35 HD44801B 1983, Alpha 8302 protection MCU (see 8201)
42 HD44801B 1984, Alpha 8303 protection MCU (see 8201)
*89 HD44801C 1985, CXG Advanced Portachess
(* denotes not yet emulated by MAME, @ denotes it's in this driver)

View File

@ -278,13 +278,13 @@ u16 hh_pic16_state::read_inputs(int columns)
Atari Touch Me
* PIC1655A-053
* 2 7seg LEDs + 4 other LEDs, 1-bit sound
This is the handheld version of the 1974 arcade game.
known revisions:
- Model BH-100 GI C013233 Rev 2 Atari W 1979: PIC1655A-053
- Model BH-100 C013150 Rev 6 Atari 1979: AMI C10745 (custom ASIC)
***************************************************************************/
class touchme_state : public hh_pic16_state
@ -324,12 +324,12 @@ WRITE8_MEMBER(touchme_state::write_b)
{
// B0-B2: input mux
m_inp_mux = data & 7;
// B0,B1: digit select
// B3-B6: leds
m_b = data;
prepare_display();
// B7: speaker lead 1
update_speaker();
}
@ -378,7 +378,7 @@ static MACHINE_CONFIG_START( touchme, touchme_state )
MCFG_PIC16C5x_WRITE_B_CB(WRITE8(touchme_state, write_b))
MCFG_PIC16C5x_READ_C_CB(CONSTANT(0xff))
MCFG_PIC16C5x_WRITE_C_CB(WRITE8(touchme_state, write_c))
MCFG_DEVICE_ADD("clock", CLOCK, 300000/4) // PIC CLKOUT, tied to RTCC
MCFG_CLOCK_SIGNAL_HANDLER(INPUTLINE("maincpu", PIC16C5x_RTCC))
@ -401,7 +401,7 @@ MACHINE_CONFIG_END
GAF Melody Madness
* PIC1655A-094
* 2 lamps under tube, 1-bit sound
Melody Madness is a tabletop music memory game, shaped like a jukebox.
It can also be played as a simple electronic piano.
@ -438,7 +438,7 @@ WRITE8_MEMBER(melodym_state::write_c)
// C6: both lamps
m_display_wait = 2;
display_matrix(1, 1, ~data >> 6 & 1, 1);
// C7: speaker out
m_speaker->level_w(~data >> 7 & 1);
}
@ -516,7 +516,7 @@ MACHINE_CONFIG_END
Ideal Maniac, by Ralph Baer
* PIC1655A-036
* 2 7seg LEDs, 1-bit sound
Maniac is a reflex game for 2-4 players. There are 4 challenges:
1: Musical Maniac: Press the button as soon as the music stops.
2: Sounds Abound: Count the number of tones in the song, then press the button
@ -561,7 +561,7 @@ WRITE8_MEMBER(maniac_state::write_b)
// B0-B6: left 7seg
m_b = data;
prepare_display();
// B7: speaker lead 1
update_speaker();
}
@ -616,12 +616,12 @@ MACHINE_CONFIG_END
Lakeside Le Boom
* PIC1655A-061
* 1 led, 1-bit sound with RC circuit for volume decay
This is a tabletop timebomb defusion game. It's shaped like an aerial bomb,
colored black on USA version, yellow on dual-language Canadian version.
The game starts 'ticking' when the player opens the keypad door. To begin,
select the game mode, rows(keypad size), and fuse duration.
Game modes as described on the box:
1: Eliminate the buttons one by one in the order set out by the computer. Press
one twice and you'll be sorry!
@ -631,7 +631,7 @@ MACHINE_CONFIG_END
on your 5th turn. Listen to the clues and you'll do fine.
4: The computer picks a secret combination. Find it first by listening to the
clues. Find the right order and you'll get it to fizzle out.
***************************************************************************/
class leboom_state : public hh_pic16_state
@ -773,7 +773,7 @@ MACHINE_CONFIG_END
Tandy Electronic Basketball (model 60-2146)
* PIC1655A-51
* 2 7seg LEDs + 21 other LEDs, 1-bit sound
The ROM is nearly identical to hccbaskb, the shell/overlay is the same as
U.S. Games/Tandy Trick Shot Basketball.
@ -811,7 +811,7 @@ WRITE8_MEMBER(tbaskb_state::write_b)
{
// B0: RTCC pin
m_maincpu->set_input_line(PIC16C5x_RTCC, data & 1);
// B0-B4: input mux
m_inp_mux = ~data & 0x1f;
@ -882,12 +882,12 @@ MACHINE_CONFIG_END
Tiger Electronics Rocket Pinball (model 7-460)
* PIC1650A-110, 69-11397
* 3 7seg LEDs + 44 other LEDs, 1-bit sound
known releases:
- Hong Kong: Rocket Pinball
- USA(1): Rocket Pinball (model 60-2140), distributed by Tandy
- USA(2): Cosmic Pinball (model 49-65456), distributed by Sears
***************************************************************************/
class rockpin_state : public hh_pic16_state
@ -911,7 +911,7 @@ void rockpin_state::prepare_display()
// 3 7seg leds from ports A and B
set_display_segmask(7, 0x7f);
display_matrix(7, 3, m_b, m_a, false);
// 44 leds from ports C and D
for (int y = 0; y < 6; y++)
m_display_state[y+3] = (m_d >> y & 1) ? m_c : 0;
@ -924,7 +924,7 @@ WRITE8_MEMBER(rockpin_state::write_a)
{
// A3,A4: speaker out
m_speaker->level_w(data >> 3 & 3);
// A0-A2: select digit
m_a = ~data & 7;
prepare_display();
@ -976,7 +976,7 @@ static MACHINE_CONFIG_START( rockpin, rockpin_state )
MCFG_PIC16C5x_WRITE_C_CB(WRITE8(rockpin_state, write_c))
MCFG_PIC16C5x_READ_D_CB(CONSTANT(0xff))
MCFG_PIC16C5x_WRITE_D_CB(WRITE8(rockpin_state, write_d))
MCFG_DEVICE_ADD("clock", CLOCK, 500000/4) // PIC CLKOUT, tied to RTCC
MCFG_CLOCK_SIGNAL_HANDLER(INPUTLINE("maincpu", PIC16C5x_RTCC))
@ -999,7 +999,7 @@ MACHINE_CONFIG_END
Tiger Electronics Half Court Computer Basketball (model 7-470)
* PIC1655A(no serial), 69-11557
* 2 7seg LEDs + 26 other LEDs, 1-bit sound
known releases:
- Hong Kong: Half Court Computer Basketball
- USA: Electronic Basketball (model 49-65453), distributed by Sears
@ -1038,7 +1038,7 @@ WRITE8_MEMBER(hccbaskb_state::write_b)
{
// B0: RTCC pin
m_maincpu->set_input_line(PIC16C5x_RTCC, data & 1);
// B0-B4: input mux
m_inp_mux = ~data & 0x1f;
@ -1113,7 +1113,7 @@ MACHINE_CONFIG_END
(no brand) Football (set 2)
* PIC1655-024
* rest same as above, 1 less button
Hello and welcome to another Mattel Football clone, there are so many of these.
The PIC1655-024 one came from an unbranded handheld, but comparison suggests
that it's the 'prequel' of PIC1655A-033.
@ -1142,7 +1142,7 @@ void ttfball_state::prepare_display()
// C5: select digits or led matrix
const u8 _4511_map[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7c,0x07,0x7f,0x67,0,0,0,0,0,0 };
u16 led_data = (m_c & 0x20) ? (_4511_map[m_c & 0xf] | (~m_c << 3 & 0x80)) : (~m_c << 8 & 0x700);
set_display_segmask(0x7f, 0xff);
display_matrix(11, 9, led_data, m_b | (m_c << 1 & 0x100));
}
@ -1157,7 +1157,7 @@ WRITE8_MEMBER(ttfball_state::write_b)
{
// B0: RTCC pin
m_maincpu->set_input_line(PIC16C5x_RTCC, data & 1);
// B0,B1,B3,B7: input mux low
m_inp_mux = (m_inp_mux & 0x10) | (~data & 3) | (~data >> 1 & 4) | (~data >> 4 & 8);
@ -1170,7 +1170,7 @@ WRITE8_MEMBER(ttfball_state::write_c)
{
// C6: speaker out
m_speaker->level_w(data >> 6 & 1);
// C7: input mux high
m_inp_mux = (m_inp_mux & 0xf) | (data >> 3 & 0x10);

View File

@ -1579,7 +1579,7 @@ MACHINE_CONFIG_END
ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \
ROM_LOAD ( "rom1.bin", 0x000000, 0x01ff32, CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) ) \
ROM_REGION( 0x10000, "iomcu", 0 ) /* "64Bit I/O Controller Ver 1.0 1997.06.29(C)SNK" internal ID string */ \
/* this was dumped from a TMP87PH40AN type chip. Some boards use a TMP87CH40N, in all cases they're stickered SNK-IOJ1.00A so likely the same content */ \
/* this was dumped from a TMP87PH40AN type chip. Some boards use a TMP87CH40N, in all cases they're stickered SNK-IOJ1.00A so likely the same content */ \
ROM_LOAD ( "tmp87ph40an.bin", 0x8000, 0x8000, CRC(b70df21f) SHA1(5b742e8a0bbf4c0ae4f4398d34c7058fb24acc92) )

View File

@ -104,7 +104,7 @@ READ32_MEMBER(interpro_state::idprom_r)
(u8)speed1, (u8)speed2, (u8)speed3, (u8)speed,
// reserved bytes
0xff, 0xff,
0xff, 0xff,
// family
// boot rom tests for family == 0x41 or 0x42
@ -139,11 +139,11 @@ READ32_MEMBER(interpro_state::slot0_r)
{
// a known graphics board idprom
static uint8_t slot0[] = {
0x00, 0x00, 0x00, 0x00, '9', '6', '3', 'A', // board
0x00, 0x00, 0x00, 0x00, '9', '6', '3', 'A', // board
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // eco
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // features
0xff, 0xff, // reserved
0x22, 0x00, // family
0xff, 0xff, // reserved
0x22, 0x00, // family
0x55, 0xaa, 0x55, 0x00
};
@ -217,7 +217,7 @@ ADDRESS_MAP_END
// these maps represent the real main, i/o and boot spaces of the system
static ADDRESS_MAP_START(interpro_main_map, AS_0, 32, interpro_state)
AM_RANGE(0x00000000, 0x00ffffff) AM_RAM // 16M RAM
AM_RANGE(0x7f100000, 0x7f11ffff) AM_ROM AM_REGION(INTERPRO_ROM_TAG, 0)
AM_RANGE(0x7f180000, 0x7f1bffff) AM_ROM AM_REGION(INTERPRO_EEPROM_TAG, 0)
ADDRESS_MAP_END
@ -239,7 +239,7 @@ static ADDRESS_MAP_START(interpro_io_map, AS_1, 32, interpro_state)
AM_RANGE(0x7f000700, 0x7f00077f) AM_READ(idprom_r)
AM_RANGE(0x7f001000, 0x7f001fff) AM_READWRITE8(scsi_r, scsi_w, 0x0000ff00)
AM_RANGE(0x7f0fff00, 0x7f0fffff) AM_DEVICE(INTERPRO_IOGA_TAG, interpro_ioga_device, map)
AM_RANGE(0x7f0fff00, 0x7f0fffff) AM_DEVICE(INTERPRO_IOGA_TAG, interpro_ioga_device, map)
AM_RANGE(0x08000000, 0x08000fff) AM_NOP // bogus
AM_RANGE(0x8f000000, 0x8f0fffff) AM_READ(slot0_r)
@ -275,7 +275,7 @@ static MACHINE_CONFIG_START(ip2800, interpro_state)
MCFG_CAMMU_SSW_CB(DEVREADLINE(INTERPRO_CPU_TAG, clipper_device, ssw))
// serial controllers and rs232 bus
MCFG_SCC85C30_ADD(INTERPRO_SCC1_TAG, XTAL_4_9152MHz, 0, 0, 0, 0)
MCFG_SCC85C30_ADD(INTERPRO_SCC1_TAG, XTAL_4_9152MHz, 0, 0, 0, 0)
MCFG_Z80SCC_OUT_TXDA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
MCFG_Z80SCC_OUT_TXDB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_txd))

View File

@ -544,8 +544,8 @@ static MACHINE_CONFIG_DERIVED( intvkbd, intv )
/* crt controller */
MCFG_DEVICE_ADD("crtc", TMS9927, XTAL_7_15909MHz)
MCFG_TMS9927_CHAR_WIDTH(8)
MCFG_TMS9927_OVERSCAN(STIC_OVERSCAN_LEFT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE, STIC_OVERSCAN_RIGHT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE,
STIC_OVERSCAN_TOP_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE, STIC_OVERSCAN_BOTTOM_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE)
MCFG_TMS9927_OVERSCAN(STIC_OVERSCAN_LEFT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE, STIC_OVERSCAN_RIGHT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE,
STIC_OVERSCAN_TOP_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE, STIC_OVERSCAN_BOTTOM_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE)
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(intv_state, screen_update_intvkbd)

View File

@ -222,7 +222,7 @@ public:
required_ioport m_in_country;
required_ioport m_in_card;
required_ioport m_in_monitor;
uint32_t m_vdl0_address;
uint32_t m_vdl1_address;
uint32_t m_irq_enable;
@ -301,11 +301,11 @@ uint32_t konamim2_state::screen_update_m2(screen_device &screen, bitmap_ind16 &b
fb_size = m_main_ram[((cur_vdl_address - 0x40000000) / 8) + 2] >> 32;
//config = m_main_ram[(cur_vdl_address - 0x40000000) / 8] >> 32;
//popmessage("%08x",config);
height = fb_size & 0x1ff;
width = (fb_size >> 24) * 16;
}
if (fb_start <= 0x800000)
{
uint16_t *frame = (uint16_t*)&m_main_ram[fb_start/8];
@ -463,7 +463,7 @@ READ64_MEMBER(konamim2_state::unk4000280_r)
uint32_t sys_config = 0x03600000;
sys_config |= 0 << 0; // Bit 0: PAL/NTSC switch (default is selected by encoder)
sys_config |= 0 << 2; // Bit 2-3: Video Encoder (0 = MEIENC, 1 = VP536, 2 = BT9103, 3 = DENC)
sys_config |= 0 << 2; // Bit 2-3: Video Encoder (0 = MEIENC, 1 = VP536, 2 = BT9103, 3 = DENC)
sys_config |= m_in_country->read() << 11; // Bit 11-12: Country
// 0 = ???
// 1 = UK
@ -1177,13 +1177,13 @@ static ADDRESS_MAP_START( m2_main, AS_PROGRAM, 64, konamim2_state )
AM_RANGE(0x00030010, 0x00030017) AM_WRITE(video_w)
AM_RANGE(0x00030030, 0x00030037) AM_READ(unk30030_r)
AM_RANGE(0x00030400, 0x00030407) AM_WRITE32(video_irq_ack_w,0x00000000ffffffffU)
AM_RANGE(0x01000000, 0x01000fff) AM_READWRITE(cde_r, cde_w)
AM_RANGE(0x02000000, 0x02000fff) AM_READ(device2_r)
AM_RANGE(0x03000000, 0x03000007) AM_READ8(id3_r, 0x00ff000000000000U)
AM_RANGE(0x04000000, 0x04000007) AM_READ8(id4_r, 0x00ff000000000000U)
AM_RANGE(0x04000010, 0x04000017) AM_WRITE8(serial_w,0x00000000000000ffU)
AM_RANGE(0x04000018, 0x0400001f) AM_READ(unk1_r) // serial status
@ -1191,16 +1191,16 @@ static ADDRESS_MAP_START( m2_main, AS_PROGRAM, 64, konamim2_state )
AM_RANGE(0x04000418, 0x0400041f) AM_WRITE(unk4000418_w) // serial status ack
AM_RANGE(0x04000208, 0x0400020f) AM_READ(unk3_r)
AM_RANGE(0x04000280, 0x04000287) AM_READ(unk4000280_r)
AM_RANGE(0x05000000, 0x05000007) AM_READ8(id5_r, 0x00ff000000000000U)
AM_RANGE(0x06000000, 0x06000007) AM_READ8(id6_r, 0x00ff000000000000U)
AM_RANGE(0x07000000, 0x07000007) AM_READ8(id7_r, 0x00ff000000000000U)
AM_RANGE(0x10000000, 0x10000007) AM_READ(cpu_r)
AM_RANGE(0x10000008, 0x10001007) AM_NOP // ???
AM_RANGE(0x20000000, 0x201fffff) AM_ROM AM_SHARE("share2")
AM_RANGE(0x40000000, 0x407fffff) AM_RAM AM_SHARE("main_ram")
AM_RANGE(0xfff00000, 0xffffffff) AM_ROM AM_REGION("boot", 0) AM_SHARE("share2")
@ -1210,7 +1210,7 @@ static ADDRESS_MAP_START( 3do_m2_main, AS_PROGRAM, 64, konamim2_state )
// ADDRESS_MAP_UNMAP_HIGH
AM_IMPORT_FROM( m2_main )
// AM_RANGE(0x00000000, 0x000cffff) devices?
// AM_RANGE(0x00000000, 0x000cffff) devices?
ADDRESS_MAP_END
static INPUT_PORTS_START( m2 )
@ -1221,7 +1221,7 @@ static INPUT_PORTS_START( m2 )
PORT_CONFSETTING( 0x01, "UK" )
PORT_CONFSETTING( 0x02, "Japan" )
PORT_CONFSETTING( 0x03, "US" )
PORT_START("CARD")
PORT_CONFNAME( 0x0f, 0x0b, "Card Type" )
PORT_CONFSETTING( 0x08, "AC-DevCard" )
@ -1229,7 +1229,7 @@ static INPUT_PORTS_START( m2 )
PORT_CONFSETTING( 0x0c, "DevCard (not allowed)" )
PORT_CONFSETTING( 0x0e, "Upgrade (not allowed)" )
PORT_CONFSETTING( 0x0f, "Multiplayer (not allowed)" )
PORT_START("MONITOR")
PORT_CONFNAME( 0x01, 0x00, "Monitor Type" )
PORT_CONFSETTING( 0x01, "15 KHz" )
@ -1245,20 +1245,20 @@ INTERRUPT_GEN_MEMBER(konamim2_state::m2)
0x200000
0x800000 VBlank irq
*/
if (m_irq_enable & 0x800000)
{
//m_irq_enable |= 0x800000;
m_irq_active |= 0x800000;
device.execute().set_input_line(PPC_IRQ, ASSERT_LINE);
}
/*if (m_irq_enable & 0x8)
{
m_irq_active |= 0x8;
}*/
}
void konamim2_state::machine_reset()
@ -1294,7 +1294,7 @@ static MACHINE_CONFIG_START( m2, konamim2_state )
MCFG_PALETTE_ADD_RRRRRGGGGGBBBBB("palette")
/*cd-rom*/
MCFG_CDROM_ADD( "cdrom" )
MCFG_CDROM_INTERFACE("3do_m2_cdrom")

View File

@ -45,9 +45,9 @@ public:
required_device<k056832_device> m_k056832;
required_device<palette_device> m_palette;
required_device<ymz280b_device> m_ymz;
DECLARE_PALETTE_INIT(konmedal);
READ8_MEMBER(vram_r);
WRITE8_MEMBER(vram_w);
READ8_MEMBER(magic_r);
@ -89,14 +89,14 @@ READ8_MEMBER(konmedal_state::vram_r)
return m_k056832->ram_code_lo_r(space, offset>>1);
}
}
else if (m_control == 0) // ROM readback
else if (m_control == 0) // ROM readback
{
return m_k056832->konmedal_rom_r(space, offset);
return m_k056832->konmedal_rom_r(space, offset);
}
return 0;
}
WRITE8_MEMBER(konmedal_state::vram_w)
{
// there are (very few) writes above F000 in some screens.
@ -107,24 +107,24 @@ WRITE8_MEMBER(konmedal_state::vram_w)
m_k056832->ram_code_hi_w(space, offset>>1, data);
return;
}
m_k056832->ram_code_lo_w(space, offset>>1, data);
}
READ8_MEMBER(konmedal_state::magic_r)
{
return 0xc1; // checked at 60f before reading a page of the VROM
return 0xc1; // checked at 60f before reading a page of the VROM
}
K056832_CB_MEMBER(konmedal_state::tile_callback)
{
int codebits = *code;
int bs;
int bankshifts[4] = { 0, 4, 8, 12 };
int mode, data, bank;
m_k056832->read_avac(&mode, &data);
*color = (codebits >> 12) & 0xf;
bs = (codebits & 0xc00) >> 10;
bank = (data >> bankshifts[bs]) & 0xf;
@ -137,7 +137,7 @@ void konmedal_state::video_start()
uint32_t konmedal_state::screen_update_konmedal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
// bitmap.fill(m_back_colorbase, cliprect);
// bitmap.fill(m_back_colorbase, cliprect);
bitmap.fill(0, cliprect);
screen.priority().fill(0, cliprect);
@ -146,7 +146,7 @@ uint32_t konmedal_state::screen_update_konmedal(screen_device &screen, bitmap_in
return 0;
}
PALETTE_INIT_MEMBER(konmedal_state, konmedal)
{
int i;
@ -160,7 +160,7 @@ PALETTE_INIT_MEMBER(konmedal_state, konmedal)
PROM[0x200+i]<<4);
}
}
INTERRUPT_GEN_MEMBER(konmedal_state::konmedal_interrupt)
{
m_maincpu->set_input_line(0, HOLD_LINE);
@ -177,12 +177,12 @@ WRITE8_MEMBER(konmedal_state::bankswitch_w)
static ADDRESS_MAP_START( medal_main, AS_PROGRAM, 8, konmedal_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("maincpu", 0)
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xafff) AM_RAM // work RAM?
AM_RANGE(0xa000, 0xafff) AM_RAM // work RAM?
AM_RANGE(0xb800, 0xbfff) AM_RAM // stack goes here
AM_RANGE(0xc000, 0xc03f) AM_DEVWRITE("k056832", k056832_device, write)
AM_RANGE(0xc100, 0xc100) AM_WRITE(control2_w)
AM_RANGE(0xc400, 0xc400) AM_WRITE(bankswitch_w)
AM_RANGE(0xc500, 0xc500) AM_NOP // read to reset watchdog
AM_RANGE(0xc500, 0xc500) AM_NOP // read to reset watchdog
AM_RANGE(0xc702, 0xc703) AM_READ(inputs_r)
AM_RANGE(0xc800, 0xc80f) AM_DEVWRITE("k056832", k056832_device, b_w)
AM_RANGE(0xc80f, 0xc80f) AM_READ(magic_r)
@ -240,23 +240,23 @@ MACHINE_CONFIG_END
ROM_START( tsukande )
ROM_REGION( 0x20000, "maincpu", 0 ) /* main program */
ROM_LOAD( "441-d02.4g", 0x000000, 0x020000, CRC(6ed17227) SHA1(4e3f5219cbf6f42c60df38a99f3009fe49f78fc1) )
ROM_LOAD( "441-d02.4g", 0x000000, 0x020000, CRC(6ed17227) SHA1(4e3f5219cbf6f42c60df38a99f3009fe49f78fc1) )
ROM_REGION( 0x80000, "gfx1", 0 ) /* tilemaps */
ROM_LOAD32_BYTE( "441-a03.4l", 0x000002, 0x020000, CRC(8adf3304) SHA1(1c8312c76cd626978ff5b3896fb5a5b34be72988) )
ROM_LOAD32_BYTE( "441-a04.4m", 0x000003, 0x020000, CRC(038e0c67) SHA1(2b8640bfad7026a2d86fb6498aff4d7a9cb0b700) )
ROM_LOAD32_BYTE( "441-a05.4p", 0x000000, 0x020000, CRC(937c4740) SHA1(155c869b9321d62df115435d7c855f9be4278e45) )
ROM_LOAD32_BYTE( "441-a06.4p", 0x000001, 0x020000, CRC(947a8c45) SHA1(16e3dceb304266bbd2bddc2cec832ebff04e4c71) )
ROM_LOAD32_BYTE( "441-a03.4l", 0x000002, 0x020000, CRC(8adf3304) SHA1(1c8312c76cd626978ff5b3896fb5a5b34be72988) )
ROM_LOAD32_BYTE( "441-a04.4m", 0x000003, 0x020000, CRC(038e0c67) SHA1(2b8640bfad7026a2d86fb6498aff4d7a9cb0b700) )
ROM_LOAD32_BYTE( "441-a05.4p", 0x000000, 0x020000, CRC(937c4740) SHA1(155c869b9321d62df115435d7c855f9be4278e45) )
ROM_LOAD32_BYTE( "441-a06.4p", 0x000001, 0x020000, CRC(947a8c45) SHA1(16e3dceb304266bbd2bddc2cec832ebff04e4c71) )
ROM_REGION( 0x400, "proms", 0 )
ROM_LOAD( "441a07.20k", 0x000000, 0x000100, CRC(7d0c53c2) SHA1(f357e0cb3d53374208ad1670e70be03b399a4c02) )
ROM_LOAD( "441a08.21k", 0x000100, 0x000100, CRC(e2c3e853) SHA1(36a3008dde714ade53b9a01ac9d94c6cc655c293) )
ROM_LOAD( "441a09.23k", 0x000200, 0x000100, CRC(3daca33a) SHA1(38644f574beaa593f3348b49eabea9e03d722013) )
ROM_LOAD( "441a10.21m", 0x000300, 0x000100, CRC(063722ff) SHA1(7ba43acfdccb02e7913dc000c4f9c57c54b1315f) )
ROM_LOAD( "441a07.20k", 0x000000, 0x000100, CRC(7d0c53c2) SHA1(f357e0cb3d53374208ad1670e70be03b399a4c02) )
ROM_LOAD( "441a08.21k", 0x000100, 0x000100, CRC(e2c3e853) SHA1(36a3008dde714ade53b9a01ac9d94c6cc655c293) )
ROM_LOAD( "441a09.23k", 0x000200, 0x000100, CRC(3daca33a) SHA1(38644f574beaa593f3348b49eabea9e03d722013) )
ROM_LOAD( "441a10.21m", 0x000300, 0x000100, CRC(063722ff) SHA1(7ba43acfdccb02e7913dc000c4f9c57c54b1315f) )
ROM_REGION( 0x100000, "ymz", 0 )
ROM_LOAD( "441a11.10d", 0x000000, 0x080000, CRC(e60a7495) SHA1(76963324e818974bc5209e7122282ba4d73fda93) )
ROM_LOAD( "441a12.10e", 0x080000, 0x080000, CRC(dc2dd5bc) SHA1(28ef6c96c360d706a4296a686f3f2a54fce61bfb) )
ROM_REGION( 0x100000, "ymz", 0 )
ROM_LOAD( "441a11.10d", 0x000000, 0x080000, CRC(e60a7495) SHA1(76963324e818974bc5209e7122282ba4d73fda93) )
ROM_LOAD( "441a12.10e", 0x080000, 0x080000, CRC(dc2dd5bc) SHA1(28ef6c96c360d706a4296a686f3f2a54fce61bfb) )
ROM_END
GAME( 1995, tsukande, 0, konmedal, konmedal, driver_device, 0, 0, "Konami", "Tsukande Toru Chicchi", MACHINE_NOT_WORKING)

View File

@ -36,7 +36,7 @@
0xA - <Passes> dies if 600000-7fffff doesn't mirror 400000-5fffff ?
0x8 - <Passes> SRAM test 000000-000FFF (2e3616-2e3654)
0x0 - <runs off into weeds> not sure... (2e2fd0... 2db764 is the end of the 'clear ram 41d53f down to 400000' loop...)
If one of the self tests fails, the uppermost bit will oscillate (c000 4000 c000 4000 etc) forever
******************************************************************************/
@ -267,7 +267,7 @@ WRITE16_MEMBER(lwriter_state::bankedarea_w)
}
else if (offset <= 0x01ffff)
{
if ((offset > 0x7ff) && !space.debugger_access()) { logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1); }
if ((offset > 0x7ff) && !space.debugger_access()) { logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1); }
COMBINE_DATA(&m_sram_ptr[offset&0x7FF]);
return;
}
@ -341,9 +341,9 @@ WRITE_LINE_MEMBER(lwriter_state::via_int_w)
/*
WRITE_LINE_MEMBER(lwriter_state::scc_int)
{
logerror(" SCC: INT output set to %d!\n", state);
//m_via->set_input_line(VIA_CA1, state ? ASSERT_LINE : CLEAR_LINE);
m_via->write_ca1(state);
logerror(" SCC: INT output set to %d!\n", state);
//m_via->set_input_line(VIA_CA1, state ? ASSERT_LINE : CLEAR_LINE);
m_via->write_ca1(state);
}*/
#define CPU_CLK (XTAL_22_3210MHz / 2) // Based on pictures form here: http://picclick.co.uk/Apple-Postscript-LaserWriter-IINT-Printer-640-4105-M6009-Mainboard-282160713108.html#&gid=1&pid=7

View File

@ -174,7 +174,7 @@ SLOT_INTERFACE_END
* Machine configuration
*/
MACHINE_CONFIG_START (miniforce, miniforce_state)
// MCFG_CPU_PROGRAM_MAP (miniforce_mem)
// MCFG_CPU_PROGRAM_MAP (miniforce_mem)
MCFG_VME_DEVICE_ADD("vme")
MCFG_VME_SLOT_ADD ("vme", 1, miniforce_vme_cards, "fccpu21")
MCFG_VME_SLOT_ADD ("vme", 2, miniforce_vme_cards, nullptr)

View File

@ -739,7 +739,7 @@ WRITE8_MEMBER(missile_state::missile_w)
output().set_led_value(0, ~data & 0x02);
m_ctrld = data & 1;
}
/* color RAM */
else if (offset >= 0x4b00 && offset < 0x4c00)
m_palette->set_pen_color(offset & 7, pal1bit(~data >> 3), pal1bit(~data >> 2), pal1bit(~data >> 1));
@ -852,7 +852,7 @@ WRITE8_MEMBER(missile_state::bootleg_w)
output().set_led_value(0, ~data & 0x02);
m_ctrld = data & 1;
}
/* watchdog */
else if (offset >= 0x4900 && offset < 0x4a00)
m_watchdog->watchdog_reset();
@ -917,7 +917,7 @@ READ8_MEMBER(missile_state::bootleg_r)
/* IN2 */
else if (offset >= 0x4b00 && offset < 0x4c00) // seems ok
result = m_r10->read();
/* anything else */
else
@ -1335,27 +1335,27 @@ ROM_END
/*
CPUs
QTY Type clock position function
1x 6502 2B 8-bit Microprocessor - main
1x LM380 12B Audio Amplifier - sound
1x oscillator 10.000 6C
QTY Type clock position function
1x 6502 2B 8-bit Microprocessor - main
1x LM380 12B Audio Amplifier - sound
1x oscillator 10.000 6C
ROMs
QTY Type position status
2x F2708 10C, 10E dumped
6x MCM2716C 1-6 dumped
1x DM74S288N 6L dumped
QTY Type position status
2x F2708 10C, 10E dumped
6x MCM2716C 1-6 dumped
1x DM74S288N 6L dumped
RAMs
QTY Type position
8x TMS4116 4F,4H,4J,4K,4L,4M,4N,4P
1x 74S189N 7L
QTY Type position
8x TMS4116 4F,4H,4J,4K,4L,4M,4N,4P
1x 74S189N 7L
Others
1x 22x2 edge connector
1x trimmer (volume)(12E)
2x 8x2 switches DIP(8R,10R)
2x 8x2 switches DIP(8R,10R)
*/
ROM_START( missilea )

View File

@ -2,23 +2,23 @@
// copyright-holders:Miodrag Milanovic, Sergey Svishchev
/***************************************************************************
Elektronika MS 0515
Elektronika MS 0515
To do:
- softlist
- sound
- 512K memory expansion
- ?? refresh rate change
- ?? parallel printer
- ?? cassette (only with Version A firmware)
- ?? port 177770
To do:
- softlist
- sound
- 512K memory expansion
- ?? refresh rate change
- ?? parallel printer
- ?? cassette (only with Version A firmware)
- ?? port 177770
Docs:
- http://www.tis.kz/docs/MC-0515/mc0515-ed.rar schematics etc.
- http://www.tis.kz/docs/MC-0515/mc0515-to.rar user manual
- http://www.tis.kz/docs/MC-0515/hc4-to.rar technical manual
- http://www.tis.kz/docs/MC-0515/mc0515-po.rar diag manual
- http://www.tis.kz/docs/MC-0515/mc0515-osa.rar OS manual
Docs:
- http://www.tis.kz/docs/MC-0515/mc0515-ed.rar schematics etc.
- http://www.tis.kz/docs/MC-0515/mc0515-to.rar user manual
- http://www.tis.kz/docs/MC-0515/hc4-to.rar technical manual
- http://www.tis.kz/docs/MC-0515/mc0515-po.rar diag manual
- http://www.tis.kz/docs/MC-0515/mc0515-osa.rar OS manual
****************************************************************************/
@ -137,10 +137,10 @@ static ADDRESS_MAP_START(ms0515_mem, AS_PROGRAM, 16, ms0515_state)
AM_RANGE(0177520, 0177527) AM_DEVWRITE8("pit8253", pit8253_device, write, 0x00ff)
AM_RANGE(0177540, 0177547) AM_NOP
// AM_RANGE(0177540, 0177541)
// AM_RANGE(0177542, 0177543)
// AM_RANGE(0177544, 0177545) // i8255 for MS-7007 Keyboard
// AM_RANGE(0177546, 0177547)
// AM_RANGE(0177540, 0177541)
// AM_RANGE(0177542, 0177543)
// AM_RANGE(0177544, 0177545) // i8255 for MS-7007 Keyboard
// AM_RANGE(0177546, 0177547)
AM_RANGE(0177600, 0177607) AM_DEVREADWRITE8("ppi8255_1", i8255_device, read, write, 0x00ff)
@ -160,13 +160,13 @@ ADDRESS_MAP_END
/*
* (page 15-16)
*
* 6-0 RAM banking
* 7 VRAM access enable
* 8 vblank IRQ line (1 -- assert)
* 9 timer IRQ enable (1 -- enable)
* 6-0 RAM banking
* 7 VRAM access enable
* 8 vblank IRQ line (1 -- assert)
* 9 timer IRQ enable (1 -- enable)
* 11-10 VRAM banking
* 12 parallel port STROBE signal
* 13 parallel port ... signal
* 12 parallel port STROBE signal
* 13 parallel port ... signal
* 14-15 unused
*/
WRITE16_MEMBER(ms0515_state::ms0515_bank_w)
@ -412,7 +412,7 @@ uint32_t ms0515_state::screen_update_ms0515(screen_device &screen, bitmap_ind16
void ms0515_state::screen_eof(screen_device &screen, bool state)
{
// irq2_w(state ? ASSERT_LINE : CLEAR_LINE);
// irq2_w(state ? ASSERT_LINE : CLEAR_LINE);
if (BIT(m_bankreg, 9))
irq11_w(state ? ASSERT_LINE : CLEAR_LINE);
}
@ -497,7 +497,7 @@ WRITE_LINE_MEMBER(ms0515_state::irq11_w)
static MACHINE_CONFIG_START( ms0515, ms0515_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", T11, XTAL_4MHz) // actual CPU is T11 clone, KR1807VM1
MCFG_CPU_ADD("maincpu", T11, XTAL_4MHz) // actual CPU is T11 clone, KR1807VM1
MCFG_T11_INITIAL_MODE(0xf2ff)
MCFG_CPU_PROGRAM_MAP(ms0515_mem)
@ -534,8 +534,8 @@ static MACHINE_CONFIG_START( ms0515, ms0515_state )
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("i8251line", i8251_device, write_cts))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("i8251line", i8251_device, write_dsr))
// MCFG_DEVICE_ADD("line_clock", CLOCK, 4800*16) // 8251 is set to /16 on the clock input
// MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(ms0515_state, write_line_clock))
// MCFG_DEVICE_ADD("line_clock", CLOCK, 4800*16) // 8251 is set to /16 on the clock input
// MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(ms0515_state, write_line_clock))
// serial connection to MS7004 keyboard
MCFG_DEVICE_ADD("i8251kbd", I8251, 0)
@ -552,11 +552,11 @@ static MACHINE_CONFIG_START( ms0515, ms0515_state )
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL_2MHz)
// MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_keyboard_clock))
// MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_keyboard_clock))
MCFG_PIT8253_CLK1(XTAL_2MHz)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_line_clock))
MCFG_PIT8253_CLK2(XTAL_2MHz)
// MCFG_PIT8253_OUT2_HANDLER(WRITELINE())
// MCFG_PIT8253_OUT2_HANDLER(WRITELINE())
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)

View File

@ -3788,7 +3788,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cybrcomm, namcos22 )
MCFG_SPEAKER_STANDARD_STEREO("rear_left","rear_right")
MCFG_SOUND_MODIFY("c352")
MCFG_SOUND_ROUTE(2, "rear_left", 1.00)
MCFG_SOUND_ROUTE(3, "rear_right", 1.00)
@ -3853,7 +3853,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( airco22b, namcos22s )
MCFG_SPEAKER_STANDARD_MONO("bodysonic")
MCFG_SOUND_MODIFY("c352")
MCFG_SOUND_ROUTE(2, "bodysonic", 0.50)
MACHINE_CONFIG_END
@ -3877,7 +3877,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cybrcycc, namcos22s )
MCFG_SPEAKER_STANDARD_MONO("tank")
MCFG_SOUND_MODIFY("c352")
MCFG_SOUND_ROUTE(2, "tank", 1.00)
MACHINE_CONFIG_END
@ -3886,7 +3886,7 @@ static MACHINE_CONFIG_DERIVED( dirtdash, namcos22s )
MCFG_SPEAKER_STANDARD_MONO("road")
MCFG_SPEAKER_STANDARD_MONO("under")
MCFG_SOUND_MODIFY("c352")
MCFG_SOUND_ROUTE(2, "road", 1.00)
MCFG_SOUND_ROUTE(3, "under", 0.50) // from sound test
@ -3903,7 +3903,7 @@ static MACHINE_CONFIG_DERIVED( tokyowar, namcos22s )
MCFG_SPEAKER_STANDARD_MONO("seat")
MCFG_SPEAKER_STANDARD_MONO("vibration")
MCFG_SOUND_MODIFY("c352")
MCFG_SOUND_ROUTE(3, "seat", 1.00)
MCFG_SOUND_ROUTE(2, "vibration", 0.50)

View File

@ -1737,7 +1737,7 @@ WRITE32_MEMBER(naomi2_state::both_pvr2_ta_w)
space.write_dword(0x005f8000|offset*4,data,mem_mask);
space.write_dword(0x025f8000|offset*4,data,mem_mask);
}
static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi2_state )
/* Area 0 */
AM_RANGE(0x00000000, 0x001fffff) AM_MIRROR(0xa2000000) AM_ROM AM_REGION("maincpu", 0) // BIOS
@ -1763,7 +1763,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi2_state )
AM_RANGE(0x025f8000, 0x025f9fff) AM_DEVICE32("powervr2_slave", powervr2_device, ta_map, 0xffffffffffffffffU)
// AM_RANGE(0x025f6800, 0x025f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w ) // second PVR DMA!
// AM_RANGE(0x025f7c00, 0x025f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, 0xffffffffffffffffU)
// AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, 0xffffffffffffffffU)
// AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, 0xffffffffffffffffU)
/* Area 1 */
AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE("dc_texture_ram") // texture memory 64 bit access
@ -2783,11 +2783,11 @@ static MACHINE_CONFIG_START( naomi2_base, naomi2_state )
// TODO: ELAN device
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( naomi2gd, naomi2_state )
MCFG_FRAGMENT_ADD( naomigd )
MCFG_FRAGMENT_ADD( naomi2_base )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(naomi2_map)
MACHINE_CONFIG_END
@ -6937,23 +6937,23 @@ ROM_END
// ID# 837-14114-01-91
// ROM board ID# 840-0078B REV.B
ROM_START( shors2k1 )
NAOMI_BIOS
NAOMI_DEFAULT_EEPROM
NAOMI_BIOS
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0x7800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD("epr-23739b.ic22", 0x00000000, 0x00400000, CRC(2d19b6a2) SHA1(1cf0294a32a870b34164786db9df29dd23cf790a) )
ROM_LOAD("mpr-23740.ic1", 0x00800000, 0x01000000, CRC(e84f8611) SHA1(4b6f174cac37b6c50d2151e25bba52c87ac738fe) )
ROM_LOAD("mpr-23741.ic2", 0x01800000, 0x01000000, CRC(5fd84c54) SHA1(2913a1d67674de2cc0165ec0e7556288ca2ea6c6) )
ROM_LOAD("mpr-23742.ic3", 0x02800000, 0x01000000, CRC(240e1779) SHA1(ac25c217e9772d16465f26d1ad7f514d745e9ec2) )
ROM_LOAD("mpr-23743.ic4", 0x03800000, 0x01000000, CRC(d9dc0a12) SHA1(d374a09d6e7a94075720b137879e64daca197ef8) )
ROM_LOAD("mpr-23744.ic5", 0x04800000, 0x01000000, CRC(95759982) SHA1(e09c20d1acad55f8cfb38dfec7c55ec97165190c) )
ROM_LOAD("mpr-23745.ic6", 0x05800000, 0x01000000, CRC(0eda5807) SHA1(589aac6262dc4168793fd41bb88760123408328f) )
ROM_LOAD("mpr-23746.ic7", 0x06800000, 0x01000000, CRC(955bb184) SHA1(05436d4eed330bc0b71897650d9df601453cde6f) )
ROM_REGION( 0x7800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD("epr-23739b.ic22", 0x00000000, 0x00400000, CRC(2d19b6a2) SHA1(1cf0294a32a870b34164786db9df29dd23cf790a) )
ROM_LOAD("mpr-23740.ic1", 0x00800000, 0x01000000, CRC(e84f8611) SHA1(4b6f174cac37b6c50d2151e25bba52c87ac738fe) )
ROM_LOAD("mpr-23741.ic2", 0x01800000, 0x01000000, CRC(5fd84c54) SHA1(2913a1d67674de2cc0165ec0e7556288ca2ea6c6) )
ROM_LOAD("mpr-23742.ic3", 0x02800000, 0x01000000, CRC(240e1779) SHA1(ac25c217e9772d16465f26d1ad7f514d745e9ec2) )
ROM_LOAD("mpr-23743.ic4", 0x03800000, 0x01000000, CRC(d9dc0a12) SHA1(d374a09d6e7a94075720b137879e64daca197ef8) )
ROM_LOAD("mpr-23744.ic5", 0x04800000, 0x01000000, CRC(95759982) SHA1(e09c20d1acad55f8cfb38dfec7c55ec97165190c) )
ROM_LOAD("mpr-23745.ic6", 0x05800000, 0x01000000, CRC(0eda5807) SHA1(589aac6262dc4168793fd41bb88760123408328f) )
ROM_LOAD("mpr-23746.ic7", 0x06800000, 0x01000000, CRC(955bb184) SHA1(05436d4eed330bc0b71897650d9df601453cde6f) )
ROM_REGION(0x84, "some_eeprom", 0)
ROM_LOAD( "sflash.ic46", 0x000000, 0x000084, CRC(bfce576f) SHA1(c3aa638c280a12df71a09c55adc2b87c37cf4f90) )
ROM_REGION(0x84, "some_eeprom", 0)
ROM_LOAD( "sflash.ic46", 0x000000, 0x000084, CRC(bfce576f) SHA1(c3aa638c280a12df71a09c55adc2b87c37cf4f90) )
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_END
@ -10123,34 +10123,34 @@ ROM_END
/* Atomiswave */
GAME( 2001, awbios, 0, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Atomiswave Bios", GAME_FLAGS|MACHINE_IS_BIOS_ROOT )
// game "exe" build timestamps, shown in SYSTEM MENU -> TEST MODE
GAME( 2003, ggx15, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear X ver. 1.5", GAME_FLAGS) // none
GAME( 2003, sprtshot, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy USA", "Sports Shooting USA", GAME_FLAGS ) // May 02 2003 09:40:31
GAME( 2003, ggx15, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear X ver. 1.5", GAME_FLAGS) // none
GAME( 2003, sprtshot, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy USA", "Sports Shooting USA", GAME_FLAGS ) // May 02 2003 09:40:31
GAME( 2003, sushibar, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Sushi Bar", MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_SOUND )// May 23 2003 14:40:15
GAME( 2003, demofist, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Polygon Magic / Dimps", "Demolish Fist", GAME_FLAGS ) // Jun 02 2003 16:45:35
GAME( 2003, maxspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "SIMS / Sammy", "Maximum Speed", GAME_FLAGS ) // Jun 09 2003 10:20:37
GAME( 2003, dolphin, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dolphin Blue", GAME_FLAGS) // Jun 27 2003 09:00:03
GAME( 2003, kov7sprt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "IGS / Sammy", "Knights of Valour - The Seven Spirits", GAME_FLAGS) // Nov 24 2003 16:56:01
GAME( 2004, ggisuka, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear Isuka", GAME_FLAGS) // Jan 14 2004 10:04:24
GAME( 2004, rumblefp, rumblef, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish (prototype)", GAME_FLAGS) // Feb 20 2004 09:15:34
GAME( 2004, rangrmsn, awbios, aw2c, aw1w, atomiswave_state, atomiswave, ROT0, "RIZ Inc./ Sammy", "Ranger Mission", GAME_FLAGS ) // Mar 01 2004 19:08:15
GAME( 2004, rumblef, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish", GAME_FLAGS) // Mar 10 2004 19:07:43
GAME( 2004, salmankt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Yuki Enterprise / Sammy", "Net Select: Salaryman Kintaro", GAME_FLAGS ) // Jun 14 2004 22:50:03
GAME( 2004, kofnw, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, kofnwj, kofnw, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave (Japan)", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, ftspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "Sammy", "Faster Than Speed", GAME_FLAGS ) // Aug 24 2004 18:40:24
GAME( 2004, xtrmhunt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Extreme Hunting", GAME_FLAGS ) // Nov 23 2004 10:14:14
GAME( 2005, rumblf2p, rumblef2, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2 (prototype)", GAME_FLAGS ) // Jan 11 2005 14:31:05
GAME( 2005, anmlbskt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT270, "MOSS / Sammy", "Animal Basket", GAME_FLAGS ) // Jan 24 2005 14:12:29
GAME( 2005, vfurlong, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Progress / Sammy", "Net Select Horse Racing: Victory Furlong", GAME_FLAGS ) // Mar 02 2005 22:10:33
GAME( 2005, rumblef2, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2", GAME_FLAGS ) // Mar 04 2005 19:26:32
GAME( 2005, ngbc, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, ngbcj, ngbc, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum (Japan)", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, samsptk, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "Samurai Spirits Tenkaichi Kenkakuden", GAME_FLAGS ) // Aug 05 2005 16:43:48
GAME( 2005, kofxi, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters XI", GAME_FLAGS ) // Aug 07 2005 18:11:25
GAME( 2005, fotns, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sega", "Fist Of The North Star", GAME_FLAGS ) // Nov 28 2005 21:04:40
GAME( 2006, mslug6, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega / SNK Playmore", "Metal Slug 6", GAME_FLAGS) // Jan 13 2006 00:49:12
GAME( 2006, xtrmhnt2, awbios, aw2c, aw2c, atomiswave_state, xtrmhnt2, ROT0, "Sega", "Extreme Hunting 2", GAME_FLAGS ) // May 26 2006 14:03:22
GAME( 2006, dirtypig, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dirty Pigskin Football", GAME_FLAGS) // Sep 10 2006 20:24:14
GAME( 2008, claychal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Clay Challenge", GAME_FLAGS ) // Oct 15 2008 16:08:20
GAME( 2009, basschalo, basschal, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge", GAME_FLAGS ) // Feb 08 2009 22:35:34
GAME( 2009, basschal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge Version A", GAME_FLAGS ) // Jul 25 2009 16:27:40
GAME( 2003, demofist, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Polygon Magic / Dimps", "Demolish Fist", GAME_FLAGS ) // Jun 02 2003 16:45:35
GAME( 2003, maxspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "SIMS / Sammy", "Maximum Speed", GAME_FLAGS ) // Jun 09 2003 10:20:37
GAME( 2003, dolphin, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dolphin Blue", GAME_FLAGS) // Jun 27 2003 09:00:03
GAME( 2003, kov7sprt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "IGS / Sammy", "Knights of Valour - The Seven Spirits", GAME_FLAGS) // Nov 24 2003 16:56:01
GAME( 2004, ggisuka, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear Isuka", GAME_FLAGS) // Jan 14 2004 10:04:24
GAME( 2004, rumblefp, rumblef, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish (prototype)", GAME_FLAGS) // Feb 20 2004 09:15:34
GAME( 2004, rangrmsn, awbios, aw2c, aw1w, atomiswave_state, atomiswave, ROT0, "RIZ Inc./ Sammy", "Ranger Mission", GAME_FLAGS ) // Mar 01 2004 19:08:15
GAME( 2004, rumblef, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish", GAME_FLAGS) // Mar 10 2004 19:07:43
GAME( 2004, salmankt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Yuki Enterprise / Sammy", "Net Select: Salaryman Kintaro", GAME_FLAGS ) // Jun 14 2004 22:50:03
GAME( 2004, kofnw, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, kofnwj, kofnw, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave (Japan)", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, ftspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "Sammy", "Faster Than Speed", GAME_FLAGS ) // Aug 24 2004 18:40:24
GAME( 2004, xtrmhunt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Extreme Hunting", GAME_FLAGS ) // Nov 23 2004 10:14:14
GAME( 2005, rumblf2p, rumblef2, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2 (prototype)", GAME_FLAGS ) // Jan 11 2005 14:31:05
GAME( 2005, anmlbskt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT270, "MOSS / Sammy", "Animal Basket", GAME_FLAGS ) // Jan 24 2005 14:12:29
GAME( 2005, vfurlong, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Progress / Sammy", "Net Select Horse Racing: Victory Furlong", GAME_FLAGS ) // Mar 02 2005 22:10:33
GAME( 2005, rumblef2, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2", GAME_FLAGS ) // Mar 04 2005 19:26:32
GAME( 2005, ngbc, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, ngbcj, ngbc, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum (Japan)", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, samsptk, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "Samurai Spirits Tenkaichi Kenkakuden", GAME_FLAGS ) // Aug 05 2005 16:43:48
GAME( 2005, kofxi, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters XI", GAME_FLAGS ) // Aug 07 2005 18:11:25
GAME( 2005, fotns, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sega", "Fist Of The North Star", GAME_FLAGS ) // Nov 28 2005 21:04:40
GAME( 2006, mslug6, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega / SNK Playmore", "Metal Slug 6", GAME_FLAGS) // Jan 13 2006 00:49:12
GAME( 2006, xtrmhnt2, awbios, aw2c, aw2c, atomiswave_state, xtrmhnt2, ROT0, "Sega", "Extreme Hunting 2", GAME_FLAGS ) // May 26 2006 14:03:22
GAME( 2006, dirtypig, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dirty Pigskin Football", GAME_FLAGS) // Sep 10 2006 20:24:14
GAME( 2008, claychal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Clay Challenge", GAME_FLAGS ) // Oct 15 2008 16:08:20
GAME( 2009, basschalo, basschal, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge", GAME_FLAGS ) // Feb 08 2009 22:35:34
GAME( 2009, basschal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge Version A", GAME_FLAGS ) // Jul 25 2009 16:27:40

View File

@ -216,7 +216,7 @@ static INPUT_PORTS_START( pcfx )
PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_NAME("P1 Left")
PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(1) PORT_NAME("P1 Switch 1")
PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(1) PORT_NAME("P1 Switch 2")
PORT_BIT( 0x0fffa000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0fffa000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("P2")
PORT_BIT( 0xf0000000, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // ID unconnect

View File

@ -105,7 +105,7 @@ i/o ports:
85 PIO PORT B
bit 0-2 = light organ
bit 3-4 = control panel (not connected)
bit 3-4 = control panel (not connected)
bit 5-7 = sound parameter (not used on production units?)
86 PIO CTRL A
@ -189,38 +189,38 @@ WRITE8_MEMBER(polyplay_state::pio_portb_w)
switch (lightState)
{
case 0:
output().set_lamp_value(1, 1);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
output().set_lamp_value(1, 1);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
break;
case 1:
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 1);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 1);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
break;
case 2:
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 1);
output().set_lamp_value(4, 0);
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 1);
output().set_lamp_value(4, 0);
break;
case 3:
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 1);
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 1);
break;
default:
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
output().set_lamp_value(1, 0);
output().set_lamp_value(2, 0);
output().set_lamp_value(3, 0);
output().set_lamp_value(4, 0);
break;
}
}

View File

@ -39,7 +39,7 @@
shifted into the 74164 by clock from VIA CB1 and data from CB2.
Behind the BCD display we find the following supporting circuit
4x7 segment BCD display
+---+ +-----+ +---+---+---+---+
+-----------------+ CB1 |74 |==/4/=>|2x |==/8/====>| 0 1 2 3 |
@ -177,7 +177,7 @@ WRITE_LINE_MEMBER(prodigy_state::irq_handler)
*/
WRITE8_MEMBER( prodigy_state::via_pb_w ) // Needs to trace which port decides what digit
{
LOGBCD("%s: %02x ANODE %02x\n", FUNCNAME, data, data & 0x03);
LOGBCD("%s: %02x ANODE %02x\n", FUNCNAME, data, data & 0x03);
m_74145->write( data & 0x0f ); // Write PB0-PB3 to the 74145
}

View File

@ -942,8 +942,8 @@ Speak & Help
Single layer re-engineered pcb, very tidy and working.
All dumps are in label.location format, see the two
included photos for one of the pcb with and without the
All dumps are in label.location format, see the two
included photos for one of the pcb with and without the
speech? daughterboard plugged in for verification.
Roms are all mitsubishi 2716, proms are fujitsu MB7052.
@ -954,17 +954,17 @@ Unique speech, as detailed in video, seems will require additional work to emula
ROM_START( speakhlp )
ROM_REGION( 0x10000, "cpu1", 0 )
ROM_LOAD( "b1.56t", 0x0000, 0x0800, CRC(ce009d85) SHA1(d8683d358ff04ffa0eef574e42a8f3885f538ecc) )
ROM_LOAD( "b2.5t", 0x0800, 0x0800, CRC(935219f1) SHA1(83d41eb8af6dc5d44d578c01c123872e75fa927e) )
ROM_LOAD( "b3.45t", 0x1000, 0x0800, CRC(083c28de) SHA1(82e159f218f60e9c06ff78f2e52572f8f5a6c530) )
ROM_LOAD( "b4.4t", 0x1800, 0x0800, CRC(b0927e3b) SHA1(cc5f030dcbc93d5265dbf17a2425acdb921ab18b) )
ROM_LOAD( "b5.3t", 0x2000, 0x0800, CRC(ccd25c4e) SHA1(d6d5722d746dd22cecacfea407e798f4531eea99) )
ROM_LOAD( "b6.23t", 0x2800, 0x0800, CRC(a657dd4b) SHA1(4f6b85ccf5449d08f5c7f5dc6f59d0df276d9994) )
ROM_LOAD( "b1.56t", 0x0000, 0x0800, CRC(ce009d85) SHA1(d8683d358ff04ffa0eef574e42a8f3885f538ecc) )
ROM_LOAD( "b2.5t", 0x0800, 0x0800, CRC(935219f1) SHA1(83d41eb8af6dc5d44d578c01c123872e75fa927e) )
ROM_LOAD( "b3.45t", 0x1000, 0x0800, CRC(083c28de) SHA1(82e159f218f60e9c06ff78f2e52572f8f5a6c530) )
ROM_LOAD( "b4.4t", 0x1800, 0x0800, CRC(b0927e3b) SHA1(cc5f030dcbc93d5265dbf17a2425acdb921ab18b) )
ROM_LOAD( "b5.3t", 0x2000, 0x0800, CRC(ccd25c4e) SHA1(d6d5722d746dd22cecacfea407e798f4531eea99) )
ROM_LOAD( "b6.23t", 0x2800, 0x0800, CRC(a657dd4b) SHA1(4f6b85ccf5449d08f5c7f5dc6f59d0df276d9994) )
ROM_REGION( 0x10000, "cpu2", 0 )
ROM_LOAD( "b07.5b", 0x0000, 0x0800, CRC(c9317d91) SHA1(b509ce371d89ad39acaefea732eb955a11df1ed9) )
ROM_LOAD( "b09.4b", 0x1000, 0x0800, CRC(29310c32) SHA1(d5d5953111d81661ab98c950d94e5912fc907445) )
ROM_LOAD( "b010.3b", 0x1800, 0x0800, CRC(4d567bc9) SHA1(6bc05213042d9069a054b2ae044f04938a9bfe06) )
ROM_LOAD( "b07.5b", 0x0000, 0x0800, CRC(c9317d91) SHA1(b509ce371d89ad39acaefea732eb955a11df1ed9) )
ROM_LOAD( "b09.4b", 0x1000, 0x0800, CRC(29310c32) SHA1(d5d5953111d81661ab98c950d94e5912fc907445) )
ROM_LOAD( "b010.3b", 0x1800, 0x0800, CRC(4d567bc9) SHA1(6bc05213042d9069a054b2ae044f04938a9bfe06) )
ROM_REGION( 0x0200, "proms", 0 ) /* Intersil IM5623CPE proms compatible with 82s129 */
/* The upper 128 bytes are 0's, used by the hardware to blank the display */

View File

@ -32,8 +32,8 @@
1992 Tant-R (Korea) Sega ? C2
1992 Waku Waku Marine Sega 317-0140 C2
1993 SegaSonic Popcorn Shop Sega 317-0140 C2
1993 Sega Sonic Cosmo Fighter Sega 317-0140 C2
1994 PotoPoto (Japan) Sega 317-0218 C2
1993 Sega Sonic Cosmo Fighter Sega 317-0140 C2
1994 PotoPoto (Japan) Sega 317-0218 C2
1994 Stack Columns (Japan) Sega 317-0219 C2
1994 Stack Columns (World) Sega 317-0223 C2
1994 Ichidant-R (Japan) Sega 317-0224 C2

View File

@ -702,7 +702,7 @@ static INPUT_PORTS_START( thayers )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("W AMULET") PORT_CODE(KEYCODE_W)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z SPELL OF RELEASE") PORT_CODE(KEYCODE_Z)
PORT_START("ROW.2")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("3 DROP ITEM") PORT_CODE(KEYCODE_3)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("E BLACK MACE") PORT_CODE(KEYCODE_E)

View File

@ -151,7 +151,7 @@ protected:
WRITE_LINE_MEMBER(tmaster_state::blitter_irq_callback)
{
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
m_maincpu->set_input_line(2, state);
}

View File

@ -46,7 +46,7 @@ public:
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
DECLARE_VIDEO_START(dodgeman);
TILE_GET_INFO_MEMBER(get_dodgeman_bg_tile_info);
};

View File

@ -90,16 +90,16 @@ public:
DECLARE_READ8_MEMBER(intvkbd_periph_r);
DECLARE_WRITE8_MEMBER(intvkbd_periph_w);
bool m_printer_not_busy; // printer state
bool m_printer_no_paper; // printer state
bool m_printer_not_busy_enable; // printer interface state
bool m_printer_not_busy; // printer state
bool m_printer_no_paper; // printer state
bool m_printer_not_busy_enable; // printer interface state
int m_intvkbd_text_blanked;
int m_intvkbd_keyboard_col;
int m_tape_int_pending;
int m_tape_interrupts_enabled;
int m_tape_motor_mode;
DECLARE_DRIVER_INIT(intvecs);
DECLARE_DRIVER_INIT(intvkbd);
DECLARE_DRIVER_INIT(intv);

View File

@ -114,4 +114,4 @@
<bounds x="0" y="1" width="8" height="6" />
</screen>
</view>
</mamelayout>
</mamelayout>

View File

@ -56,7 +56,7 @@ void apple2_state::langcard_touch(offs_t offset)
//logerror("language card bankswitch read, offset: $c08%0x\n", offset);
// determine which flags to change
// determine which flags to change
mask = VAR_LCWRITE | VAR_LCRAM | VAR_LCRAM2;
val = 0;
@ -374,21 +374,21 @@ READ8_MEMBER(apple2_state::apple2_c080_r)
offset &= 0x7F;
slot = offset / 0x10;
if (slot == 0)
{
langcard_touch(offset);
return 0;
}
/* now identify the device */
slotdevice = m_a2bus->get_a2bus_card(slot);
/* and if we can, read from the slot */
if (slotdevice != nullptr)
{
return slotdevice->read_c0nx(space, offset % 0x10);
}
/* now identify the device */
slotdevice = m_a2bus->get_a2bus_card(slot);
/* and if we can, read from the slot */
if (slotdevice != nullptr)
{
return slotdevice->read_c0nx(space, offset % 0x10);
}
}
return 0;

View File

@ -122,7 +122,7 @@ void interpro_ioga_device::device_reset()
Timers
******************************************************************************/
READ32_MEMBER(interpro_ioga_device::timer1_r)
{
{
uint32_t result = m_timer1_count & IOGA_TIMER1_VMASK;
// set the start bit if the timer is currently enabled
@ -143,7 +143,7 @@ READ32_MEMBER(interpro_ioga_device::timer3_r)
else if (m_timer[3]->param())
result |= IOGA_TIMER3_EXPIRED;
return result;
return result;
}
void interpro_ioga_device::write_timer(int timer, uint32_t value, device_timer_id id)
@ -245,10 +245,10 @@ void interpro_ioga_device::device_timer(emu_timer &timer, device_timer_id id, in
// TODO: figure out what indicates dma write (memory -> device)
// TODO: implement multiple dma channels
// TODO: virtual memory?
if (!m_dma_channel[param].dma_active)
{
LOG_DMA("dma: transfer started, channel = %d, control 0x%08x, real address 0x%08x count 0x%08x\n",
LOG_DMA("dma: transfer started, channel = %d, control 0x%08x, real address 0x%08x count 0x%08x\n",
param, m_dma_channel[param].control, m_dma_channel[param].real_address, m_dma_channel[param].transfer_count);
m_dma_channel[param].dma_active = true;
}
@ -271,7 +271,7 @@ void interpro_ioga_device::device_timer(emu_timer &timer, device_timer_id id, in
// if there are no more bytes remaining, terminate the transfer
if (m_dma_channel[param].transfer_count == 0)
{
LOG_DMA("dma: transfer stopped, control 0x%08x, real address 0x%08x count 0x%08x\n",
LOG_DMA("dma: transfer stopped, control 0x%08x, real address 0x%08x count 0x%08x\n",
m_dma_channel[param].control, m_dma_channel[param].fdc_real_address, m_dma_channel[param].transfer_count);
if (param == IOGA_DMA_FLOPPY)
@ -434,10 +434,10 @@ IRQ_CALLBACK_MEMBER(interpro_ioga_device::inta_cb)
case IOGA_INTERRUPT_INTERNAL:
return m_int_vector[m_irq_current] & 0xff;
case IOGA_INTERRUPT_SOFT_LO:
case IOGA_INTERRUPT_SOFT_LO:
return 0x8f + m_irq_current * 0x10;
case IOGA_INTERRUPT_SOFT_HI:
case IOGA_INTERRUPT_SOFT_HI:
return m_softint_vector[m_irq_current] & 0xff;
}
break;
@ -572,7 +572,7 @@ WRITE8_MEMBER(interpro_ioga_device::softint_w)
}
WRITE8_MEMBER(interpro_ioga_device::nmictrl_w)
{
{
// save the existing value
uint8_t previous = m_nmictrl;
@ -614,9 +614,9 @@ void interpro_ioga_device::drq(int state, int channel)
/*
0x94: error address reg: expect 0x7f200000 after bus error (from dma virtual address)
0x98: error cycle type: expect 0x52f0 (after failed dma?)
0x5331 - forced berr with nmi/interrupts disabled?
0xc2f0
0x62f0
0x5331 - forced berr with nmi/interrupts disabled?
0xc2f0
0x62f0
*/
// TODO: 7.0266 - forced BERR not working

View File

@ -35,10 +35,10 @@
#define IOGA_TIMER1_EXPIRED 0x20000
// best guess for timer 3 is 12.5MHz based on typical value of 12500 for a delay of 1ms
#define IOGA_TIMER3_CLOCK XTAL_12_5MHz
#define IOGA_TIMER3_CLOCK XTAL_12_5MHz
#define IOGA_TIMER3_IRQ 1
#define IOGA_TIMER3_VMASK 0x3fffffff
#define IOGA_TIMER3_START 0x40000000
#define IOGA_TIMER3_START 0x40000000
#define IOGA_TIMER3_EXPIRED 0x80000000
#define IOGA_INTERRUPT_COUNT 19
@ -136,7 +136,7 @@ public:
DECLARE_READ32_MEMBER(timer2_r) { return m_timer_reg[2]; }
DECLARE_READ32_MEMBER(timer3_r);
DECLARE_WRITE32_MEMBER(timer_prescaler_w) {
DECLARE_WRITE32_MEMBER(timer_prescaler_w) {
// this logic satisfies prescaler tests, but fails timer prescaler tests
if ((data & 0x7fff) < 0x100 && (data & 0x7fff) != 0)
m_prescaler = (data ^ 0xffff0000);
@ -159,7 +159,7 @@ public:
DECLARE_WRITE8_MEMBER(softint_w);
DECLARE_READ8_MEMBER(nmictrl_r) { return m_nmictrl; }
DECLARE_WRITE8_MEMBER(nmictrl_w);
DECLARE_READ16_MEMBER(softint_vector_r) { return m_softint_vector[offset]; }
DECLARE_WRITE16_MEMBER(softint_vector_w);

View File

@ -69,8 +69,8 @@ WRITE16_MEMBER(interpro_mcga_device::write)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_reg[4] |= MCGA_ERROR_VALID;
// else
// m_reg[4] &= ~MCGA_ERROR_VALID;
// else
// m_reg[4] &= ~MCGA_ERROR_VALID;
default:
m_reg[offset] = data;

Some files were not shown because too many files have changed in this diff Show More