srcclean (nw)

This commit is contained in:
Vas Crabb 2017-02-19 10:42:13 +11:00
parent bc1065a311
commit 8f15315a52
111 changed files with 996 additions and 996 deletions

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@ -172,7 +172,7 @@
</dataarea>
<!-- The following are the levels and should be stored in z88 memory on the default device/directory, you don't
have to keep all 60 of them on the z88 just the ones you want to play and drag over more when required. -->
have to keep all 60 of them on the z88 just the ones you want to play and drag over more when required. -->
<dataarea name="ram01" size="2695">
<rom name="lemlevel.01" size="2695" crc="b3ddde7d" sha1="ac2a1d6cd5b121bc33d516bed0d9d4e37c74ece0" offset="0"/>

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@ -285,7 +285,7 @@ function dat.check(set, softlist)
local function parse_table(xml)
local total_size = 0
local s = { "local data = open('" .. xml.structure[1].file .. "', size)\nlocal offset = 1\nlocal arr = {}",
"local elem, bytes, offset, value, lastindex, output"}
"local elem, bytes, offset, value, lastindex, output"}
local fparam = {}
if xml.bitmask then
local bitmask = "local bitmask = {"

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@ -14,14 +14,14 @@ project "netlist"
kind (LIBTYPE)
if _OPTIONS["targetos"]=="windows" then
configuration { "mingw* or vs*" }
defines {
"UNICODE",
"_UNICODE",
"_WIN32_WINNT=0x0501",
"WIN32_LEAN_AND_MEAN",
"NOMINMAX",
}
configuration { "mingw* or vs*" }
defines {
"UNICODE",
"_UNICODE",
"_WIN32_WINNT=0x0501",
"WIN32_LEAN_AND_MEAN",
"NOMINMAX",
}
end
addprojectflags()
@ -62,13 +62,13 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/plib/plists.h",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.cpp",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
MAME_DIR .. "src/lib/netlist/plib/poptions.h",
MAME_DIR .. "src/lib/netlist/plib/pparser.cpp",
MAME_DIR .. "src/lib/netlist/plib/pparser.h",
MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
MAME_DIR .. "src/lib/netlist/plib/pstate.cpp",
MAME_DIR .. "src/lib/netlist/plib/pstate.h",
MAME_DIR .. "src/lib/netlist/plib/pstring.cpp",
@ -86,11 +86,11 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/analog/nld_bjt.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_fourterm.cpp",
MAME_DIR .. "src/lib/netlist/analog/nlid_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_switches.cpp",
MAME_DIR .. "src/lib/netlist/analog/nld_switches.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.cpp",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nlid_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_twoterm.h",
MAME_DIR .. "src/lib/netlist/analog/nld_opamps.cpp",
MAME_DIR .. "src/lib/netlist/analog/nld_opamps.h",

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@ -518,11 +518,11 @@ files {
configuration { "mingw*" }
linkoptions{
"-municode",
"-municode",
}
configuration { "vs*" }
flags {
"Unicode",
"Unicode",
}
configuration { "mingw*" or "vs*" }
@ -562,11 +562,11 @@ files {
configuration { "mingw*" }
linkoptions{
"-municode",
"-municode",
}
configuration { "vs*" }
flags {
"Unicode",
"Unicode",
}
configuration { "mingw*" or "vs*" }

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@ -2,55 +2,55 @@
// copyright-holders: F. Ulivi
/*********************************************************************
hp9895.cpp
hp9895.cpp
HP9895 floppy disk drive
HP9895 floppy disk drive
Phew, this one was tough!
Phew, this one was tough!
This is a dual 8" floppy disk drive that interfaces through
HPIB/IEEE-488 bus. It implements the so-called "Amigo" command
set.
This is a dual 8" floppy disk drive that interfaces through
HPIB/IEEE-488 bus. It implements the so-called "Amigo" command
set.
Its main components are:
* A Z80A CPU @ 4 MHz with 8 kB of firmware ROM and 1 kB of
static RAM
* A HP PHI chip that interfaces CPU to HPIB bus
* A disk controller implemented with a lot of discrete TTLs
* 2 MPI 8" disk drives
Its main components are:
* A Z80A CPU @ 4 MHz with 8 kB of firmware ROM and 1 kB of
static RAM
* A HP PHI chip that interfaces CPU to HPIB bus
* A disk controller implemented with a lot of discrete TTLs
* 2 MPI 8" disk drives
Data I/O with the disk is carried out through 2 shift registers,
one for data bits (@ 0x60 address) and one for clock bits (@ 0x61
address). CPU is stalled by setting WAIT/ to 0 whenever it accesses
the data register and the hw is not ready for the byte. Once
the next byte boundary is reached (the SDOK signal activates) the
CPU is released and either the data byte is read from shift register
or written into it. At the same time clock shift register is
copied into clock register when reading or viceversa when writing.
Data I/O with the disk is carried out through 2 shift registers,
one for data bits (@ 0x60 address) and one for clock bits (@ 0x61
address). CPU is stalled by setting WAIT/ to 0 whenever it accesses
the data register and the hw is not ready for the byte. Once
the next byte boundary is reached (the SDOK signal activates) the
CPU is released and either the data byte is read from shift register
or written into it. At the same time clock shift register is
copied into clock register when reading or viceversa when writing.
The 9895 drive can operate in 2 modes: HP/High density or IBM/low
density. This table summarizes the differences between the modes.
See also page 2-12 of service manual.
The 9895 drive can operate in 2 modes: HP/High density or IBM/low
density. This table summarizes the differences between the modes.
See also page 2-12 of service manual.
| Characteristic | HP mode | IBM mode |
|----------------+----------+-----------|
| Bit cell size | 2 µs | 4 µs |
| Modulation | MMFM | FM |
| Bit order | LS first | MS first |
| Sync bytes | 4x FF | 6x 00 |
| Formatted size | 1155 kB | 250.25 kB |
| Characteristic | HP mode | IBM mode |
|----------------+----------+-----------|
| Bit cell size | 2 µs | 4 µs |
| Modulation | MMFM | FM |
| Bit order | LS first | MS first |
| Sync bytes | 4x FF | 6x 00 |
| Formatted size | 1155 kB | 250.25 kB |
Reference manual:
HP 09895-90030, feb 81, 9895A Flexible Disc Memory Service Manual
Reference manual:
HP 09895-90030, feb 81, 9895A Flexible Disc Memory Service Manual
Reference manual for the floppy drives:
Magnetic Peripherals, inc., feb 83, 9406-4 Flexible Disk Drive
Hardware Maintenance Manual
Reference manual for the floppy drives:
Magnetic Peripherals, inc., feb 83, 9406-4 Flexible Disk Drive
Hardware Maintenance Manual
TODO/Issues:
* floppy_image_device sometimes reports the wrong state for wpt
signal
* IBM mode hasn't been tested yet
TODO/Issues:
* floppy_image_device sometimes reports the wrong state for wpt
signal
* IBM mode hasn't been tested yet
*********************************************************************/
@ -69,51 +69,51 @@
#define BIT_SET(w , n) ((w) |= BIT_MASK(n))
// Bits in RESET register
#define REG_RESET_TIMEOUT_START_BIT 0 // Start TIMEOUT oneshot (1)
#define REG_RESET_OVERUN_CLEAR_BIT 1 // Clear OVERUN (sic) (1)
#define REG_RESET_PROGRES_BIT 3 // PROGRES (1)
#define REG_RESET_TIMEOUT_START_BIT 0 // Start TIMEOUT oneshot (1)
#define REG_RESET_OVERUN_CLEAR_BIT 1 // Clear OVERUN (sic) (1)
#define REG_RESET_PROGRES_BIT 3 // PROGRES (1)
// Bits in CNTL register
#define REG_CNTL_READON_BIT 1 // Enable reading (1)
#define REG_CNTL_WRITON_BIT 2 // Enable writing (1)
#define REG_CNTL_WRITDRV_BIT 3 // Enable writing to floppy (1)
#define REG_CNTL_CRCOUT_BIT 4 // Enable output of CRC word (1)
#define REG_CNTL_CRCON_BIT 5 // Enable updating of CRC word (1) or preset CRC to 0xffff (0)
#define REG_CNTL_READON_BIT 1 // Enable reading (1)
#define REG_CNTL_WRITON_BIT 2 // Enable writing (1)
#define REG_CNTL_WRITDRV_BIT 3 // Enable writing to floppy (1)
#define REG_CNTL_CRCOUT_BIT 4 // Enable output of CRC word (1)
#define REG_CNTL_CRCON_BIT 5 // Enable updating of CRC word (1) or preset CRC to 0xffff (0)
// Bits in DRV register
#define REG_DRV_STEP_BIT 0 // Step pulse to drive (1)
#define REG_DRV_MOVEIN_BIT 1 // Move heads inward (1)
#define REG_DRV_MGNENA_BIT 2 // Enable checking of bit cell margins (1)
#define REG_DRV_IN_USE_BIT 3 // "In use" signal to drive (1)
#define REG_DRV_LOWCURR_BIT 4 // Reduce write current in inner tracks (1)
#define REG_DRV_HEADSEL_BIT 7 // Head selection (1 = Head 1)
#define REG_DRV_STEP_BIT 0 // Step pulse to drive (1)
#define REG_DRV_MOVEIN_BIT 1 // Move heads inward (1)
#define REG_DRV_MGNENA_BIT 2 // Enable checking of bit cell margins (1)
#define REG_DRV_IN_USE_BIT 3 // "In use" signal to drive (1)
#define REG_DRV_LOWCURR_BIT 4 // Reduce write current in inner tracks (1)
#define REG_DRV_HEADSEL_BIT 7 // Head selection (1 = Head 1)
// Bits in XV register
#define REG_XV_DRIVE3_BIT 0 // Select drive #3 (1)
#define REG_XV_DRIVE2_BIT 1 // Select drive #2 (1)
#define REG_XV_DRIVE1_BIT 2 // Select drive #1 (1)
#define REG_XV_DRIVE0_BIT 3 // Select drive #0 (1)
#define REG_XV_HIDEN_BIT 4 // Select HP/High density mode (1) or IBM/Low density mode (0)
#define REG_XV_PRECMP_BIT 5 // Enable pre-compensation
#define REG_XV_DRIVE3_BIT 0 // Select drive #3 (1)
#define REG_XV_DRIVE2_BIT 1 // Select drive #2 (1)
#define REG_XV_DRIVE1_BIT 2 // Select drive #1 (1)
#define REG_XV_DRIVE0_BIT 3 // Select drive #0 (1)
#define REG_XV_HIDEN_BIT 4 // Select HP/High density mode (1) or IBM/Low density mode (0)
#define REG_XV_PRECMP_BIT 5 // Enable pre-compensation
// Bits in DRIVSTAT register
#define REG_DRIVSTAT_INDEX_BIT 0 // Index pulse from drive (1)
#define REG_DRIVSTAT_DISCHNG_BIT 1 // Disk changed (1)
#define REG_DRIVSTAT_TRACK0_BIT 2 // Heads on track #0 (1)
#define REG_DRIVSTAT_WRPROT_BIT 3 // Disk is write-protected (1)
#define REG_DRIVSTAT_READY_BIT 4 // Disk is ready (1)
#define REG_DRIVSTAT_CRCERR_BIT 5 // Error in CRC (1)
#define REG_DRIVSTAT_OVERUN_BIT 6 // I/O overrun between disk and CPU (1)
#define REG_DRIVSTAT_TWOSIDE_BIT 7 // 2-sided disk (1)
#define REG_DRIVSTAT_INDEX_BIT 0 // Index pulse from drive (1)
#define REG_DRIVSTAT_DISCHNG_BIT 1 // Disk changed (1)
#define REG_DRIVSTAT_TRACK0_BIT 2 // Heads on track #0 (1)
#define REG_DRIVSTAT_WRPROT_BIT 3 // Disk is write-protected (1)
#define REG_DRIVSTAT_READY_BIT 4 // Disk is ready (1)
#define REG_DRIVSTAT_CRCERR_BIT 5 // Error in CRC (1)
#define REG_DRIVSTAT_OVERUN_BIT 6 // I/O overrun between disk and CPU (1)
#define REG_DRIVSTAT_TWOSIDE_BIT 7 // 2-sided disk (1)
// Bits in SWITCHES(2) registers
#define REG_SWITCHES_HPIB_ADDR_SHIFT 0 // LSB of HPIB address
#define REG_SWITCHES_HPIB_ADDR_MASK 7 // Mask of HPIB address
#define REG_SWITCHES_W_TEST_BIT 3 // "W" test push-button (1)
#define REG_SWITCHES_S_TEST_BIT 4 // "S" test push-button (1)
#define REG_SWITCHES_LOOP_BIT 5 // Test loop option (1)
#define REG_SWITCHES_TIMEOUT_BIT 6 // TIMEOUT (1)
#define REG_SWITCHES_AMDT_BIT 7 // Address mark detected (1)
#define REG_SWITCHES_HPIB_ADDR_SHIFT 0 // LSB of HPIB address
#define REG_SWITCHES_HPIB_ADDR_MASK 7 // Mask of HPIB address
#define REG_SWITCHES_W_TEST_BIT 3 // "W" test push-button (1)
#define REG_SWITCHES_S_TEST_BIT 4 // "S" test push-button (1)
#define REG_SWITCHES_LOOP_BIT 5 // Test loop option (1)
#define REG_SWITCHES_TIMEOUT_BIT 6 // TIMEOUT (1)
#define REG_SWITCHES_AMDT_BIT 7 // Address mark detected (1)
// Timers
enum {
@ -123,11 +123,11 @@ enum {
};
// Timings
#define TIMEOUT_MSEC 450 // Timeout duration (ms)
#define HPMODE_BIT_FREQ 500000 // HP-mode bit frequency (Hz)
#define IBMMODE_BIT_FREQ 250000 // IBM-mode bit frequency (Hz)
#define TIMEOUT_MSEC 450 // Timeout duration (ms)
#define HPMODE_BIT_FREQ 500000 // HP-mode bit frequency (Hz)
#define IBMMODE_BIT_FREQ 250000 // IBM-mode bit frequency (Hz)
#define MIN_SYNC_BITS 29 // Number of bits to synchronize
#define MIN_SYNC_BITS 29 // Number of bits to synchronize
// device type definition
const device_type HP9895 = &device_creator<hp9895_device>;
@ -225,7 +225,7 @@ void hp9895_device::device_reset()
m_data_sr = 0;
m_wr_context = 0;
m_had_transition = false;
m_lckup = true; // Because READON = 0
m_lckup = true; // Because READON = 0
m_amdt = false;
m_sync_cnt = 0;
m_hiden = false;
@ -819,11 +819,11 @@ void hp9895_device::write_bit(bool data_bit , bool clock_bit)
if (m_hiden) {
// **** HP mode ****
// m_wr_context delays data bits by 2 bit cells
// Bit Content
// Bit Content
// ============
// 2 Data @ t-2
// 1 Data @ t-1
// 0 Data @ t
// 2 Data @ t-2
// 1 Data @ t-1
// 0 Data @ t
m_wr_context = (m_wr_context << 1) | data_bit;
data_bit = BIT(m_wr_context , 2);
clock_bit = !data_bit && (clock_bit || !m_had_transition);

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@ -92,20 +92,20 @@ private:
floppy_image_device *m_current_drive;
unsigned m_current_drive_idx;
bool m_dskchg[ 2 ];
uint16_t m_crc; // U77
uint16_t m_crc; // U77
bool m_crcerr_syn;
bool m_overrun;
bool m_accdata;
bool m_timeout;
uint8_t m_cntl_reg; // U31
uint8_t m_clock_sr; // U22 & U4
uint8_t m_clock_reg; // U23 & U5
uint8_t m_data_sr; // U24 & U6
uint8_t m_cntl_reg; // U31
uint8_t m_clock_sr; // U22 & U4
uint8_t m_clock_reg; // U23 & U5
uint8_t m_data_sr; // U24 & U6
uint8_t m_wr_context;
bool m_had_transition;
bool m_lckup;
bool m_amdt;
uint8_t m_sync_cnt; // U28 & U73
uint8_t m_sync_cnt; // U28 & U73
bool m_hiden;
bool m_mgnena;

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@ -19,7 +19,7 @@
#define VIDEORAM_SIZE 0x800
#define RAM_SIZE 0x10000
#define MC6845_TAG "mc6845"
#define MC6845_TAG "mc6845"
#define MC6845_SCREEN_TAG "screen80"
@ -314,14 +314,14 @@ void vic20_video_pak_t::vic20_cd_w(address_space &space, offs_t offset, uint8_t
case 0x1bfc:
/*
bit description
bit description
0 0 = upper case, 1 = lower case
1 bank size: 0 = 2x24KB, 1 = 4x16KB
2 16KB mode address LSB
3 memory address MSB
4 0 = enable RAM, 1 = disable RAM
5 0 = 40 columns, 1 = 80 columns (Data 20 Video Manager)
0 0 = upper case, 1 = lower case
1 bank size: 0 = 2x24KB, 1 = 4x16KB
2 16KB mode address LSB
3 memory address MSB
4 0 = enable RAM, 1 = disable RAM
5 0 = 40 columns, 1 = 80 columns (Data 20 Video Manager)
*/

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@ -172,7 +172,7 @@ public:
enum vme_amod_t
{ // Defined and User Defined Address Modifier Values (long bnames from VME standard text. please use short)
AMOD_EXTENDED_NON_PRIV_DATA = 0x09, //A32 SC (Single Cycle)
A32_SC = 0x09, //A32 SC (Single Cycle)
A32_SC = 0x09, //A32 SC (Single Cycle)
AMOD_EXTENDED_NON_PRIV_PRG = 0x0A,
AMOD_EXTENDED_NON_PRIV_BLK = 0x0B,
AMOD_EXTENDED_SUPERVIS_DATA = 0x0D,
@ -192,7 +192,7 @@ public:
AMOD_STANDARD_SUPERVIS_BLK = 0x3F
};
void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask);
// void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
// void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask);
void install_device(vme_amod_t amod, offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask);
@ -240,11 +240,11 @@ public:
};
#define MCFG_VME_SLOT_ADD(_tag, _slotnbr, _slot_intf,_def_slot) \
{ std::string stag = "slot" + std::to_string(_slotnbr); \
MCFG_DEVICE_ADD(stag.c_str(), VME_SLOT, 0); \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false); \
{ std::string stag = "slot" + std::to_string(_slotnbr); \
MCFG_DEVICE_ADD(stag.c_str(), VME_SLOT, 0); \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false); \
vme_slot_device::static_set_vme_slot(*device, _tag, stag.c_str()); \
vme_slot_device::static_update_vme_chains(*device, _slotnbr); \
vme_slot_device::static_update_vme_chains(*device, _slotnbr); \
}
#define MCFG_VME_SLOT_REMOVE(_tag) \

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@ -348,7 +348,7 @@ machine_config_constructor vme_fccpu20_device::device_mconfig_additions() const
switch (m_board_id)
{
case cpu20: return MACHINE_CONFIG_NAME( fccpu20 ); break;
case cpu20: return MACHINE_CONFIG_NAME( fccpu20 ); break;
case cpu21a: return MACHINE_CONFIG_NAME( fccpu21a ); break;
case cpu21ya: return MACHINE_CONFIG_NAME( fccpu21ya ); break;
case cpu21b: return MACHINE_CONFIG_NAME( fccpu21b ); break;
@ -435,7 +435,7 @@ void vme_fccpu20_device::device_start()
save_pointer (NAME (m_sysrom), sizeof(m_sysrom));
save_pointer (NAME (m_sysram), sizeof(m_sysram));
// save_item(NAME(m_board_id)); // TODO: Save this "non base type" item
// save_item(NAME(m_board_id)); // TODO: Save this "non base type" item
/* TODO: setup this RAM from (not yet) optional SRAM-2x board and also support 2MB versions */
//m_maincpu->space(AS_PROGRAM).install_ram(0x80000, m_ram->size() + 0x7ffff, m_ram->pointer());
@ -609,7 +609,7 @@ const tiny_rom_entry *vme_fccpu20_device::device_rom_region() const
switch (m_board_id)
{
case cpu20: return ROM_NAME( fccpu20 ); break;
case cpu20: return ROM_NAME( fccpu20 ); break;
case cpu21a: return ROM_NAME( fccpu21a ); break;
case cpu21ya: return ROM_NAME( fccpu21ya ); break;
case cpu21b: return ROM_NAME( fccpu21b ); break;

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@ -36,7 +36,7 @@ enum fc_board_t {
//**************************************************************************
// Base Device declaration
//**************************************************************************
class vme_fccpu20_device : public device_t, public device_vme_card_interface
class vme_fccpu20_device : public device_t, public device_vme_card_interface
{
public:
vme_fccpu20_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, fc_board_t board_id);
@ -68,10 +68,10 @@ private:
required_device<mpcc68561_device> m_mpcc3;
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
uint32_t *m_sysrom;
uint32_t m_sysram[2];
void update_irq_to_maincpu();
fc_board_t m_board_id;
uint32_t *m_sysrom;
uint32_t m_sysram[2];
void update_irq_to_maincpu();
fc_board_t m_board_id;
// Below replaces machine_start and machine_reset from src/mame/drivers/fccpu20.cpp
protected:

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@ -171,7 +171,7 @@ void vme_mzr8300_card_device::device_start()
/* Setup r/w handlers for first SIO in A16 */
uint32_t base = 0xFF0000;
// m_vme->static_set_custom_spaces(*this);
// m_vme->static_set_custom_spaces(*this);
m_vme->install_device(vme_device::A16_SC, base + 0, base + 1, // Channel B - Data
read8_delegate(FUNC(z80sio_device::db_r), subdevice<z80sio_device>("sio0")),

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@ -71,7 +71,7 @@ enum clipper_psw
PSW_EFI = 0x00002000, // enable floating invalid operation trap
PSW_EFT = 0x00004000, // enable floating trap
PSW_FR = 0x00018000, // floating rounding mode (2 bits)
// unused (3 bits)
// unused (3 bits)
PSW_DSP = 0x00300000, // c400 - delay slot pointer (2 bits)
PSW_BIG = 0x00400000, // c400 - big endian (hardware)
PSW_T = 0x00800000, // trace trap
@ -85,7 +85,7 @@ enum clipper_ssw
SSW_IL = 0x000000f0, // interrupt level (4 bits)
SSW_EI = 0x00000100, // enable interrupts
SSW_ID = 0x0001fe00, // cpu rev # and type (8 bits)
// unused (5 bits)
// unused (5 bits)
SSW_FRD = 0x00400000, // floating registers dirty
SSW_TP = 0x00800000, // trace trap pending
SSW_ECM = 0x01000000, // enabled corrected memory error

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@ -2780,7 +2780,7 @@ inline void sh34_base_device::FMOVFR(const uint16_t opcode)
{
uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_sz == 0) { /* SZ = 0 */
if (m_fpu_sz == 0) { /* SZ = 0 */
#ifdef LSB_FIRST
n ^= m_fpu_pr;
m ^= m_fpu_pr;

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@ -4,11 +4,11 @@
Toshiba TLCS-870 Series MCUs
The TLCS-870/X expands on this instruction set using the same base encoding.
The TLCS-870/X expands on this instruction set using the same base encoding.
The TLCS-870/C appears to have a completely different encoding.
The TLCS-870/C appears to have a completely different encoding.
loosely baesd on the tlcs90 core by Luca Elia
loosely baesd on the tlcs90 core by Luca Elia
*************************************************************************************************************/
@ -1663,7 +1663,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
// b0 & 4 would be invalid?
m_param1_type = STACKPOINTER;
// m_param1 = 0;
// m_param1 = 0;
break;
@ -1677,7 +1677,7 @@ void tlcs870_device::decode_register_prefix(uint8_t b0)
// b0 & 4 would be invalid?
m_param2_type = STACKPOINTER;
// m_param2 = 0;
// m_param2 = 0;
break;
case 0xfc:
@ -2669,13 +2669,13 @@ void tlcs870_device::execute_run()
break;
/*
case DI:
break;
break;
*/
case DIV:
break;
/*
case EI:
break;
break;
*/
case INC:
{
@ -2730,7 +2730,7 @@ void tlcs870_device::execute_run()
}
/*
case J:
break;
break;
*/
case JP:
case JR:
@ -2798,7 +2798,7 @@ void tlcs870_device::execute_run()
else
{
fatalerror("8-bit jump destination?");
// val = RM8(addr);
// val = RM8(addr);
}
}
else
@ -2938,15 +2938,15 @@ void tlcs870_device::execute_run()
if (m_param1_type & ADDR_IN_BASE)
{
addr = get_addr(m_param1_type,m_param1);
if (m_param1_type & IS16BIT)
WM16(addr, val);
else
WM8(addr, val);
addr = get_addr(m_param1_type,m_param1);
if (m_param1_type & IS16BIT)
WM16(addr, val);
else
WM8(addr, val);
}
else
{
set_dest_val(m_param1_type,m_param1, val);
set_dest_val(m_param1_type,m_param1, val);
}
*/
@ -2964,7 +2964,7 @@ void tlcs870_device::execute_run()
break;
/*
case TEST:
break;
break;
*/
case XCH:
break;
@ -3194,7 +3194,7 @@ void tlcs870_device::state_export(const device_state_entry &entry)
void tlcs870_device::device_start()
{
// int i, p;
// int i, p;
m_sp.d = 0x0000;
m_F = 0;

View File

@ -429,8 +429,8 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
// Shift in also on the last flanks
if (m_shift_counter == 0)
{
m_shift_state = SHIFTER_FINISH;
m_shift_timer->adjust(clocks_to_attotime(1));
m_shift_state = SHIFTER_FINISH;
m_shift_timer->adjust(clocks_to_attotime(1));
}
}
}
@ -714,7 +714,7 @@ READ8_MEMBER( via6522_device::read )
break;
}
LOGR(" * %s Reg %02x -> %02x - %s\n", tag(), offset, val, std::array<char const *, 16>
{{"IRB", "IRA", "DDRB", "DDRA", "T1CL","T1CH","T1LL","T1LH","T2CL","T2CH","SR","ACR","PCR","IFR","IER","IRA (nh)"}}[offset]);
{{"IRB", "IRA", "DDRB", "DDRA", "T1CL","T1CH","T1LL","T1LH","T2CL","T2CH","SR","ACR","PCR","IFR","IER","IRA (nh)"}}[offset]);
return val;
}

View File

@ -209,10 +209,10 @@ private:
uint8_t m_shift_counter;
enum m_shift_state_t
{
SHIFTER_IDLE,
SHIFTER_SHIFT,
SHIFTER_FINISH,
SHIFTER_IRQ
SHIFTER_IDLE,
SHIFTER_SHIFT,
SHIFTER_FINISH,
SHIFTER_IRQ
};
m_shift_state_t m_shift_state;
};

View File

@ -157,19 +157,19 @@ protected:
void trigger_interrupt(int source);
enum
{
INT_TX, // TX int category, used for update of SR
INT_TX, // TX int category, used for update of SR
INT_TX_TDRA, // Tx char available
INT_TX_TFC, // Tx frame complete
INT_TX_TUNRN, // Tx underrun detected
INT_TX_TFERR, // Tx frame error detected
INT_RX, // RX int category, used for update of SR
INT_RX, // RX int category, used for update of SR
INT_RX_RDA, // Rx interrupt on Receiver Data Available
INT_RX_EOF, // Rx interrupt on End of frame
INT_RX_CPERR, // Rx interrupt on CRC or Parity error
INT_RX_FRERR, // Rx interrupt on Frame error
INT_RX_ROVRN, // Rx interrupt on Receiver overrun
INT_RX_RAB, // Rx interrupt on Abort/Break
INT_SR, // SR int category, used for update of SR
INT_SR, // SR int category, used for update of SR
INT_SR_CTS, // Serial interface interrupt on CTS asserted
INT_SR_DSR, // Serial interface interrupt on DSR asserted
INT_SR_DCD, // Serial interface interrupt on DCD asserted

View File

@ -82,7 +82,7 @@ akiko_device::akiko_device(const machine_config &mconfig, const char *tag, devic
m_frame_timer(nullptr),
m_cdrom_is_device(0),
m_mem_r(*this), m_mem_w(*this), m_int_w(*this),
m_scl_w(*this), m_sda_r(*this), m_sda_w(*this)
m_scl_w(*this), m_sda_r(*this), m_sda_w(*this)
{
for (int i = 0; i < 8; i++)
{

View File

@ -24,7 +24,7 @@ void fdc_pll_t::set_clock(const attotime &_period)
void fdc_pll_t::reset(const attotime &when)
{
read_reset(when);
read_reset(when);
write_position = 0;
write_start_time = attotime::never;
}
@ -61,9 +61,9 @@ void fdc_pll_t::commit(floppy_image_device *floppy, const attotime &tm)
int fdc_pll_t::get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit)
{
attotime edge = floppy ? floppy->get_next_transition(ctime) : attotime::never;
attotime edge = floppy ? floppy->get_next_transition(ctime) : attotime::never;
return feed_read_data(tm , edge , limit);
return feed_read_data(tm , edge , limit);
}
int fdc_pll_t::feed_read_data(attotime &tm, const attotime& edge, const attotime &limit)

View File

@ -20,9 +20,9 @@ public:
void set_clock(const attotime &period);
void reset(const attotime &when);
void read_reset(const attotime &when);
void read_reset(const attotime &when);
int get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit);
int feed_read_data(attotime &tm, const attotime& edge, const attotime &limit);
int feed_read_data(attotime &tm, const attotime& edge, const attotime &limit);
bool write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit);
void start_writing(const attotime &tm);
void commit(floppy_image_device *floppy, const attotime &tm);

View File

@ -126,9 +126,9 @@ void c352_device::fetch_sample(c352_voice_t* v)
void c352_device::ramp_volume(c352_voice_t* v,int ch,uint8_t val)
{
int16_t vol_delta = v->curr_vol[ch] - val;
if(vol_delta != 0)
v->curr_vol[ch] += (vol_delta>0) ? -1 : 1;
int16_t vol_delta = v->curr_vol[ch] - val;
if(vol_delta != 0)
v->curr_vol[ch] += (vol_delta>0) ? -1 : 1;
}
void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)

View File

@ -117,7 +117,7 @@ WRITE16_MEMBER(cesblit_device::regs_w)
switch (offset)
{
// case 0x00/2: // bit 15: FPGA programming serial in (lsb first)
// case 0x00/2: // bit 15: FPGA programming serial in (lsb first)
case 0x10/2:
if (!m_blit_irq_cb.isnull() && !BIT(olddata, 3) && BIT(newdata, 3))

View File

@ -19,7 +19,7 @@
MCFG_DEVICE_ADD(_tag, CESBLIT, _clock) \
MCFG_VIDEO_SET_SCREEN(_screen)
#define MCFG_CESBLIT_MAP MCFG_DEVICE_PROGRAM_MAP
#define MCFG_CESBLIT_MAP MCFG_DEVICE_PROGRAM_MAP
#define MCFG_CESBLIT_COMPUTE_ADDR(_compute_addr) \
cesblit_device::static_set_compute_addr(*device, _compute_addr);
@ -33,7 +33,7 @@
// ======================> cesblit_device
class cesblit_device : public device_t,
class cesblit_device : public device_t,
public device_video_interface,
public device_memory_interface
{
@ -44,7 +44,7 @@ public:
cesblit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration
void set_compute_addr(compute_addr_t compute_addr) { m_compute_addr = compute_addr; }
void set_compute_addr(compute_addr_t compute_addr) { m_compute_addr = compute_addr; }
static void static_set_compute_addr(device_t &device, compute_addr_t compute_addr) { downcast<cesblit_device &>(device).set_compute_addr(compute_addr); }
template<class _Object> static devcb_base &static_set_irq_callback(device_t &device, _Object object) { return downcast<cesblit_device &>(device).m_blit_irq_cb.set_callback(object); }
@ -65,7 +65,7 @@ protected:
address_space_config m_space_config;
address_space *m_space;
devcb_write_line m_blit_irq_cb; // blit finished irq
devcb_write_line m_blit_irq_cb; // blit finished irq
bitmap_ind16 m_bitmap[2][2];
uint16_t m_regs[0x12/2];

View File

@ -70,9 +70,9 @@ const address_space_config *huc6271_device::memory_space_config(address_spacenum
{
switch(spacenum)
{
// case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
// case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
}
}

View File

@ -4,8 +4,8 @@
Hudson/NEC HuC6272 "King" device
TODO:
- Use NSCSI instead of legacy one!
TODO:
- Use NSCSI instead of legacy one!
***************************************************************************/
@ -99,9 +99,9 @@ const address_space_config *huc6272_device::memory_space_config(address_spacenum
{
switch(spacenum)
{
case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
case AS_PROGRAM: return &m_program_space_config;
case AS_DATA: return &m_data_space_config;
default: return nullptr;
}
}

View File

@ -94,7 +94,7 @@ private:
const address_space_config m_program_space_config;
const address_space_config m_data_space_config;
required_shared_ptr<uint16_t> m_microprg_ram;
required_shared_ptr<uint16_t> m_microprg_ram;
required_shared_ptr<uint32_t> m_kram_page0;
required_shared_ptr<uint32_t> m_kram_page1;
required_device<SCSI_PORT_DEVICE> m_scsibus;

View File

@ -273,7 +273,7 @@ int tms9927_device::cursor_bounds(rectangle &bounds)
void tms9927_device::recompute_parameters(bool postload)
{
attoseconds_t refresh;
attoseconds_t refresh;
rectangle visarea;
if (m_reset)
@ -312,7 +312,7 @@ void tms9927_device::recompute_parameters(bool postload)
/* create a visible area */
visarea.set(0, m_overscan_left + m_visible_hpix + m_overscan_right - 1,
0, m_overscan_top + m_visible_vpix + m_overscan_bottom - 1);
0, m_overscan_top + m_visible_vpix + m_overscan_bottom - 1);
refresh = HZ_TO_ATTOSECONDS(m_clock) * m_total_hpix * m_total_vpix;

View File

@ -568,7 +568,7 @@ void cli_frontend::listroms(const char *gamename)
osd_printf_info("\n");
first = false;
osd_printf_info("ROMs required for driver \"%s\".\n"
"%-32s %10s %s\n",drivlist.driver().name, "Name", "Size", "Checksum");
"%-32s %10s %s\n",drivlist.driver().name, "Name", "Size", "Checksum");
// iterate through roms
for (device_t &device : device_iterator(drivlist.config()->root_device()))

View File

@ -2,9 +2,9 @@
// copyright-holders:Sergey Svishchev
/*********************************************************************
formats/ms0515_dsk.cpp
formats/ms0515_dsk.cpp
ms0515 format
ms0515 format
*********************************************************************/

View File

@ -95,7 +95,7 @@ private:
* | | KF | flicker-noise coefficient | - | 0 | | |
* | | AF | flicker-noise exponent | - | 1 | | |
* | | FC | coefficient for forward-bias depletion capacitance formula | - | 0.5 | | |
* | | TNOM | Parameter measurement temperature | C | 27 | 50 | | */
* | | TNOM | Parameter measurement temperature | C | 27 | 50 | | */
class bjt_model_t : public param_model_t
{

4
src/lib/netlist/devices/nlid_truthtable.cpp Executable file → Normal file
View File

@ -391,8 +391,8 @@ void truthtable_parser::parse(const std::vector<pstring> &truthtable, uint_least
/*
* FIXME: evaluation of outputs should be done in parseline to
* enable the use of inputs for output values, i.e. "I1" or "~I1"
* in addition to "0" and "1".
* enable the use of inputs for output values, i.e. "I1" or "~I1"
* in addition to "0" and "1".
*/
for (unsigned j=0; j<m_NO; j++)
{

View File

@ -612,13 +612,13 @@ static NETLIST_START(TTL_74279_DIP)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.R, /* 1R |1 ++ 16| VCC */ VCC.I,
DIPPINS( /* +--------------+ */
s1.R, /* 1R |1 ++ 16| VCC */ VCC.I,
s1.S1, /* 1S1 |2 15| 4S */ s4.S,
s1.S2, /* 1S2 |3 14| 4R */ s4.R,
s1.Q, /* 1Q |4 74279 13| 4Q */ s4.Q,
s2.R, /* 2R |5 12| 3S2 */ s3.S2,
s2.S, /* 2S |6 11| 3S1 */ s3.S1,
s2.S, /* 2S |6 11| 3S1 */ s3.S1,
s2.Q, /* 2Q |7 10| 3R */ s3.R,
GND.I, /* GND |8 9| 3Q */ s3.Q
/* +--------------+ */
@ -668,16 +668,16 @@ static NETLIST_START(DM9312_DIP)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ VCC.I,
s.D1, /* D1 |2 15| Y */ s.Y,
s.D2, /* D2 |3 14| YQ */ s.YQ,
s.D3, /* D3 |4 9312 13| C */ s.C,
s.D4, /* D4 |5 12| B */ s.B,
s.D5, /* D5 |6 11| A */ s.A,
s.D6, /* D6 |7 10| G */ s.G, //Strobe
GND.I, /* GND |8 9| D7 */ s.D7
/* +--------------+ */
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ VCC.I,
s.D1, /* D1 |2 15| Y */ s.Y,
s.D2, /* D2 |3 14| YQ */ s.YQ,
s.D3, /* D3 |4 9312 13| C */ s.C,
s.D4, /* D4 |5 12| B */ s.B,
s.D5, /* D5 |6 11| A */ s.A,
s.D6, /* D6 |7 10| G */ s.G, //Strobe
GND.I, /* GND |8 9| D7 */ s.D7
/* +--------------+ */
)
NETLIST_END()

View File

@ -504,14 +504,14 @@ void netlist_t::reset()
//x->update_dev();
}
break;
case 1: // brute force backward
case 1: // brute force backward
{
std::size_t i = m_devices.size();
while (i>0)
m_devices[--i]->update_dev();
}
break;
case 2: // brute force forward
case 2: // brute force forward
{
for (std::size_t i = 0; i < m_devices.size(); i++)
m_devices[i]->update_dev();

View File

@ -40,7 +40,7 @@
#define USE_TRUTHTABLE_7448 (0)
// How many times do we try to resolve links (connections)
#define NL_MAX_LINK_RESOLVE_LOOPS (100)
#define NL_MAX_LINK_RESOLVE_LOOPS (100)
//============================================================
// Solver defines

View File

@ -18,7 +18,7 @@
#define MF_1_UNKNOWN_PARAM_TYPE "Can not determine param_type for {1}"
#define MF_2_ERROR_CONNECTING_1_TO_2 "Error connecting {1} to {2}"
#define MF_0_NO_SOLVER "No solver found for this netlist although analog elements are present"
#define MF_1_HND_VAL_NOT_SUPPORTED "HINT_NO_DEACTIVATE value not supported: <{1}>"
#define MF_1_HND_VAL_NOT_SUPPORTED "HINT_NO_DEACTIVATE value not supported: <{1}>"
// nl_factory.cpp

View File

@ -50,7 +50,7 @@ namespace plib {
*
* @param inputs Vector of input variables, e.g. {"A","B"}
* @param expr infix or postfix expression. default is infix, postrix
* to be prefixed with rpn, e.g. "rpn:A B + 1.3 /"
* to be prefixed with rpn, e.g. "rpn:A B + 1.3 /"
*/
void compile(const std::vector<pstring> &inputs, const pstring expr);

12
src/lib/netlist/plib/ppmf.h Executable file → Normal file
View File

@ -30,10 +30,10 @@
*
* Benchmarks for ./nltool -c run -f src/mame/machine/nl_pong.cpp -t 10 -n pong_fast
*
* NL_PMF_TYPE_INTERNAL: 215% 215%
* NL_PMF_TYPE_GNUC_PMF: 163% 196%
* NL_PMF_TYPE_GNUC_PMF_CONV: 215% 215%
* NL_PMF_TYPE_VIRTUAL: 213% 209%
* NL_PMF_TYPE_INTERNAL: 215% 215%
* NL_PMF_TYPE_GNUC_PMF: 163% 196%
* NL_PMF_TYPE_GNUC_PMF_CONV: 215% 215%
* NL_PMF_TYPE_VIRTUAL: 213% 209%
*
* The whole exercise was done to avoid virtual calls. In prior versions of
* netlist, the INTERNAL and GNUC_PMF_CONV approach provided significant improvement.
@ -136,9 +136,9 @@ namespace plib {
// if odd, it's the byte offset into the vtable
int m_this_delta; // delta to apply to the 'this' pointer
int m_dummy1; // only used for visual studio x64
int m_dummy1; // only used for visual studio x64
int m_dummy2;
int m_size;
int m_size;
};
#endif

View File

@ -37,8 +37,8 @@ public:
opt_ttr (*this, "t", "time_to_run", 1.0, "time to run the emulation (seconds)"),
opt_logs(*this, "l", "log" , "define terminal to log. This option may be specified repeatedly."),
opt_inp(*this, "i", "input", "", "input file to process (default is none)"),
opt_loadstate(*this,"", "loadstate", "", "load state from file and continue from there"),
opt_savestate(*this,"", "savestate", "", "save state to file at end of run"),
opt_loadstate(*this,"", "loadstate", "", "load state from file and continue from there"),
opt_savestate(*this,"", "savestate", "", "save state to file at end of run"),
opt_grp4(*this, "Options for convert command", "These options are only used by the convert command."),
opt_type(*this, "y", "type", "spice", "spice:eagle:rinf", "type of file to be converted: spice,eagle,rinf"),

View File

@ -22,8 +22,8 @@ struct mat_cr_t
C diag[N]; // diagonal index pointer n
C ia[N+1]; // row index pointer n + 1
C ja[N*N]; // column index array nz_num, initially (n * n)
T A[N*N]; // Matrix elements nz_num, initially (n * n)
C ja[N*N]; // column index array nz_num, initially (n * n)
T A[N*N]; // Matrix elements nz_num, initially (n * n)
std::size_t size;
std::size_t nz_num;

View File

@ -19,7 +19,7 @@
* going forward in case we implement cuda solvers in the future.
*/
#define NL_USE_DYNAMIC_ALLOCATION (0)
#define TEST_PARALLEL (0 )
#define TEST_PARALLEL (0 )
#if TEST_PARALLEL
#include <thread>

View File

@ -239,7 +239,7 @@ unsigned matrix_solver_GMRES_t<m_N, storage_N>::solve_ilu_gmres (nl_double (& RE
unsigned itr_used = 0;
double rho_delta = 0.0;
const std::size_t n = this->N();
const std::size_t n = this->N();
if (m_use_iLU_preconditioning)
mat.incomplete_LU_factorization(m_LU);

View File

@ -435,7 +435,7 @@ namespace webpp {
}
if (response->close_connection_after_response)
return;
return;
auto range = request->header.equal_range("Connection");
case_insensitive_equals check;

View File

@ -6,31 +6,31 @@
© 1983 Tecfri
PCB connector pinout
PCB connector pinout
+5V 1 A GND
+5V 2 B GND
+12V Coin Counter 3 C +12V Coin Counter
1P Button 1 4 D 1P Up
1P Button 2 5 E 1P Down
2P Button 1 6 F 1P Left
2P Button 2 7 G 1P Right
2P Start 8 H 2P Up
1P Start 9 I 2P Down
Coin 2 10 J 2P Left
Coin 1 11 K 2P Right
Blue 12 L Counter
Red 13 M Counter
Green 14 N Counter
Sync 15 O Speaker Right
+12V 16 P Speaker Left
Speaker- 17 Q +5V
Video GND 18 R +5V
+5V 1 A GND
+5V 2 B GND
+12V Coin Counter 3 C +12V Coin Counter
1P Button 1 4 D 1P Up
1P Button 2 5 E 1P Down
2P Button 1 6 F 1P Left
2P Button 2 7 G 1P Right
2P Start 8 H 2P Up
1P Start 9 I 2P Down
Coin 2 10 J 2P Left
Coin 1 11 K 2P Right
Blue 12 L Counter
Red 13 M Counter
Green 14 N Counter
Sync 15 O Speaker Right
+12V 16 P Speaker Left
Speaker- 17 Q +5V
Video GND 18 R +5V
The bootlegs are running on a kind of extended hardware. It has
double the amount of work RAM, an updated graphics system to
accommodate the bootlegged games and the AY8912s were changed to
AY8910s.
The bootlegs are running on a kind of extended hardware. It has
double the amount of work RAM, an updated graphics system to
accommodate the bootlegged games and the AY8912s were changed to
AY8910s.
TODO:
- Verify actual Z80 and AY891x clock speeds from PCB (XTAL confirmed)
@ -81,7 +81,7 @@ protected:
required_shared_ptr<uint8_t> m_scroll_ram;
tilemap_t *m_char_tilemap;
uint8_t m_color_bank;
uint8_t m_color_bank;
};
class ambush_state : public ambush_base_state
@ -528,7 +528,7 @@ uint32_t mariobl_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
int code = ((m_sprite_ram[offs + 1] & 0x40) << 1) | (m_sprite_ram[offs + 2] & 0x7f);
int color = (m_color_bank << 4) | (m_sprite_ram[offs + 1] & 0x0f);
m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, sx, sy, 0);
m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, sx, sy, 0);
}
return 0;

View File

@ -4233,7 +4233,7 @@ GAMEL( 1997, pengpay, aristmk5, aristmk5, aristmk5, aristmk5_state, aristm
GAMEL( 1996, pengpaya, pengpay, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200357V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 586/4, C - 12/11/96
GAMEL( 1997, pengpayb, pengpay, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200359V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 586/3(a), D - 03/06/97
GAMEL( 1997, pengpayu, pengpay, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (BHI0417-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 586/7(b) B - 14/07/97
GAMEL( 1998, petshop, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100731V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 618/1, A - 17/04/98
GAMEL( 1998, petshop, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100731V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 618/1, A - 17/04/98
GAMEL( 1995, phantpay, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Phantom Pays (0500005V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 570/1, E - 12/09/95
GAMEL( 1998, penpir2, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pirate II (0100869V, Victoria)", MACHINE_FLAGS, layout_aristmk5 ) // 619/3, A - 17/12/98
GAMEL( 1996, przfight, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Prize Fight (0100299V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 578/4, B - 08/08/96

View File

@ -633,7 +633,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( avt_portmap, AS_IO, 8, avt_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x00, 0x03) unk, maybe IO
// AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
// AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
// AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN0")
// AM_RANGE(0x08, 0x0b) unk, maybe IO

View File

@ -317,25 +317,25 @@ ROM_END
ROM_START( dodgeman )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "dg0.7f", 0x0000, 0x001000, CRC(1219b5db) SHA1(e4050a5e52f7b125f317b6e2ef615774c81cf679) )
ROM_LOAD( "dg1.5f", 0x1000, 0x001000, CRC(fff9a086) SHA1(e4e528789d07755cf999054c191e242ea3ebe55f) )
ROM_LOAD( "dg2.4f", 0x2000, 0x001000, CRC(2ca9ac99) SHA1(7fe81626ab2b5c01189fbb578999157863fcc29f) )
ROM_LOAD( "dg3.3f", 0x3000, 0x001000, CRC(55a51c0e) SHA1(a5b253f096e1fe85ee391ad2aa0373809a3b48c2) )
ROM_LOAD( "dg4.2f", 0x4000, 0x001000, CRC(14169361) SHA1(86d3cd1fa0aa4f21029daea2eba99bdaa34372e8) )
ROM_LOAD( "dg5.1f", 0x5000, 0x001000, CRC(8f83ae2f) SHA1(daad41b61ba3d55531021d444bbe4acfc275cfc9) )
ROM_LOAD( "dg0.7f", 0x0000, 0x001000, CRC(1219b5db) SHA1(e4050a5e52f7b125f317b6e2ef615774c81cf679) )
ROM_LOAD( "dg1.5f", 0x1000, 0x001000, CRC(fff9a086) SHA1(e4e528789d07755cf999054c191e242ea3ebe55f) )
ROM_LOAD( "dg2.4f", 0x2000, 0x001000, CRC(2ca9ac99) SHA1(7fe81626ab2b5c01189fbb578999157863fcc29f) )
ROM_LOAD( "dg3.3f", 0x3000, 0x001000, CRC(55a51c0e) SHA1(a5b253f096e1fe85ee391ad2aa0373809a3b48c2) )
ROM_LOAD( "dg4.2f", 0x4000, 0x001000, CRC(14169361) SHA1(86d3cd1fa0aa4f21029daea2eba99bdaa34372e8) )
ROM_LOAD( "dg5.1f", 0x5000, 0x001000, CRC(8f83ae2f) SHA1(daad41b61ba3d55531021d444bbe4acfc275cfc9) )
ROM_REGION( 0x6000, "gfx1", ROMREGION_ERASE00 ) // filled in later
ROM_REGION( 0x6000, "gfx2", ROMREGION_ERASE00 )
ROM_LOAD( "f.6f", 0x0000, 0x002000, CRC(dfaaf4c8) SHA1(1e09f1d72e7e5e6782d73ae60bca7982fc04df0e) )
ROM_LOAD( "h.6h", 0x2000, 0x002000, CRC(e2525ffe) SHA1(a17b608b4089014be381b26f16597b83d4a66ebd) )
ROM_LOAD( "j.6j", 0x4000, 0x002000, CRC(2731ee46) SHA1(15b9350e19f31b1cea99deb9935543777644e6a8) )
ROM_LOAD( "f.6f", 0x0000, 0x002000, CRC(dfaaf4c8) SHA1(1e09f1d72e7e5e6782d73ae60bca7982fc04df0e) )
ROM_LOAD( "h.6h", 0x2000, 0x002000, CRC(e2525ffe) SHA1(a17b608b4089014be381b26f16597b83d4a66ebd) )
ROM_LOAD( "j.6j", 0x4000, 0x002000, CRC(2731ee46) SHA1(15b9350e19f31b1cea99deb9935543777644e6a8) )
ROM_REGION( 0x2000, "user1", 0 ) // gfx1 1bpp gfxdata
ROM_LOAD( "d.6d", 0x0000, 0x002000, CRC(451c1c3a) SHA1(214f775e242f7f29ac799cdd554708acddd1e34f) )
ROM_REGION( 0x2000, "user2", 0 ) // gfx1 colormask, bad?
ROM_LOAD( "e.6e", 0x0000, 0x002000, CRC(c9a515df) SHA1(5232d2d1bd02b89cb651d817995daf33469f0e2f) )
ROM_LOAD( "e.6e", 0x0000, 0x002000, CRC(c9a515df) SHA1(5232d2d1bd02b89cb651d817995daf33469f0e2f) )
ROM_END

View File

@ -14,10 +14,10 @@
The Dumping Union
Team Japump!!!
Hau
Jean-Francois Del Nero
Omar Cornut
Game Preservation Society
Joseph Redon
Jean-Francois Del Nero
Omar Cornut
Game Preservation Society
Joseph Redon
The DECO cassette system consists of three PCBS in a card cage:
Early boardset: (1980-1983) (proms unknown for this boardset, no schematics for this boardset)
@ -25,7 +25,7 @@
One DE-0068B-0 DSP-3 pcb with a 'DECO CPU-3' custom, two 2716 eproms. (main processor and bios, graphics, dipswitches?)
One DE-0070C-0 BIO-3 pcb with an analog ADC0908 8-bit adc.
One DE-0066B-0 card rack board that the other three boards plug into.
This boardset has two versions : MD, known as "shokase" in Japan, and MT, known as "daikase" which is using bigger data tapes. (MT was only sold in Japan, not emulated yet)
This boardset has two versions : MD, known as "shokase" in Japan, and MT, known as "daikase" which is using bigger data tapes. (MT was only sold in Japan, not emulated yet)
Later boardset: (1984 onward, schematic is dated October 1983)
One DE-0097C-0 RMS-8 pcb with a 6502 processor, two ay-3-8910s, two eproms (2716 and 2732) plus one prom, and 48k worth of 4116 16kx1 DRAMs; the 6502 processor has its own 4K of SRAM. (audio processor and RAM, Main processor's dram, dipswitches)
@ -35,9 +35,9 @@
The actual cassettes use a custom player hooked to the BIO board, and are roughly microcassette form factor, but are larger and will not fit in a conventional microcassette player.
Each cassette has one track on it and is separated into clock and data by two Magtek IC in the player, for a form of synchronous serial.
The data is stored in blocks with headers and CRC16 checksums.
The first block contains information such as the region (A:Japan, B:USA, C:UK, D:Europe) and the total number of blocks left to read.
The last physical block on the cassette is a dummy block not used by the system. (only used to mark the end of last block)
The data is stored in blocks with headers and CRC16 checksums.
The first block contains information such as the region (A:Japan, B:USA, C:UK, D:Europe) and the total number of blocks left to read.
The last physical block on the cassette is a dummy block not used by the system. (only used to mark the end of last block)
***********************************************************************/

View File

@ -95,15 +95,15 @@ cpu20_state(const machine_config &mconfig, device_type type, const char *tag)
{
}
virtual void machine_start () override { LOGSETUP("%s\n", FUNCNAME); }
// virtual void machine_reset () override;
// virtual void machine_reset () override;
DECLARE_DRIVER_INIT(cpu20) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21s) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21a) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21ya) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21b) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21yb) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu20) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21s) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21a) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21ya) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21b) { LOGSETUP("%s\n", FUNCNAME); }
DECLARE_DRIVER_INIT(cpu21yb) { LOGSETUP("%s\n", FUNCNAME); }
};
/* Input ports */
@ -179,16 +179,16 @@ MACHINE_CONFIG_END
ROM_START(fccpu20sbc) ROM_END
/* Boards supported by same rom set, need to do like this to avoid need for multi named rom sets */
#define rom_fccpu21ssbc rom_fccpu20sbc
#define rom_fccpu21sbc rom_fccpu20sbc
#define rom_fccpu21asbc rom_fccpu20sbc
#define rom_fccpu21yasbc rom_fccpu20sbc
#define rom_fccpu21bsbc rom_fccpu20sbc
#define rom_fccpu21ybsbc rom_fccpu20sbc
#define rom_fccpu21ssbc rom_fccpu20sbc
#define rom_fccpu21sbc rom_fccpu20sbc
#define rom_fccpu21asbc rom_fccpu20sbc
#define rom_fccpu21yasbc rom_fccpu20sbc
#define rom_fccpu21bsbc rom_fccpu20sbc
#define rom_fccpu21ybsbc rom_fccpu20sbc
/* Driver */
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
COMP (1986, fccpu20sbc, 0, 0, cpu20, cpu20, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-20", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu20sbc, 0, 0, cpu20, cpu20, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-20", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21ssbc, fccpu20sbc, 0, cpu21s, cpu20, cpu20_state, cpu21s, "Force Computers Gmbh", "SYS68K/CPU-21S", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21sbc, fccpu20sbc, 0, cpu21, cpu20, cpu20_state, cpu21, "Force Computers Gmbh", "SYS68K/CPU-21", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
COMP (1986, fccpu21asbc, fccpu20sbc, 0, cpu21a, cpu20, cpu20_state, cpu21a, "Force Computers Gmbh", "SYS68K/CPU-21A", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )

View File

@ -22,11 +22,11 @@ Notes:
- 4 known game carts where produced, these are:
Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Black Jack,
Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Black Jack,
Twenty One Thunder Plus, Power Pairs, Prism Poker Plus & Have A Cow
Star Pak 2: Pac-Man, Ms.Pac-Man, Pharaoh's Tomb, Solar Solitaire, Power Pairs, Seek The peeks & Have A Cow
Star Pak 3: Centipede, Great Wall, Ker-Chunk, Diamond Derby, Word Sleuth, Pull!, Astro Blast & Sweeper
Star Pak 4: Berzerk, Neon Nightmare, Battle Checkers, Orbit, Deep Sea Shadow, Star Tiger & Orbit Freefall
Star Pak 2: Pac-Man, Ms.Pac-Man, Pharaoh's Tomb, Solar Solitaire, Power Pairs, Seek The peeks & Have A Cow
Star Pak 3: Centipede, Great Wall, Ker-Chunk, Diamond Derby, Word Sleuth, Pull!, Astro Blast & Sweeper
Star Pak 4: Berzerk, Neon Nightmare, Battle Checkers, Orbit, Deep Sea Shadow, Star Tiger & Orbit Freefall
- Allegedly there is a hard lock that SP1 and the PAC-MAN games (on SP2) cannot play together. Was a licensing issue with Namco.
The system checks for cartridges on power up by querying the PIC parts. If the system sees SP1 & SP2 it disables SP2.
@ -55,7 +55,7 @@ class galgames_slot_device;
// CART declaration
class galgames_cart_device : public device_t,
class galgames_cart_device : public device_t,
public device_rom_interface
{
public:
@ -63,11 +63,11 @@ public:
galgames_cart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration
static void static_set_cart(device_t &device, uint8_t cart) { downcast<galgames_cart_device &>(device).m_cart = cart; }
static void static_set_pic_bits(device_t &device, int clk, int in, int out, int dis) { downcast<galgames_cart_device &>(device).set_pic_bits(clk, in, out, dis); }
static void static_set_cart(device_t &device, uint8_t cart) { downcast<galgames_cart_device &>(device).m_cart = cart; }
static void static_set_pic_bits(device_t &device, int clk, int in, int out, int dis) { downcast<galgames_cart_device &>(device).set_pic_bits(clk, in, out, dis); }
// ROM
DECLARE_READ16_MEMBER(rom_r) { return read_word(offset*2); }
DECLARE_READ16_MEMBER(rom_r) { return read_word(offset*2); }
// EEPROM
DECLARE_READ8_MEMBER(eeprom_r);
@ -133,7 +133,7 @@ static MACHINE_CONFIG_FRAGMENT( bios )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_bios_cart_device : public galgames_cart_device
class galgames_bios_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -163,7 +163,7 @@ static MACHINE_CONFIG_FRAGMENT( starpak2 )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_starpak2_cart_device : public galgames_cart_device
class galgames_starpak2_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -195,7 +195,7 @@ static MACHINE_CONFIG_FRAGMENT( starpak3 )
MCFG_EEPROM_SERIAL_93C76_8BIT_ADD("eeprom")
MACHINE_CONFIG_END
class galgames_starpak3_cart_device : public galgames_cart_device
class galgames_starpak3_cart_device : public galgames_cart_device
{
public:
// construction/destruction
@ -224,7 +224,7 @@ const device_type GALGAMES_STARPAK3_CART = &device_creator<galgames_starpak3_car
// SLOT declaration
class galgames_slot_device : public device_t,
class galgames_slot_device : public device_t,
public device_memory_interface
{
public:
@ -233,8 +233,8 @@ public:
DECLARE_ADDRESS_MAP(slot_map, 16);
DECLARE_READ16_MEMBER(read) { return m_space->read_word(offset * 2, mem_mask); }
DECLARE_WRITE16_MEMBER(write) { m_space->write_word(offset * 2, data, mem_mask); }
DECLARE_READ16_MEMBER(read) { return m_space->read_word(offset * 2, mem_mask); }
DECLARE_WRITE16_MEMBER(write) { m_space->write_word(offset * 2, data, mem_mask); }
// SLOT
DECLARE_WRITE8_MEMBER(cart_sel_w);
@ -322,7 +322,7 @@ void galgames_cart_device::set_pic_reset_line(int state)
if (!m_pic)
return;
// logerror("reset line = %x\n", state);
// logerror("reset line = %x\n", state);
if (!m_pic->input_state(INPUT_LINE_RESET) && state)
pic_comm_reset();
@ -332,17 +332,17 @@ void galgames_cart_device::set_pic_reset_line(int state)
void galgames_cart_device::log_cart_comm(const char *text, uint8_t data)
{
// logerror("%s: comm %-10s %02x - data:%02x bit:%02x rdy:%x clk:%02x\n", machine().describe_context(),
// text, data, m_pic_data, m_pic_data_bit, m_pic_data_rdy, m_pic_data_clk );
// logerror("%s: comm %-10s %02x - data:%02x bit:%02x rdy:%x clk:%02x\n", machine().describe_context(),
// text, data, m_pic_data, m_pic_data_bit, m_pic_data_rdy, m_pic_data_clk );
// logerror("%s: comm %-10s %02x\n", machine().describe_context(), text, data );
// logerror("%s: comm %-10s %02x\n", machine().describe_context(), text, data );
}
void galgames_cart_device::pic_comm_reset()
{
m_pic_iobits = m_pic_data = m_pic_data_rdy = m_pic_data_clk = 0;
m_pic_data_bit = 0xff;
// logerror("%s: comm reset\n", machine().describe_context());
// logerror("%s: comm reset\n", machine().describe_context());
}
// External PIC status and data interface
@ -367,34 +367,34 @@ WRITE8_MEMBER(galgames_cart_device::pic_data_w)
{
if (is_selected())
{
m_pic_data = data;
m_pic_data_rdy = 1;
m_pic_data_bit = 0xff;
m_pic_data_clk = 0;
m_pic_data = data;
m_pic_data_rdy = 1;
m_pic_data_bit = 0xff;
m_pic_data_clk = 0;
log_cart_comm("EXT WRITE", data);
}
}
/*
galgame2:
bit 0 = cleared at boot (never touched again)
bit 1 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 2 = data out
bit 3 unused
bit 4 = data in
bit 5 = clock
bit 6 n.c.
bit 7 n.c.
bit 0 = cleared at boot (never touched again)
bit 1 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 2 = data out
bit 3 unused
bit 4 = data in
bit 5 = clock
bit 6 n.c.
bit 7 n.c.
galgame3:
bit 0 = clock
bit 1 unused
bit 2 = data in
bit 3 = data out
bit 4 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 5 = 0
bit 6 = 1
bit 7 unused
bit 0 = clock
bit 1 unused
bit 2 = data in
bit 3 = data out
bit 4 = PIC waits for it to become 0 before reading (or to become 1 when another byte is expected)
bit 5 = 0
bit 6 = 1
bit 7 unused
*/
void galgames_cart_device::set_pic_bits(int clk, int in, int out, int dis)
{
@ -476,7 +476,7 @@ READ8_MEMBER(galgames_cart_device::int_pic_data_r)
m_pic_iobits = (m_pic_iobits & (~m_pic_in_mask)) | (bit_in ? m_pic_in_mask : 0);
}
// log_cart_comm("PIC READ", m_pic_iobits);
// log_cart_comm("PIC READ", m_pic_iobits);
return m_pic_iobits;
}
@ -485,13 +485,13 @@ WRITE8_MEMBER(galgames_cart_device::int_pic_data_w)
{
m_pic_iobits = (m_pic_iobits & (~m_pic_out_mask)) | (data & m_pic_out_mask);
// log_cart_comm("PIC WRITE", data);
// log_cart_comm("PIC WRITE", data);
}
/*
galgame3, port A:
bit 2 = bank lsb
bit 3 = bank msb
bit 2 = bank lsb
bit 3 = bank msb
*/
WRITE8_MEMBER(galgames_cart_device::int_pic_bank_w)
{
@ -576,8 +576,8 @@ void galgames_slot_device::device_reset()
void galgames_slot_device::set_cart(int cart)
{
// if (m_cart != cart)
// logerror("%s: cart sel = %02x\n", machine().describe_context(), cart);
// if (m_cart != cart)
// logerror("%s: cart sel = %02x\n", machine().describe_context(), cart);
m_cart = cart;
}
@ -595,15 +595,15 @@ WRITE8_MEMBER(galgames_slot_device::cart_sel_w)
switch( data )
{
case 0x07: // 7 resets all
case 0x07: // 7 resets all
reset_eeproms_except(-1);
break;
case 0x00: // cart 0 (motherboard)
case 0x01: // cart 1
case 0x02: // cart 2
case 0x03: // cart 3
case 0x04: // cart 4
case 0x00: // cart 0 (motherboard)
case 0x01: // cart 1
case 0x02: // cart 2
case 0x03: // cart 3
case 0x04: // cart 4
set_cart(data);
reset_eeproms_except(data);
break;
@ -627,7 +627,7 @@ WRITE8_MEMBER(galgames_slot_device::ram_sel_w)
if ((data & 0xf7) == 0x05)
{
m_is_ram_active = true;
// logerror("%s: romram bank = %02x\n", machine().describe_context(), data);
// logerror("%s: romram bank = %02x\n", machine().describe_context(), data);
}
}
@ -739,7 +739,7 @@ protected:
WRITE_LINE_MEMBER(galgames_state::blitter_irq_callback)
{
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
m_maincpu->set_input_line(2, state);
}
@ -819,7 +819,7 @@ WRITE16_MEMBER(galgames_state::outputs_w)
machine().bookkeeping().coin_counter_w(0, data & 0x0004);
}
// popmessage("OUT %02X", data & mem_mask);
// popmessage("OUT %02X", data & mem_mask);
}
// FPGA

View File

@ -62,21 +62,21 @@ static ADDRESS_MAP_START( h89_io, AS_IO, 8, h89_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x78, 0x7b) expansion 1 // Options - Cassette I/O (only uses 0x78 - 0x79) Requires MTR-88 ROM
// - H37 5-1/4" Soft-sectored Controller MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// - H37 5-1/4" Soft-sectored Controller MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// AM_RANGE(0x7c, 0x7f) expansion 2 // Options - 5-1/4" Hard-sectored Controller (works with ALL ROMs)
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
// - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
// AM_RANGE(0xd0, 0xd7) 8250 UART DCE
// AM_RANGE(0xd8, 0xdf) 8250 UART DTE - MODEM
// AM_RANGE(0xe0, 0xe7) 8250 UART DCE - LP
AM_RANGE(0xe8, 0xef) AM_DEVREADWRITE("ins8250", ins8250_device, ins8250_r, ins8250_w) // 8250 UART console - this
// connects internally to a Terminal board
// that is also used in the H19. Ideally,
// the H19 code could be connected and ran
// as a separate thread.
// connects internally to a Terminal board
// that is also used in the H19. Ideally,
// the H19 code could be connected and ran
// as a separate thread.
// AM_RANGE(0xf0, 0xf1) // ports defined on the H8 - on the H89, access to these addresses causes a NMI
AM_RANGE(0xf2, 0xf2) AM_WRITE(port_f2_w) AM_READ_PORT("SW501")
// AM_RANGE(0xf3, 0xf3) // ports defined on the H8 - on the H89, access to these addresses causes a NMI
@ -85,7 +85,7 @@ ADDRESS_MAP_END
/* Input ports */
static INPUT_PORTS_START( h89 )
// Settings with the MTR-88 ROM (#444-40)
// Settings with the MTR-88 ROM (#444-40)
// PORT_START("SW501")
// PORT_DIPNAME( 0x1f, 0x00, "Unused" ) PORT_DIPLOCATION("S1:1,S1:2,S1:3,S1:4,S1:5")
// PORT_DIPNAME( 0x20, 0x20, "Perform memory test at start" ) PORT_DIPLOCATION("S1:6")
@ -97,7 +97,7 @@ static INPUT_PORTS_START( h89 )
// PORT_DIPSETTING( 0x80, "38400" )
// PORT_DIPSETTING( 0xc0, "57600" )
// Settings with the MTR-89 ROM (#444-62)
// Settings with the MTR-89 ROM (#444-62)
// PORT_START("SW501")
// PORT_DIPNAME( 0x03, 0x00, "Expansion 1" ) PORT_DIPLOCATION("S1:1,S1:2")
// PORT_DIPSETTING( 0x00, "H-88-1" )
@ -122,7 +122,7 @@ static INPUT_PORTS_START( h89 )
// PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
// PORT_DIPSETTING( 0x80, "Auto" )
// Settings with the MTR-90 ROM (#444-84 or 444-142)
// Settings with the MTR-90 ROM (#444-84 or 444-142)
PORT_START("SW501")
PORT_DIPNAME( 0x03, 0x00, "Expansion 1" ) PORT_DIPLOCATION("S1:1,S1:2")
PORT_DIPSETTING( 0x00, "H-88-1" )
@ -161,13 +161,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(h89_state::h89_irq_timer)
WRITE8_MEMBER( h89_state::port_f2_w )
{
// Bit 0 - Single-step
// Bit 1 - Enable timer interrupt (2mSec Clock)
// Bit 0 - Single-step
// Bit 1 - Enable timer interrupt (2mSec Clock)
m_port_f2 = data;
}
static DEVICE_INPUT_DEFAULTS_START( terminal )
// TODO - baud rate should be controlled by SW501 setting
// TODO - baud rate should be controlled by SW501 setting
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )

View File

@ -1579,7 +1579,7 @@ MACHINE_CONFIG_END
ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \
ROM_LOAD ( "rom1.bin", 0x000000, 0x01ff32, CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) ) \
ROM_REGION( 0x10000, "iomcu", 0 ) /* "64Bit I/O Controller Ver 1.0 1997.06.29(C)SNK" internal ID string */ \
/* this was dumped from a TMP87PH40AN type chip. Some boards use a TMP87CH40N, in all cases they're stickered SNK-IOJ1.00A so likely the same content */ \
/* this was dumped from a TMP87PH40AN type chip. Some boards use a TMP87CH40N, in all cases they're stickered SNK-IOJ1.00A so likely the same content */ \
ROM_LOAD ( "tmp87ph40an.bin", 0x8000, 0x8000, CRC(b70df21f) SHA1(5b742e8a0bbf4c0ae4f4398d34c7058fb24acc92) )

View File

@ -139,11 +139,11 @@ READ32_MEMBER(interpro_state::slot0_r)
{
// a known graphics board idprom
static uint8_t slot0[] = {
0x00, 0x00, 0x00, 0x00, '9', '6', '3', 'A', // board
0x00, 0x00, 0x00, 0x00, '9', '6', '3', 'A', // board
0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // eco
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // features
0xff, 0xff, // reserved
0x22, 0x00, // family
0xff, 0xff, // reserved
0x22, 0x00, // family
0x55, 0xaa, 0x55, 0x00
};

View File

@ -545,7 +545,7 @@ static MACHINE_CONFIG_DERIVED( intvkbd, intv )
MCFG_DEVICE_ADD("crtc", TMS9927, XTAL_7_15909MHz)
MCFG_TMS9927_CHAR_WIDTH(8)
MCFG_TMS9927_OVERSCAN(STIC_OVERSCAN_LEFT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE, STIC_OVERSCAN_RIGHT_WIDTH*STIC_X_SCALE*INTVKBD_X_SCALE,
STIC_OVERSCAN_TOP_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE, STIC_OVERSCAN_BOTTOM_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE)
STIC_OVERSCAN_TOP_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE, STIC_OVERSCAN_BOTTOM_HEIGHT*STIC_Y_SCALE*INTVKBD_Y_SCALE)
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(intv_state, screen_update_intvkbd)

View File

@ -463,7 +463,7 @@ READ64_MEMBER(konamim2_state::unk4000280_r)
uint32_t sys_config = 0x03600000;
sys_config |= 0 << 0; // Bit 0: PAL/NTSC switch (default is selected by encoder)
sys_config |= 0 << 2; // Bit 2-3: Video Encoder (0 = MEIENC, 1 = VP536, 2 = BT9103, 3 = DENC)
sys_config |= 0 << 2; // Bit 2-3: Video Encoder (0 = MEIENC, 1 = VP536, 2 = BT9103, 3 = DENC)
sys_config |= m_in_country->read() << 11; // Bit 11-12: Country
// 0 = ???
// 1 = UK
@ -1210,7 +1210,7 @@ static ADDRESS_MAP_START( 3do_m2_main, AS_PROGRAM, 64, konamim2_state )
// ADDRESS_MAP_UNMAP_HIGH
AM_IMPORT_FROM( m2_main )
// AM_RANGE(0x00000000, 0x000cffff) devices?
// AM_RANGE(0x00000000, 0x000cffff) devices?
ADDRESS_MAP_END
static INPUT_PORTS_START( m2 )

View File

@ -89,7 +89,7 @@ READ8_MEMBER(konmedal_state::vram_r)
return m_k056832->ram_code_lo_r(space, offset>>1);
}
}
else if (m_control == 0) // ROM readback
else if (m_control == 0) // ROM readback
{
return m_k056832->konmedal_rom_r(space, offset);
}
@ -113,7 +113,7 @@ WRITE8_MEMBER(konmedal_state::vram_w)
READ8_MEMBER(konmedal_state::magic_r)
{
return 0xc1; // checked at 60f before reading a page of the VROM
return 0xc1; // checked at 60f before reading a page of the VROM
}
K056832_CB_MEMBER(konmedal_state::tile_callback)
@ -137,7 +137,7 @@ void konmedal_state::video_start()
uint32_t konmedal_state::screen_update_konmedal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
// bitmap.fill(m_back_colorbase, cliprect);
// bitmap.fill(m_back_colorbase, cliprect);
bitmap.fill(0, cliprect);
screen.priority().fill(0, cliprect);
@ -177,12 +177,12 @@ WRITE8_MEMBER(konmedal_state::bankswitch_w)
static ADDRESS_MAP_START( medal_main, AS_PROGRAM, 8, konmedal_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("maincpu", 0)
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xafff) AM_RAM // work RAM?
AM_RANGE(0xa000, 0xafff) AM_RAM // work RAM?
AM_RANGE(0xb800, 0xbfff) AM_RAM // stack goes here
AM_RANGE(0xc000, 0xc03f) AM_DEVWRITE("k056832", k056832_device, write)
AM_RANGE(0xc100, 0xc100) AM_WRITE(control2_w)
AM_RANGE(0xc400, 0xc400) AM_WRITE(bankswitch_w)
AM_RANGE(0xc500, 0xc500) AM_NOP // read to reset watchdog
AM_RANGE(0xc500, 0xc500) AM_NOP // read to reset watchdog
AM_RANGE(0xc702, 0xc703) AM_READ(inputs_r)
AM_RANGE(0xc800, 0xc80f) AM_DEVWRITE("k056832", k056832_device, b_w)
AM_RANGE(0xc80f, 0xc80f) AM_READ(magic_r)

View File

@ -267,7 +267,7 @@ WRITE16_MEMBER(lwriter_state::bankedarea_w)
}
else if (offset <= 0x01ffff)
{
if ((offset > 0x7ff) && !space.debugger_access()) { logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1); }
if ((offset > 0x7ff) && !space.debugger_access()) { logerror("Attempt to write banked area (with overlay off) with data %04X to offset %08X!\n",data, offset<<1); }
COMBINE_DATA(&m_sram_ptr[offset&0x7FF]);
return;
}
@ -341,9 +341,9 @@ WRITE_LINE_MEMBER(lwriter_state::via_int_w)
/*
WRITE_LINE_MEMBER(lwriter_state::scc_int)
{
logerror(" SCC: INT output set to %d!\n", state);
//m_via->set_input_line(VIA_CA1, state ? ASSERT_LINE : CLEAR_LINE);
m_via->write_ca1(state);
logerror(" SCC: INT output set to %d!\n", state);
//m_via->set_input_line(VIA_CA1, state ? ASSERT_LINE : CLEAR_LINE);
m_via->write_ca1(state);
}*/
#define CPU_CLK (XTAL_22_3210MHz / 2) // Based on pictures form here: http://picclick.co.uk/Apple-Postscript-LaserWriter-IINT-Printer-640-4105-M6009-Mainboard-282160713108.html#&gid=1&pid=7

View File

@ -174,7 +174,7 @@ SLOT_INTERFACE_END
* Machine configuration
*/
MACHINE_CONFIG_START (miniforce, miniforce_state)
// MCFG_CPU_PROGRAM_MAP (miniforce_mem)
// MCFG_CPU_PROGRAM_MAP (miniforce_mem)
MCFG_VME_DEVICE_ADD("vme")
MCFG_VME_SLOT_ADD ("vme", 1, miniforce_vme_cards, "fccpu21")
MCFG_VME_SLOT_ADD ("vme", 2, miniforce_vme_cards, nullptr)

View File

@ -1335,21 +1335,21 @@ ROM_END
/*
CPUs
QTY Type clock position function
1x 6502 2B 8-bit Microprocessor - main
1x LM380 12B Audio Amplifier - sound
1x oscillator 10.000 6C
QTY Type clock position function
1x 6502 2B 8-bit Microprocessor - main
1x LM380 12B Audio Amplifier - sound
1x oscillator 10.000 6C
ROMs
QTY Type position status
2x F2708 10C, 10E dumped
6x MCM2716C 1-6 dumped
1x DM74S288N 6L dumped
QTY Type position status
2x F2708 10C, 10E dumped
6x MCM2716C 1-6 dumped
1x DM74S288N 6L dumped
RAMs
QTY Type position
8x TMS4116 4F,4H,4J,4K,4L,4M,4N,4P
1x 74S189N 7L
QTY Type position
8x TMS4116 4F,4H,4J,4K,4L,4M,4N,4P
1x 74S189N 7L
Others

View File

@ -2,23 +2,23 @@
// copyright-holders:Miodrag Milanovic, Sergey Svishchev
/***************************************************************************
Elektronika MS 0515
Elektronika MS 0515
To do:
- softlist
- sound
- 512K memory expansion
- ?? refresh rate change
- ?? parallel printer
- ?? cassette (only with Version A firmware)
- ?? port 177770
To do:
- softlist
- sound
- 512K memory expansion
- ?? refresh rate change
- ?? parallel printer
- ?? cassette (only with Version A firmware)
- ?? port 177770
Docs:
- http://www.tis.kz/docs/MC-0515/mc0515-ed.rar schematics etc.
- http://www.tis.kz/docs/MC-0515/mc0515-to.rar user manual
- http://www.tis.kz/docs/MC-0515/hc4-to.rar technical manual
- http://www.tis.kz/docs/MC-0515/mc0515-po.rar diag manual
- http://www.tis.kz/docs/MC-0515/mc0515-osa.rar OS manual
Docs:
- http://www.tis.kz/docs/MC-0515/mc0515-ed.rar schematics etc.
- http://www.tis.kz/docs/MC-0515/mc0515-to.rar user manual
- http://www.tis.kz/docs/MC-0515/hc4-to.rar technical manual
- http://www.tis.kz/docs/MC-0515/mc0515-po.rar diag manual
- http://www.tis.kz/docs/MC-0515/mc0515-osa.rar OS manual
****************************************************************************/
@ -137,10 +137,10 @@ static ADDRESS_MAP_START(ms0515_mem, AS_PROGRAM, 16, ms0515_state)
AM_RANGE(0177520, 0177527) AM_DEVWRITE8("pit8253", pit8253_device, write, 0x00ff)
AM_RANGE(0177540, 0177547) AM_NOP
// AM_RANGE(0177540, 0177541)
// AM_RANGE(0177542, 0177543)
// AM_RANGE(0177544, 0177545) // i8255 for MS-7007 Keyboard
// AM_RANGE(0177546, 0177547)
// AM_RANGE(0177540, 0177541)
// AM_RANGE(0177542, 0177543)
// AM_RANGE(0177544, 0177545) // i8255 for MS-7007 Keyboard
// AM_RANGE(0177546, 0177547)
AM_RANGE(0177600, 0177607) AM_DEVREADWRITE8("ppi8255_1", i8255_device, read, write, 0x00ff)
@ -160,13 +160,13 @@ ADDRESS_MAP_END
/*
* (page 15-16)
*
* 6-0 RAM banking
* 7 VRAM access enable
* 8 vblank IRQ line (1 -- assert)
* 9 timer IRQ enable (1 -- enable)
* 6-0 RAM banking
* 7 VRAM access enable
* 8 vblank IRQ line (1 -- assert)
* 9 timer IRQ enable (1 -- enable)
* 11-10 VRAM banking
* 12 parallel port STROBE signal
* 13 parallel port ... signal
* 12 parallel port STROBE signal
* 13 parallel port ... signal
* 14-15 unused
*/
WRITE16_MEMBER(ms0515_state::ms0515_bank_w)
@ -412,7 +412,7 @@ uint32_t ms0515_state::screen_update_ms0515(screen_device &screen, bitmap_ind16
void ms0515_state::screen_eof(screen_device &screen, bool state)
{
// irq2_w(state ? ASSERT_LINE : CLEAR_LINE);
// irq2_w(state ? ASSERT_LINE : CLEAR_LINE);
if (BIT(m_bankreg, 9))
irq11_w(state ? ASSERT_LINE : CLEAR_LINE);
}
@ -497,7 +497,7 @@ WRITE_LINE_MEMBER(ms0515_state::irq11_w)
static MACHINE_CONFIG_START( ms0515, ms0515_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", T11, XTAL_4MHz) // actual CPU is T11 clone, KR1807VM1
MCFG_CPU_ADD("maincpu", T11, XTAL_4MHz) // actual CPU is T11 clone, KR1807VM1
MCFG_T11_INITIAL_MODE(0xf2ff)
MCFG_CPU_PROGRAM_MAP(ms0515_mem)
@ -534,8 +534,8 @@ static MACHINE_CONFIG_START( ms0515, ms0515_state )
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("i8251line", i8251_device, write_cts))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("i8251line", i8251_device, write_dsr))
// MCFG_DEVICE_ADD("line_clock", CLOCK, 4800*16) // 8251 is set to /16 on the clock input
// MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(ms0515_state, write_line_clock))
// MCFG_DEVICE_ADD("line_clock", CLOCK, 4800*16) // 8251 is set to /16 on the clock input
// MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(ms0515_state, write_line_clock))
// serial connection to MS7004 keyboard
MCFG_DEVICE_ADD("i8251kbd", I8251, 0)
@ -552,11 +552,11 @@ static MACHINE_CONFIG_START( ms0515, ms0515_state )
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL_2MHz)
// MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_keyboard_clock))
// MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_keyboard_clock))
MCFG_PIT8253_CLK1(XTAL_2MHz)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ms0515_state, write_line_clock))
MCFG_PIT8253_CLK2(XTAL_2MHz)
// MCFG_PIT8253_OUT2_HANDLER(WRITELINE())
// MCFG_PIT8253_OUT2_HANDLER(WRITELINE())
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)

View File

@ -1763,7 +1763,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi2_state )
AM_RANGE(0x025f8000, 0x025f9fff) AM_DEVICE32("powervr2_slave", powervr2_device, ta_map, 0xffffffffffffffffU)
// AM_RANGE(0x025f6800, 0x025f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w ) // second PVR DMA!
// AM_RANGE(0x025f7c00, 0x025f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, 0xffffffffffffffffU)
// AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, 0xffffffffffffffffU)
// AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, 0xffffffffffffffffU)
/* Area 1 */
AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE("dc_texture_ram") // texture memory 64 bit access
@ -6937,23 +6937,23 @@ ROM_END
// ID# 837-14114-01-91
// ROM board ID# 840-0078B REV.B
ROM_START( shors2k1 )
NAOMI_BIOS
NAOMI_DEFAULT_EEPROM
NAOMI_BIOS
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0x7800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD("epr-23739b.ic22", 0x00000000, 0x00400000, CRC(2d19b6a2) SHA1(1cf0294a32a870b34164786db9df29dd23cf790a) )
ROM_LOAD("mpr-23740.ic1", 0x00800000, 0x01000000, CRC(e84f8611) SHA1(4b6f174cac37b6c50d2151e25bba52c87ac738fe) )
ROM_LOAD("mpr-23741.ic2", 0x01800000, 0x01000000, CRC(5fd84c54) SHA1(2913a1d67674de2cc0165ec0e7556288ca2ea6c6) )
ROM_LOAD("mpr-23742.ic3", 0x02800000, 0x01000000, CRC(240e1779) SHA1(ac25c217e9772d16465f26d1ad7f514d745e9ec2) )
ROM_LOAD("mpr-23743.ic4", 0x03800000, 0x01000000, CRC(d9dc0a12) SHA1(d374a09d6e7a94075720b137879e64daca197ef8) )
ROM_LOAD("mpr-23744.ic5", 0x04800000, 0x01000000, CRC(95759982) SHA1(e09c20d1acad55f8cfb38dfec7c55ec97165190c) )
ROM_LOAD("mpr-23745.ic6", 0x05800000, 0x01000000, CRC(0eda5807) SHA1(589aac6262dc4168793fd41bb88760123408328f) )
ROM_LOAD("mpr-23746.ic7", 0x06800000, 0x01000000, CRC(955bb184) SHA1(05436d4eed330bc0b71897650d9df601453cde6f) )
ROM_REGION( 0x7800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD("epr-23739b.ic22", 0x00000000, 0x00400000, CRC(2d19b6a2) SHA1(1cf0294a32a870b34164786db9df29dd23cf790a) )
ROM_LOAD("mpr-23740.ic1", 0x00800000, 0x01000000, CRC(e84f8611) SHA1(4b6f174cac37b6c50d2151e25bba52c87ac738fe) )
ROM_LOAD("mpr-23741.ic2", 0x01800000, 0x01000000, CRC(5fd84c54) SHA1(2913a1d67674de2cc0165ec0e7556288ca2ea6c6) )
ROM_LOAD("mpr-23742.ic3", 0x02800000, 0x01000000, CRC(240e1779) SHA1(ac25c217e9772d16465f26d1ad7f514d745e9ec2) )
ROM_LOAD("mpr-23743.ic4", 0x03800000, 0x01000000, CRC(d9dc0a12) SHA1(d374a09d6e7a94075720b137879e64daca197ef8) )
ROM_LOAD("mpr-23744.ic5", 0x04800000, 0x01000000, CRC(95759982) SHA1(e09c20d1acad55f8cfb38dfec7c55ec97165190c) )
ROM_LOAD("mpr-23745.ic6", 0x05800000, 0x01000000, CRC(0eda5807) SHA1(589aac6262dc4168793fd41bb88760123408328f) )
ROM_LOAD("mpr-23746.ic7", 0x06800000, 0x01000000, CRC(955bb184) SHA1(05436d4eed330bc0b71897650d9df601453cde6f) )
ROM_REGION(0x84, "some_eeprom", 0)
ROM_LOAD( "sflash.ic46", 0x000000, 0x000084, CRC(bfce576f) SHA1(c3aa638c280a12df71a09c55adc2b87c37cf4f90) )
ROM_REGION(0x84, "some_eeprom", 0)
ROM_LOAD( "sflash.ic46", 0x000000, 0x000084, CRC(bfce576f) SHA1(c3aa638c280a12df71a09c55adc2b87c37cf4f90) )
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_END
@ -10123,34 +10123,34 @@ ROM_END
/* Atomiswave */
GAME( 2001, awbios, 0, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Atomiswave Bios", GAME_FLAGS|MACHINE_IS_BIOS_ROOT )
// game "exe" build timestamps, shown in SYSTEM MENU -> TEST MODE
GAME( 2003, ggx15, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear X ver. 1.5", GAME_FLAGS) // none
GAME( 2003, sprtshot, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy USA", "Sports Shooting USA", GAME_FLAGS ) // May 02 2003 09:40:31
GAME( 2003, ggx15, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear X ver. 1.5", GAME_FLAGS) // none
GAME( 2003, sprtshot, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy USA", "Sports Shooting USA", GAME_FLAGS ) // May 02 2003 09:40:31
GAME( 2003, sushibar, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Sushi Bar", MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_SOUND )// May 23 2003 14:40:15
GAME( 2003, demofist, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Polygon Magic / Dimps", "Demolish Fist", GAME_FLAGS ) // Jun 02 2003 16:45:35
GAME( 2003, maxspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "SIMS / Sammy", "Maximum Speed", GAME_FLAGS ) // Jun 09 2003 10:20:37
GAME( 2003, dolphin, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dolphin Blue", GAME_FLAGS) // Jun 27 2003 09:00:03
GAME( 2003, kov7sprt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "IGS / Sammy", "Knights of Valour - The Seven Spirits", GAME_FLAGS) // Nov 24 2003 16:56:01
GAME( 2004, ggisuka, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear Isuka", GAME_FLAGS) // Jan 14 2004 10:04:24
GAME( 2004, rumblefp, rumblef, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish (prototype)", GAME_FLAGS) // Feb 20 2004 09:15:34
GAME( 2004, rangrmsn, awbios, aw2c, aw1w, atomiswave_state, atomiswave, ROT0, "RIZ Inc./ Sammy", "Ranger Mission", GAME_FLAGS ) // Mar 01 2004 19:08:15
GAME( 2004, rumblef, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish", GAME_FLAGS) // Mar 10 2004 19:07:43
GAME( 2004, salmankt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Yuki Enterprise / Sammy", "Net Select: Salaryman Kintaro", GAME_FLAGS ) // Jun 14 2004 22:50:03
GAME( 2004, kofnw, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, kofnwj, kofnw, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave (Japan)", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, ftspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "Sammy", "Faster Than Speed", GAME_FLAGS ) // Aug 24 2004 18:40:24
GAME( 2004, xtrmhunt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Extreme Hunting", GAME_FLAGS ) // Nov 23 2004 10:14:14
GAME( 2005, rumblf2p, rumblef2, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2 (prototype)", GAME_FLAGS ) // Jan 11 2005 14:31:05
GAME( 2005, anmlbskt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT270, "MOSS / Sammy", "Animal Basket", GAME_FLAGS ) // Jan 24 2005 14:12:29
GAME( 2005, vfurlong, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Progress / Sammy", "Net Select Horse Racing: Victory Furlong", GAME_FLAGS ) // Mar 02 2005 22:10:33
GAME( 2005, rumblef2, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2", GAME_FLAGS ) // Mar 04 2005 19:26:32
GAME( 2005, ngbc, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, ngbcj, ngbc, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum (Japan)", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, samsptk, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "Samurai Spirits Tenkaichi Kenkakuden", GAME_FLAGS ) // Aug 05 2005 16:43:48
GAME( 2005, kofxi, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters XI", GAME_FLAGS ) // Aug 07 2005 18:11:25
GAME( 2005, fotns, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sega", "Fist Of The North Star", GAME_FLAGS ) // Nov 28 2005 21:04:40
GAME( 2006, mslug6, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega / SNK Playmore", "Metal Slug 6", GAME_FLAGS) // Jan 13 2006 00:49:12
GAME( 2006, xtrmhnt2, awbios, aw2c, aw2c, atomiswave_state, xtrmhnt2, ROT0, "Sega", "Extreme Hunting 2", GAME_FLAGS ) // May 26 2006 14:03:22
GAME( 2006, dirtypig, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dirty Pigskin Football", GAME_FLAGS) // Sep 10 2006 20:24:14
GAME( 2008, claychal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Clay Challenge", GAME_FLAGS ) // Oct 15 2008 16:08:20
GAME( 2009, basschalo, basschal, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge", GAME_FLAGS ) // Feb 08 2009 22:35:34
GAME( 2009, basschal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge Version A", GAME_FLAGS ) // Jul 25 2009 16:27:40
GAME( 2003, demofist, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Polygon Magic / Dimps", "Demolish Fist", GAME_FLAGS ) // Jun 02 2003 16:45:35
GAME( 2003, maxspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "SIMS / Sammy", "Maximum Speed", GAME_FLAGS ) // Jun 09 2003 10:20:37
GAME( 2003, dolphin, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dolphin Blue", GAME_FLAGS) // Jun 27 2003 09:00:03
GAME( 2003, kov7sprt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "IGS / Sammy", "Knights of Valour - The Seven Spirits", GAME_FLAGS) // Nov 24 2003 16:56:01
GAME( 2004, ggisuka, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sammy", "Guilty Gear Isuka", GAME_FLAGS) // Jan 14 2004 10:04:24
GAME( 2004, rumblefp, rumblef, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish (prototype)", GAME_FLAGS) // Feb 20 2004 09:15:34
GAME( 2004, rangrmsn, awbios, aw2c, aw1w, atomiswave_state, atomiswave, ROT0, "RIZ Inc./ Sammy", "Ranger Mission", GAME_FLAGS ) // Mar 01 2004 19:08:15
GAME( 2004, rumblef, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish", GAME_FLAGS) // Mar 10 2004 19:07:43
GAME( 2004, salmankt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Yuki Enterprise / Sammy", "Net Select: Salaryman Kintaro", GAME_FLAGS ) // Jun 14 2004 22:50:03
GAME( 2004, kofnw, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, kofnwj, kofnw, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave (Japan)", GAME_FLAGS ) // Jul 09 2004 15:05:53
GAME( 2004, ftspeed, awbios, aw1c, aw1w, atomiswave_state, atomiswave, ROT0, "Sammy", "Faster Than Speed", GAME_FLAGS ) // Aug 24 2004 18:40:24
GAME( 2004, xtrmhunt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Extreme Hunting", GAME_FLAGS ) // Nov 23 2004 10:14:14
GAME( 2005, rumblf2p, rumblef2, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2 (prototype)", GAME_FLAGS ) // Jan 11 2005 14:31:05
GAME( 2005, anmlbskt, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT270, "MOSS / Sammy", "Animal Basket", GAME_FLAGS ) // Jan 24 2005 14:12:29
GAME( 2005, vfurlong, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Progress / Sammy", "Net Select Horse Racing: Victory Furlong", GAME_FLAGS ) // Mar 02 2005 22:10:33
GAME( 2005, rumblef2, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / Dimps", "The Rumble Fish 2", GAME_FLAGS ) // Mar 04 2005 19:26:32
GAME( 2005, ngbc, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, ngbcj, ngbc, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "NeoGeo Battle Coliseum (Japan)", GAME_FLAGS ) // Jun 25 2005 17:00:38
GAME( 2005, samsptk, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "Samurai Spirits Tenkaichi Kenkakuden", GAME_FLAGS ) // Aug 05 2005 16:43:48
GAME( 2005, kofxi, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy / SNK Playmore", "The King of Fighters XI", GAME_FLAGS ) // Aug 07 2005 18:11:25
GAME( 2005, fotns, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Arc System Works / Sega", "Fist Of The North Star", GAME_FLAGS ) // Nov 28 2005 21:04:40
GAME( 2006, mslug6, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega / SNK Playmore", "Metal Slug 6", GAME_FLAGS) // Jan 13 2006 00:49:12
GAME( 2006, xtrmhnt2, awbios, aw2c, aw2c, atomiswave_state, xtrmhnt2, ROT0, "Sega", "Extreme Hunting 2", GAME_FLAGS ) // May 26 2006 14:03:22
GAME( 2006, dirtypig, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sammy", "Dirty Pigskin Football", GAME_FLAGS) // Sep 10 2006 20:24:14
GAME( 2008, claychal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Clay Challenge", GAME_FLAGS ) // Oct 15 2008 16:08:20
GAME( 2009, basschalo, basschal, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge", GAME_FLAGS ) // Feb 08 2009 22:35:34
GAME( 2009, basschal, awbios, aw2c, aw2c, atomiswave_state, atomiswave, ROT0, "Sega", "Sega Bass Fishing Challenge Version A", GAME_FLAGS ) // Jul 25 2009 16:27:40

View File

@ -105,7 +105,7 @@ i/o ports:
85 PIO PORT B
bit 0-2 = light organ
bit 3-4 = control panel (not connected)
bit 3-4 = control panel (not connected)
bit 5-7 = sound parameter (not used on production units?)
86 PIO CTRL A

View File

@ -177,7 +177,7 @@ WRITE_LINE_MEMBER(prodigy_state::irq_handler)
*/
WRITE8_MEMBER( prodigy_state::via_pb_w ) // Needs to trace which port decides what digit
{
LOGBCD("%s: %02x ANODE %02x\n", FUNCNAME, data, data & 0x03);
LOGBCD("%s: %02x ANODE %02x\n", FUNCNAME, data, data & 0x03);
m_74145->write( data & 0x0f ); // Write PB0-PB3 to the 74145
}

View File

@ -32,8 +32,8 @@
1992 Tant-R (Korea) Sega ? C2
1992 Waku Waku Marine Sega 317-0140 C2
1993 SegaSonic Popcorn Shop Sega 317-0140 C2
1993 Sega Sonic Cosmo Fighter Sega 317-0140 C2
1994 PotoPoto (Japan) Sega 317-0218 C2
1993 Sega Sonic Cosmo Fighter Sega 317-0140 C2
1994 PotoPoto (Japan) Sega 317-0218 C2
1994 Stack Columns (Japan) Sega 317-0219 C2
1994 Stack Columns (World) Sega 317-0223 C2
1994 Ichidant-R (Japan) Sega 317-0224 C2

View File

@ -151,7 +151,7 @@ protected:
WRITE_LINE_MEMBER(tmaster_state::blitter_irq_callback)
{
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
// logerror("%s: Blitter IRQ callback state = %x\n", machine().describe_context(), state);
m_maincpu->set_input_line(2, state);
}

View File

@ -90,9 +90,9 @@ public:
DECLARE_READ8_MEMBER(intvkbd_periph_r);
DECLARE_WRITE8_MEMBER(intvkbd_periph_w);
bool m_printer_not_busy; // printer state
bool m_printer_no_paper; // printer state
bool m_printer_not_busy_enable; // printer interface state
bool m_printer_not_busy; // printer state
bool m_printer_no_paper; // printer state
bool m_printer_not_busy_enable; // printer interface state
int m_intvkbd_text_blanked;
int m_intvkbd_keyboard_col;

View File

@ -382,13 +382,13 @@ READ8_MEMBER(apple2_state::apple2_c080_r)
}
/* now identify the device */
slotdevice = m_a2bus->get_a2bus_card(slot);
slotdevice = m_a2bus->get_a2bus_card(slot);
/* and if we can, read from the slot */
if (slotdevice != nullptr)
{
return slotdevice->read_c0nx(space, offset % 0x10);
}
/* and if we can, read from the slot */
if (slotdevice != nullptr)
{
return slotdevice->read_c0nx(space, offset % 0x10);
}
}
return 0;

View File

@ -614,9 +614,9 @@ void interpro_ioga_device::drq(int state, int channel)
/*
0x94: error address reg: expect 0x7f200000 after bus error (from dma virtual address)
0x98: error cycle type: expect 0x52f0 (after failed dma?)
0x5331 - forced berr with nmi/interrupts disabled?
0xc2f0
0x62f0
0x5331 - forced berr with nmi/interrupts disabled?
0xc2f0
0x62f0
*/
// TODO: 7.0266 - forced BERR not working

View File

@ -35,10 +35,10 @@
#define IOGA_TIMER1_EXPIRED 0x20000
// best guess for timer 3 is 12.5MHz based on typical value of 12500 for a delay of 1ms
#define IOGA_TIMER3_CLOCK XTAL_12_5MHz
#define IOGA_TIMER3_CLOCK XTAL_12_5MHz
#define IOGA_TIMER3_IRQ 1
#define IOGA_TIMER3_VMASK 0x3fffffff
#define IOGA_TIMER3_START 0x40000000
#define IOGA_TIMER3_START 0x40000000
#define IOGA_TIMER3_EXPIRED 0x80000000
#define IOGA_INTERRUPT_COUNT 19

View File

@ -69,8 +69,8 @@ WRITE16_MEMBER(interpro_mcga_device::write)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_reg[4] |= MCGA_ERROR_VALID;
// else
// m_reg[4] &= ~MCGA_ERROR_VALID;
// else
// m_reg[4] &= ~MCGA_ERROR_VALID;
default:
m_reg[offset] = data;

View File

@ -18,7 +18,7 @@
#define MCGA_CTRL_WRPROT 0x00008000
// mcga error register
#define MCGA_ERROR_VALID 0x00008000
#define MCGA_ERROR_VALID 0x00008000
class interpro_mcga_device : public device_t
{

View File

@ -52,21 +52,21 @@ WRITE8_MEMBER( intv_state::intvkbd_dualport8_msb_w )
struct tape_drive_state_type
{
/* read state */
int read_data; /* 0x4000 */
int ready; /* 0x4001 */
int leader_detect; /* 0x4002 */
int tape_missing; /* 0x4003 */
int playing; /* 0x4004 */
int no_data; /* 0x4005 */
int read_data; /* 0x4000 */
int ready; /* 0x4001 */
int leader_detect; /* 0x4002 */
int tape_missing; /* 0x4003 */
int playing; /* 0x4004 */
int no_data; /* 0x4005 */
/* write state */
int motor_state; /* 0x4020-0x4022 */
int writing; /* 0x4023 */
int audio_b_mute; /* 0x4024 */
int audio_a_mute; /* 0x4025 */
int channel_select; /* 0x4026 */
int erase; /* 0x4027 */
int write_data; /* 0x4040 */
int motor_state; /* 0x4020-0x4022 */
int writing; /* 0x4023 */
int audio_b_mute; /* 0x4024 */
int audio_a_mute; /* 0x4025 */
int channel_select; /* 0x4026 */
int erase; /* 0x4027 */
int write_data; /* 0x4040 */
/* bit_counter */
int bit_counter;
@ -74,8 +74,8 @@ struct tape_drive_state_type
//static const char *const tape_motor_mode_desc[8] =
//{
// "IDLE", "IDLE", "IDLE", "IDLE",
// "EJECT", "PLAY/RECORD", "REWIND", "FF"
// "IDLE", "IDLE", "IDLE", "IDLE",
// "EJECT", "PLAY/RECORD", "REWIND", "FF"
//};
@ -213,7 +213,7 @@ WRITE8_MEMBER( intv_state::intvkbd_io_w )
case 0x026:
// "Tape Drive Control: Mode"
// If read mode:
// 0=Read Channel B Data, 1 = Read Channel A Data
// 0=Read Channel B Data, 1 = Read Channel A Data
// If write mode:
// 0=Write Channel B data, 1 = Record Channel B Audio
tape_drive.channel_select = (data & 1);
@ -561,9 +561,9 @@ void intv_state::machine_reset()
if (m_is_keybd)
{
m_printer_not_busy = true; // printer state
m_printer_no_paper = false; // printer state
m_printer_not_busy_enable = false; // printer interface state
m_printer_not_busy = true; // printer state
m_printer_no_paper = false; // printer state
m_printer_not_busy_enable = false; // printer interface state
}
}

View File

@ -8,7 +8,7 @@
***************************************************************************/
#ifndef __PLIB_PREPROCESSOR__
#define NL_PROHIBIT_BASEH_INCLUDE 1
#define NL_PROHIBIT_BASEH_INCLUDE 1
#include "netlist/devices/net_lib.h"
#endif

View File

@ -1493,7 +1493,7 @@ swhr2
swhr2u // (c) 1998
swhr2v // (c) 1995
topbana
toutango // (c) 1998
toutango // (c) 1998
trstrove
tritreat
trojhors
@ -2585,7 +2585,7 @@ bldwolfj // (c) 1988 Data East Corporation (Japan)
@source:battlex.cpp
battlex // (c) 1982 Omori E. Co., Ltd.
dodgeman //
dodgeman //
@source:battlnts.cpp
battlnts // GX777 (c) 1987
@ -12478,7 +12478,7 @@ fp200 //
fp6000 //
@source:freekick.cpp
omega // (c) 1986 Nihon System
omega // (c) 1986 Nihon System
countrun // (c) 1988 Nihon System (+ optional Sega) NS6201-A 1988.3
countrunb // (c) 1988 bootleg
countrunb2 // (c) 1988 bootleg

View File

@ -1242,7 +1242,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1269,7 +1269,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1297,7 +1297,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1346,7 +1346,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1395,7 +1395,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1448,7 +1448,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1501,7 +1501,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1576,7 +1576,7 @@ void n64_rdp::disassemble(char* buffer)
sprintf(ym, "%4.4f", (float)((cmd[0] >> 16) & 0x1fff) / 4.0f);
sprintf(yh, "%4.4f", (float)((cmd[0] >> 0) & 0x1fff) / 4.0f);
sprintf(xl, "%4.4f", (float)int32_t(cmd[1] >> 32) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(dxldy, "%4.4f", (float)int32_t(cmd[1]) / 65536.0f);
sprintf(xh, "%4.4f", (float)int32_t(cmd[2] >> 32) / 65536.0f);
sprintf(dxhdy, "%4.4f", (float)int32_t(cmd[2]) / 65536.0f);
sprintf(xm, "%4.4f", (float)int32_t(cmd[3] >> 32) / 65536.0f);
@ -1861,7 +1861,7 @@ void n64_rdp::compute_cvg_flip(extent_t* spans, int32_t* majorx, int32_t* minorx
}
}
#define SIGN(x, numb) (((x) & ((1 << numb) - 1)) | -((x) & (1 << (numb - 1))))
#define SIGN(x, numb) (((x) & ((1 << numb) - 1)) | -((x) & (1 << (numb - 1))))
void n64_rdp::draw_triangle(bool shade, bool texture, bool zbuffer, bool rect)
{

View File

@ -220,8 +220,8 @@ void pin64_block_t::write(FILE* file) {
uint32_t pin64_block_t::size() {
return sizeof(uint32_t) // data CRC32
+ sizeof(uint32_t) // data size
+ m_data.size(); // data
+ sizeof(uint32_t) // data size
+ m_data.size(); // data
}
@ -367,11 +367,11 @@ size_t pin64_t::size() {
size_t pin64_t::header_size() {
return sizeof(uint8_t) * 8 // "PIN64CAP"
+ sizeof(uint32_t) // total file size
+ sizeof(uint32_t) // start of block directory data
+ sizeof(uint32_t) // start of command-list directory data
+ sizeof(uint32_t) // start of blocks
+ sizeof(uint32_t); // start of commands
+ sizeof(uint32_t) // total file size
+ sizeof(uint32_t) // start of block directory data
+ sizeof(uint32_t) // start of command-list directory data
+ sizeof(uint32_t) // start of blocks
+ sizeof(uint32_t); // start of commands
}
size_t pin64_t::block_directory_size() {