From 8f2c0c58c26a45ee0e173afe4291354297ad4ac3 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Sat, 13 May 2017 19:40:07 -0600 Subject: [PATCH] vrc5074: Fixed serial register handling. (nw) --- src/devices/machine/vrc5074.cpp | 6 +++--- src/devices/machine/vrc5074.h | 24 ++++++++++++------------ 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 8eacb125716..4d8285e24f0 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -559,7 +559,7 @@ void vrc5074_device::update_nile_irqs() int i; /* check for UART transmit IRQ enable and synthsize one */ - if (m_cpu_regs[NREG_UARTIER] & 2) + if (m_serial_regs[NREG_UARTIER] & 2) m_nile_irq_state |= 0x0010; else m_nile_irq_state &= ~0x0010; @@ -906,7 +906,7 @@ READ32_MEMBER(vrc5074_device::serial_r) uint32_t result = m_serial_regs[offset]; bool logit = true; - switch (offset + 0x300 / 4) + switch (offset) { case NREG_UARTIIR: /* serial port interrupt ID */ @@ -934,7 +934,7 @@ WRITE32_MEMBER(vrc5074_device::serial_w) bool logit = true; COMBINE_DATA(&m_serial_regs[offset]); - switch (offset + 0x300 / 4) + switch (offset) { case NREG_UARTTHR: /* serial port output */ diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h index ca2e6d760e9..f1e2e01787a 100644 --- a/src/devices/machine/vrc5074.h +++ b/src/devices/machine/vrc5074.h @@ -75,18 +75,18 @@ #define NREG_T3CNTR (0x1F8/4) /* NILE 4 registers 0x300-0x3ff */ -#define NREG_UARTRBR (0x300/4) -#define NREG_UARTTHR (0x300/4) -#define NREG_UARTIER (0x308/4) -#define NREG_UARTDLL (0x300/4) -#define NREG_UARTDLM (0x308/4) -#define NREG_UARTIIR (0x310/4) -#define NREG_UARTFCR (0x310/4) -#define NREG_UARTLCR (0x318/4) -#define NREG_UARTMCR (0x320/4) -#define NREG_UARTLSR (0x328/4) -#define NREG_UARTMSR (0x330/4) -#define NREG_UARTSCR (0x338/4) +#define NREG_UARTRBR (0x00/4) +#define NREG_UARTTHR (0x00/4) +#define NREG_UARTIER (0x08/4) +#define NREG_UARTDLL (0x00/4) +#define NREG_UARTDLM (0x08/4) +#define NREG_UARTIIR (0x10/4) +#define NREG_UARTFCR (0x10/4) +#define NREG_UARTLCR (0x18/4) +#define NREG_UARTMCR (0x20/4) +#define NREG_UARTLSR (0x28/4) +#define NREG_UARTMSR (0x30/4) +#define NREG_UARTSCR (0x38/4) /* NILE 4 interrupts */ #define NINT_CPCE (0)