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Fix spelling (#5770)
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@ -498,7 +498,7 @@ upon exit, the \-str option will write a screenshot called final.png
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to the game's snapshot directory.
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.TP
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.B \-[no]throttle
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Configures the default thottling setting. When throttling is on, MAME
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Configures the default throttling setting. When throttling is on, MAME
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attempts to keep the game running at the game's intended speed. When
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throttling is off, MAME runs the game as fast as it can. Note that the
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fastest speed is more often than not limited by your graphics card,
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@ -77,7 +77,7 @@
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| MV-1C | 1999 | 1 | 5 | NEO-GRZ | Final iteration, vertical cartridge slot |
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+---------+------+-------+------------+-----------------------+--------------------------------------------------------------------------+
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| MV-2B | | 2 | 1 | PRO-B0/PRO-C0/LSPC-A0 | Original full-featured 2-slot board |
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| MV-2F | | 2 | 2 | NEO-B1/LSPC2-A2 | 2nd-geneation 2-slot board, onboard PCMCIA slot and 3.5mm jacks |
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| MV-2F | | 2 | 2 | NEO-B1/LSPC2-A2 | 2nd-generation 2-slot board, onboard PCMCIA slot and 3.5mm jacks |
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| MV-2FS | | 2 | 2 | NEO-B1/LSPC2-A2 | Spanish MV-2F |
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+---------+------+-------+------------+-----------------------+--------------------------------------------------------------------------+
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| MV-4 | 1990 | 4 | 1 | PRO-B0/PRO-C0/LSPC-A0 | Original 4-slot board |
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@ -346,7 +346,7 @@
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wide range of 'bootleg' PCBs.
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Unofficial pcb's from NG:DEV.TEAM:
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Unofficial PCBs from NG:DEV.TEAM:
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MVS CHA:
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GIGA CHAR Board 1.0 Rev. A
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@ -359,7 +359,7 @@
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GIGA PROG Board 1.5 Rev. C
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Unofficial pcb's from NEOBITZ:
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Unofficial PCBs from NEOBITZ:
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MVS CHA:
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CHARBITZ1 2013.12.01
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@ -516,7 +516,7 @@
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backup ram it will initialize it, then sit in a loop. The watchdog
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should then reset the system while it is in this loop. If the watchdog
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fails to reset the system the code will continue and set a value in
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backup ram to indiate that the protection check has failed.
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backup ram to indicate that the protection check has failed.
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****************************************************************************
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@ -2895,14 +2895,14 @@ void mvs_led_state::sbp(machine_config &config)
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S1 (text layer) rom information:
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================================
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. All 'S1' roms found on prom are 1mbit.
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. The remainig 64k 'S1' are marked BAD_DUMP.
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. The remaining 64k 'S1' are marked BAD_DUMP.
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MULTI PLAY MODE:
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================
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The NeoGeo has three games which support MULTI PLAY MODE (Riding Hero / League Bowling / Trash Rally).
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This allows you to 'link' 4 games (MVS) / 2 games (AES) using in game 'Multi-Play' option. To establish
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a link between the carts you have to connect the carts to each other by a communicator cable. The communicatior
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a link between the carts you have to connect the carts to each other by a communicator cable. The communicator
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cable is a regular headphone cable with stereo pin jack. It has been reported that you can also 'link' MVS <-> AES.
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All three games use a special PROG board for MULTI PLAY MODE support:
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@ -2923,7 +2923,7 @@ void mvs_led_state::sbp(machine_config &config)
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SPHERO SYMPHONY:
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================
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Several early games have a 'feature' called "sphero symphony". None of the games featuring "sphero symphony"
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uses special hardware. It is something sound based, but what exactly it is (specially arragend samples,
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uses special hardware. It is something sound based, but what exactly it is (specially arranged samples,
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FM synthesis etc.) is unknown. The AES and MVS releases share the same sound data and driver.
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The AES game-inserts and manuals have an eye-shaped logo with the following text (not to be found on MVS sets):
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@ -3288,7 +3288,7 @@ ROM_END
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ROM_START( ridheroh )
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ROM_REGION( 0x100000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT )
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ROM_LOAD16_WORD_SWAP( "006-pg1.p1", 0x000000, 0x080000, BAD_DUMP CRC(52445646) SHA1(647bb31f2f68453c1366cb6e2e867e37d1df7a54) )
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/* Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. */
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/* Chip label p1h does not exist, renamed temporarily to pg1, marked BAD_DUMP. This needs to be verified. */
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ROM_REGION( 0x2000, "mcu", 0 ) /* Hitachi HD6301V1 MCU */
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ROM_LOAD( "rhcom.bin", 0x0000, 0x2000, CRC(e5cd6306) SHA1(f6bbb8ae562804d67e137290c765c3589fa334c0) ) // dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally)
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@ -4176,7 +4176,7 @@ ROM_END
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ROM_START( 2020bbh )
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ROM_REGION( 0x100000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT )
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ROM_LOAD16_WORD_SWAP( "030-pg1.p1", 0x000000, 0x080000, BAD_DUMP CRC(12d048d7) SHA1(ee0d03a565b11ca3bee2d24f62ff46a85ef18d90) )
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/* Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. */
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/* Chip label p1h does not exist, renamed temporarily to pg1, marked BAD_DUMP. This needs to be verified. */
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NEO_SFIX_128K( "030-s1.s1", CRC(7015b8fc) SHA1(8c09bc3e6c62e0f7c9557c1e10c901be325bae7f) ) /* TC531000 */
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@ -7872,7 +7872,7 @@ ROM_START( irrmaze ) /* MVS ONLY RELEASE */
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NEO_SFIX_128K( "236-s1.s1", CRC(5d1ca640) SHA1(40a9668a1742a44597a07ce72273d17119815637) ) /* TC531000 */
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ROM_REGION16_BE( 0x20000, "mainbios", 0 )
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/* special BIOS with trackball support, we only have one Irritating Maze bios and thats asia */
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/* special BIOS with trackball support, we only have one Irritating Maze bios and that's Asian */
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ROM_LOAD16_WORD_SWAP("236-bios.sp1", 0x00000, 0x020000, CRC(853e6b96) SHA1(de369cb4a7df147b55168fa7aaf0b98c753b735e) )
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ROM_REGION( 0x30000, "cslot1:audiocpu", 0 )
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@ -542,7 +542,7 @@ int32_t ngcd_state::SekIdle(int32_t nCycles)
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* DMA
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FF0061 Write 0x40 means start DMA transfer
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FF0064 Source address (in copy mode), Target address (in filll mode)
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FF0064 Source address (in copy mode), Target address (in fill mode)
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FF0068 Target address (in copy mode)
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FF006C Fill word
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FF0070 Words count
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@ -586,7 +586,7 @@ void ngcd_state::do_dma(address_space& curr_space)
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{
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// The LC8953 chip has a programmable DMA controller, which is not properly emulated.
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// Since the software only uses it in a limited way, we can apply a simple heuristic
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// to determnine the requested operation.
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// to determine the requested operation.
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// Additionally, we don't know how many cycles DMA operations take.
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// Here, only bus access is used to get a rough approximation --
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