-chexx, concept: MCFG removals, nw

This commit is contained in:
mooglyguy 2018-08-09 09:23:08 +02:00
parent f3db8dc68f
commit 9025271d3e
4 changed files with 161 additions and 123 deletions

View File

@ -36,16 +36,15 @@ public:
, m_maincpu(*this, "maincpu")
, m_via(*this, "via6522")
, m_digitalker(*this, "digitalker")
, m_aysnd(*this, "aysnd")
, m_digits(*this, "digit%u", 0U)
, m_leds(*this, "led%u", 0U)
, m_lamps(*this, "lamp%u", 0U)
, m_dsw(*this, "DSW")
, m_input(*this, "INPUT")
, m_coin(*this, "COIN")
{
}
// callbacks
TIMER_DEVICE_CALLBACK_MEMBER(update);
// handlers
DECLARE_READ8_MEMBER(via_a_in);
DECLARE_READ8_MEMBER(via_b_in);
@ -60,21 +59,20 @@ public:
DECLARE_READ8_MEMBER(input_r);
DECLARE_WRITE8_MEMBER(ay_w);
DECLARE_WRITE8_MEMBER(lamp_w);
void faceoffh(machine_config &config);
void chexx83(machine_config &config);
void chexx83_map(address_map &map);
void faceoffh_map(address_map &map);
void chexx(machine_config &config);
void mem(address_map &map);
private:
// vars
uint8_t m_port_a, m_port_b;
uint8_t m_bank;
uint32_t m_shift;
uint8_t m_lamp;
uint8_t m_ay_cmd, m_ay_data;
protected:
enum
{
TIMER_UPDATE
};
void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
void update();
// digitalker
void digitalker_set_bank(uint8_t bank);
@ -87,10 +85,42 @@ private:
required_device<cpu_device> m_maincpu;
required_device<via6522_device> m_via;
required_device<digitalker_device> m_digitalker;
optional_device<ay8910_device> m_aysnd; // only faceoffh
output_finder<4> m_digits;
output_finder<3> m_leds;
output_finder<2> m_lamps;
required_ioport m_dsw;
required_ioport m_input;
required_ioport m_coin;
// vars
emu_timer *m_update_timer;
uint8_t m_port_a;
uint8_t m_port_b;
uint8_t m_bank;
uint32_t m_shift;
uint8_t m_lamp;
};
class faceoffh_state : public chexx_state
{
public:
faceoffh_state(const machine_config &mconfig, device_type type, const char *tag)
: chexx_state(mconfig, type, tag)
, m_aysnd(*this, "aysnd")
{
}
void faceoffh(machine_config &config);
protected:
DECLARE_WRITE8_MEMBER(ay_w);
void mem(address_map &map);
required_device<ay8910_device> m_aysnd; // only faceoffh
uint8_t m_ay_cmd;
uint8_t m_ay_data;
};
@ -102,6 +132,7 @@ READ8_MEMBER(chexx_state::via_a_in)
logerror("%s: VIA read A: %02X\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(chexx_state::via_b_in)
{
uint8_t ret = 0;
@ -112,11 +143,10 @@ READ8_MEMBER(chexx_state::via_b_in)
WRITE8_MEMBER(chexx_state::via_a_out)
{
m_port_a = data; // multiplexer
m_digitalker->digitalker_data_w(space, 0, data, 0);
// logerror("%s: VIA write A = %02X\n", machine().describe_context(), data);
}
WRITE8_MEMBER(chexx_state::via_b_out)
{
m_port_b = data;
@ -138,10 +168,12 @@ WRITE_LINE_MEMBER(chexx_state::via_ca2_out)
// logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state);
}
WRITE_LINE_MEMBER(chexx_state::via_cb1_out)
{
// logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state);
}
WRITE_LINE_MEMBER(chexx_state::via_cb2_out)
{
m_shift = ((m_shift << 1) & 0xffffff) | state;
@ -161,6 +193,7 @@ WRITE_LINE_MEMBER(chexx_state::via_cb2_out)
// logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state);
}
WRITE_LINE_MEMBER(chexx_state::via_irq_out)
{
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
@ -169,11 +202,11 @@ WRITE_LINE_MEMBER(chexx_state::via_irq_out)
READ8_MEMBER(chexx_state::input_r)
{
uint8_t ret = ioport("DSW")->read(); // bits 0-3
uint8_t inp = ioport("INPUT")->read(); // bit 7 (multiplexed)
uint8_t ret = m_dsw->read(); // bits 0-3
uint8_t inp = m_input->read(); // bit 7 (multiplexed)
for (int i = 0; i < 8; ++i)
if ( ((~m_port_a) & (1 << i)) && ((~inp) & (1 << i)) )
if (BIT(~m_port_a, i) && BIT(~inp, i))
ret &= 0x7f;
return ret;
@ -181,7 +214,7 @@ READ8_MEMBER(chexx_state::input_r)
// Chexx Memory Map
void chexx_state::chexx83_map(address_map &map)
void chexx_state::mem(address_map &map)
{
map(0x0000, 0x007f).ram().mirror(0x100); // 6810 - 128 x 8 static RAM
map(0x4000, 0x400f).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
@ -189,7 +222,15 @@ void chexx_state::chexx83_map(address_map &map)
map(0xf800, 0xffff).rom().region("maincpu", 0);
}
// Face-Off Memory Map
void chexx_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_UPDATE:
update();
break;
}
}
WRITE8_MEMBER(chexx_state::lamp_w)
{
@ -198,7 +239,19 @@ WRITE8_MEMBER(chexx_state::lamp_w)
m_lamps[1] = BIT(m_lamp,1);
}
WRITE8_MEMBER(chexx_state::ay_w)
// Face-Off Memory Map
void faceoffh_state::mem(address_map &map)
{
map(0x0000, 0x007f).ram().mirror(0x100); // M58725P - 2KB
map(0x4000, 0x400f).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
map(0x8000, 0x8000).r(FUNC(faceoffh_state::input_r));
map(0xa000, 0xa001).w(FUNC(faceoffh_state::ay_w));
map(0xc000, 0xc000).w(FUNC(faceoffh_state::lamp_w));
map(0xf000, 0xffff).rom().region("maincpu", 0);
}
WRITE8_MEMBER(faceoffh_state::ay_w)
{
if (offset)
{
@ -219,16 +272,6 @@ WRITE8_MEMBER(chexx_state::ay_w)
m_ay_cmd = data;
}
void chexx_state::faceoffh_map(address_map &map)
{
map(0x0000, 0x007f).ram().mirror(0x100); // M58725P - 2KB
map(0x4000, 0x400f).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
map(0x8000, 0x8000).r(FUNC(chexx_state::input_r));
map(0xa000, 0xa001).w(FUNC(chexx_state::ay_w));
map(0xc000, 0xc000).w(FUNC(chexx_state::lamp_w));
map(0xf000, 0xffff).rom().region("maincpu", 0);
}
// Inputs
static INPUT_PORTS_START( chexx83 )
@ -268,6 +311,8 @@ void chexx_state::machine_start()
m_digits.resolve();
m_leds.resolve();
m_lamps.resolve();
m_update_timer = timer_alloc(TIMER_UPDATE);
}
void chexx_state::digitalker_set_bank(uint8_t bank)
@ -287,12 +332,13 @@ void chexx_state::machine_reset()
{
m_bank = -1;
digitalker_set_bank(0);
m_update_timer->adjust(attotime::from_hz(60), 0, attotime::from_hz(60));
}
TIMER_DEVICE_CALLBACK_MEMBER(chexx_state::update)
void chexx_state::update()
{
// NMI on coin-in
uint8_t coin = (~ioport("COIN")->read()) & 0x03;
uint8_t coin = (~m_coin->read()) & 0x03;
m_maincpu->set_input_line(INPUT_LINE_NMI, coin ? ASSERT_LINE : CLEAR_LINE);
// VIA CA1 connected to Digitalker INTR line
@ -329,44 +375,42 @@ TIMER_DEVICE_CALLBACK_MEMBER(chexx_state::update)
#endif
}
MACHINE_CONFIG_START(chexx_state::chexx83)
// basic machine hardware
MCFG_DEVICE_ADD("maincpu", M6502, MAIN_CLOCK/2)
MCFG_DEVICE_PROGRAM_MAP(chexx83_map)
MCFG_TIMER_DRIVER_ADD_PERIODIC("update", chexx_state, update, attotime::from_hz(60))
void chexx_state::chexx(machine_config &config)
{
M6502(config, m_maincpu, MAIN_CLOCK/2);
m_maincpu->set_addrmap(AS_PROGRAM, &chexx_state::mem);
// via
MCFG_DEVICE_ADD("via6522", VIA6522, MAIN_CLOCK/4)
VIA6522(config, m_via, MAIN_CLOCK/4);
MCFG_VIA6522_READPA_HANDLER(READ8(*this, chexx_state, via_a_in))
MCFG_VIA6522_READPB_HANDLER(READ8(*this, chexx_state, via_b_in))
m_via->readpa_handler().set(FUNC(chexx_state::via_a_in));
m_via->readpb_handler().set(FUNC(chexx_state::via_b_in));
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, chexx_state, via_a_out))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, chexx_state, via_b_out))
m_via->writepa_handler().set(FUNC(chexx_state::via_a_out));
m_via->writepb_handler().set(FUNC(chexx_state::via_b_out));
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, chexx_state, via_ca2_out))
MCFG_VIA6522_CB1_HANDLER(WRITELINE(*this, chexx_state, via_cb1_out))
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, chexx_state, via_cb2_out))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, chexx_state, via_irq_out))
m_via->ca2_handler().set(FUNC(chexx_state::via_ca2_out));
m_via->cb1_handler().set(FUNC(chexx_state::via_cb1_out));
m_via->cb2_handler().set(FUNC(chexx_state::via_cb2_out));
m_via->irq_handler().set(FUNC(chexx_state::via_irq_out));
// Layout
config.set_default_layout(layout_chexx);
// sound hardware
SPEAKER(config, "mono").front_center();
MCFG_DIGITALKER_ADD("digitalker", MAIN_CLOCK)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.16)
MACHINE_CONFIG_END
DIGITALKER(config, m_digitalker, MAIN_CLOCK);
m_digitalker->add_route(ALL_OUTPUTS, "mono", 0.16);
}
MACHINE_CONFIG_START(chexx_state::faceoffh)
chexx83(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(faceoffh_map)
void faceoffh_state::faceoffh(machine_config &config)
{
chexx(config);
m_maincpu->set_addrmap(AS_PROGRAM, &faceoffh_state::mem);
MCFG_DEVICE_ADD("aysnd", AY8910, MAIN_CLOCK/2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MACHINE_CONFIG_END
AY8910(config, m_aysnd, MAIN_CLOCK/2);
m_aysnd->add_route(ALL_OUTPUTS, "mono", 0.30);
}
// ROMs
@ -437,5 +481,5 @@ ROM_START( faceoffh )
ROM_FILL( 0xe000, 0x2000, 0xff ) // unpopulated
ROM_END
GAME( 1983, chexx83, 0, chexx83, chexx83, chexx_state, empty_init, ROT270, "ICE", "Chexx (EM Bubble Hockey, 1983 1.1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_NO_SOUND )
GAME( 1983, faceoffh, chexx83, faceoffh, chexx83, chexx_state, empty_init, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND )
GAME( 1983, chexx83, 0, chexx, chexx83, chexx_state, empty_init, ROT270, "ICE", "Chexx (EM Bubble Hockey, 1983 1.1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_NO_SOUND )
GAME( 1983, faceoffh, chexx83, faceoffh, chexx83, faceoffh_state, empty_init, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND )

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@ -198,10 +198,6 @@ static INPUT_PORTS_START( concept )
INPUT_PORTS_END
/* init with simple, fixed, B/W palette */
/* Is the palette black on white or white on black??? */
void concept_a2_cards(device_slot_interface &device)
{
device.option_add("fchdd", A2BUS_CORVUS); // Corvus flat-cable HDD interface (see notes in a2corvus.c)
@ -210,56 +206,58 @@ void concept_a2_cards(device_slot_interface &device)
}
MACHINE_CONFIG_START(concept_state::concept)
void concept_state::concept(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD(m_maincpu, M68000, 8182000) /* 16.364 MHz / 2 */
MCFG_DEVICE_PROGRAM_MAP(concept_memmap)
M68000(config, m_maincpu, 8182000); /* 16.364 MHz / 2 */
m_maincpu->set_addrmap(AS_PROGRAM, &concept_state::concept_memmap);
MCFG_QUANTUM_TIME(attotime::from_hz(60))
config.m_minimum_quantum = attotime::from_hz(60);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
MCFG_SCREEN_REFRESH_RATE(60) /* 50 or 60, jumper-selectable */
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(720, 560)
MCFG_SCREEN_VISIBLE_AREA(0, 720-1, 0, 560-1)
MCFG_SCREEN_UPDATE_DRIVER(concept_state, screen_update_concept)
MCFG_SCREEN_PALETTE("palette")
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
screen.set_refresh_hz(60); /* 50 or 60, jumper-selectable */
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
screen.set_size(720, 560);
screen.set_visarea(0, 720-1, 0, 560-1);
screen.set_screen_update(FUNC(concept_state::screen_update));
screen.set_palette("palette");
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* Is the palette black on white or white on black??? */
palette_device &palette(PALETTE(config, "palette", 2));
palette.set_init("palette", FUNC(palette_device::palette_init_monochrome));
/* sound */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD(SPEAKER_TAG, SPEAKER_SOUND)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
SPEAKER_SOUND(config, m_speaker);
m_speaker->add_route(ALL_OUTPUTS, "mono", 1.00);
/* rtc */
MCFG_DEVICE_ADD("mm58274c", MM58274C, 0)
MCFG_MM58274C_MODE24(0) // 12 hour
MCFG_MM58274C_DAY1(1) // monday
MM58274C(config, m_mm58274, 0);
m_mm58274->set_mode24(0); // 12 hour
m_mm58274->set_day1(1); // monday
/* via */
MCFG_DEVICE_ADD(m_via0, VIA6522, 1022750)
MCFG_VIA6522_READPA_HANDLER(READ8(*this, concept_state, via_in_a))
MCFG_VIA6522_READPB_HANDLER(READ8(*this, concept_state, via_in_b))
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, concept_state, via_out_a))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, concept_state, via_out_b))
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, concept_state, via_out_cb2))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, concept_state, via_irq_func))
VIA6522(config, m_via0, 1022750);
m_via0->readpa_handler().set(FUNC(concept_state::via_in_a));
m_via0->readpb_handler().set(FUNC(concept_state::via_in_b));
m_via0->writepa_handler().set(FUNC(concept_state::via_out_a));
m_via0->writepb_handler().set(FUNC(concept_state::via_out_b));
m_via0->cb2_handler().set(FUNC(concept_state::via_out_cb2));
m_via0->irq_handler().set(FUNC(concept_state::via_irq_func));
/* ACIAs */
MCFG_DEVICE_ADD(m_acia0, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL(1'843'200))
MCFG_MOS6551_TXD_HANDLER(WRITELINE("rs232a", rs232_port_device, write_txd))
MOS6551(config, m_acia0, 0);
m_acia0->set_xtal(XTAL(1'843'200));
m_acia0->txd_handler().set("rs232a", FUNC(rs232_port_device::write_txd));
MCFG_DEVICE_ADD(m_acia1, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL(1'843'200))
MCFG_MOS6551_TXD_HANDLER(WRITELINE("rs232b", rs232_port_device, write_txd))
MOS6551(config, m_acia1, 0);
m_acia1->set_xtal(XTAL(1'843'200));
m_acia1->txd_handler().set("rs232b", FUNC(rs232_port_device::write_txd));
MCFG_DEVICE_ADD(m_kbdacia, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL(1'843'200))
MOS6551(config, m_kbdacia, 0);
m_kbdacia->set_xtal(XTAL(1'843'200));
/* Apple II bus */
A2BUS(config, m_a2bus, 0).set_cputag(m_maincpu);
@ -269,18 +267,18 @@ MACHINE_CONFIG_START(concept_state::concept)
A2BUS_SLOT(config, "sl4", m_a2bus, concept_a2_cards, "fdc01");
/* 2x RS232 ports */
MCFG_DEVICE_ADD("rs232a", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(ACIA_0_TAG, mos6551_device, write_rxd))
MCFG_RS232_DCD_HANDLER(WRITELINE(ACIA_0_TAG, mos6551_device, write_dcd))
MCFG_RS232_DSR_HANDLER(WRITELINE(ACIA_0_TAG, mos6551_device, write_dsr))
MCFG_RS232_CTS_HANDLER(WRITELINE(ACIA_0_TAG, mos6551_device, write_cts))
rs232_port_device &rs232a(RS232_PORT(config, "rs232a", default_rs232_devices, nullptr));
rs232a.rxd_handler().set(m_acia0, FUNC(mos6551_device::write_rxd));
rs232a.dcd_handler().set(m_acia0, FUNC(mos6551_device::write_dcd));
rs232a.dsr_handler().set(m_acia0, FUNC(mos6551_device::write_dsr));
rs232a.cts_handler().set(m_acia0, FUNC(mos6551_device::write_cts));
MCFG_DEVICE_ADD("rs232b", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(ACIA_1_TAG, mos6551_device, write_rxd))
MCFG_RS232_DCD_HANDLER(WRITELINE(ACIA_1_TAG, mos6551_device, write_dcd))
MCFG_RS232_DSR_HANDLER(WRITELINE(ACIA_1_TAG, mos6551_device, write_dsr))
MCFG_RS232_CTS_HANDLER(WRITELINE(ACIA_1_TAG, mos6551_device, write_cts))
MACHINE_CONFIG_END
rs232_port_device &rs232b(RS232_PORT(config, "rs232b", default_rs232_devices, nullptr));
rs232b.rxd_handler().set(m_acia1, FUNC(mos6551_device::write_rxd));
rs232b.dcd_handler().set(m_acia1, FUNC(mos6551_device::write_dcd));
rs232b.dsr_handler().set(m_acia1, FUNC(mos6551_device::write_dsr));
rs232b.cts_handler().set(m_acia1, FUNC(mos6551_device::write_cts));
}
ROM_START( concept )

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@ -59,7 +59,7 @@ public:
virtual void machine_start() override;
virtual void machine_reset() override;
virtual void video_start() override;
uint32_t screen_update_concept(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_READ8_MEMBER(via_in_a);
DECLARE_WRITE8_MEMBER(via_out_a);

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@ -61,18 +61,14 @@ void concept_state::video_start()
{
}
uint32_t concept_state::screen_update_concept(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
uint32_t concept_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
/* resolution is 720*560 */
uint16_t *videoram = m_videoram;
int x, y;
uint16_t *line;
for (y = 0; y < 560; y++)
for (int y = 0; y < 560; y++)
{
line = &bitmap.pix16(560-1-y);
for (x = 0; x < 720; x++)
line[720-1-x] = (videoram[(x+48+y*768)>>4] & (0x8000 >> ((x+48+y*768) & 0xf))) ? 1 : 0;
uint16_t *line = &bitmap.pix16(560-1-y);
for (int x = 0; x < 720; x++)
line[720-1-x] = (m_videoram[(x+48+y*768)>>4] & (0x8000 >> ((x+48+y*768) & 0xf))) ? 1 : 0;
}
return 0;
}