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sgi/vc1: new device
This commit is contained in:
Patrick Mackinlay
parent
adc3349c1c
commit
908d476f0c
206
src/mame/sgi/vc1.cpp
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206
src/mame/sgi/vc1.cpp
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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/*
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* Silicon Graphics Video Controller (VC1).
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*
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* TODO:
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* - everything; this stub is only enough to pass power-on diagnostics
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*/
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#include "emu.h"
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#include "vc1.h"
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//#define VERBOSE (LOG_GENERAL)
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(SGI_VC1, sgi_vc1_device, "sgi_vc1", "SGI VC1")
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sgi_vc1_device::sgi_vc1_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
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: device_t(mconfig, SGI_VC1, tag, owner, clock)
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{
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}
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void sgi_vc1_device::device_start()
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{
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m_ram = std::make_unique<u8[]>(0x8000); // TC55328J-35 32,768x8 CMOS STATIC RAM
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save_item(NAME(m_addr));
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save_item(NAME(m_reg));
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save_item(NAME(m_xmap));
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save_pointer(NAME(m_ram), 0x8000);
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}
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void sgi_vc1_device::device_reset()
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{
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m_addr = 0;
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}
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enum vc1_cmd : unsigned
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{
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REGISTER = 0, // video timing, cursor control, display id control, xmap control
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XMAP_MODE = 1,
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EXT_RAM = 2,
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TEST = 3, // test registers
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ADDR_LO = 4,
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ADDR_HI = 5,
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SYS_CTRL = 6,
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};
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u8 sgi_vc1_device::read(offs_t offset)
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{
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switch (offset)
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{
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case REGISTER:
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return m_reg[m_addr++];
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case XMAP_MODE:
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return m_xmap[m_addr++];
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case EXT_RAM:
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return m_ram[m_addr & 0x7fffU];
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case TEST:
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return 0; // vc1 revision?
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case ADDR_LO:
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return u8(m_addr);
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case ADDR_HI:
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return m_addr >> 8;
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default:
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LOG("read offset %d\n", offset);
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return 0;
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}
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}
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enum vc1_reg : unsigned
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{
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// video timing generator
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VID_EP = 0x00,
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VID_LC = 0x02,
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VID_SC = 0x04,
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VID_TSA = 0x06,
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VID_TSB = 0x07,
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VID_TSC = 0x08,
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VID_LP = 0x09,
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VID_LS_EP = 0x0b,
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VID_LR = 0x0d,
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VID_FC = 0x10,
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VID_ENABLE = 0x14,
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// cursor generator
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CUR_EP = 0x20,
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CUR_XL = 0x22,
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CUR_YL = 0x24,
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CUR_MODE = 0x26,
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CUR_BX = 0x27,
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CUR_LY = 0x28,
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CUR_YC = 0x2a,
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CUR_XC = 0x2c,
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CUR_CC = 0x2e,
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CUR_RC = 0x30,
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// display id generation
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DID_EP = 0x40,
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DID_END_EP = 0x42,
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DID_HOR_DIV = 0x44,
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DID_HOR_MOD = 0x45,
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DID_LP = 0x46,
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DID_LS_EP = 0x48,
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DID_WC = 0x4a,
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DID_RC = 0x4c,
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DID_XL = 0x4e,
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DID_XD5 = 0x50,
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DID_XM5 = 0x51,
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DID_DID = 0x52,
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// control register
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BLKOUT_EVEN = 0x60,
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BLKOUT_ODD = 0x61,
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AUXVIDEO_MAP = 0x62,
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};
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static const u8 reg_mask[] =
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{
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0x07, 0xff, 0x0f, 0xff, 0xff, 0xff,
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0x07, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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};
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void sgi_vc1_device::write(offs_t offset, u8 data)
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{
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switch (offset)
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{
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case REGISTER:
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if (m_addr < std::size(reg_mask))
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{
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m_reg[m_addr] = data & reg_mask[m_addr];
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if (VERBOSE & LOG_GENERAL)
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{
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static const char *const reg_name[] =
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{
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"VID_EP", "", "VID_LC", "", "VID_SC", "", "VID_TSA", "VID_TSB",
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"VID_TSC", "VID_LP", nullptr, "VID_LS_EP", nullptr, "VID_LR", nullptr, nullptr,
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"VID_FC", "", nullptr, nullptr, "VID_ENABLE", "", nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"CUR_EP", "", "CUR_XL", "", "CUR_YL", "", "CUR_MODE", "CUR_BX",
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"CUR_LY", "", "CUR_YC", "", "CUR_XC", "", "CUR_CC", "",
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"CUR_RC", "", nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"DID_EP", "", "DID_END_EP", "", "DID_HOR_DIV", "DID_HOR_MOD", "DID_LP", "",
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"DID_LS_EP", "", "DID_WC", "", "DID_RC", "", "DID_XL", "",
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"DID_XD5", "DID_XM5", "DID_DID", "", nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"BLKOUT_EVEN", "BLKOUT_ODD", "AUXVIDEO_MAP", "", nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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};
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if (!reg_name[m_addr])
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LOG("reg_w %s(0x%02x) data 0x%02x\n", "UNKNOWN", m_addr, m_reg[m_addr]);
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else if (std::string(reg_name[m_addr]).empty())
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LOG("reg_w %s(0x%02x) data 0x%04x\n", reg_name[m_addr - 1], m_addr - 1, u16(m_reg[m_addr - 1]) << 8 | m_reg[m_addr]);
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else if ((m_addr & 1) || !std::string(reg_name[m_addr + 1]).empty())
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LOG("reg_w %s(0x%02x) data 0x%02x\n", reg_name[m_addr], m_addr, m_reg[m_addr]);
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}
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}
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else
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LOG("write unknown register 0x%04x data 0x%02x\n", m_addr, data);
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m_addr++;
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break;
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case XMAP_MODE:
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m_xmap[m_addr++] = data;
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break;
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case EXT_RAM:
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m_ram[m_addr++ & 0x7fffU] = data;
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break;
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case ADDR_LO:
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m_addr = (m_addr & 0xff00U) | (data << 0);
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break;
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case ADDR_HI:
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m_addr = (m_addr & 0x00ffU) | (data << 8);
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break;
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default:
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LOG("write offset %d data 0x%02x\n", offset, data);
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break;
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}
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}
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32
src/mame/sgi/vc1.h
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32
src/mame/sgi/vc1.h
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@ -0,0 +1,32 @@
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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#ifndef MAME_SGI_VC1_H
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#define MAME_SGI_VC1_H
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#pragma once
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class sgi_vc1_device
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: public device_t
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{
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public:
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sgi_vc1_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
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u8 read(offs_t offset);
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void write(offs_t offset, u8 data);
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protected:
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virtual void device_start() override;
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virtual void device_reset() override;
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private:
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u16 m_addr;
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u8 m_reg[128];
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u8 m_xmap[128];
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std::unique_ptr<u8[]> m_ram;
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};
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DECLARE_DEVICE_TYPE(SGI_VC1, sgi_vc1_device)
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#endif // MAME_SGI_VC1_H
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