made gime to use inline config (nw)

This commit is contained in:
Miodrag Milanovic 2014-05-19 08:40:38 +00:00
parent 3967304b4b
commit 9099f97b93
3 changed files with 28 additions and 28 deletions

View File

@ -237,15 +237,6 @@ DEVICE_INPUT_DEFAULTS_END
// MACHINE CONFIGURATION
//**************************************************************************
static const gime_interface coco_gime_config =
{
/* device tags */
SCREEN_TAG,
MAINCPU_TAG,
RAM_TAG,
CARTRIDGE_TAG,
};
static MACHINE_CONFIG_START( coco3, coco3_state )
// basic machine hardware
MCFG_CPU_ADD(MAINCPU_TAG, M6809E, XTAL_3_579545MHz)
@ -290,7 +281,9 @@ static MACHINE_CONFIG_START( coco3, coco3_state )
MCFG_DEFAULT_LAYOUT(layout_coco3)
MCFG_DEVICE_ADD(GIME_TAG, GIME_NTSC, XTAL_3_579545MHz)
MCFG_DEVICE_CONFIG(coco_gime_config)
MCFG_GIME_MAINCPU(MAINCPU_TAG)
MCFG_GIME_RAM(RAM_TAG)
MCFG_GIME_EXT(CARTRIDGE_TAG)
MCFG_GIME_HSYNC_CALLBACK(DEVWRITELINE(PIA0_TAG, pia6821_device, ca1_w))
MCFG_GIME_FSYNC_CALLBACK(DEVWRITELINE(PIA0_TAG, pia6821_device, cb1_w))
MCFG_GIME_IRQ_CALLBACK(WRITELINE(coco3_state, gime_irq_w))
@ -329,7 +322,9 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( coco3p, coco3 )
MCFG_DEVICE_REPLACE(GIME_TAG, GIME_PAL, XTAL_4_433619MHz)
MCFG_DEVICE_CONFIG(coco_gime_config)
MCFG_GIME_MAINCPU(MAINCPU_TAG)
MCFG_GIME_RAM(RAM_TAG)
MCFG_GIME_EXT(CARTRIDGE_TAG)
MCFG_GIME_HSYNC_CALLBACK(DEVWRITELINE(PIA0_TAG, pia6821_device, ca1_w))
MCFG_GIME_FSYNC_CALLBACK(DEVWRITELINE(PIA0_TAG, pia6821_device, cb1_w))
MCFG_GIME_IRQ_CALLBACK(WRITELINE(coco3_state, gime_irq_w))

View File

@ -110,7 +110,10 @@ gime_base_device::gime_base_device(const machine_config &mconfig, device_type ty
: mc6847_friend_device(mconfig, type, name, tag, owner, clock, fontdata, true, 263, 25+192+26+3, false, shortname, source),
m_write_irq(*this),
m_write_firq(*this),
m_read_floating_bus(*this)
m_read_floating_bus(*this),
m_maincpu_tag(NULL),
m_ram_tag(NULL),
m_ext_tag(NULL)
{
}
@ -122,22 +125,18 @@ gime_base_device::gime_base_device(const machine_config &mconfig, device_type ty
void gime_base_device::device_start(void)
{
// get the config
const gime_interface *config = (const gime_interface *) static_config();
assert(config);
// find the RAM device - make sure that it is started
m_ram = machine().device<ram_device>(config->m_ram_tag);
m_ram = machine().device<ram_device>(m_ram_tag);
if (!m_ram->started())
throw device_missing_dependencies();
// find the CART device - make sure that it is started
m_cart_device = machine().device<cococart_slot_device>(config->m_ext_tag);
m_cart_device = machine().device<cococart_slot_device>(m_ext_tag);
if (!m_cart_device->started())
throw device_missing_dependencies();
// find the CPU device - make sure that it is started
m_cpu = machine().device<cpu_device>(config->m_maincpu_tag);
m_cpu = machine().device<cpu_device>(m_maincpu_tag);
if (!m_cpu->started())
throw device_missing_dependencies();
@ -170,7 +169,7 @@ void gime_base_device::device_start(void)
m_read_floating_bus.resolve_safe(0);
// set up ROM/RAM pointers
m_rom = machine().root_device().memregion(config->m_maincpu_tag)->base();
m_rom = machine().root_device().memregion(m_maincpu_tag)->base();
m_cart_rom = m_cart_device->get_cart_base();
// populate palettes

View File

@ -34,15 +34,14 @@
#define MCFG_GIME_FLOATING_BUS_CALLBACK(_read) \
devcb = &gime_base_device::set_floating_bus_rd_callback(*device, DEVCB_##_read);
/* interface */
struct gime_interface
{
const char *m_screen_tag; /* screen we are acting on */
const char *m_maincpu_tag; /* tag of main CPU */
const char *m_ram_tag; /* tag of RAM device */
const char *m_ext_tag; /* tag of expansion device */
};
#define MCFG_GIME_MAINCPU(_tag) \
gime_base_device::set_maincpu_tag(*device, _tag);
#define MCFG_GIME_RAM(_tag) \
gime_base_device::set_ram_tag(*device, _tag);
#define MCFG_GIME_EXT(_tag) \
gime_base_device::set_ext_tag(*device, _tag);
//**************************************************************************
@ -57,6 +56,9 @@ public:
template<class _Object> static devcb_base &set_irq_wr_callback(device_t &device, _Object object) { return downcast<gime_base_device &>(device).m_write_irq.set_callback(object); }
template<class _Object> static devcb_base &set_firq_wr_callback(device_t &device, _Object object) { return downcast<gime_base_device &>(device).m_write_firq.set_callback(object); }
template<class _Object> static devcb_base &set_floating_bus_rd_callback(device_t &device, _Object object) { return downcast<gime_base_device &>(device).m_read_floating_bus.set_callback(object); }
static void set_maincpu_tag(device_t &device, const char *tag) { downcast<gime_base_device &>(device).m_maincpu_tag = tag; }
static void set_ram_tag(device_t &device, const char *tag) { downcast<gime_base_device &>(device).m_ram_tag = tag; }
static void set_ext_tag(device_t &device, const char *tag) { downcast<gime_base_device &>(device).m_ext_tag = tag; }
// read/write
DECLARE_READ8_MEMBER( read ) { return read(offset); }
@ -198,6 +200,10 @@ private:
pixel_t m_rgb_palette[64];
UINT8 m_dummy_bank[0x2000];
const char *m_maincpu_tag; /* tag of main CPU */
const char *m_ram_tag; /* tag of RAM device */
const char *m_ext_tag; /* tag of expansion device */
// timer constants
static const device_timer_id TIMER_FRAME = 0;
static const device_timer_id TIMER_HSYNC_OFF = 1;