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https://github.com/holub/mame
synced 2025-04-20 23:42:22 +03:00
New machines added as MACHINE_NOT_WORKING
----------------------------------------- Access Virus A [R. Belmont, tbd] Access Virus B (Ver. T) [R. Belmont, tbd] Access Virus C [R. Belmont, tbd] Access Virus Rack [R. Belmont, tbd] Access Virus Rack XL [R. Belmont, tbd] Access Virus Classic [R. Belmont, tbd]
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@ -896,6 +896,7 @@ FORMATS["ZX81_P"] = true
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--------------------------------------------------
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function linkProjects_mame_mess(_target, _subtarget)
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links {
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"access",
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"acorn",
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"act",
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"adc",
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@ -1301,6 +1302,11 @@ files {
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-- manufacturer-specific groupings for drivers
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--------------------------------------------------
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createMESSProjects(_target, _subtarget, "access")
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files {
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MAME_DIR .. "src/mame/drivers/acvirus.cpp",
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}
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createMESSProjects(_target, _subtarget, "acorn")
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files {
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MAME_DIR .. "src/mame/drivers/aa310.cpp",
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148
src/mame/drivers/acvirus.cpp
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148
src/mame/drivers/acvirus.cpp
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@ -0,0 +1,148 @@
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// license:BSD-3-Clause
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// copyright-holders:R. Belmont
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/***************************************************************************
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acvirus.cpp - Access Virus series
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Skeleton driver by R. Belmont
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Hardware in brief:
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Virus A: SAB 80C535-N (12 MHz), DSP56303 @ 66 MHz
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Virus B: SAB 80C535-N (12 MHz), DSP56311 @ ??? MHz (illegible on PCB photo I've seen)
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Virus C: SAF 80C515-L24N (24 MHz), DSP56362 @ 120 MHz
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Virus Rack is same h/w as B, Rack XL is the same h/w as C.
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Virus Classic is supposed to be the same h/w as B but not proven.
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The various 80C5xx chips are i8051-based SoCs with additional I/O ports,
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256 bytes of internal RAM like the 8052, and an analog/digital converter.
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The top 4 bits of port P5 select the bank at 0x8000. P5 is not implemented in
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any of the MCS-51 variants we support yet.
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Hardware Notes:
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The DSP has three SRAM chips, probably 128 kbyte each
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for a total of 128 kwords, mapped to address 0x20000. All three DSP
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buses (P, X, Y) point to the same external memory. There's another 128
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kbyte of battery backed SRAM for the 8051.
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The firmware image fits exactly in an AM29F040-120PC flash chip, and is
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bank switched into the 8051 program address space. The lower 0x8000
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bytes of the address space always points to the first 0x8000 bytes of
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flash (except during firmware upgrade, as I assume the programming
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routine has do run from RAM). The upper 0x8000 bytes of the address
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space can point to any 0x8000 sized bank in flash. A bank switch routine
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is at 0x64B8, and will switch to e.g. bank 2 (offset 0x10000) when A =
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0x20. The low nibble is usually zero, but not always, and I don't know
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how it's interpreted.
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Banks 0-2 contain OS code and data, banks 3-6 contain DSP code and data,
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and banks 8-14 seem to contain factory default settings. There are flash
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programming routines at the beginning of banks 7 and 15, and two at the
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end of bank 6. Not sure why there are so many, and not all are
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identical, so there's probably additional bank swithing logic to match.
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All display a charming "DO NOT TOUCH ME" message while programming. :)
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The same bank switching also seems to affect external memory, but I'm
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not sure how the smaller SRAM is mapped. Some external memory locations
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are used for other tasks, like communicatng with the DSP.
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The initial DSP program and data upload routine is at 0x1FAA. After
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setting up the bus, it churns out all the 24-bit words in banks 3-6
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(except for headers) as one stream. The DSP will interpret the first
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word as a length, the second as address, and the following "length"
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words will be stored at that address in program memory before execution
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starts there. This is just a very short bootstrap program, which takes
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care of receiving the remaining words in chunks. Each chunks starts with
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three words - a command, an address, and optionally length. Commands 0-2
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store data in P, X, or Y memory respectively. Command 3 splits each
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24-bit word into two 12-bit values and store each of them as a 24-bit
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word in Y memory. Command 4 starts execution at the specified address,
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and doesn't have a length.
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***************************************************************************/
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#include "emu.h"
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#include "cpu/mcs51/mcs51.h"
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#include "machine/intelfsh.h"
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#include "speaker.h"
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class acvirus_state : public driver_device
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{
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public:
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acvirus_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_rombank(*this, "rombank")
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{ }
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required_device<cpu_device> m_maincpu;
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required_memory_bank m_rombank;
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virtual void machine_start() override;
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virtual void machine_reset() override;
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DECLARE_DRIVER_INIT(virus);
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};
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void acvirus_state::machine_start()
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{
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m_rombank->configure_entries(0, 15, memregion("maincpu")->base(), 0x8000);
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m_rombank->set_entry(3);
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}
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void acvirus_state::machine_reset()
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{
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}
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static ADDRESS_MAP_START( virus_map, AS_PROGRAM, 8, acvirus_state )
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AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("maincpu", 0) // fixed 32K of flash image
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AM_RANGE(0x8000, 0xffff) AM_ROMBANK("rombank")
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ADDRESS_MAP_END
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static MACHINE_CONFIG_START( virus )
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MCFG_CPU_ADD("maincpu", I8052, XTAL_12MHz)
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MCFG_CPU_PROGRAM_MAP(virus_map)
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MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
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MACHINE_CONFIG_END
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static INPUT_PORTS_START( virus )
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INPUT_PORTS_END
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ROM_START( virusa )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_a_28.bin", 0x000000, 0x080000, CRC(087cd808) SHA1(fe3310a165c208473822455c75ee5b2a6de34bc8) )
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ROM_END
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ROM_START( virusb )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_bt_490x049.bin", 0x000000, 0x080000, CRC(4ffc928a) SHA1(ee4b83e2eb1f01c73e37e2ff1d2edd653a0dcf5b) )
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ROM_END
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ROM_START( virusc )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_c_650x352.bin", 0x000000, 0x080000, CRC(d44a9468) SHA1(fad9b896b39a43a1d46acb1d780b78b775a609b8) )
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ROM_END
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ROM_START( virusrck )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_rt_210x071.bin", 0x000000, 0x080000, CRC(62b2bcc1) SHA1(241467bcb563736472a6e61f6c9c532590664500) )
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ROM_END
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ROM_START( virusrckxl )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_xl_650x079.bin", 0x000000, 0x080000, CRC(d0721c46) SHA1(b7c292b66ba3690a4a50592e17321b9c4147621d) )
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ROM_END
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ROM_START( viruscl )
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ROM_REGION(0x80000, "maincpu", 0)
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ROM_LOAD( "virus_cl_061_release.bin", 0x000000, 0x080000, CRC(a202e443) SHA1(33d5f4ebbacc817ab1e5dd572e8dc755f6c5e253) )
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ROM_END
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CONS( 1997, virusa, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus A", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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CONS( 1999, virusb, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus B (Ver. T)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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CONS( 2002, virusc, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus C", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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CONS( 2001, virusrck, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus Rack (Ver. T)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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CONS( 2002, virusrckxl, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus Rack XL", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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CONS( 2004, viruscl, 0, 0, virus, virus, acvirus_state, 0, "Access", "Virus Classic", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
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@ -868,6 +868,14 @@ actfancrj // (c) 1989 Data East Corporation (Japan)
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triothep // (c) 1989 Data East Corporation (World)
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triothepj // (c) 1989 Data East Corporation (Japan)
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@source:acvirus.cpp
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virusa // (c) 1997 Access Gmbh
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virusb // (c) 1999 Access Gmbh
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virusc // (c) 2002 Access Gmbh
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virusrck // (c) 2001 Access Gmbh
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virusrckxl // (c) 2002 Access Gmbh
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viruscl // (c) 2004 Access Gmbh
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@source:adam.cpp
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adam // Coleco Adam
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