mirror of
https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
ti99: ROM dump changes; replaced ROM_REGIONS by ram_devices
This commit is contained in:
Michael Zapf
parent
90cfa15f88
commit
90f1ac5569
@ -682,7 +682,7 @@ MACHINE_CONFIG_END
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ROM_START( bwg_fdc )
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ROM_REGION(0x8000, DSRROM, 0)
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ROM_LOAD("bwg.bin", 0x0000, 0x8000, CRC(06f1ec89) SHA1(6ad77033ed268f986d9a5439e65f7d391c4b7651)) /* BwG disk DSR ROM */
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ROM_LOAD("bwg_dsr.u15", 0x0000, 0x8000, CRC(06f1ec89) SHA1(6ad77033ed268f986d9a5439e65f7d391c4b7651)) /* BwG disk DSR ROM */
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ROM_REGION(0x0800, BUFFER, 0) /* BwG RAM buffer */
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ROM_FILL(0x0000, 0x0400, 0x00)
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ROM_END
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@ -412,7 +412,7 @@ WRITE_LINE_MEMBER( snug_enhanced_video_device::video_interrupt_in )
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ROM_START( ti99_evpc )
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ROM_REGION(0x10000, DSRROM, 0)
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ROM_LOAD("evpcdsr.bin", 0, 0x10000, CRC(a062b75d) SHA1(6e8060f86e3bb9c36f244d88825e3fe237bfe9a9)) /* evpc DSR ROM */
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ROM_LOAD("evpc_dsr.u21", 0, 0x10000, CRC(a062b75d) SHA1(6e8060f86e3bb9c36f244d88825e3fe237bfe9a9)) /* evpc DSR ROM */
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ROM_END
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MACHINE_CONFIG_FRAGMENT( ti99_evpc )
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@ -1057,7 +1057,7 @@ MACHINE_CONFIG_END
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ROM_START( ti99_hfdc )
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ROM_REGION(0x4000, DSRROM, 0)
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ROM_LOAD("hfdc.bin", 0x0000, 0x4000, CRC(66fbe0ed) SHA1(11df2ecef51de6f543e4eaf8b2529d3e65d0bd59)) /* HFDC disk DSR ROM */
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ROM_LOAD("hfdc_dsr.u34", 0x0000, 0x4000, CRC(66fbe0ed) SHA1(11df2ecef51de6f543e4eaf8b2529d3e65d0bd59)) /* HFDC disk DSR ROM */
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ROM_REGION(0x8000, BUFFER, 0) /* HFDC RAM buffer 32 KiB */
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ROM_FILL(0x0000, 0x8000, 0x00)
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ROM_END
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@ -465,6 +465,7 @@ MACHINE_CONFIG_FRAGMENT( horizon )
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MCFG_RAM_ADD(RAMREGION)
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MCFG_RAM_DEFAULT_SIZE("32k")
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MCFG_RAM_DEFAULT_VALUE(0)
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MACHINE_CONFIG_END
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machine_config_constructor horizon_ramdisk_device::device_mconfig_additions() const
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@ -14,11 +14,8 @@
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#include "memex.h"
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#define MEMEX_SIZE 0x200000
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#define RAMREGION "ram"
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#define VERBOSE 1
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#define LOG logerror
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#define RAMREGION "ram2M"
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#define TRACE_CONFIG 0
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enum
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{
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@ -34,7 +31,7 @@ enum
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geneve_memex_device::geneve_memex_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: ti_expansion_card_device(mconfig, TI99_MEMEX, "Geneve memory expansion card", tag, owner, clock, "ti99_memex", __FILE__),
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m_ram(nullptr),
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m_ram(*this, RAMREGION),
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m_genmod(0)
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{
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}
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@ -56,7 +53,7 @@ bool geneve_memex_device::access_enabled(offs_t offset)
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if (page == 0xba) return false;
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if ((page & 0xc7)==0x82 && m_dip_switch[1]==false)
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{
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if (VERBOSE>8) LOG("geneve: memex blocks page %02x; dip1=%d\n", page, m_dip_switch[1]);
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if (TRACE_CONFIG) logerror("memex blocks page %02x; dip1=%d\n", page, m_dip_switch[1]);
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return false;
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}
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@ -95,7 +92,7 @@ READ8Z_MEMBER( geneve_memex_device::readz )
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// The card is accessed for all addresses in the address space
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if (access_enabled(offset))
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{
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*value = m_ram[offset];
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*value = m_ram->pointer()[offset];
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}
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}
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@ -110,7 +107,7 @@ WRITE8_MEMBER( geneve_memex_device::write )
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// The card is accessed for all addresses in the address space
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if (access_enabled(offset))
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{
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m_ram[offset] = data;
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m_ram->pointer()[offset] = data;
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}
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}
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@ -118,13 +115,12 @@ WRITE8_MEMBER( geneve_memex_device::write )
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void geneve_memex_device::device_start()
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{
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m_ram = memregion(RAMREGION)->base();
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}
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void geneve_memex_device::device_reset()
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{
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UINT8 dips = ioport("MEMEXDIPS")->read();
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if (VERBOSE>5) LOG("geneve: memex dips = %02x\n", dips);
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if (TRACE_CONFIG) logerror("memex dips = %02x\n", dips);
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for (auto & elem : m_dip_switch)
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{
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elem = ((dips & 0x01)!=0x00);
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@ -160,19 +156,20 @@ INPUT_PORTS_START( memex )
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PORT_DIPSETTING( MDIP8, "Lock out pages FC-FF")
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INPUT_PORTS_END
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ROM_START( memex )
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ROM_REGION(MEMEX_SIZE, RAMREGION, 0)
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ROM_FILL(0x000000, MEMEX_SIZE, 0x00)
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ROM_END
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MACHINE_CONFIG_FRAGMENT( memex )
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MCFG_RAM_ADD(RAMREGION)
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MCFG_RAM_DEFAULT_SIZE("2M")
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MCFG_RAM_DEFAULT_VALUE(0)
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MACHINE_CONFIG_END
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machine_config_constructor geneve_memex_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( memex );
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}
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ioport_constructor geneve_memex_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME( memex );
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}
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const rom_entry *geneve_memex_device::device_rom_region() const
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{
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return ROM_NAME( memex );
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}
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const device_type TI99_MEMEX = &device_creator<geneve_memex_device>;
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@ -15,6 +15,7 @@
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#include "emu.h"
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#include "peribox.h"
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#include "machine/ram.h"
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extern const device_type TI99_MEMEX;
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@ -29,15 +30,15 @@ public:
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DECLARE_WRITE8_MEMBER(cruwrite) override { };
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protected:
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virtual void device_start() override;
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virtual void device_reset() override;
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void device_start() override;
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void device_reset() override;
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machine_config_constructor device_mconfig_additions() const override;
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virtual ioport_constructor device_input_ports() const override;
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virtual const rom_entry *device_rom_region() const override;
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private:
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bool access_enabled(offs_t offset);
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UINT8* m_ram;
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required_device<ram_device> m_ram;
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UINT8 m_dip_switch[8];
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int m_genmod;
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};
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@ -2,7 +2,7 @@
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// copyright-holders:Michael Zapf
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/****************************************************************************
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TI-99 Myarc memory expansion
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TI-99 Myarc memory expansion MEXP-1
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The card features 128 KiB of RAM, not buffered. In the TI-99/4A address
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space, RAM is located at 2000-3fff and a000-ffff (32 KiB). Using the CRU
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@ -29,10 +29,7 @@
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****************************************************************************/
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#include "myarcmem.h"
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#define RAMREGION "ram"
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#define VERBOSE 0
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#define LOG logerror
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#define RAMREGION "ram512K"
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/* This card has two CRU bases where it answers. */
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#define MYARCMEM_CRU_BASE1 0x1000
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@ -46,7 +43,8 @@ enum
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myarc_memory_expansion_device::myarc_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: ti_expansion_card_device(mconfig, TI99_MYARCMEM, "Myarc Memory expansion card MEXP-1", tag, owner, clock, "ti99_myarcmem", __FILE__),
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m_ram(nullptr), m_dsrrom(nullptr), m_bank(0), m_size(0)
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m_ram(*this, RAMREGION),
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m_dsrrom(nullptr), m_bank(0), m_size(0)
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{
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}
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@ -77,19 +75,19 @@ READ8Z_MEMBER(myarc_memory_expansion_device::readz)
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switch((offset & 0xe000)>>13)
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{
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case 1:
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*value = m_ram[base];
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*value = m_ram->pointer()[base];
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break;
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case 2:
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if (m_selected) *value = m_dsrrom[offset & 0x1fff];
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break;
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case 5:
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*value = m_ram[base | 0x2000];
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*value = m_ram->pointer()[base | 0x2000];
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break;
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case 6:
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*value = m_ram[base | 0x4000];
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*value = m_ram->pointer()[base | 0x4000];
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break;
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case 7:
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*value = m_ram[base | 0x6000];
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*value = m_ram->pointer()[base | 0x6000];
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break;
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default:
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break;
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@ -106,16 +104,16 @@ WRITE8_MEMBER(myarc_memory_expansion_device::write)
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switch((offset & 0xe000)>>13)
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{
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case 1:
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m_ram[base] = data;
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m_ram->pointer()[base] = data;
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break;
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case 5:
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m_ram[base | 0x2000] = data;
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m_ram->pointer()[base | 0x2000] = data;
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break;
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case 6:
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m_ram[base | 0x4000] = data;
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m_ram->pointer()[base | 0x4000] = data;
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break;
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case 7:
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m_ram[base | 0x6000] = data;
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m_ram->pointer()[base | 0x6000] = data;
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break;
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default:
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break;
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@ -165,6 +163,19 @@ WRITE8_MEMBER(myarc_memory_expansion_device::cruwrite)
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}
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}
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void myarc_memory_expansion_device::device_start()
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{
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m_dsrrom = memregion(DSRROM)->base();
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}
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void myarc_memory_expansion_device::device_reset()
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{
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m_size = ioport("SIZE")->read();
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// Resetting values
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m_bank = 0;
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m_selected = false;
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}
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INPUT_PORTS_START( myarc_exp )
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PORT_START( "SIZE" )
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@ -175,26 +186,18 @@ INPUT_PORTS_END
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ROM_START( myarc_exp )
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ROM_REGION(0x2000, DSRROM, 0)
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ROM_LOAD("myarc512k_xb2.bin", 0x0000, 0x2000, CRC(41fbb96d) SHA1(4dc7fdfa46842957bcbb0cf2c37764e4bb6d877a)) /* DSR for Ramdisk etc. */
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ROM_REGION(0x80000, RAMREGION, 0)
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ROM_FILL(0x0000, 0x80000, 0x00)
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ROM_LOAD("myarc512k_xb2_dsr.bin", 0x0000, 0x2000, CRC(41fbb96d) SHA1(4dc7fdfa46842957bcbb0cf2c37764e4bb6d877a)) /* DSR for Ramdisk etc. */
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ROM_END
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void myarc_memory_expansion_device::device_start()
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{
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if (VERBOSE>5) LOG("myarc memexp: start\n");
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m_dsrrom = memregion(DSRROM)->base();
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m_ram = memregion(RAMREGION)->base();
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}
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MACHINE_CONFIG_FRAGMENT( myarc_exp )
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MCFG_RAM_ADD(RAMREGION)
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MCFG_RAM_DEFAULT_SIZE("512k")
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MCFG_RAM_DEFAULT_VALUE(0)
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MACHINE_CONFIG_END
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void myarc_memory_expansion_device::device_reset()
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machine_config_constructor myarc_memory_expansion_device::device_mconfig_additions() const
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{
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if (VERBOSE>5) LOG("myarc memexp: reset\n");
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m_size = ioport("SIZE")->read();
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// Resetting values
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m_bank = 0;
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m_selected = false;
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return MACHINE_CONFIG_NAME( myarc_exp );
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}
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const rom_entry *myarc_memory_expansion_device::device_rom_region() const
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@ -15,6 +15,7 @@
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#include "emu.h"
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#include "peribox.h"
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#include "machine/ram.h"
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extern const device_type TI99_MYARCMEM;
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@ -29,14 +30,15 @@ public:
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DECLARE_WRITE8_MEMBER(cruwrite) override;
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protected:
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virtual void device_start(void) override;
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virtual void device_reset(void) override;
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virtual const rom_entry *device_rom_region(void) const override;
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virtual ioport_constructor device_input_ports() const override;
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void device_start(void) override;
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void device_reset(void) override;
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const rom_entry *device_rom_region(void) const override;
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ioport_constructor device_input_ports() const override;
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machine_config_constructor device_mconfig_additions() const override;
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private:
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int get_base(int offset);
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UINT8* m_ram;
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required_device<ram_device> m_ram;
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UINT8* m_dsrrom;
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int m_bank;
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int m_size;
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@ -85,13 +85,10 @@
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#define PGROM5_TAG "grom5"
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#define PGROM6_TAG "grom6"
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#define PGROM7_TAG "grom7"
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#define GROMMASK 0x1ffd
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#define GROMREAD 0x1bfc
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#define GROMWRITE 0x1ffc
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#define ACTIVE_TAG "ACTIVE"
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#define CRU_BASE 0x1f00
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#define TRACE_ROM 0
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#define TRACE_GROM 0
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#define TRACE_CRU 0
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@ -114,10 +111,6 @@ ti_pcode_card_device::ti_pcode_card_device(const machine_config &mconfig, const
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SETADDRESS_DBIN_MEMBER( ti_pcode_card_device::setaddress_dbin )
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{
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// Do not allow setaddress for the debugger. It will mess up the
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// setaddress/memory access pairs when the CPU enters wait states.
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if (space.debugger_access()) return;
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m_address = offset;
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m_inDsrArea = ((m_address & m_select_mask)==m_select_value);
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@ -144,8 +137,27 @@ SETADDRESS_DBIN_MEMBER( ti_pcode_card_device::setaddress_dbin )
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}
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}
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void ti_pcode_card_device::debugger_read(address_space& space, UINT16 offset, UINT8& value)
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{
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// The debuger does not call setaddress
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if (m_active && ((offset & m_select_mask)==m_select_value))
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{
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bool isrom0 = ((offset & 0xf000)==0x4000);
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bool isrom12 = ((offset & 0xf000)==0x5000);
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if (isrom0) value = m_rom[m_address & 0x0fff];
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else
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if (isrom12) value = m_rom[(m_bank_select<<12) | (offset & 0x0fff)];
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}
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}
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READ8Z_MEMBER( ti_pcode_card_device::readz )
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{
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// Care for debugger
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if (space.debugger_access())
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{
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debugger_read(space, offset, *value);
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}
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if (m_active && m_inDsrArea && m_selected)
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{
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if (m_isrom0)
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@ -184,6 +196,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
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*/
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WRITE8_MEMBER( ti_pcode_card_device::write )
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{
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if (space.debugger_access()) return;
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if (m_active && m_isgrom && m_selected)
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{
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for (auto & elem : m_grom) elem->write(space, m_address, data);
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@ -234,7 +247,7 @@ READ8Z_MEMBER(ti_pcode_card_device::crureadz)
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*/
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WRITE8_MEMBER(ti_pcode_card_device::cruwrite)
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{
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if ((offset & 0xff00)==m_cru_base)
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if ((offset & 0xff00)==CRU_BASE)
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{
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int addr = offset & 0x00ff;
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@ -251,7 +264,6 @@ WRITE8_MEMBER(ti_pcode_card_device::cruwrite)
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void ti_pcode_card_device::device_start()
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{
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m_cru_base = 0x1f00;
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m_grom[0] = downcast<tmc0430_device*>(subdevice(PGROM0_TAG));
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m_grom[1] = downcast<tmc0430_device*>(subdevice(PGROM1_TAG));
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m_grom[2] = downcast<tmc0430_device*>(subdevice(PGROM2_TAG));
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@ -319,10 +331,20 @@ INPUT_PORTS_END
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ROM_START( ti99_pcode )
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ROM_REGION(0x10000, PCODE_GROM_TAG, 0)
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ROM_LOAD("pcode_g0.bin", 0x0000, 0x10000, CRC(541b3860) SHA1(7be77c216737334ae997753a6a85136f117affb7)) /* TI P-Code card groms */
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// The order of the GROMs with respect to the socket number is not guaranteed to be correct
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// as all GROMs are connected in parallel and dumped in-system
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ROM_LOAD("pcode_grom0.u11", 0x0000, 0x1800, CRC(505e5df0) SHA1(66911fba7599c64981180f8a673581f4b05941ff))
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ROM_LOAD("pcode_grom1.u13", 0x2000, 0x1800, CRC(63b546d5) SHA1(3d830c8bdac102275ec0702eff1ebf4b67484f52))
|
||||
ROM_LOAD("pcode_grom2.u14", 0x4000, 0x1800, CRC(28821e5c) SHA1(c147bd5d8d624caa690284bfc253c6699e3518d4))
|
||||
ROM_LOAD("pcode_grom3.u16", 0x6000, 0x1800, CRC(1db4a4a5) SHA1(f7a0ba8050f00ccc1ee328c66df5cc4269748ced))
|
||||
ROM_LOAD("pcode_grom4.u19", 0x8000, 0x1800, CRC(9618eb9b) SHA1(1f223f3febcb93e648cefe49c83bfeac802be9d6))
|
||||
ROM_LOAD("pcode_grom5.u20", 0xa000, 0x1800, CRC(c47efe6d) SHA1(f5b56c7de1cb1e7345a0716d35f00a3a9722febe))
|
||||
ROM_LOAD("pcode_grom6.u21", 0xc000, 0x1800, CRC(06a34c93) SHA1(56172c56afa3868f2098328f81881022230d949d))
|
||||
ROM_LOAD("pcode_grom7.u22", 0xe000, 0x1800, CRC(a09ca8d9) SHA1(2ea33d875f9c8e7c00df023a0d8d4461d50f0a87))
|
||||
|
||||
ROM_REGION(0x3000, PCODE_ROM_TAG, 0)
|
||||
ROM_LOAD("pcode_r0.bin", 0x0000, 0x1000, CRC(3881d5b0) SHA1(a60e0468bb15ff72f97cf6e80979ca8c11ed0426)) /* TI P-Code card rom4732 */
|
||||
ROM_LOAD("pcode_r1.bin", 0x1000, 0x2000, CRC(46a06b8b) SHA1(24e2608179921aef312cdee6f455e3f46deb30d0)) /* TI P-Code card rom4764 */
|
||||
ROM_LOAD("pcode_rom0.u1", 0x0000, 0x1000, CRC(3881d5b0) SHA1(a60e0468bb15ff72f97cf6e80979ca8c11ed0426)) /* TI P-Code card rom4732 */
|
||||
ROM_LOAD("pcode_rom1.u18", 0x1000, 0x2000, CRC(46a06b8b) SHA1(24e2608179921aef312cdee6f455e3f46deb30d0)) /* TI P-Code card rom4764 */
|
||||
ROM_END
|
||||
|
||||
machine_config_constructor ti_pcode_card_device::device_mconfig_additions() const
|
||||
|
||||
@ -45,7 +45,8 @@ protected:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
private:
|
||||
tmc0430_device* m_grom[8];
|
||||
void debugger_read(address_space& space, UINT16 addr, UINT8& value);
|
||||
tmc0430_device* m_grom[8];
|
||||
UINT8* m_rom;
|
||||
int m_bank_select;
|
||||
bool m_active;
|
||||
@ -53,8 +54,7 @@ private:
|
||||
bool m_clockhigh;
|
||||
|
||||
// Address in card area
|
||||
bool m_inDsrArea;
|
||||
|
||||
bool m_inDsrArea;
|
||||
bool m_isrom0;
|
||||
bool m_isrom12;
|
||||
bool m_isgrom;
|
||||
|
||||
@ -109,6 +109,7 @@ WRITE8_MEMBER(sams_memory_expansion_device::cruwrite)
|
||||
MACHINE_CONFIG_FRAGMENT( sams_mem )
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("1M")
|
||||
MCFG_RAM_DEFAULT_VALUE(0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
machine_config_constructor sams_memory_expansion_device::device_mconfig_additions() const
|
||||
|
||||
@ -23,96 +23,88 @@
|
||||
Michael Zapf
|
||||
February 2012: Rewritten as class
|
||||
|
||||
References
|
||||
[1] Michael L. Bunyard: Hardware Manual for the Texas Instruments 99/4A Home Computer, chapter 8
|
||||
|
||||
*****************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "peribox.h"
|
||||
#include "ti_32kmem.h"
|
||||
|
||||
#define RAMREGION "ram"
|
||||
#define RAMREGION "ram32k"
|
||||
|
||||
ti_32k_expcard_device::ti_32k_expcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: ti_expansion_card_device(mconfig, TI_32KMEM, "TI-99 32KiB memory expansion card", tag, owner, clock, "ti99_32k", __FILE__), m_ram_ptr(nullptr)
|
||||
: ti_expansion_card_device(mconfig, TI_32KMEM, "TI-99 32KiB memory expansion card", tag, owner, clock, "ti99_32k", __FILE__),
|
||||
m_ram(*this, RAMREGION)
|
||||
{
|
||||
}
|
||||
|
||||
READ8Z_MEMBER(ti_32k_expcard_device::readz)
|
||||
{
|
||||
UINT8 val = 0;
|
||||
bool access = true;
|
||||
switch((offset & 0xe000)>>13)
|
||||
{
|
||||
case 1:
|
||||
val = m_ram_ptr[offset & 0x1fff];
|
||||
break;
|
||||
case 5:
|
||||
val = m_ram_ptr[(offset & 0x1fff) | 0x2000];
|
||||
break;
|
||||
case 6:
|
||||
val = m_ram_ptr[(offset & 0x1fff) | 0x4000];
|
||||
break;
|
||||
case 7:
|
||||
val = m_ram_ptr[(offset & 0x1fff) | 0x6000];
|
||||
break;
|
||||
default:
|
||||
access = false;
|
||||
break;
|
||||
}
|
||||
if (access)
|
||||
{
|
||||
// There is no evidence for an inverted write on the even addresses;
|
||||
// we assume that the FF00 byte sequence in this memory is a power-on
|
||||
// artifact.
|
||||
/*
|
||||
The problem for mapping the memory into the address space is that
|
||||
we have a block at 2000-3FFF and another one at A000-FFFF. The trick
|
||||
is to calculate a bank number in a way to get subsequent address
|
||||
This is done in a PAL on the expansion board [1].
|
||||
|
||||
/* if ((offset&1)!=1) *value = ~val;
|
||||
else */
|
||||
S AB
|
||||
0000: 000x -> 0 xx
|
||||
2000: 001x -> 1 01
|
||||
4000: 010x -> 0 xx
|
||||
6000: 011x -> 0 xx
|
||||
8000: 100x -> 0 xx
|
||||
A000: 101x -> 1 00
|
||||
C000: 110x -> 1 11
|
||||
E000: 111x -> 1 10
|
||||
|
||||
select = A0*A1 + /A1*A2 (A0 = MSB)
|
||||
A = A1
|
||||
B = A0 nand A2
|
||||
*/
|
||||
|
||||
bool select = ((offset & 0xfc000)==0x7c000) | ((offset & 0xf6000)==0x72000); // PAL output pin 14 [1]
|
||||
|
||||
if (select)
|
||||
{
|
||||
// address = 0abx xxxx xxxx xxxx
|
||||
int bank = (offset & 0x4000) | ((((offset & 0x8000)>>2) & (offset & 0x2000)) ^ 0x2000);
|
||||
val = m_ram->pointer()[bank | (offset & 0x1fff)];
|
||||
|
||||
// On powerup we find a FF00FF00... pattern in RAM
|
||||
if ((offset & 1)==0) val = ~val;
|
||||
*value = val;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ti_32k_expcard_device::write)
|
||||
{
|
||||
UINT8 data1 = data;
|
||||
// if ((offset&1)!=1) data1 = ~data;
|
||||
switch((offset & 0xe000)>>13)
|
||||
bool select = ((offset & 0xfc000)==0x7c000) | ((offset & 0xf6000)==0x72000); // PAL output pin 14 [1]
|
||||
|
||||
if (select)
|
||||
{
|
||||
case 1:
|
||||
m_ram_ptr[offset & 0x1fff] = data1;
|
||||
break;
|
||||
case 5:
|
||||
m_ram_ptr[(offset & 0x1fff) | 0x2000] = data1;
|
||||
break;
|
||||
case 6:
|
||||
m_ram_ptr[(offset & 0x1fff) | 0x4000] = data1;
|
||||
break;
|
||||
case 7:
|
||||
m_ram_ptr[(offset & 0x1fff) | 0x6000] = data1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
// address = 0abx xxxx xxxx xxxx
|
||||
int bank = (offset & 0x4000) | ((((offset & 0x8000)>>2) & (offset & 0x2000)) ^ 0x2000);
|
||||
if ((offset & 1)==0) data = ~data;
|
||||
m_ram->pointer()[bank | (offset & 0x1fff)] = data;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void ti_32k_expcard_device::device_start(void)
|
||||
{
|
||||
m_ram_ptr = memregion(RAMREGION)->base();
|
||||
m_cru_base = 0;
|
||||
// See above. Preset the memory with FF00
|
||||
// ROM_FILL does not seem to allow filling with an alternating pattern
|
||||
for (int i=0; i < 0x8000; i+=2)
|
||||
{
|
||||
m_ram_ptr[i] = (UINT8)0xff;
|
||||
}
|
||||
}
|
||||
|
||||
ROM_START( ti_exp_32k )
|
||||
ROM_REGION(0x8000, RAMREGION, 0)
|
||||
ROM_FILL(0x0000, 0x8000, 0x00)
|
||||
ROM_END
|
||||
MACHINE_CONFIG_FRAGMENT( mem32k )
|
||||
MCFG_RAM_ADD(RAMREGION)
|
||||
MCFG_RAM_DEFAULT_SIZE("32k")
|
||||
MCFG_RAM_DEFAULT_VALUE(0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
const rom_entry *ti_32k_expcard_device::device_rom_region() const
|
||||
machine_config_constructor ti_32k_expcard_device::device_mconfig_additions() const
|
||||
{
|
||||
return ROM_NAME( ti_exp_32k );
|
||||
return MACHINE_CONFIG_NAME( mem32k );
|
||||
}
|
||||
|
||||
const device_type TI_32KMEM = &device_creator<ti_32k_expcard_device>;
|
||||
|
||||
@ -14,6 +14,10 @@
|
||||
#ifndef __TI32K__
|
||||
#define __TI32K__
|
||||
|
||||
#include "emu.h"
|
||||
#include "peribox.h"
|
||||
#include "machine/ram.h"
|
||||
|
||||
extern const device_type TI_32KMEM;
|
||||
|
||||
class ti_32k_expcard_device : public ti_expansion_card_device
|
||||
@ -27,10 +31,11 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(cruwrite) override { };
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
virtual const rom_entry *device_rom_region() const override;
|
||||
void device_start() override;
|
||||
machine_config_constructor device_mconfig_additions() const override;
|
||||
|
||||
private:
|
||||
UINT8* m_ram_ptr;
|
||||
required_device<ram_device> m_ram;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -418,7 +418,8 @@ MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( ti_fdc )
|
||||
ROM_REGION(0x2000, DSRROM, 0)
|
||||
ROM_LOAD("disk.bin", 0x0000, 0x2000, CRC(8f7df93f) SHA1(ed91d48c1eaa8ca37d5055bcf67127ea51c4cad5)) /* TI disk DSR ROM */
|
||||
ROM_LOAD("fdc_dsr.u26", 0x0000, 0x1000, CRC(693c6b6e) SHA1(0c24fb4944843ad3f08b0b139244a6bb05e1c6c2)) /* TI disk DSR ROM first 4K */
|
||||
ROM_LOAD("fdc_dsr.u27", 0x1000, 0x1000, CRC(2c921087) SHA1(3646c3bcd2dce16b918ee01ea65312f36ae811d2)) /* TI disk DSR ROM second 4K */
|
||||
ROM_END
|
||||
|
||||
machine_config_constructor ti_fdc_device::device_mconfig_additions() const
|
||||
|
||||
@ -1099,7 +1099,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( ti_rs232 )
|
||||
ROM_REGION(0x1000, DSRROM, 0)
|
||||
ROM_LOAD("rs232.bin", 0x0000, 0x1000, CRC(eab382fb) SHA1(ee609a18a21f1a3ddab334e8798d5f2a0fcefa91)) /* TI rs232 DSR ROM */
|
||||
ROM_LOAD("rs232pio_dsr.u1", 0x0000, 0x1000, CRC(eab382fb) SHA1(ee609a18a21f1a3ddab334e8798d5f2a0fcefa91)) /* TI rs232 DSR ROM */
|
||||
ROM_END
|
||||
|
||||
INPUT_PORTS_START( ti_rs232 )
|
||||
|
||||
@ -13,27 +13,22 @@
|
||||
#define __TI99DEFS__
|
||||
|
||||
// TI-99/4(A)
|
||||
#define region_grom "cons_grom"
|
||||
#define region_grom_cart "cart_grom"
|
||||
#define TMS9901_TAG "tms9901"
|
||||
#define TIBOARD_TAG "ti_board"
|
||||
#define DATAMUX_TAG "datamux_16_8"
|
||||
#define SCREEN_TAG "screen"
|
||||
#define TISOUNDCHIP_TAG "soundchip"
|
||||
#define TISOUND_TAG "tisound"
|
||||
#define GROMPORT_TAG "gromport"
|
||||
#define PERIBOX_TAG "peb"
|
||||
#define VDP_TAG "vdp"
|
||||
#define TMS9901_TAG "tms9901"
|
||||
#define SCREEN_TAG "screen"
|
||||
#define GROM0_TAG "console_grom_0"
|
||||
#define GROM1_TAG "console_grom_1"
|
||||
#define GROM2_TAG "console_grom_2"
|
||||
#define PERIBOX_TAG "peb"
|
||||
#define MECMOUSE_TAG "mecmouse"
|
||||
#define HANDSET_TAG "handset"
|
||||
#define JOYPORT_TAG "joyport"
|
||||
#define VDP_TAG "vdp"
|
||||
#define EVPC_CONN_TAG "evpc_conn"
|
||||
#define DATAMUX_TAG "datamux_16_8"
|
||||
|
||||
#define DSRROM "dsrrom"
|
||||
#define CONSOLEROM "consolerom"
|
||||
#define CONSOLEROM "console_rom"
|
||||
#define CONSOLEGROM "cons_grom"
|
||||
|
||||
#define VDPFREQ XTAL_10_738635MHz
|
||||
#define GROMFREQ VDPFREQ/24
|
||||
|
||||
@ -889,9 +889,9 @@ static MACHINE_CONFIG_START( ti99_4, ti99_4x_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "cass_out", 0.25)
|
||||
|
||||
// GROM devices
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, region_grom, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, region_grom, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, region_grom, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, CONSOLEGROM, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, CONSOLEGROM, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, CONSOLEGROM, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
|
||||
// Joystick port
|
||||
MCFG_TI_JOYPORT4_ADD( JOYPORT_TAG )
|
||||
@ -998,9 +998,9 @@ static MACHINE_CONFIG_START( ti99_4a, ti99_4x_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "cass_out", 0.25)
|
||||
|
||||
// GROM devices
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, region_grom, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, region_grom, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, region_grom, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, CONSOLEGROM, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, CONSOLEGROM, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, CONSOLEGROM, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
|
||||
// Joystick port
|
||||
MCFG_TI_JOYPORT4A_ADD( JOYPORT_TAG )
|
||||
@ -1053,6 +1053,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
/*
|
||||
US version: 60 Hz, NTSC
|
||||
There were no European versions.
|
||||
*/
|
||||
static MACHINE_CONFIG_DERIVED( ti99_4qi_60hz, ti99_4qi )
|
||||
MCFG_DEVICE_ADD( VDP_TAG, TMS9918A, XTAL_10_738635MHz / 2 ) \
|
||||
@ -1063,18 +1064,6 @@ static MACHINE_CONFIG_DERIVED( ti99_4qi_60hz, ti99_4qi )
|
||||
MCFG_SCREEN_UPDATE_DEVICE( VDP_TAG, tms9928a_device, screen_update )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/*
|
||||
European version: 50 Hz, PAL
|
||||
*/
|
||||
static MACHINE_CONFIG_DERIVED( ti99_4qi_50hz, ti99_4qi )
|
||||
MCFG_DEVICE_ADD( VDP_TAG, TMS9929A, XTAL_10_738635MHz / 2 ) \
|
||||
MCFG_TMS9928A_VRAM_SIZE(0x4000) \
|
||||
MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(ti99_4x_state, video_interrupt_in)) \
|
||||
MCFG_TMS9928A_OUT_GROMCLK_CB(WRITELINE(ti99_4x_state, gromclk_in)) \
|
||||
MCFG_TMS9928A_SCREEN_ADD_PAL( SCREEN_TAG ) \
|
||||
MCFG_SCREEN_UPDATE_DEVICE( VDP_TAG, tms9928a_device, screen_update )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/************************************************************************
|
||||
TI-99/4A with 80-column support. Actually a separate expansion card (EVPC),
|
||||
replacing the console video processor.
|
||||
@ -1155,9 +1144,9 @@ static MACHINE_CONFIG_START( ti99_4ev_60hz, ti99_4x_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "cass_out", 0.25)
|
||||
|
||||
// GROM devices
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, region_grom, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, region_grom, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, region_grom, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM0_TAG, 0, CONSOLEGROM, 0x0000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM1_TAG, 1, CONSOLEGROM, 0x2000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
MCFG_GROM_ADD( GROM2_TAG, 2, CONSOLEGROM, 0x4000, WRITELINE(ti99_4x_state, console_ready_grom))
|
||||
|
||||
// Joystick port
|
||||
MCFG_TI_JOYPORT4A_ADD( JOYPORT_TAG )
|
||||
@ -1171,51 +1160,68 @@ MACHINE_CONFIG_END
|
||||
******************************************************************************/
|
||||
#define rom_ti99_4e rom_ti99_4
|
||||
#define rom_ti99_4ae rom_ti99_4a
|
||||
#define rom_ti99_4qe rom_ti99_4qi
|
||||
|
||||
ROM_START(ti99_4)
|
||||
// CPU memory space
|
||||
// ROM files do not have a CRC16 at their end
|
||||
ROM_REGION16_BE(0x2000, CONSOLEROM, 0)
|
||||
ROM_LOAD16_BYTE("u610.bin", 0x0000, 0x1000, CRC(6fcf4b15) SHA1(d085213c64701d429ae535f9a4ac8a50427a8343)) /* CPU ROMs high */
|
||||
ROM_LOAD16_BYTE("u611.bin", 0x0001, 0x1000, CRC(491c21d1) SHA1(7741ae9294c51a44a78033d1b77c01568a6bbfb9)) /* CPU ROMs low */
|
||||
ROM_LOAD16_BYTE("994_rom_hb.u610", 0x0000, 0x1000, CRC(6fcf4b15) SHA1(d085213c64701d429ae535f9a4ac8a50427a8343)) /* CPU ROMs high */
|
||||
ROM_LOAD16_BYTE("994_rom_lb.u611", 0x0001, 0x1000, CRC(491c21d1) SHA1(7741ae9294c51a44a78033d1b77c01568a6bbfb9)) /* CPU ROMs low */
|
||||
|
||||
// GROM memory space
|
||||
ROM_REGION(0x10000, region_grom, 0)
|
||||
ROM_LOAD("u500.bin", 0x0000, 0x1800, CRC(aa757e13) SHA1(4658d3d01c0131c283a30cebd12e76754d41a84a)) /* system GROM 0 */
|
||||
ROM_LOAD("u501.bin", 0x2000, 0x1800, CRC(c863e460) SHA1(6d849a76011273a069a98ed0c3feaf13831c942f)) /* system GROM 1 */
|
||||
ROM_LOAD("u502.bin", 0x4000, 0x1800, CRC(b0eda548) SHA1(725e3f26f8c819f356e4bb405b4102b5ae1e0e70)) /* system GROM 2 */
|
||||
// GROM files do not have a CRC16 at their end
|
||||
ROM_REGION(0x6000, CONSOLEGROM, 0)
|
||||
ROM_LOAD("994_grom0.u500", 0x0000, 0x1800, CRC(aa757e13) SHA1(4658d3d01c0131c283a30cebd12e76754d41a84a)) /* system GROM 0 */
|
||||
ROM_LOAD("994_grom1.u501", 0x2000, 0x1800, CRC(c863e460) SHA1(6d849a76011273a069a98ed0c3feaf13831c942f)) /* system GROM 1 */
|
||||
ROM_LOAD("994_grom2.u502", 0x4000, 0x1800, CRC(b0eda548) SHA1(725e3f26f8c819f356e4bb405b4102b5ae1e0e70)) /* system GROM 2 */
|
||||
ROM_END
|
||||
|
||||
ROM_START(ti99_4a)
|
||||
// CPU memory space
|
||||
// ROM files have valid CRC16 as last word
|
||||
ROM_REGION16_BE(0x2000, CONSOLEROM, 0)
|
||||
ROM_LOAD16_WORD("994arom.bin", 0x0000, 0x2000, CRC(db8f33e5) SHA1(6541705116598ab462ea9403c00656d6353ceb85)) /* system ROMs */
|
||||
ROM_LOAD16_BYTE("994a_rom_hb.u610", 0x0000, 0x1000, CRC(ee859c5f) SHA1(a45245707c3dccea902b718554a882d214a82504)) /* CPU ROMs high */
|
||||
ROM_LOAD16_BYTE("994a_rom_lb.u611", 0x0001, 0x1000, CRC(37859301) SHA1(f4e774fd5913b387a763f1b8de5524c54b255434)) /* CPU ROMs low */
|
||||
|
||||
// GROM memory space
|
||||
ROM_REGION(0x10000, region_grom, 0)
|
||||
ROM_LOAD("994agrom.bin", 0x0000, 0x6000, CRC(af5c2449) SHA1(0c5eaad0093ed89e9562a2c0ee6a370bdc9df439)) /* system GROMs */
|
||||
// GROM files have valid CRC16 as last word
|
||||
ROM_REGION(0x6000, CONSOLEGROM, 0)
|
||||
ROM_LOAD("994a_grom0.u500", 0x0000, 0x1800, CRC(2445a5e8) SHA1(ea15d8b0ac52112dc0d5f4ab9a79ac8ca1cc1bbc)) /* system GROM 0 */
|
||||
ROM_LOAD("994a_grom1.u501", 0x2000, 0x1800, CRC(b8f367ab) SHA1(3ecead4b83ec525084c70b6123d4053f8a80e1f7)) /* system GROM 1 */
|
||||
ROM_LOAD("994a_grom2.u502", 0x4000, 0x1800, CRC(e0bb5341) SHA1(e255f0d65d69b927cecb8fcfac7a4c17d585ea96)) /* system GROM 2 */
|
||||
ROM_END
|
||||
|
||||
ROM_START(ti99_4qi)
|
||||
// CPU memory space
|
||||
// ROM files are the same as for TI-99/4A, but located in sockets u3 and u5
|
||||
ROM_REGION16_BE(0x2000, CONSOLEROM, 0)
|
||||
ROM_LOAD16_WORD("994qirom.bin", 0x0000, 0x2000, CRC(db8f33e5) SHA1(6541705116598ab462ea9403c00656d6353ceb85)) /* system ROMs */
|
||||
ROM_LOAD16_BYTE("994a_rom_hb.u610", 0x0000, 0x1000, CRC(ee859c5f) SHA1(a45245707c3dccea902b718554a882d214a82504)) /* CPU ROMs high */
|
||||
ROM_LOAD16_BYTE("994a_rom_lb.u611", 0x0001, 0x1000, CRC(37859301) SHA1(f4e774fd5913b387a763f1b8de5524c54b255434)) /* CPU ROMs low */
|
||||
|
||||
// GROM memory space
|
||||
ROM_REGION(0x10000, region_grom, 0)
|
||||
ROM_LOAD("994qigr0.bin", 0x0000, 0x1800, CRC(8b07772d) SHA1(95dcf5b7350ade65297eadd2d680c27561cc975c)) /* system GROM 0 */
|
||||
ROM_LOAD("994qigr1.bin", 0x2000, 0x1800, CRC(b8f367ab) SHA1(3ecead4b83ec525084c70b6123d4053f8a80e1f7)) /* system GROM 1 */
|
||||
ROM_LOAD("994qigr2.bin", 0x4000, 0x1800, CRC(e0bb5341) SHA1(e255f0d65d69b927cecb8fcfac7a4c17d585ea96)) /* system GROM 2 */
|
||||
// GROM files have valid CRC16 as last word
|
||||
// GROM1 and GROM2 are the same as for TI-99/4A, located in u30 and u31
|
||||
ROM_REGION(0x6000, CONSOLEGROM, 0)
|
||||
ROM_LOAD("994qi_grom0.u29", 0x0000, 0x1800, CRC(8b07772d) SHA1(95dcf5b7350ade65297eadd2d680c27561cc975c)) /* system GROM 0 */
|
||||
ROM_LOAD("994a_grom1.u501", 0x2000, 0x1800, CRC(b8f367ab) SHA1(3ecead4b83ec525084c70b6123d4053f8a80e1f7)) /* system GROM 1 */
|
||||
ROM_LOAD("994a_grom2.u502", 0x4000, 0x1800, CRC(e0bb5341) SHA1(e255f0d65d69b927cecb8fcfac7a4c17d585ea96)) /* system GROM 2 */
|
||||
ROM_END
|
||||
|
||||
ROM_START(ti99_4ev)
|
||||
/*CPU memory space*/
|
||||
// CPU memory space
|
||||
// ROM files have valid CRC16 as last word
|
||||
// ROM files are the same as for TI-99/4A
|
||||
ROM_REGION16_BE(0x2000, CONSOLEROM, 0)
|
||||
ROM_LOAD16_WORD("994arom.bin", 0x0000, 0x2000, CRC(db8f33e5) SHA1(6541705116598ab462ea9403c00656d6353ceb85)) /* system ROMs */
|
||||
ROM_LOAD16_BYTE("994a_rom_hb.u610", 0x0000, 0x1000, CRC(ee859c5f) SHA1(a45245707c3dccea902b718554a882d214a82504)) /* CPU ROMs high */
|
||||
ROM_LOAD16_BYTE("994a_rom_lb.u611", 0x0001, 0x1000, CRC(37859301) SHA1(f4e774fd5913b387a763f1b8de5524c54b255434)) /* CPU ROMs low */
|
||||
|
||||
/*GROM memory space*/
|
||||
ROM_REGION(0x10000, region_grom, 0)
|
||||
ROM_LOAD("994agr38.bin", 0x0000, 0x6000, CRC(bdd9f09b) SHA1(9b058a55d2528d2a6a69d7081aa296911ed7c0de)) /* system GROMs */
|
||||
// GROM memory space
|
||||
// GROM files have valid CRC16 as last word
|
||||
// GROM1 has been patched to support the EVPC, but the CRC16 was not updated, being invalid now
|
||||
ROM_REGION(0x6000, CONSOLEGROM, 0)
|
||||
ROM_LOAD("994a_grom0.u500", 0x0000, 0x1800, CRC(2445a5e8) SHA1(ea15d8b0ac52112dc0d5f4ab9a79ac8ca1cc1bbc)) /* system GROM 0 */
|
||||
ROM_LOAD("994ev_grom1.u501", 0x2000, 0x1800, CRC(6885326d) SHA1(1a98de5ee886dce705de5cce11034a7be31aceac)) /* system GROM 1 */
|
||||
ROM_LOAD("994a_grom2.u502", 0x4000, 0x1800, CRC(e0bb5341) SHA1(e255f0d65d69b927cecb8fcfac7a4c17d585ea96)) /* system GROM 2 */
|
||||
ROM_END
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
@ -1223,6 +1229,5 @@ COMP( 1979, ti99_4, 0, 0, ti99_4_60hz, ti99_4, driver_device, 0,
|
||||
COMP( 1980, ti99_4e, ti99_4, 0, ti99_4_50hz, ti99_4, driver_device, 0, "Texas Instruments", "TI-99/4 Home Computer (Europe)", 0)
|
||||
COMP( 1981, ti99_4a, 0, 0, ti99_4a_60hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4A Home Computer (US)", 0)
|
||||
COMP( 1981, ti99_4ae, ti99_4a, 0, ti99_4a_50hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4A Home Computer (Europe)", 0)
|
||||
COMP( 1983, ti99_4qe, ti99_4qi, 0, ti99_4qi_50hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4QI Home Computer (Europe)", 0)
|
||||
COMP( 1983, ti99_4qi, 0, 0, ti99_4qi_60hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4QI Home Computer (US)", 0)
|
||||
COMP( 1983, ti99_4qi, ti99_4a, 0, ti99_4qi_60hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4QI Home Computer (US)", 0)
|
||||
COMP( 1994, ti99_4ev, ti99_4a, 0, ti99_4ev_60hz, ti99_4a, driver_device, 0, "Texas Instruments", "TI-99/4A Home Computer with EVPC", 0)
|
||||
|
||||
@ -837,24 +837,24 @@ MACHINE_CONFIG_END
|
||||
ROM_START(ti99_8)
|
||||
// Logical (CPU) memory space: ROM0
|
||||
ROM_REGION(0x2000, ROM0_REG, 0)
|
||||
ROM_LOAD("u4_rom0.bin", 0x0000, 0x2000, CRC(901eb8d6) SHA1(13190c5e834baa9c0a70066b566cfcef438ed88a))
|
||||
ROM_LOAD("rom0.u4", 0x0000, 0x2000, CRC(901eb8d6) SHA1(13190c5e834baa9c0a70066b566cfcef438ed88a))
|
||||
|
||||
// Physical memory space (mapped): ROM1
|
||||
ROM_REGION(0x8000, ROM1_REG, 0)
|
||||
ROM_LOAD("u25_rom1.bin", 0x0000, 0x8000, CRC(b574461a) SHA1(42c6aed44802cfabdd26b565d6e5ddfcd689f11e))
|
||||
ROM_LOAD("rom1.u25", 0x0000, 0x8000, CRC(b574461a) SHA1(42c6aed44802cfabdd26b565d6e5ddfcd689f11e))
|
||||
|
||||
// Physical memory space (mapped): P-Code ROM
|
||||
// This circuit is only available in later versions of the console and seems
|
||||
// to be picky-backed on ROM1.
|
||||
// to be piggy-backed on ROM1.
|
||||
// To make things worse, the decoding logic of the custom chips do not show
|
||||
// the required select line for this ROM on the available schematics, so
|
||||
// they seem to be from the earlier version. The location in the address
|
||||
// space was determined by ROM disassembly.
|
||||
ROM_REGION(0x8000, PASCAL_REG, 0)
|
||||
ROM_LOAD("u25a_pas.bin", 0x0000, 0x4000, CRC(d7ed6dd6) SHA1(32212ce6426ceccbff73d342d4a3ef699c0ae1e4))
|
||||
ROM_LOAD("pascal.u25a", 0x0000, 0x4000, CRC(d7ed6dd6) SHA1(32212ce6426ceccbff73d342d4a3ef699c0ae1e4))
|
||||
|
||||
// System GROMs. 3 chips @ f830
|
||||
// The schematics do not enumerate the circuits but only talk about
|
||||
// The schematics do not enumerate the circuits but only say
|
||||
// "circuits on board" (COB) so we name the GROMs as gM_N.bin where M is the
|
||||
// ID (0-7) and N is the access port in the logical address space.
|
||||
ROM_REGION(0x6000, SYSGROM_REG, 0)
|
||||
|
||||
@ -27328,7 +27328,7 @@ murogmbl // ???
|
||||
mustache // (c) 1987 March
|
||||
|
||||
@source:mvme350.cpp
|
||||
mvme350 //
|
||||
mvme350 //
|
||||
|
||||
@source:mw18w.cpp
|
||||
18w // 653 (c) 1979 Midway
|
||||
@ -28564,7 +28564,7 @@ whp // 0090 (c) 1995 ADK / SNK
|
||||
wjammers // 0065 (c) 1994 Data East Corporation
|
||||
zedblade // 0076 (c) 1994 NMK
|
||||
zintrckb // 0211 hack - this is not a genuine MVS proto, its a bootleg made from the CD version
|
||||
crswd2bl // 0054 bootleg made from CD version
|
||||
crswd2bl // 0054 bootleg made from CD version
|
||||
zupapa // 0070 Zupapa - released in 2001, 1994 prototype probably exists
|
||||
lasthope
|
||||
|
||||
@ -34996,7 +34996,7 @@ ti99_224 // 1983 TI 99/2 (24kb ROMs)
|
||||
ti99_232 // 1983 TI 99/2 (32kb ROMs)
|
||||
|
||||
@source:ti99_4p.cpp
|
||||
ti99_4p // 1996 SNUG 99/4P (a.k.a. SGCPU)
|
||||
ti99_4p // 1996 SNUG SGCPU (aka TI-99/4P)
|
||||
|
||||
@source:ti99_4x.cpp
|
||||
ti99_4 // 1979 TI-99/4
|
||||
@ -35004,8 +35004,7 @@ ti99_4a // 1981 TI-99/4A
|
||||
ti99_4ae // 1981 TI-99/4A with 50Hz video
|
||||
ti99_4e // 1980 TI-99/4 with 50Hz video
|
||||
ti99_4ev // 1994 TI-99/4A with EVPC video card
|
||||
ti99_4qe // 1983 TI-99/4QI with 50Hz video
|
||||
ti99_4qi // 1983 TI-99/4QI
|
||||
ti99_4qi // 1983 TI-99/4QI (US only)
|
||||
|
||||
@source:ti99_8.cpp
|
||||
ti99_8 // 1983 TI-99/8
|
||||
@ -35255,7 +35254,7 @@ drtoppelu // B19 (c) 1987 Taito Corporation (US)
|
||||
extrmatn // B06 (c) 1987 Taito Corporation Japan (World)
|
||||
extrmatnj // B06 (c) 1987 Taito Corporation (Japan)
|
||||
extrmatnu // B06 (c) 1987 World Games (US)
|
||||
extrmatnur // B06 (c) 1987 Taito America Corporation + Romstar license (US)
|
||||
extrmatnur // B06 (c) 1987 Taito America Corporation + Romstar license (US)
|
||||
insectx // B97 (c) 1989 Taito Corporation Japan (World)
|
||||
insectxj // B97 (c) 1989 Taito Corporation (Japan)
|
||||
jpopnics // (c)1992 NICs, based on Plump Pop code
|
||||
|
||||
Loading…
Reference in New Issue
Block a user