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DS5002FP core
This commit is contained in:
Manuel Abadia
parent
e23b3c3776
commit
90f263f8a3
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -74,6 +74,10 @@ src/emu/cpu/drcuml.h svneol=native#text/plain
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src/emu/cpu/drcumld.c svneol=native#text/plain
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src/emu/cpu/drcumld.h svneol=native#text/plain
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src/emu/cpu/drcumlsh.h svneol=native#text/plain
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src/emu/cpu/ds5002fp/ds5002fp.c svneol=native#text/plain
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src/emu/cpu/ds5002fp/ds5002fp.h svneol=native#text/plain
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src/emu/cpu/ds5002fp/ds5002fpdasm.c svneol=native#text/plain
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src/emu/cpu/ds5002fp/ds5002fpops.c svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32.c svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32.h svneol=native#text/plain
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src/emu/cpu/dsp32/dsp32dis.c svneol=native#text/plain
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@ -616,6 +616,20 @@ $(CPUOBJ)/i8051/i8051.o: $(CPUSRC)/i8051/i8051.c \
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#-------------------------------------------------
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# DS5002FP
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#-------------------------------------------------
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CPUDEFS += -DHAS_DS5002FP=$(if $(filter DS5002FP,$(CPUS)),1,0)
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ifneq ($(filter DS5002FP,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/ds5002fp
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CPUOBJS += $(CPUOBJ)/ds5002fp/ds5002fp.o
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DBGOBJS += $(CPUOBJ)/ds5002fp/ds5002fpdasm.o
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endif
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#-------------------------------------------------
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# Intel 80x86 series
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#-------------------------------------------------
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2597
src/emu/cpu/ds5002fp/ds5002fp.c
Normal file
2597
src/emu/cpu/ds5002fp/ds5002fp.c
Normal file
File diff suppressed because it is too large
Load Diff
143
src/emu/cpu/ds5002fp/ds5002fp.h
Normal file
143
src/emu/cpu/ds5002fp/ds5002fp.h
Normal file
@ -0,0 +1,143 @@
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/*****************************************************************************
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* DS5002FP emulator
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*
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* The emulator is just a modified version of the MCS-51 Family Emulator by Steve Ellenoff
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*
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*****************************************************************************/
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/*****************************************************************************
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*
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* i8051.h
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* Portable MCS-51 Family Emulator
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*
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* Chips in the family:
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* 8051 Product Line (8031,8051,8751)
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* 8052 Product Line (8032,8052,8752)
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* 8054 Product Line (8054)
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* 8058 Product Line (8058)
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*
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* Copyright Steve Ellenoff, all rights reserved.
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*
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* - This source code is released as freeware for non-commercial purposes.
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* - You are free to use and redistribute this code in modified or
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* unmodified form, provided you list me in the credits.
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* - If you modify this source code, you must add a notice to each modified
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* source file that it has been changed. If you're a nice person, you
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* will clearly mark each change too. :)
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* - If you wish to use this for commercial purposes, please contact me at
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* sellenoff@hotmail.com
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* - The author of this copywritten work reserves the right to change the
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* terms of its usage and license at any time, including retroactively
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* - This entire notice must remain in the source code.
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*
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* This work is based on:
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* #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
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* #2) 8051 simulator by Travis Marlatte
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* #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
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*
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*****************************************************************************/
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#ifndef _DS5002FP_H
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#define _DS5002FP_H
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#include "cpuintrf.h"
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enum {
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DS5002FP_PC=1, DS5002FP_SP, DS5002FP_PSW, DS5002FP_ACC, DS5002FP_B, DS5002FP_DPH, DS5002FP_DPL, DS5002FP_IE,
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DS5002FP_PCON, DS5002FP_MCON, DS5002FP_RPCTL, DS5002FP_CRC,
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DS5002FP_R0, DS5002FP_R1, DS5002FP_R2, DS5002FP_R3, DS5002FP_R4, DS5002FP_R5, DS5002FP_R6, DS5002FP_R7, DS5002FP_RB
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};
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#define DS5002FP_INT0_LINE 0 /* External Interrupt 0 */
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#define DS5002FP_INT1_LINE 1 /* External Interrupt 1 */
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#define DS5002FP_T0_LINE 2 /* Timer 0 External Input */
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#define DS5002FP_T1_LINE 3 /* Timer 1 External Input */
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#define DS5002FP_RX_LINE 4 /* Serial Port Receive Line */
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#define DS5002FP_PFI_LINE 5 /* Power Fail Interrupt */
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/* definition of the special function registers. Note that the values are */
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/* the same as the internal memory address in the DS5002FP */
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#define P0 0x80
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#define SP 0x81
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#define DPL 0x82
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#define DPH 0x83
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#define PCON 0x87
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#define TCON 0x88
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#define TMOD 0x89
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#define TL0 0x8a
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#define TL1 0x8b
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#define TH0 0x8c
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#define TH1 0x8d
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#define P1 0x90
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#define SCON 0x98
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#define SBUF 0x99
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#define P2 0xa0
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#define IE 0xa8
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#define P3 0xb0
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#define IP 0xb8
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#define CRCR 0xc1
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#define CRCL 0xc2
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#define CRCH 0xc3
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#define MCON 0xc6
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#define TA 0xc7
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#define RNR 0xcf
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#define PSW 0xd0
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#define RPCTL 0xd8
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#define RPS 0xda
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#define ACC 0xe0
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#define B 0xf0
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/* commonly used bit address for the DS5002FP */
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#define C 0xd7
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#define P 0xd0
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#define AC 0xd6
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#define OV 0xd2
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#define PFW 0x8d
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#define TF1 0x8f
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#define IE0 0x89
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#define IE1 0x8b
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#define TI 0x99
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#define RI 0x98
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#define TI_FLAG 1
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#define RI_FLAG 2
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/* configuration of the DS5002FP */
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typedef struct _ds5002fp_config ds5002fp_config;
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struct _ds5002fp_config
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{
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UINT8 mcon; /* bootstrap loader MCON register */
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UINT8 rpctl; /* bootstrap loader RPCTL register */
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UINT8 crc; /* bootstrap loader CRC register */
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};
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extern void ds5002fp_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */
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extern void ds5002fp_reset (void); /* Reset registers to the initial values */
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extern void ds5002fp_exit (void); /* Shut down CPU core */
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extern int ds5002fp_execute(int cycles); /* Execute cycles - returns number of cycles actually run */
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extern void ds5002fp_get_context (void *dst); /* Get registers, return context size */
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extern void ds5002fp_set_context (void *src); /* Set registers */
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extern unsigned ds5002fp_get_intram (int offset);
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extern unsigned ds5002fp_get_reg (int regnum);
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extern void ds5002fp_set_reg (int regnum, unsigned val);
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extern void ds5002fp_set_irq_line(int irqline, int state);
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extern void ds5002fp_set_irq_callback(int (*callback)(int irqline));
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extern void ds5002fp_state_save(void *file);
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extern void ds5002fp_state_load(void *file);
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WRITE8_HANDLER( ds5002fp_internal_w );
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READ8_HANDLER( ds5002fp_internal_r );
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extern void ds5002fp_set_serial_tx_callback(void (*callback)(int data));
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extern void ds5002fp_set_serial_rx_callback(int (*callback)(void));
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extern void ds5002fp_set_ebram_iaddr_callback(READ32_HANDLER((*callback)));
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#ifdef ENABLE_DEBUGGER
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extern offs_t ds5002fp_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
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#endif /* ENABLE_DEBUGGER */
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void ds5002fp_get_info(UINT32 state, cpuinfo *info);
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#endif /* _DS5002FP_H */
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1040
src/emu/cpu/ds5002fp/ds5002fpdasm.c
Normal file
1040
src/emu/cpu/ds5002fp/ds5002fpdasm.c
Normal file
File diff suppressed because it is too large
Load Diff
960
src/emu/cpu/ds5002fp/ds5002fpops.c
Normal file
960
src/emu/cpu/ds5002fp/ds5002fpops.c
Normal file
@ -0,0 +1,960 @@
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/*******************************************************************************************
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NOTE: All registers are accessed directly, instead of using the SFR_R() function for speed
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Direct register access is availabe from the R_(register name) macros.. ex: R_ACC for the ACC
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with the exception of the PC
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********************************************************************************************/
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//ACALL code addr /* 1: aaa1 0001 */
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INLINE void acall(void)
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{
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UINT8 op = ROP(PC-1); //Grab the opcode for ACALL
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UINT8 addr = ROP_ARG(PC++); //Grab code address byte
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PUSH_PC //Save PC to the stack
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//Thanks Gerrit for help with this! :)
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PC = (PC & 0xf800) | ((op & 0xe0) << 3) | addr;
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}
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//ADD A, #data /* 1: 0010 0100 */
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INLINE void add_a_byte(void)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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UINT8 result = R_ACC + data; //Add data to accumulator
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DO_ADD_FLAGS(R_ACC,data,0) //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADD A, data addr /* 1: 0010 0101 */
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INLINE void add_a_mem(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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UINT8 data = IRAM_R(addr); //Grab data from data address
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UINT8 result = R_ACC + data; //Add data to accumulator
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DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADD A, @R0/@R1 /* 1: 0010 011i */
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INLINE void add_a_ir(int r)
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{
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UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
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UINT8 result = R_ACC + data; //Add data to accumulator
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DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADD A, R0 to R7 /* 1: 0010 1rrr */
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INLINE void add_a_r(int r)
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{
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UINT8 data = R_R(r); //Grab data from R0 - R7
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UINT8 result = R_ACC + data; //Add data to accumulator
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DO_ADD_FLAGS(R_ACC,data,0); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADDC A, #data /* 1: 0011 0100 */
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INLINE void addc_a_byte(void)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
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DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADDC A, data addr /* 1: 0011 0101 */
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INLINE void addc_a_mem(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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UINT8 data = IRAM_R(addr); //Grab data from data address
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UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
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DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADDC A, @R0/@R1 /* 1: 0011 011i */
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INLINE void addc_a_ir(int r)
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{
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UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
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UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
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DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//ADDC A, R0 to R7 /* 1: 0011 1rrr */
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INLINE void addc_a_r(int r)
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{
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UINT8 data = R_R(r); //Grab data from R0 - R7
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UINT8 result = R_ACC + data + GET_CY; //Add data + carry flag to accumulator
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DO_ADD_FLAGS(R_ACC,data,GET_CY); //Set Flags
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SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
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}
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//AJMP code addr /* 1: aaa0 0001 */
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INLINE void ajmp(void)
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{
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UINT8 op = ROP(PC-1); //Grab the opcode for AJMP
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UINT8 addr = ROP_ARG(PC++); //Grab code address byte
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//Thanks Gerrit for help with this! :)
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PC = (PC & 0xf800) | ((op & 0xe0) << 3) | addr;
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}
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//ANL data addr, A /* 1: 0101 0010 */
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INLINE void anl_mem_a(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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UINT8 data = IRAM_R(addr); //Grab data from data address
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IRAM_W(addr,data & R_ACC); //Set data address value to it's value Logical AND with ACC
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}
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//ANL data addr, #data /* 1: 0101 0011 */
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INLINE void anl_mem_byte(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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UINT8 data = ROP_ARG(PC++); //Grab data
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UINT8 srcdata = IRAM_R(addr); //Grab data from data address
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IRAM_W(addr,srcdata & data); //Set data address value to it's value Logical AND with Data
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}
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//ANL A, #data /* 1: 0101 0100 */
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INLINE void anl_a_byte(void)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
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}
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//ANL A, data addr /* 1: 0101 0101 */
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INLINE void anl_a_mem(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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UINT8 data = IRAM_R(addr); //Grab data from data address
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SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
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}
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//ANL A, @RO/@R1 /* 1: 0101 011i */
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INLINE void anl_a_ir(int r)
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{
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UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
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SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
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}
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//ANL A, RO to R7 /* 1: 0101 1rrr */
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INLINE void anl_a_r(int r)
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{
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UINT8 data = R_R(r); //Grab data from R0 - R7
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SFR_W(ACC,R_ACC & data); //Set ACC to value of ACC Logical AND with Data
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}
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//ANL C, bit addr /* 1: 1000 0010 */
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INLINE void anl_c_bitaddr(void)
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{
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int cy = GET_CY;
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UINT8 addr = ROP_ARG(PC++); //Grab bit address
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UINT8 bit = BIT_R(addr); //Grab bit data from bit address
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SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
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}
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//ANL C,/bit addr /* 1: 1011 0000 */
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INLINE void anl_c_nbitaddr(void)
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{
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int cy = GET_CY;
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UINT8 addr = ROP_ARG(PC++); //Grab bit address
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UINT8 bit = BIT_R(addr); //Grab bit data from bit address
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bit = ((~bit)&1); //Complement bit
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SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
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}
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//CJNE A, #data, code addr /* 1: 1011 0100 */
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INLINE void cjne_a_byte(void)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
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if(R_ACC != data) //Jump if values are not equal
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PC = PC + rel_addr;
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (R_ACC < data) );
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}
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//CJNE A, data addr, code addr /* 1: 1011 0101 */
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INLINE void cjne_a_mem(void)
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{
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UINT8 addr = ROP_ARG(PC++); //Grab data address
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INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
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UINT8 data = IRAM_R(addr); //Pull value from data address
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if(R_ACC != data) //Jump if values are not equal
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PC = PC + rel_addr;
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (R_ACC < data) );
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}
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//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
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INLINE void cjne_ir_byte(int r)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
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UINT8 srcdata = IRAM_IR(R_R(r)); //Grab value pointed to by R0 or R1
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if(srcdata != data) //Jump if values are not equal
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PC = PC + rel_addr;
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (srcdata < data) );
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}
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//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
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INLINE void cjne_r_byte(int r)
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{
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UINT8 data = ROP_ARG(PC++); //Grab data
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INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
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UINT8 srcdata = R_R(r); //Grab value of R0 - R7
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if(srcdata != data) //Jump if values are not equal
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PC = PC + rel_addr;
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (srcdata < data) );
|
||||
}
|
||||
|
||||
//CLR bit addr /* 1: 1100 0010 */
|
||||
INLINE void clr_bitaddr(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
BIT_W(addr,0); //Clear bit at specified bit address
|
||||
}
|
||||
|
||||
//CLR C /* 1: 1100 0011 */
|
||||
INLINE void clr_c(void)
|
||||
{
|
||||
SET_CY(0); //Clear Carry Flag
|
||||
}
|
||||
|
||||
//CLR A /* 1: 1110 0100 */
|
||||
INLINE void clr_a(void)
|
||||
{
|
||||
SFR_W(ACC,0); //Clear Accumulator
|
||||
}
|
||||
|
||||
//CPL bit addr /* 1: 1011 0010 */
|
||||
INLINE void cpl_bitaddr(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
UINT8 data = (~BIT_R(addr))&1;
|
||||
BIT_W(addr,data); //Complement bit at specified bit address
|
||||
}
|
||||
|
||||
//CPL C /* 1: 1011 0011 */
|
||||
INLINE void cpl_c(void)
|
||||
{
|
||||
UINT8 bit = (~GET_CY)&1; //Complement Carry Flag
|
||||
SET_CY(bit);
|
||||
}
|
||||
|
||||
//CPL A /* 1: 1111 0100 */
|
||||
INLINE void cpl_a(void)
|
||||
{
|
||||
UINT8 data = ((~R_ACC)&0xff);
|
||||
SFR_W(ACC,data); //Complement Accumulator
|
||||
}
|
||||
|
||||
//DA A /* 1: 1101 0100 */
|
||||
INLINE void da_a(void)
|
||||
{
|
||||
/*From several sources, since none said the same thing:
|
||||
The decimal adjust instruction is associated with the use of the ADD and ADDC instructions.
|
||||
The eight-bit value in the accumulator is adjusted to form two BCD digits of four bits each.
|
||||
If the accumulator contents bits 0-3 are greater than 9, OR the AC flag is set, then six is added to
|
||||
produce a proper BCD digit.
|
||||
If the carry is set, OR the four high bits 4-7 exceed nine, six is added to the value of these bits.
|
||||
The carry flag will be set if the result is > 0x99, but not cleared otherwise */
|
||||
|
||||
UINT16 new_acc = R_ACC & 0xff;
|
||||
if(GET_AC || (new_acc & 0x0f) > 0x09)
|
||||
new_acc += 0x06;
|
||||
if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
|
||||
new_acc += 0x60;
|
||||
SFR_W(ACC,new_acc&0xff);
|
||||
if(new_acc & ~0xff)
|
||||
SET_CY(1);
|
||||
}
|
||||
|
||||
//DEC A /* 1: 0001 0100 */
|
||||
INLINE void dec_a(void)
|
||||
{
|
||||
SFR_W(ACC,R_ACC-1);
|
||||
}
|
||||
|
||||
//DEC data addr /* 1: 0001 0101 */
|
||||
INLINE void dec_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr);
|
||||
IRAM_W(addr,data-1);
|
||||
}
|
||||
|
||||
//DEC @R0/@R1 /* 1: 0001 011i */
|
||||
INLINE void dec_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r));
|
||||
IRAM_W(R_R(r),data-1);
|
||||
}
|
||||
|
||||
//DEC R0 to R7 /* 1: 0001 1rrr */
|
||||
INLINE void dec_r(int r)
|
||||
{
|
||||
R_R(r) = R_R(r) - 1;
|
||||
}
|
||||
|
||||
//DIV AB /* 1: 1000 0100 */
|
||||
INLINE void div_ab(void)
|
||||
{
|
||||
if( R_B == 0 ) {
|
||||
//Overflow flag is set!
|
||||
SET_OV(1);
|
||||
//Really the values are undefined according to the manual, but we'll just leave them as is..
|
||||
//SFR_W(ACC,0xff);
|
||||
//SFR_W(B,0xff);
|
||||
}
|
||||
else {
|
||||
int a = (int)R_ACC/R_B;
|
||||
int b = (int)R_ACC%R_B;
|
||||
//A gets quotient byte, B gets remainder byte
|
||||
SFR_W(ACC,a);
|
||||
SFR_W(B, b);
|
||||
//Overflow flag is cleared
|
||||
SET_OV(0);
|
||||
}
|
||||
//Carry Flag is always cleared
|
||||
SET_CY(0);
|
||||
}
|
||||
|
||||
//DJNZ data addr, code addr /* 1: 1101 0101 */
|
||||
INLINE void djnz_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
|
||||
if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
|
||||
INLINE void djnz_r(int r)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
R_R(r) = R_R(r) - 1; //Decrement value
|
||||
if(R_R(r) != 0) //Branch if contents of R0 - R7 is not 0
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//INC A /* 1: 0000 0100 */
|
||||
INLINE void inc_a(void)
|
||||
{
|
||||
SFR_W(ACC,R_ACC+1);
|
||||
}
|
||||
|
||||
//INC data addr /* 1: 0000 0101 */
|
||||
INLINE void inc_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr);
|
||||
IRAM_W(addr,data+1);
|
||||
}
|
||||
|
||||
//INC @R0/@R1 /* 1: 0000 011i */
|
||||
INLINE void inc_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r));
|
||||
IRAM_W(R_R(r),data+1);
|
||||
}
|
||||
|
||||
//INC R0 to R7 /* 1: 0000 1rrr */
|
||||
INLINE void inc_r(int r)
|
||||
{
|
||||
UINT8 data = R_R(r);
|
||||
R_R(r) = data + 1;
|
||||
}
|
||||
|
||||
//INC DPTR /* 1: 1010 0011 */
|
||||
INLINE void inc_dptr(void)
|
||||
{
|
||||
UINT16 dptr = (R_DPTR)+1;
|
||||
DPTR_W(dptr);
|
||||
}
|
||||
|
||||
//JB bit addr, code addr /* 1: 0010 0000 */
|
||||
INLINE void jb(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(BIT_R(addr)) //If bit set at specified bit address, jump
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//JBC bit addr, code addr /* 1: 0001 0000 */
|
||||
INLINE void jbc(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(BIT_R(addr)) { //If bit set at specified bit address, jump
|
||||
PC = PC + rel_addr;
|
||||
BIT_W(addr,0); //Clear Bit also
|
||||
}
|
||||
}
|
||||
|
||||
//JC code addr /* 1: 0100 0000 */
|
||||
INLINE void jc(void)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(GET_CY) //Jump if Carry Flag Set
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//JMP @A+DPTR /* 1: 0111 0011 */
|
||||
INLINE void jmp_iadptr(void)
|
||||
{
|
||||
PC = R_ACC+R_DPTR;
|
||||
}
|
||||
|
||||
//JNB bit addr, code addr /* 1: 0011 0000 */
|
||||
INLINE void jnb(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//JNC code addr /* 1: 0101 0000 */
|
||||
INLINE void jnc(void)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(!GET_CY) //Jump if Carry Flag not set
|
||||
PC = PC + rel_addr;
|
||||
}
|
||||
|
||||
//JNZ code addr /* 1: 0111 0000 */
|
||||
INLINE void jnz(void)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(R_ACC != 0) //Branch if ACC is not 0
|
||||
PC = PC+rel_addr;
|
||||
}
|
||||
|
||||
//JZ code addr /* 1: 0110 0000 */
|
||||
INLINE void jz(void)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
if(R_ACC == 0) //Branch if ACC is 0
|
||||
PC = PC+rel_addr;
|
||||
}
|
||||
|
||||
//LCALL code addr /* 1: 0001 0010 */
|
||||
INLINE void lcall(void)
|
||||
{
|
||||
UINT8 addr_hi, addr_lo;
|
||||
addr_hi = ROP_ARG(PC++);
|
||||
addr_lo = ROP_ARG(PC++);
|
||||
PUSH_PC
|
||||
PC = (UINT16)((addr_hi<<8) | addr_lo);
|
||||
}
|
||||
|
||||
//LJMP code addr /* 1: 0000 0010 */
|
||||
INLINE void ljmp(void)
|
||||
{
|
||||
UINT8 addr_hi, addr_lo;
|
||||
addr_hi = ROP_ARG(PC++);
|
||||
addr_lo = ROP_ARG(PC++);
|
||||
PC = (UINT16)((addr_hi<<8) | addr_lo);
|
||||
}
|
||||
|
||||
//MOV A, #data /* 1: 0111 0100 */
|
||||
INLINE void mov_a_byte(void)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
SFR_W(ACC,data); //Store data to ACC
|
||||
}
|
||||
|
||||
//MOV A, data addr /* 1: 1110 0101 */
|
||||
INLINE void mov_a_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
SFR_W(ACC,IRAM_R(addr)); //Store contents of data address to ACC
|
||||
}
|
||||
|
||||
//MOV A,@RO/@R1 /* 1: 1110 011i */
|
||||
INLINE void mov_a_ir(int r)
|
||||
{
|
||||
SFR_W(ACC,IRAM_IR(R_R(r))); //Store contents of address pointed by R0 or R1 to ACC
|
||||
}
|
||||
|
||||
//MOV A,R0 to R7 /* 1: 1110 1rrr */
|
||||
INLINE void mov_a_r(int r)
|
||||
{
|
||||
SFR_W(ACC,R_R(r)); //Store contents of R0 - R7 to ACC
|
||||
}
|
||||
|
||||
//MOV data addr, #data /* 1: 0111 0101 */
|
||||
INLINE void mov_mem_byte(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
IRAM_W(addr,data); //Store data to data address location
|
||||
}
|
||||
|
||||
//MOV data addr, data addr /* 1: 1000 0101 */
|
||||
INLINE void mov_mem_mem(void)
|
||||
{
|
||||
//1st address is src, 2nd is dst, but the mov command works as mov dst,src)
|
||||
UINT8 src,dst;
|
||||
src = ROP_ARG(PC++); //Grab source data address
|
||||
dst = ROP_ARG(PC++); //Grab destination data address
|
||||
IRAM_W(dst,IRAM_R(src)); //Read source address contents and store to destination address
|
||||
}
|
||||
|
||||
//MOV @R0/@R1, #data /* 1: 0111 011i */
|
||||
INLINE void mov_ir_byte(int r)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
IRAM_IW(R_R(r),data); //Store data to address pointed by R0 or R1
|
||||
}
|
||||
|
||||
//MOV R0 to R7, #data /* 1: 0111 1rrr */
|
||||
INLINE void mov_r_byte(int r)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
R_R(r) = data; //Store to R0 - R7
|
||||
}
|
||||
|
||||
//MOV data addr, @R0/@R1 /* 1: 1000 011i */
|
||||
INLINE void mov_mem_ir(int r)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
IRAM_W(addr,IRAM_IR(R_R(r))); //Store contents pointed to by R0 or R1 to data address
|
||||
}
|
||||
|
||||
//MOV data addr,R0 to R7 /* 1: 1000 1rrr */
|
||||
INLINE void mov_mem_r(int r)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
IRAM_W(addr,R_R(r)); //Store contents of R0 - R7 to data address
|
||||
}
|
||||
|
||||
//MOV DPTR, #data16 /* 1: 1001 0000 */
|
||||
INLINE void mov_dptr_byte(void)
|
||||
{
|
||||
UINT8 data_hi, data_lo;
|
||||
data_hi = ROP_ARG(PC++); //Grab hi byte
|
||||
data_lo = ROP_ARG(PC++); //Grab lo byte
|
||||
DPTR_W((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
|
||||
}
|
||||
|
||||
//MOV bit addr, C /* 1: 1001 0010 */
|
||||
INLINE void mov_bitaddr_c(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
BIT_W(addr,GET_CY); //Store Carry Flag to Bit Address
|
||||
}
|
||||
|
||||
//MOV @R0/@R1, data addr /* 1: 1010 011i */
|
||||
INLINE void mov_ir_mem(int r)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
IRAM_IW(R_R(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
|
||||
}
|
||||
|
||||
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
|
||||
INLINE void mov_r_mem(int r)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
R_R(r) = IRAM_R(addr); //Store to R0 - R7
|
||||
}
|
||||
|
||||
//MOV data addr, A /* 1: 1111 0101 */
|
||||
INLINE void mov_mem_a(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
IRAM_W(addr,R_ACC); //Store A to data address
|
||||
}
|
||||
|
||||
//MOV @R0/@R1, A /* 1: 1111 011i */
|
||||
INLINE void mov_ir_a(int r)
|
||||
{
|
||||
IRAM_IW(R_R(r),R_ACC); //Store A to location pointed to by R0 or R1
|
||||
}
|
||||
|
||||
//MOV R0 to R7, A /* 1: 1111 1rrr */
|
||||
INLINE void mov_r_a(int r)
|
||||
{
|
||||
R_R(r) = R_ACC; //Store A to R0-R7
|
||||
}
|
||||
|
||||
//MOVC A, @A + PC /* 1: 1000 0011 */
|
||||
INLINE void movc_a_iapc(void)
|
||||
{
|
||||
UINT8 data;
|
||||
data = CODEMEM_R(R_ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
|
||||
SFR_W(ACC,data);
|
||||
}
|
||||
|
||||
//MOV C, bit addr /* 1: 1010 0010 */
|
||||
INLINE void mov_c_bitaddr(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
|
||||
}
|
||||
|
||||
//MOVC A, @A + DPTR /* 1: 1001 0011 */
|
||||
INLINE void movc_a_iadptr(void)
|
||||
{
|
||||
UINT8 data;
|
||||
data = CODEMEM_R(R_ACC+R_DPTR); //Move a byte from CODE(Program) Memory and store to ACC
|
||||
SFR_W(ACC,data);
|
||||
}
|
||||
|
||||
//MOVX A,@DPTR /* 1: 1110 0000 */
|
||||
//(Move External Ram 16 bit address to A)
|
||||
INLINE void movx_a_idptr(void)
|
||||
{
|
||||
// UINT8 byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
|
||||
UINT32 addr = ERAM_ADDR(R_DPTR,0xFFFF);
|
||||
UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
|
||||
SFR_W(ACC,byte); //Store to ACC
|
||||
}
|
||||
|
||||
//MOVX A, @R0/@R1 /* 1: 1110 001i */
|
||||
//(Move External Ram 8 bit address to A)
|
||||
INLINE void movx_a_ir(int r)
|
||||
{
|
||||
UINT32 addr = ERAM_ADDR(R_R(r),0xFF); //Grab address by reading location pointed to by R0 or R1
|
||||
UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
|
||||
SFR_W(ACC,byte); //Store to ACC
|
||||
}
|
||||
|
||||
//MOVX @DPTR,A /* 1: 1111 0000 */
|
||||
//(Move A to External Ram 16 bit address)
|
||||
INLINE void movx_idptr_a(void)
|
||||
{
|
||||
// DATAMEM_W(R_DPTR, R_ACC); //Store ACC to External DATA memory address pointed to by DPTR
|
||||
UINT32 addr = ERAM_ADDR(R_DPTR,0xFFFF);
|
||||
DATAMEM_W(addr, R_ACC); //Store ACC to External DATA memory address pointed to by DPTR
|
||||
}
|
||||
|
||||
//MOVX @R0/@R1,A /* 1: 1111 001i */
|
||||
//(Move A to External Ram 8 bit address)
|
||||
INLINE void movx_ir_a(int r)
|
||||
{
|
||||
UINT32 addr = ERAM_ADDR(R_R(r),0xFF); //Grab address by reading location pointed to by R0 or R1
|
||||
DATAMEM_W(addr, R_ACC); //Store ACC to External DATA memory address
|
||||
}
|
||||
|
||||
//MUL AB /* 1: 1010 0100 */
|
||||
INLINE void mul_ab(void)
|
||||
{
|
||||
UINT16 result = R_ACC * R_B;
|
||||
//A gets lo bits, B gets hi bits of result
|
||||
SFR_W(B,(UINT8)((result & 0xFF00) >> 8));
|
||||
SFR_W(ACC,(UINT8)(result & 0x00FF));
|
||||
//Set flags
|
||||
SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
|
||||
SET_CY(0); //Carry Flag always cleared
|
||||
}
|
||||
|
||||
//NOP /* 1: 0000 0000 */
|
||||
INLINE void nop(void)
|
||||
{
|
||||
}
|
||||
|
||||
//ORL data addr, A /* 1: 0100 0010 */
|
||||
INLINE void orl_mem_a(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data from data address
|
||||
IRAM_W(addr,data | R_ACC); //Set data address value to it's value Logical OR with ACC
|
||||
}
|
||||
|
||||
//ORL data addr, #data /* 1: 0100 0011 */
|
||||
INLINE void orl_mem_byte(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
UINT8 srcdata = IRAM_R(addr); //Grab data from data address
|
||||
IRAM_W(addr,srcdata | data); //Set data address value to it's value Logical OR with Data
|
||||
}
|
||||
|
||||
//ORL A, #data /* 1: 0100 0100 */
|
||||
INLINE void orl_a_byte(void)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
|
||||
}
|
||||
|
||||
//ORL A, data addr /* 1: 0100 0101 */
|
||||
INLINE void orl_a_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data from data address
|
||||
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
|
||||
}
|
||||
|
||||
//ORL A, @RO/@R1 /* 1: 0100 011i */
|
||||
INLINE void orl_a_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
|
||||
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
|
||||
}
|
||||
|
||||
//ORL A, RO to R7 /* 1: 0100 1rrr */
|
||||
INLINE void orl_a_r(int r)
|
||||
{
|
||||
UINT8 data = R_R(r); //Grab data from R0 - R7
|
||||
SFR_W(ACC,R_ACC | data); //Set ACC to value of ACC Logical OR with Data
|
||||
}
|
||||
|
||||
//ORL C, bit addr /* 1: 0111 0010 */
|
||||
INLINE void orl_c_bitaddr(void)
|
||||
{
|
||||
int cy = GET_CY;
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
UINT8 bit = BIT_R(addr); //Grab bit data from bit address
|
||||
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
|
||||
}
|
||||
|
||||
//ORL C, /bit addr /* 1: 1010 0000 */
|
||||
INLINE void orl_c_nbitaddr(void)
|
||||
{
|
||||
int cy = GET_CY;
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
UINT8 bit = BIT_R(addr); //Grab bit data from bit address
|
||||
bit = ((~bit)&1); //Complement bit
|
||||
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
|
||||
}
|
||||
|
||||
//POP data addr /* 1: 1101 0000 */
|
||||
INLINE void pop(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
IRAM_W(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
|
||||
//IRAM_IW(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - doesn't work, sfr's are not restored this way and it's not an indirect access anyway
|
||||
SFR_W(SP,R_SP-1); //Decrement SP
|
||||
}
|
||||
|
||||
//PUSH data addr /* 1: 1100 0000 */
|
||||
INLINE void push(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 tmpSP = R_SP; //Grab and Increment Stack Pointer
|
||||
tmpSP++; // ""
|
||||
SFR_W(SP,tmpSP); // ""
|
||||
if (tmpSP == R_SP) //Ensure it was able to write to new stack location
|
||||
IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
|
||||
}
|
||||
|
||||
//RET /* 1: 0010 0010 */
|
||||
INLINE void ret(void)
|
||||
{
|
||||
POP_PC
|
||||
}
|
||||
|
||||
//RETI /* 1: 0011 0010 */
|
||||
INLINE void reti(void)
|
||||
{
|
||||
POP_PC
|
||||
CLEAR_CURRENT_IRQ
|
||||
}
|
||||
|
||||
//RL A /* 1: 0010 0011 */
|
||||
INLINE void rl_a(void)
|
||||
{
|
||||
//Left Shift A, Bit 7 carries to Bit 0
|
||||
int carry = ((R_ACC & 0x80) >> 7);
|
||||
int data = (R_ACC<<1) & 0xfe;
|
||||
SFR_W(ACC, data | carry);
|
||||
}
|
||||
|
||||
//RLC A /* 1: 0011 0011 */
|
||||
INLINE void rlc_a(void)
|
||||
{
|
||||
//Left Shift A, Bit 7 goes to Carry Flag, Original Carry Flag goes to Bit 0 of ACC
|
||||
int carry = ((R_ACC & 0x80) >> 7);
|
||||
int data = ((R_ACC<<1) & 0xfe) | GET_CY;
|
||||
SFR_W(ACC, data);
|
||||
SET_CY(carry);
|
||||
}
|
||||
|
||||
//RR A /* 1: 0000 0011 */
|
||||
INLINE void rr_a(void)
|
||||
{
|
||||
//Right Shift A, Bit 0 carries to Bit 7
|
||||
int carry = ((R_ACC & 1) << 7);
|
||||
int data = (R_ACC>>1) & 0x7f;
|
||||
SFR_W(ACC, data | carry);
|
||||
}
|
||||
|
||||
//RRC A /* 1: 0001 0011 */
|
||||
INLINE void rrc_a(void)
|
||||
{
|
||||
//Right Shift A, Bit 0 goes to Carry Flag, Bit 7 of ACC gets set to original Carry Flag
|
||||
int carry = (R_ACC & 1);
|
||||
int data = ((R_ACC>>1) & 0x7f) | (GET_CY<<7);
|
||||
SFR_W(ACC, data);
|
||||
SET_CY(carry);
|
||||
}
|
||||
|
||||
//SETB C /* 1: 1101 0011 */
|
||||
INLINE void setb_c(void)
|
||||
{
|
||||
SET_CY(1); //Set Carry Flag
|
||||
}
|
||||
|
||||
//SETB bit addr /* 1: 1101 0010 */
|
||||
INLINE void setb_bitaddr(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab bit address
|
||||
BIT_W(addr,1); //Set Bit at Bit Address
|
||||
}
|
||||
|
||||
//SJMP code addr /* 1: 1000 0000 */
|
||||
INLINE void sjmp(void)
|
||||
{
|
||||
INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
|
||||
PC = PC + rel_addr; //Update PC
|
||||
}
|
||||
|
||||
//SUBB A, #data /* 1: 1001 0100 */
|
||||
INLINE void subb_a_byte(void)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
|
||||
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
|
||||
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
|
||||
|
||||
}
|
||||
|
||||
//SUBB A, data addr /* 1: 1001 0101 */
|
||||
INLINE void subb_a_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data from data address
|
||||
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
|
||||
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
|
||||
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
|
||||
}
|
||||
|
||||
//SUBB A, @R0/@R1 /* 1: 1001 011i */
|
||||
INLINE void subb_a_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r)); //Grab data from memory pointed to by R0 or R1
|
||||
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
|
||||
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
|
||||
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
|
||||
}
|
||||
|
||||
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
|
||||
INLINE void subb_a_r(int r)
|
||||
{
|
||||
UINT8 data = R_R(r); //Grab data from R0 - R7
|
||||
UINT8 result = R_ACC - data - GET_CY; //Subtract data & carry flag from accumulator
|
||||
DO_SUB_FLAGS(R_ACC,data,GET_CY); //Set Flags
|
||||
SFR_W(ACC,result); //Store 8 bit result of addtion in ACC
|
||||
}
|
||||
|
||||
//SWAP A /* 1: 1100 0100 */
|
||||
INLINE void swap_a(void)
|
||||
{
|
||||
UINT8 a_nib_lo, a_nib_hi;
|
||||
a_nib_hi = (R_ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
|
||||
a_nib_lo = (R_ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
|
||||
SFR_W(ACC, a_nib_hi | a_nib_lo);
|
||||
}
|
||||
|
||||
//XCH A, data addr /* 1: 1100 0101 */
|
||||
INLINE void xch_a_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data
|
||||
UINT8 oldACC = R_ACC; //Hold value of ACC
|
||||
SFR_W(ACC,data); //Sets ACC to data
|
||||
IRAM_W(addr,oldACC); //Sets data address to old value of ACC
|
||||
}
|
||||
|
||||
//XCH A, @RO/@R1 /* 1: 1100 011i */
|
||||
INLINE void xch_a_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r)); //Grab data pointed to by R0 or R1
|
||||
UINT8 oldACC = R_ACC; //Hold value of ACC
|
||||
SFR_W(ACC,data); //Sets ACC to data
|
||||
IRAM_W(R_R(r),oldACC); //Sets data address to old value of ACC
|
||||
}
|
||||
|
||||
//XCH A, RO to R7 /* 1: 1100 1rrr */
|
||||
INLINE void xch_a_r(int r)
|
||||
{
|
||||
UINT8 data = R_R(r); //Grab data from R0-R7
|
||||
UINT8 oldACC = R_ACC; //Hold value of ACC
|
||||
SFR_W(ACC,data); //Sets ACC to data
|
||||
R_R(r) = oldACC; //Sets data address to old value of ACC
|
||||
}
|
||||
|
||||
//XCHD A, @R0/@R1 /* 1: 1101 011i */
|
||||
INLINE void xchd_a_ir(int r)
|
||||
{
|
||||
UINT8 acc, ir_data;
|
||||
ir_data = IRAM_IR(R_R(r)); //Grab data pointed to by R0 or R1
|
||||
acc = R_ACC; //Grab ACC value
|
||||
SFR_W(ACC, (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
|
||||
IRAM_W(R_R(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
|
||||
}
|
||||
|
||||
//XRL data addr, A /* 1: 0110 0010 */
|
||||
INLINE void xrl_mem_a(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data from data address
|
||||
IRAM_W(addr,data ^ R_ACC); //Set data address value to it's value Logical XOR with ACC
|
||||
}
|
||||
|
||||
//XRL data addr, #data /* 1: 0110 0011 */
|
||||
INLINE void xrl_mem_byte(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
UINT8 srcdata = IRAM_R(addr); //Grab data from data address
|
||||
IRAM_W(addr,srcdata ^ data); //Set data address value to it's value Logical XOR with Data
|
||||
}
|
||||
|
||||
//XRL A, #data /* 1: 0110 0100 */
|
||||
INLINE void xrl_a_byte(void)
|
||||
{
|
||||
UINT8 data = ROP_ARG(PC++); //Grab data
|
||||
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
|
||||
}
|
||||
|
||||
//XRL A, data addr /* 1: 0110 0101 */
|
||||
INLINE void xrl_a_mem(void)
|
||||
{
|
||||
UINT8 addr = ROP_ARG(PC++); //Grab data address
|
||||
UINT8 data = IRAM_R(addr); //Grab data from data address
|
||||
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
|
||||
}
|
||||
|
||||
//XRL A, @R0/@R1 /* 1: 0110 011i */
|
||||
INLINE void xrl_a_ir(int r)
|
||||
{
|
||||
UINT8 data = IRAM_IR(R_R(r)); //Grab data from address R0 or R1 points to
|
||||
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
|
||||
}
|
||||
|
||||
//XRL A, R0 to R7 /* 1: 0110 1rrr */
|
||||
INLINE void xrl_a_r(int r)
|
||||
{
|
||||
UINT8 data = R_R(r); //Grab data from R0 - R7
|
||||
SFR_W(ACC,R_ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
|
||||
}
|
||||
|
||||
//illegal opcodes
|
||||
INLINE void illegal(void)
|
||||
{
|
||||
LOG(("ds5002fp #%d: illegal opcode at 0x%03x: %02x\n", cpu_getactivecpu(), PC, ROP(PC)));
|
||||
}
|
||||
@ -88,6 +88,7 @@ enum _cpu_type
|
||||
CPU_I8052,
|
||||
CPU_I8751,
|
||||
CPU_I8752,
|
||||
CPU_DS5002FP,
|
||||
CPU_M6800,
|
||||
CPU_M6801,
|
||||
CPU_M6802,
|
||||
|
||||
@ -61,6 +61,7 @@ void i8051_get_info(UINT32 state, cpuinfo *info);
|
||||
void i8052_get_info(UINT32 state, cpuinfo *info);
|
||||
void i8751_get_info(UINT32 state, cpuinfo *info);
|
||||
void i8752_get_info(UINT32 state, cpuinfo *info);
|
||||
void ds5002fp_get_info(UINT32 state, cpuinfo *info);
|
||||
void m6800_get_info(UINT32 state, cpuinfo *info);
|
||||
void m6801_get_info(UINT32 state, cpuinfo *info);
|
||||
void m6802_get_info(UINT32 state, cpuinfo *info);
|
||||
@ -401,6 +402,9 @@ static const struct
|
||||
#if (HAS_I8752)
|
||||
{ CPU_I8752, i8752_get_info },
|
||||
#endif
|
||||
#if (HAS_DS5002FP)
|
||||
{ CPU_DS5002FP, ds5002fp_get_info },
|
||||
#endif
|
||||
#if (HAS_M6800)
|
||||
{ CPU_M6800, m6800_get_info },
|
||||
#endif
|
||||
|
||||
@ -74,6 +74,7 @@ CPUS += I8051
|
||||
CPUS += I8052
|
||||
CPUS += I8751
|
||||
CPUS += I8752
|
||||
CPUS += DS5002FP
|
||||
CPUS += M6800
|
||||
CPUS += M6801
|
||||
CPUS += M6802
|
||||
|
||||
Loading…
Reference in New Issue
Block a user