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(MESS) vidbrain: Updated UV201/UV202 pinouts based on kevtris's doc. (nw)

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This commit is contained in:
Curt Coder 2013-07-27 11:03:17 +00:00
parent 0258db205f
commit 91697c1f06
1 changed files with 39 additions and 39 deletions
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78
src/mess/video/uv201.h
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@ -7,48 +7,48 @@
********************************************************************** **********************************************************************
_____ _____ _____ _____
GND 1 |* \_/ | 40 GND 1 |* \_/ | 40 DMAREQ
G 2 | | 39 G 2 | | 39 /CE
I 3 | | 38 RESET I 3 | | 38 RESET
B 4 | | 37 BRC B 4 | | 37 BISTROBE
R 5 | | 36 R 5 | | 36 UMIREQ0
BA0 6 | | 35 B1 STROBE BA0 6 | | 35 BRCLK
BA1 7 | | 34 COLOR XTAL (3.636 MHz) BA1 7 | | 34 HBLANK
BA2 8 | | 33 BA2 8 | | 33 VBLANK
BA3 9 | | 32 BA3 9 | | 32 R/W
BA4 10 | UV201 | 31 BA4 10 | UV201 | 31 keypad column 8
BA5 11 | | 30 EXTINT BA5 11 | | 30 EXT INT
BA6 12 | | 29 O/E BA6 12 | | 29 FIELD
BA7 13 | | 28 BO7 BA7 13 | | 28 BD7
BA8 14 | | 27 BO6 BA8 14 | | 27 BD6
BA9 15 | | 26 BO5 BA9 15 | | 26 BD5
BA10 16 | | 25 BO4 BA10 16 | | 25 BD4
BA11 17 | | 24 BO3 BA11 17 | | 24 BD3
BA12 18 | | 23 BO2 BA12 18 | | 23 BD2
HSYNC 19 | | 22 BO1 +5V 19 | | 22 BD1
HSYNC 20 |_____________| 21 BO0 +12V 20 |_____________| 21 BD0
_____ _____ _____ _____
1 |* \_/ | 40 B1 STROBE UMIREQ1 1 |* \_/ | 40 BISTROBE
2 | | 39 CPU RQ1 UMIREQ0 2 | | 39 CPUREQ1
CPU RQ0 3 | | 38 GND CPUREQ0 3 | | 38 GND
XTAL IN 4 | | 37 XIN 4 | | 37 /800-BFF
XTAL IN 5 | | 36 RESET XOUT 5 | | 36 RST
6 | | 35 DMAREQ0 6 | | 35 DMAREQ1
CPU phi 7 | | 34 COLOR XTAL CPU CLK 7 | | 34 COLCLK
8 | | 33 BRC WACK 8 | | 33 BRCLK
BD0 9 | | 32 BD7 D0 9 | | 32 D7
BO0 10 | UV202 | 31 BO7 BD0 10 | UV202 | 31 BD7
BD1 11 | | 30 BD6 D1 11 | | 30 D6
BO1 12 | | 29 BO6 BD1 12 | | 29 BD6
BD2 13 | | 28 BD5 D2 13 | | 28 D5
BO2 14 | | 27 BO5 BD2 14 | | 27 BD5
BD3 15 | | 26 BD4 D3 15 | | 26 D4
BO3 16 | | 25 BO4 BD3 16 | | 25 BD4
HBLANK 17 | | 24 HBLANK 17 | | 24 FIELD
18 | | 23 VBLANK 18 | | 23 SCANLINE
19 | | 22 BURST 19 | | 22 +12V
20 |_____________| 21 CSYNCH 20 |_____________| 21 +5V
**********************************************************************/ **********************************************************************/