despite PCB being different operation looks similra to crgolf, so put it in there.

note, need to verify if there is a BPROM present on this PCB, if so it needs dumping.
This commit is contained in:
David Haywood 2016-04-28 14:16:34 +01:00
parent 01b454694d
commit 917c9fc361
6 changed files with 153 additions and 185 deletions

View File

@ -2642,7 +2642,6 @@ files {
createMAMEProjects(_target, _subtarget, "nasco")
files {
MAME_DIR .. "src/mame/drivers/crgolf.cpp",
MAME_DIR .. "src/mame/drivers/mastrglf.cpp",
MAME_DIR .. "src/mame/includes/crgolf.h",
MAME_DIR .. "src/mame/video/crgolf.cpp",
MAME_DIR .. "src/mame/drivers/suprgolf.cpp",

View File

@ -48,6 +48,38 @@
Pin 19 - Pin 22 of F1 (2764 on cpu/sound board), Output
Pin 20 - VCC
-------------------------------------------------------------------
Master's Golf is a different PCB, but appears to operate in a similar way
PCB X-081-PC-A
contains a large box marked
|-----------------------\_/--------------------|
| NASCO-9000 |
| |
| /- NASCO -\ |
| /\ | ORIGINAL | |
| NASCO\/YUVO \- 0001941 -/ |
| |
| PAT.P |
| |---------------------------------------| |
| | MASTER'S GOLF vers JAPAN | |
| | | |
| | CUSTOM BOARD | |
| |---------------------------------------| |
| |
| YUVO CO., LTD |
|-----------------------------------------------
next to rom M-GF_A10.12K
the box must contain at least a Z80
possibly other sound hardware??
****************************************************************************
Memory map (TBA)
@ -75,9 +107,12 @@ WRITE8_MEMBER(crgolf_state::rom_bank_select_w)
void crgolf_state::machine_start()
{
/* configure the banking */
membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x2000);
membank("bank1")->set_entry(0);
if (membank("bank1"))
{
/* configure the banking */
membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x2000);
membank("bank1")->set_entry(0);
}
/* register for save states */
save_item(NAME(m_port_select));
@ -247,6 +282,12 @@ WRITE8_MEMBER(crgolf_state::crgolfhi_sample_w)
}
}
WRITE8_MEMBER(crgolf_state::screen_select_w)
{
// if (data & 0xfe) printf("vram_page_select_w %02x\n", data);
m_vrambank->set_bank(data & 0x1);
}
/*************************************
@ -261,14 +302,18 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, crgolf_state )
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8003, 0x8003) AM_WRITEONLY AM_SHARE("color_select")
AM_RANGE(0x8004, 0x8004) AM_WRITEONLY AM_SHARE("screen_flip")
AM_RANGE(0x8005, 0x8005) AM_WRITEONLY AM_SHARE("screen_select")
AM_RANGE(0x8005, 0x8005) AM_WRITE( screen_select_w )
AM_RANGE(0x8006, 0x8006) AM_WRITEONLY AM_SHARE("screenb_enable")
AM_RANGE(0x8007, 0x8007) AM_WRITEONLY AM_SHARE("screena_enable")
AM_RANGE(0x8800, 0x8800) AM_READWRITE(sound_to_main_r, main_to_sound_w)
AM_RANGE(0x9000, 0x9000) AM_WRITE(rom_bank_select_w)
AM_RANGE(0xa000, 0xffff) AM_READWRITE(crgolf_videoram_r, crgolf_videoram_w)
AM_RANGE(0xa000, 0xffff) AM_DEVICE("vrambank", address_map_bank_device, amap8)
ADDRESS_MAP_END
static ADDRESS_MAP_START( vrambank_map, AS_PROGRAM, 8, crgolf_state )
AM_RANGE(0x0000, 0x5fff) AM_RAM AM_SHARE("vrama")
AM_RANGE(0x8000, 0xdfff) AM_RAM AM_SHARE("vramb")
ADDRESS_MAP_END
/*************************************
@ -289,6 +334,46 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_map, AS_PROGRAM, 8, crgolf_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x6000, 0x8fff) AM_RAM // maybe RAM and ROM here?
AM_RANGE(0x9000, 0x9fff) AM_RAM
AM_RANGE(0xa000, 0xffff) AM_DEVICE("vrambank", address_map_bank_device, amap8)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_io, AS_IO, 8, crgolf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x03, 0x03) AM_WRITEONLY AM_SHARE("color_select")
AM_RANGE(0x04, 0x04) AM_WRITEONLY AM_SHARE("screen_flip")
AM_RANGE(0x05, 0x05) AM_WRITE( screen_select_w )
AM_RANGE(0x06, 0x06) AM_WRITEONLY AM_SHARE("screenb_enable")
AM_RANGE(0x07, 0x07) AM_WRITEONLY AM_SHARE("screena_enable")
// AM_RANGE(0x20, 0x20) AM_WRITE( unk_20_w )
// AM_RANGE(0x40, 0x40) AM_WRITE( unk_40_w )
// AM_RANGE(0xa0, 0xa0) AM_READ( unk_cmd_r ) // read in the NMI seems to be a comms IN port here, maybe this is actually the sub CPU, that would make the content of the box worrying tho.
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_submap, AS_PROGRAM, 8, crgolf_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_subio, AS_IO, 8, crgolf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
ADDRESS_MAP_END
/*************************************
*
* Port definitions
@ -384,6 +469,14 @@ static MACHINE_CONFIG_START( crgolf, crgolf_state )
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(vrambank_map)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(16)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000) /* technically 0x6000, but powers of 2 makes the memory map / address masking cleaner. */
/* video hardware */
MCFG_FRAGMENT_ADD(crgolf_video)
@ -403,6 +496,19 @@ static MACHINE_CONFIG_DERIVED( crgolfhi, crgolf )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( mastrglf, crgolf )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mastrglf_map)
MCFG_CPU_IO_MAP(mastrglf_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", crgolf_state, irq0_line_hold)
MCFG_CPU_MODIFY("audiocpu")
MCFG_CPU_PROGRAM_MAP(mastrglf_submap)
MCFG_CPU_IO_MAP(mastrglf_subio)
MACHINE_CONFIG_END
/*************************************
*
@ -578,6 +684,31 @@ ROM_START( crgolfhi )
ROM_END
ROM_START( mastrglf )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "M-GF_A1.4A.27128", 0x00000, 0x04000, CRC(55b89e8f) SHA1(2860fd3f8e4241dc25bb9a14e8967cdcaf769432) )
ROM_REGION( 0x48000, "maindata", 0 )
ROM_LOAD( "M-GF_A2.5A.27256", 0x00000, 0x08000, CRC(98aa20d8) SHA1(64007c4706f8e2e3b57c4a8467b37d44e8be9a01) )
ROM_LOAD( "M-GF_A3.7A.27256", 0x08000, 0x08000, CRC(3f62b979) SHA1(90cc784230f6ed7fd3dd943e0808f0c3d722806a) )
ROM_LOAD( "M-GF_A4.8A.27256", 0x10000, 0x08000, CRC(08a470d1) SHA1(4dabff8fc915406b1d4f7936d925378eec0df915) )
ROM_LOAD( "M-GF_A5.10A.27256", 0x18000, 0x08000, CRC(4397c8a0) SHA1(deb9de1cf7ce6ddc69addf18ff5bf2f25ed11602) )
ROM_LOAD( "M-GF_A6.12A.27256", 0x20000, 0x08000, CRC(b1fccecf) SHA1(8fb5e40f34596d9faa73255afc2c2635e9008954) )
ROM_LOAD( "M-GF_A7.13A.27256", 0x28000, 0x08000, CRC(06075e41) SHA1(3426f4ede8449288519e25bc8a1d679bb5137279) )
ROM_LOAD( "M-GF_A8.15A.27256", 0x30000, 0x08000, CRC(9ea9183b) SHA1(55f54575cd662b6194f69532baa25c9b2272760f) )
ROM_LOAD( "M-GF_A9.16A.27256", 0x38000, 0x08000, CRC(61ab715f) SHA1(6b9cccaa83a9a9e44a46bae796e2f9eaa9f9c951) )
ROM_LOAD( "M-GF_A10.12K.27256", 0x40000, 0x08000, CRC(d145b144) SHA1(52370d56106f0280c52266b5a727493a3396a8e3) )
ROM_REGION( 0x10000, "audiocpu", 0 ) // next to large module
ROM_LOAD( "M-GF_A10.12K.27256", 0x00000, 0x08000, CRC(d145b144) SHA1(52370d56106f0280c52266b5a727493a3396a8e3) )
ROM_REGION( 0x0020, "proms", 0 ) // temp, for the video code, need to verify if this PCB has a PROM
ROM_LOAD( "pr5877.1s", 0x0000, 0x0020, BAD_DUMP CRC(f880b95d) SHA1(5ad0ee39e2b9befaf3895ec635d5865b7b1e562b) )
ROM_END
/*************************************
*
@ -604,3 +735,5 @@ GAME( 1984, crgolfb, crgolf, crgolf, crgolf, driver_device, 0, ROT0,
GAME( 1984, crgolfc, crgolf, crgolf, crgolf, driver_device, 0, ROT0, "Nasco Japan", "Champion Golf", MACHINE_SUPPORTS_SAVE )
GAME( 1984, crgolfbt, crgolf, crgolf, crgolf, driver_device, 0, ROT0, "bootleg", "Champion Golf (bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1985, crgolfhi, 0, crgolfhi, crgolf, crgolf_state, crgolfhi, ROT0, "Nasco Japan", "Crowns Golf in Hawaii" , MACHINE_SUPPORTS_SAVE )
GAME( 198?, mastrglf, 0, mastrglf, crgolf, driver_device, 0, ROT0, "Nasco", "Master's Golf", MACHINE_NOT_WORKING )

View File

@ -1,134 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/*
PCB X-081-PC-A
contains a large box marked
|-----------------------\_/--------------------|
| NASCO-9000 |
| |
| /- NASCO -\ |
| /\ | ORIGINAL | |
| NASCO\/YUVO \- 0001941 -/ |
| |
| PAT.P |
| |---------------------------------------| |
| | MASTER'S GOLF vers JAPAN | |
| | | |
| | CUSTOM BOARD | |
| |---------------------------------------| |
| |
| YUVO CO., LTD |
|-----------------------------------------------
next to rom M-GF_A10.12K
the box must contain at least a Z80
*/
#include "emu.h"
#include "cpu/z80/z80.h"
class mastrglf_state : public driver_device
{
public:
mastrglf_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu")
{ }
virtual void machine_start() override;
virtual void machine_reset() override;
required_device<cpu_device> m_maincpu;
};
// before clearing 0xa000 - 0xffff the first time
// [:subcpu] ':subcpu' (006D): unmapped io memory write to 0000 = 00 & FF
// [:maincpu] ':maincpu' (1B71): unmapped program memory write to 63E1 = 00 & FF
// [:maincpu] ':maincpu' (1B73): unmapped io memory write to 0005 = 00 & FF
// [:maincpu] ':maincpu' (1ACA): unmapped io memory write to 0007 = 00 & FF
// 2nd time
// [:maincpu] ':maincpu' (1AD2): unmapped io memory write to 0007 = 01 & FF
// [:maincpu] ':maincpu' (1B71): unmapped program memory write to 63E1 = 01 & FF
// [:maincpu] ':maincpu' (1B73): unmapped io memory write to 0005 = 01 & FF
// [:maincpu] ':maincpu' (1ADC): unmapped io memory write to 0006 = 00 & FF
static ADDRESS_MAP_START( mastrglf_map, AS_PROGRAM, 8, mastrglf_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x9000, 0x9fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_io, AS_IO, 8, mastrglf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x05, 0x05) AM_WRITENOP // ram bank for 0xa000 ?
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_submap, AS_PROGRAM, 8, mastrglf_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_subio, AS_IO, 8, mastrglf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
ADDRESS_MAP_END
static INPUT_PORTS_START( mastrglf )
INPUT_PORTS_END
void mastrglf_state::machine_start()
{
}
void mastrglf_state::machine_reset()
{
}
// single XTAL_18_432MHz
static MACHINE_CONFIG_START( mastrglf, mastrglf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", Z80,XTAL_18_432MHz/4)
MCFG_CPU_PROGRAM_MAP(mastrglf_map)
MCFG_CPU_IO_MAP(mastrglf_io)
MCFG_CPU_ADD("subcpu", Z80,XTAL_18_432MHz/4)
MCFG_CPU_PROGRAM_MAP(mastrglf_submap)
MCFG_CPU_IO_MAP(mastrglf_subio)
MACHINE_CONFIG_END
ROM_START( mastrglf )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "M-GF_A1.4A.27128", 0x00000, 0x04000, CRC(55b89e8f) SHA1(2860fd3f8e4241dc25bb9a14e8967cdcaf769432) )
ROM_REGION( 0x48000, "maindata", 0 )
ROM_LOAD( "M-GF_A2.5A.27256", 0x00000, 0x08000, CRC(98aa20d8) SHA1(64007c4706f8e2e3b57c4a8467b37d44e8be9a01) )
ROM_LOAD( "M-GF_A3.7A.27256", 0x08000, 0x08000, CRC(3f62b979) SHA1(90cc784230f6ed7fd3dd943e0808f0c3d722806a) )
ROM_LOAD( "M-GF_A4.8A.27256", 0x10000, 0x08000, CRC(08a470d1) SHA1(4dabff8fc915406b1d4f7936d925378eec0df915) )
ROM_LOAD( "M-GF_A5.10A.27256", 0x18000, 0x08000, CRC(4397c8a0) SHA1(deb9de1cf7ce6ddc69addf18ff5bf2f25ed11602) )
ROM_LOAD( "M-GF_A6.12A.27256", 0x20000, 0x08000, CRC(b1fccecf) SHA1(8fb5e40f34596d9faa73255afc2c2635e9008954) )
ROM_LOAD( "M-GF_A7.13A.27256", 0x28000, 0x08000, CRC(06075e41) SHA1(3426f4ede8449288519e25bc8a1d679bb5137279) )
ROM_LOAD( "M-GF_A8.15A.27256", 0x30000, 0x08000, CRC(9ea9183b) SHA1(55f54575cd662b6194f69532baa25c9b2272760f) )
ROM_LOAD( "M-GF_A9.16A.27256", 0x38000, 0x08000, CRC(61ab715f) SHA1(6b9cccaa83a9a9e44a46bae796e2f9eaa9f9c951) )
ROM_LOAD( "M-GF_A10.12K.27256", 0x40000, 0x08000, CRC(d145b144) SHA1(52370d56106f0280c52266b5a727493a3396a8e3) )
ROM_REGION( 0x10000, "subcpu", 0 ) // next to large module
ROM_LOAD( "M-GF_A10.12K.27256", 0x00000, 0x08000, CRC(d145b144) SHA1(52370d56106f0280c52266b5a727493a3396a8e3) )
ROM_END
GAME( 198?, mastrglf, 0, mastrglf, mastrglf, driver_device, 0, ROT0, "Nasco", "Master's Golf", MACHINE_IS_SKELETON )

View File

@ -6,7 +6,8 @@
**************************************************************************/
#include "sound/msm5205.h"
#define MASTER_CLOCK 18432000
#include "machine/bankdev.h"
#define MASTER_CLOCK XTAL_18_432MHz
class crgolf_state : public driver_device
@ -14,21 +15,27 @@ class crgolf_state : public driver_device
public:
crgolf_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_videoram_a(*this, "vrama"),
m_videoram_b(*this, "vramb"),
m_color_select(*this, "color_select"),
m_screen_flip(*this, "screen_flip"),
m_screen_select(*this, "screen_select"),
m_screenb_enable(*this, "screenb_enable"),
m_screena_enable(*this, "screena_enable"),
m_vrambank(*this, "vrambank"),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_msm(*this, "msm"){ }
/* memory pointers */
std::unique_ptr<UINT8[]> m_videoram_a;
std::unique_ptr<UINT8[]> m_videoram_b;
required_shared_ptr<UINT8> m_videoram_a;
required_shared_ptr<UINT8> m_videoram_b;
required_shared_ptr<UINT8> m_color_select;
required_shared_ptr<UINT8> m_screen_flip;
required_shared_ptr<UINT8> m_screen_select;
required_shared_ptr<UINT8> m_screenb_enable;
required_shared_ptr<UINT8> m_screena_enable;
@ -40,6 +47,7 @@ public:
UINT8 m_sample_count;
/* devices */
required_device<address_map_bank_device> m_vrambank;
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
optional_device<msm5205_device> m_msm;
@ -52,8 +60,7 @@ public:
DECLARE_READ8_MEMBER(main_to_sound_r);
DECLARE_WRITE8_MEMBER(sound_to_main_w);
DECLARE_READ8_MEMBER(sound_to_main_r);
DECLARE_WRITE8_MEMBER(crgolf_videoram_w);
DECLARE_READ8_MEMBER(crgolf_videoram_r);
DECLARE_WRITE8_MEMBER(screen_select_w);
DECLARE_WRITE8_MEMBER(crgolfhi_sample_w);
DECLARE_DRIVER_INIT(crgolfhi);
virtual void machine_start() override;

View File

@ -10238,6 +10238,7 @@ crgolfb // (c) 1984 Nasco Japan
crgolfbt // bootleg
crgolfc // (c) 1984 Nasco Japan
crgolfhi // (c) 1984 Nasco Japan
mastrglf
@source:crimfght.cpp
crimfght // GX821 (c) 1989 (World)
@ -17382,9 +17383,6 @@ mastboy // (c) 1987 - No Ref on the PCB
mastboyi // (c) 1987 - No Ref on the PCB
mastboyia // (c) 1987 - No Ref on the PCB
@source:mastrglf.cpp
mastrglf
@source:matmania.cpp
excthour // TA-0015 (c) 1985 + Taito license
maniach // TA-0017 (c) 1986 + Taito America license

View File

@ -14,34 +14,6 @@
#define VIDEORAM_SIZE (0x2000 * 3)
/*************************************
*
* Video RAM access
*
*************************************/
WRITE8_MEMBER(crgolf_state::crgolf_videoram_w)
{
if (*m_screen_select & 1)
m_videoram_b[offset] = data;
else
m_videoram_a[offset] = data;
}
READ8_MEMBER(crgolf_state::crgolf_videoram_r)
{
UINT8 ret;
if (*m_screen_select & 1)
ret = m_videoram_b[offset];
else
ret = m_videoram_a[offset];
return ret;
}
/*************************************
*
@ -91,13 +63,6 @@ void crgolf_state::get_pens( pen_t *pens )
VIDEO_START_MEMBER(crgolf_state,crgolf)
{
/* allocate memory for the two bitmaps */
m_videoram_a = std::make_unique<UINT8[]>(VIDEORAM_SIZE);
m_videoram_b = std::make_unique<UINT8[]>(VIDEORAM_SIZE);
/* register for save states */
save_pointer(NAME(m_videoram_a.get()), VIDEORAM_SIZE);
save_pointer(NAME(m_videoram_b.get()), VIDEORAM_SIZE);
}