z80ctc, z80dart, z80sio: Simplify read/write handlers (nw)

src/devices/bus/cpc/cpc_rs232.cpp

@@ -137,12 +137,12 @@ WRITE_LINE_MEMBER(cpc_rs232_device::pit_out2_w)
 
 READ8_MEMBER(cpc_rs232_device::dart_r)
 {
-	return m_dart->ba_cd_r(space,offset);
+	return m_dart->ba_cd_r(offset);
 }
 
 WRITE8_MEMBER(cpc_rs232_device::dart_w)
 {
-	m_dart->ba_cd_w(space,offset,data);
+	m_dart->ba_cd_w(offset,data);
 }
 
 READ8_MEMBER(cpc_rs232_device::pit_r)

src/devices/bus/cpc/playcity.cpp

@@ -87,12 +87,12 @@ void cpc_playcity_device::device_reset()
 
 READ8_MEMBER(cpc_playcity_device::ctc_r)
 {
-	return m_ctc->read(space,offset);
+	return m_ctc->read(offset);
 }
 
 WRITE8_MEMBER(cpc_playcity_device::ctc_w)
 {
-	m_ctc->write(space,offset,data);
+	m_ctc->write(offset,data);
 	if(offset == 0)
 		update_ymz_clock();
 }

src/devices/bus/vme/vme.cpp

@@ -359,6 +359,36 @@ void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read8
 	}
 }
 
+void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler, uint32_t mask)
+{
+	LOG("%s %s AM%d D%02x\n", tag(), FUNCNAME, amod, m_prgwidth);
+
+	LOG(" - width:%d\n", m_prgwidth);
+
+	// TODO: support address modifiers and buscycles other than single access cycles
+	switch(amod)
+	{
+	case A16_SC: break;
+	case A24_SC: break;
+	case A32_SC: break;
+	default: fatalerror("VME D8: Non supported Address modifier: AM%02x\n", amod);
+	}
+
+	switch(m_prgwidth)
+	{
+	case 16:
+		m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0x0000ffff));
+		break;
+	case 24:
+		m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, (uint32_t)(mask & 0x00ffffff));
+		break;
+	case 32:
+		m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, mask);
+		break;
+	default: fatalerror("VME D8: Bus width %d not supported\n", m_prgwidth);
+	}
+}
+
 // D16 bit devices in A16, A24 and A32
 void vme_device::install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask)
 {

src/devices/bus/vme/vme.h

@@ -183,6 +183,7 @@ public:
 	};
 	void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask);
 	void install_device(vme_amod_t amod, offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler, uint32_t mask);
+	void install_device(vme_amod_t amod, offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler, uint32_t mask);
 	//  void install_device(vme_amod_t amod, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
 	void install_device(vme_amod_t amod, offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask);
 	void install_device(vme_amod_t amod, offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask);

src/devices/bus/vme/vme_mzr8300.cpp

@@ -175,17 +175,17 @@ void vme_mzr8300_card_device::device_start()
 	//  m_vme->static_set_custom_spaces(*this);
 
 	m_vme->install_device(vme_device::A16_SC, base + 0, base + 1, // Channel B - Data
-						  read8_delegate(FUNC(z80sio_device::db_r),  subdevice<z80sio_device>("sio0")),
+						  read8smo_delegate(FUNC(z80sio_device::db_r),  subdevice<z80sio_device>("sio0")),
-						  write8_delegate(FUNC(z80sio_device::db_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+						  write8smo_delegate(FUNC(z80sio_device::db_w), subdevice<z80sio_device>("sio0")), 0x00ff);
 	m_vme->install_device(vme_device::A16_SC, base + 2, base + 3, // Channel B - Control
-						  read8_delegate(FUNC(z80sio_device::cb_r),  subdevice<z80sio_device>("sio0")),
+						  read8smo_delegate(FUNC(z80sio_device::cb_r),  subdevice<z80sio_device>("sio0")),
-						  write8_delegate(FUNC(z80sio_device::cb_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+						  write8smo_delegate(FUNC(z80sio_device::cb_w), subdevice<z80sio_device>("sio0")), 0x00ff);
 	m_vme->install_device(vme_device::A16_SC, base + 4, base + 5, // Channel A - Data
-						  read8_delegate(FUNC(z80sio_device::da_r),  subdevice<z80sio_device>("sio0")),
+						  read8smo_delegate(FUNC(z80sio_device::da_r),  subdevice<z80sio_device>("sio0")),
-						  write8_delegate(FUNC(z80sio_device::da_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+						  write8smo_delegate(FUNC(z80sio_device::da_w), subdevice<z80sio_device>("sio0")), 0x00ff);
 	m_vme->install_device(vme_device::A16_SC, base + 6, base + 7, // Channel A - Control
-						  read8_delegate(FUNC(z80sio_device::ca_r),  subdevice<z80sio_device>("sio0")),
+						  read8smo_delegate(FUNC(z80sio_device::ca_r),  subdevice<z80sio_device>("sio0")),
-						  write8_delegate(FUNC(z80sio_device::ca_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+						  write8smo_delegate(FUNC(z80sio_device::ca_w), subdevice<z80sio_device>("sio0")), 0x00ff);
 	m_vme->install_device(vme_device::A16_SC, base + 0x10, base + 0x13, // Am9513
 						  read8sm_delegate(FUNC(am9513_device::read8),   subdevice<am9513_device>("stc")),
 						  write8sm_delegate(FUNC(am9513_device::write8), subdevice<am9513_device>("stc")), 0x00ff);

src/devices/bus/wangpc/mcc.cpp

@@ -143,7 +143,7 @@ uint16_t wangpc_mcc_device::wangpcbus_iorc_r(offs_t offset, uint16_t mem_mask)
 		case 0x06/2:
 			if (ACCESSING_BITS_0_7)
 			{
-				data = 0xff00 | m_sio->cd_ba_r(machine().dummy_space(), offset >> 1);
+				data = 0xff00 | m_sio->cd_ba_r(offset >> 1);
 			}
 			break;
 
@@ -153,7 +153,7 @@ uint16_t wangpc_mcc_device::wangpcbus_iorc_r(offs_t offset, uint16_t mem_mask)
 		case 0x0e/2:
 			if (ACCESSING_BITS_0_7)
 			{
-				data = 0xff00 | m_dart->cd_ba_r(machine().dummy_space(), offset >> 1);
+				data = 0xff00 | m_dart->cd_ba_r(offset >> 1);
 			}
 			break;
 
@@ -208,14 +208,14 @@ void wangpc_mcc_device::wangpcbus_aiowc_w(offs_t offset, uint16_t mem_mask, uint
 		case 0x02/2:
 		case 0x04/2:
 		case 0x06/2:
-			m_sio->cd_ba_w(machine().dummy_space(), offset >> 1, data & 0xff);
+			m_sio->cd_ba_w(offset >> 1, data & 0xff);
 			break;
 
 		case 0x08/2:
 		case 0x0a/2:
 		case 0x0c/2:
 		case 0x0e/2:
-			m_dart->cd_ba_w(machine().dummy_space(), offset >> 1, data & 0xff);
+			m_dart->cd_ba_w(offset >> 1, data & 0xff);
 			break;
 
 		case 0x12/2:

src/devices/bus/wangpc/wdc.cpp

@@ -325,11 +325,11 @@ WRITE8_MEMBER( wangpc_wdc_device::status_w )
 }
 
 
-READ8_MEMBER( wangpc_wdc_device::ctc_ch0_r ) { return m_ctc->read(machine().dummy_space(), 0); }
+READ8_MEMBER( wangpc_wdc_device::ctc_ch0_r ) { return m_ctc->read(0); }
-WRITE8_MEMBER( wangpc_wdc_device::ctc_ch0_w ) { m_ctc->write(machine().dummy_space(), 0, data); }
+WRITE8_MEMBER( wangpc_wdc_device::ctc_ch0_w ) { m_ctc->write(0, data); }
-READ8_MEMBER( wangpc_wdc_device::ctc_ch1_r ) { return m_ctc->read(machine().dummy_space(), 1); }
+READ8_MEMBER( wangpc_wdc_device::ctc_ch1_r ) { return m_ctc->read(1); }
-WRITE8_MEMBER( wangpc_wdc_device::ctc_ch1_w ) { m_ctc->write(machine().dummy_space(), 1, data); }
+WRITE8_MEMBER( wangpc_wdc_device::ctc_ch1_w ) { m_ctc->write(1, data); }
-READ8_MEMBER( wangpc_wdc_device::ctc_ch2_r ) { return m_ctc->read(machine().dummy_space(), 2); }
+READ8_MEMBER( wangpc_wdc_device::ctc_ch2_r ) { return m_ctc->read(2); }
-WRITE8_MEMBER( wangpc_wdc_device::ctc_ch2_w ) { m_ctc->write(machine().dummy_space(), 2, data); }
+WRITE8_MEMBER( wangpc_wdc_device::ctc_ch2_w ) { m_ctc->write(2, data); }
-READ8_MEMBER( wangpc_wdc_device::ctc_ch3_r ) { return m_ctc->read(machine().dummy_space(), 3); }
+READ8_MEMBER( wangpc_wdc_device::ctc_ch3_r ) { return m_ctc->read(3); }
-WRITE8_MEMBER( wangpc_wdc_device::ctc_ch3_w ) { m_ctc->write(machine().dummy_space(), 3, data); }
+WRITE8_MEMBER( wangpc_wdc_device::ctc_ch3_w ) { m_ctc->write(3, data); }

src/devices/machine/z80ctc.cpp

@@ -91,7 +91,7 @@ z80ctc_device::z80ctc_device(const machine_config &mconfig, const char *tag, dev
 //  read - standard handler for reading
 //-------------------------------------------------
 
-READ8_MEMBER( z80ctc_device::read )
+uint8_t z80ctc_device::read(offs_t offset)
 {
 	return m_channel[offset & 3]->read();
 }
@@ -101,7 +101,7 @@ READ8_MEMBER( z80ctc_device::read )
 //  write - standard handler for writing
 //-------------------------------------------------
 
-WRITE8_MEMBER( z80ctc_device::write )
+void z80ctc_device::write(offs_t offset, uint8_t data)
 {
 	m_channel[offset & 3]->write(data);
 }

src/devices/machine/z80ctc.h

@@ -88,8 +88,8 @@ public:
 	template <int Channel> void set_clk(const XTAL &xtal) { channel_config(Channel).set_clock(xtal); }
 
 	// read/write handlers
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER( trg0 );
 	DECLARE_WRITE_LINE_MEMBER( trg1 );
 	DECLARE_WRITE_LINE_MEMBER( trg2 );

src/devices/machine/z80dart.cpp

@@ -392,7 +392,7 @@ int z80dart_device::m1_r()
 //  cd_ba_r -
 //-------------------------------------------------
 
-READ8_MEMBER( z80dart_device::cd_ba_r )
+uint8_t z80dart_device::cd_ba_r(offs_t offset)
 {
 	int ba = BIT(offset, 0);
 	int cd = BIT(offset, 1);
@@ -406,7 +406,7 @@ READ8_MEMBER( z80dart_device::cd_ba_r )
 //  cd_ba_w -
 //-------------------------------------------------
 
-WRITE8_MEMBER( z80dart_device::cd_ba_w )
+void z80dart_device::cd_ba_w(offs_t offset, uint8_t data)
 {
 	int ba = BIT(offset, 0);
 	int cd = BIT(offset, 1);
@@ -423,7 +423,7 @@ WRITE8_MEMBER( z80dart_device::cd_ba_w )
 //  ba_cd_r -
 //-------------------------------------------------
 
-READ8_MEMBER( z80dart_device::ba_cd_r )
+uint8_t z80dart_device::ba_cd_r(offs_t offset)
 {
 	int ba = BIT(offset, 1);
 	int cd = BIT(offset, 0);
@@ -437,7 +437,7 @@ READ8_MEMBER( z80dart_device::ba_cd_r )
 //  ba_cd_w -
 //-------------------------------------------------
 
-WRITE8_MEMBER( z80dart_device::ba_cd_w )
+void z80dart_device::ba_cd_w(offs_t offset, uint8_t data)
 {
 	int ba = BIT(offset, 1);
 	int cd = BIT(offset, 0);

src/devices/machine/z80dart.h

@@ -418,20 +418,20 @@ public:
 		m_txcb = txb;
 	}
 
-	DECLARE_READ8_MEMBER( cd_ba_r );
+	uint8_t cd_ba_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cd_ba_w );
+	void cd_ba_w(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( ba_cd_r );
+	uint8_t ba_cd_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER( ba_cd_w );
+	void ba_cd_w(offs_t offset, uint8_t data);
 
-	DECLARE_READ8_MEMBER( da_r ) { return m_chanA->data_read(); }
+	uint8_t da_r() { return m_chanA->data_read(); }
-	DECLARE_WRITE8_MEMBER( da_w ) { m_chanA->data_write(data); }
+	void da_w(uint8_t data) { m_chanA->data_write(data); }
-	DECLARE_READ8_MEMBER( db_r ) { return m_chanB->data_read(); }
+	uint8_t db_r() { return m_chanB->data_read(); }
-	DECLARE_WRITE8_MEMBER( db_w ) { m_chanB->data_write(data); }
+	void db_w(uint8_t data) { m_chanB->data_write(data); }
 
-	DECLARE_READ8_MEMBER( ca_r ) { return m_chanA->control_read(); }
+	uint8_t ca_r() { return m_chanA->control_read(); }
-	DECLARE_WRITE8_MEMBER( ca_w ) { m_chanA->control_write(data); }
+	void ca_w(uint8_t data) { m_chanA->control_write(data); }
-	DECLARE_READ8_MEMBER( cb_r ) { return m_chanB->control_read(); }
+	uint8_t cb_r() { return m_chanB->control_read(); }
-	DECLARE_WRITE8_MEMBER( cb_w ) { m_chanB->control_write(data); }
+	void cb_w(uint8_t data) { m_chanB->control_write(data); }
 
 	// interrupt acknowledge
 	int m1_r();
@@ -580,7 +580,7 @@ public:
 	// construction/destruction
 	i8274_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
-	DECLARE_READ8_MEMBER( inta_r ) { return m1_r(); };
+	uint8_t inta_r() { return m1_r(); };
 };
 
 

src/devices/machine/z80sio.cpp

@@ -845,7 +845,7 @@ int i8274_new_device::m1_r()
 //-------------------------------------------------
 //  cd_ba_r -
 //-------------------------------------------------
-READ8_MEMBER( z80sio_device::cd_ba_r )
+uint8_t z80sio_device::cd_ba_r(offs_t offset)
 {
 	int ba = BIT(offset, 0);
 	int cd = BIT(offset, 1);
@@ -858,7 +858,7 @@ READ8_MEMBER( z80sio_device::cd_ba_r )
 //-------------------------------------------------
 //  cd_ba_w -
 //-------------------------------------------------
-WRITE8_MEMBER( z80sio_device::cd_ba_w )
+void z80sio_device::cd_ba_w(offs_t offset, uint8_t data)
 {
 	int ba = BIT(offset, 0);
 	int cd = BIT(offset, 1);
@@ -874,7 +874,7 @@ WRITE8_MEMBER( z80sio_device::cd_ba_w )
 //-------------------------------------------------
 //  ba_cd_r -
 //-------------------------------------------------
-READ8_MEMBER( z80sio_device::ba_cd_r )
+uint8_t z80sio_device::ba_cd_r(offs_t offset)
 {
 	int ba = BIT(offset, 1);
 	int cd = BIT(offset, 0);
@@ -887,7 +887,7 @@ READ8_MEMBER( z80sio_device::ba_cd_r )
 //-------------------------------------------------
 //  ba_cd_w -
 //-------------------------------------------------
-WRITE8_MEMBER( z80sio_device::ba_cd_w )
+void z80sio_device::ba_cd_w(offs_t offset, uint8_t data)
 {
 	int ba = BIT(offset, 1);
 	int cd = BIT(offset, 0);

src/devices/machine/z80sio.h

@@ -305,20 +305,20 @@ public:
 
 	template <typename T> void set_cputag(T &&tag) { m_hostcpu.set_tag(std::forward<T>(tag)); }
 
-	DECLARE_READ8_MEMBER( cd_ba_r );
+	uint8_t cd_ba_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cd_ba_w );
+	void cd_ba_w(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( ba_cd_r );
+	uint8_t ba_cd_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER( ba_cd_w );
+	void ba_cd_w(offs_t offset, uint8_t data);
 
-	DECLARE_READ8_MEMBER( da_r ) { return m_chanA->data_read(); }
+	uint8_t da_r() { return m_chanA->data_read(); }
-	DECLARE_WRITE8_MEMBER( da_w ) { m_chanA->data_write(data); }
+	void da_w(uint8_t data) { m_chanA->data_write(data); }
-	DECLARE_READ8_MEMBER( db_r ) { return m_chanB->data_read(); }
+	uint8_t db_r() { return m_chanB->data_read(); }
-	DECLARE_WRITE8_MEMBER( db_w ) { m_chanB->data_write(data); }
+	void db_w(uint8_t data) { m_chanB->data_write(data); }
 
-	DECLARE_READ8_MEMBER( ca_r ) { return m_chanA->control_read(); }
+	uint8_t ca_r() { return m_chanA->control_read(); }
-	DECLARE_WRITE8_MEMBER( ca_w ) { m_chanA->control_write(data); }
+	void ca_w(uint8_t data) { m_chanA->control_write(data); }
-	DECLARE_READ8_MEMBER( cb_r ) { return m_chanB->control_read(); }
+	uint8_t cb_r() { return m_chanB->control_read(); }
-	DECLARE_WRITE8_MEMBER( cb_w ) { m_chanB->control_write(data); }
+	void cb_w(uint8_t data) { m_chanB->control_write(data); }
 
 	// interrupt acknowledge
 	virtual int m1_r();

src/mame/drivers/abc1600.cpp

@@ -605,12 +605,12 @@ void abc1600_state::update_drdy2()
 
 READ8_MEMBER( abc1600_state::dart_r )
 {
-	return m_dart->ba_cd_r(space, A2_A1 ^ 0x03);
+	return m_dart->ba_cd_r(A2_A1 ^ 0x03);
 }
 
 WRITE8_MEMBER( abc1600_state::dart_w )
 {
-	m_dart->ba_cd_w(space, A2_A1 ^ 0x03, data);
+	m_dart->ba_cd_w(A2_A1 ^ 0x03, data);
 }
 
 //-------------------------------------------------

src/mame/drivers/ampro.cpp

@@ -88,17 +88,17 @@ WRITE8_MEMBER( ampro_state::port00_w )
 READ8_MEMBER( ampro_state::io_r )
 {
 	if (offset < 0x40)
-		return m_ctc->read(space, offset>>4);
+		return m_ctc->read(offset>>4);
 	else
-		return m_dart->ba_cd_r(space, offset>>2);
+		return m_dart->ba_cd_r(offset>>2);
 }
 
 WRITE8_MEMBER( ampro_state::io_w )
 {
 	if (offset < 0x40)
-		m_ctc->write(space, offset>>4, data);
+		m_ctc->write(offset>>4, data);
 	else
-		m_dart->ba_cd_w(space, offset>>2, data);
+		m_dart->ba_cd_w(offset>>2, data);
 }
 
 void ampro_state::ampro_mem(address_map &map)

src/mame/drivers/apricot.cpp

@@ -212,7 +212,7 @@ READ8_MEMBER( apricot_state::sio_da_r )
 	if (m_bus_locked)
 		return m_sio->m1_r();
 
-	return m_sio->da_r(space, offset);
+	return m_sio->da_r();
 }
 
 READ8_MEMBER( apricot_state::sio_ca_r )
@@ -220,7 +220,7 @@ READ8_MEMBER( apricot_state::sio_ca_r )
 	if (m_bus_locked)
 		return m_sio->m1_r();
 
-	return m_sio->ca_r(space, offset);
+	return m_sio->ca_r();
 }
 
 READ8_MEMBER( apricot_state::sio_cb_r )
@@ -228,7 +228,7 @@ READ8_MEMBER( apricot_state::sio_cb_r )
 	if (m_bus_locked)
 		return m_sio->m1_r();
 
-	return m_sio->cb_r(space, offset);
+	return m_sio->cb_r();
 }
 
 READ8_MEMBER( apricot_state::sio_db_r )
@@ -236,7 +236,7 @@ READ8_MEMBER( apricot_state::sio_db_r )
 	if (m_bus_locked)
 		return m_sio->m1_r();
 
-	return m_sio->db_r(space, offset);
+	return m_sio->db_r();
 }
 
 

src/mame/drivers/compis.cpp

@@ -199,7 +199,7 @@ READ16_MEMBER( compis_state::pcs6_2_3_r )
 {
 	if (ACCESSING_BITS_0_7)
 	{
-		return m_mpsc->inta_r(space, 0);
+		return m_mpsc->inta_r();
 	}
 	else
 	{
@@ -222,7 +222,7 @@ READ16_MEMBER( compis_state::pcs6_4_5_r )
 {
 	if (ACCESSING_BITS_0_7)
 	{
-		return m_mpsc->cd_ba_r(space, offset & 0x03);
+		return m_mpsc->cd_ba_r(offset & 0x03);
 	}
 	else
 	{
@@ -237,7 +237,7 @@ WRITE16_MEMBER( compis_state::pcs6_4_5_w )
 {
 	if (ACCESSING_BITS_0_7)
 	{
-		m_mpsc->cd_ba_w(space, offset & 0x03, data);
+		m_mpsc->cd_ba_w(offset & 0x03, data);
 	}
 	else
 	{

src/mame/drivers/fs3216.cpp

@@ -58,8 +58,8 @@ private:
 	u16 irq_r();
 	IRQ_CALLBACK_MEMBER(intack);
 
-	DECLARE_READ8_MEMBER(ctc_r);
+	u8 ctc_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(ctc_w);
+	void ctc_w(offs_t offset, u8 data);
 	u16 earom_recall_r();
 	u16 earom_store_r();
 
@@ -226,14 +226,14 @@ IRQ_CALLBACK_MEMBER(fs3216_state::intack)
 	return m_vecprom[irqline];
 }
 
-READ8_MEMBER(fs3216_state::ctc_r)
+u8 fs3216_state::ctc_r(offs_t offset)
 {
-	return m_ctc->read(space, offset >> 1);
+	return m_ctc->read(offset >> 1);
 }
 
-WRITE8_MEMBER(fs3216_state::ctc_w)
+void fs3216_state::ctc_w(offs_t offset, u8 data)
 {
-	m_ctc->write(space, offset >> 1, data);
+	m_ctc->write(offset >> 1, data);
 }
 
 u16 fs3216_state::earom_recall_r()

src/mame/drivers/mmm.cpp

@@ -26,9 +26,12 @@ public:
 	void mmm(machine_config &config);
 
 private:
-	DECLARE_WRITE8_MEMBER(strobe_w);
+	void strobe_w(u8 data);
-	DECLARE_READ8_MEMBER(inputs_r);
+	u8 inputs_r();
-	DECLARE_WRITE8_MEMBER(ay_porta_w);
+	void ay_porta_w(u8 data);
+
+	u8 ctc_r(offs_t offset);
+	void ctc_w(offs_t offset, u8 data);
 
 	void io_map(address_map &map);
 	void mem_map(address_map &map);
@@ -40,12 +43,12 @@ private:
 };
 
 
-WRITE8_MEMBER(mmm_state::strobe_w)
+void mmm_state::strobe_w(u8 data)
 {
 	m_strobe = data;
 }
 
-READ8_MEMBER(mmm_state::inputs_r)
+u8 mmm_state::inputs_r()
 {
 	u8 result = 0xff;
 	for (int i = 0; i < 8; i++)
@@ -54,11 +57,21 @@ READ8_MEMBER(mmm_state::inputs_r)
 	return result;
 }
 
-WRITE8_MEMBER(mmm_state::ay_porta_w)
+void mmm_state::ay_porta_w(u8 data)
 {
 	logerror("Writing %02X to AY-3-8910 port A\n", data);
 }
 
+u8 mmm_state::ctc_r(offs_t offset)
+{
+	return m_ctc->read(offset >> 4);
+}
+
+void mmm_state::ctc_w(offs_t offset, u8 data)
+{
+	m_ctc->write(offset >> 4, data);
+}
+
 void mmm_state::mem_map(address_map &map)
 {
 	map(0x0000, 0x3fff).rom();
@@ -72,13 +85,7 @@ void mmm_state::io_map(address_map &map)
 	map(0x03, 0x03).w("aysnd", FUNC(ay8910_device::address_w));
 	map(0x04, 0x04).w("aysnd", FUNC(ay8910_device::data_w));
 	map(0x05, 0x05).r("aysnd", FUNC(ay8910_device::data_r));
-	map(0x06, 0x06).select(0x30).lrw8("ctc_rw",
+	map(0x06, 0x06).select(0x30).rw(FUNC(mmm_state::ctc_r), FUNC(mmm_state::ctc_w));
-									  [this](address_space &space, offs_t offset, u8 mem_mask) {
-										  return m_ctc->read(space, offset >> 4, mem_mask);
-									  },
-									  [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) {
-										  m_ctc->write(space, offset >> 4, data, mem_mask);
-									  });
 	map(0x07, 0x07).r(FUNC(mmm_state::inputs_r));
 }
 

src/mame/drivers/onyx.cpp

@@ -98,14 +98,14 @@ void onyx_state::z8002_m1_w(uint8_t data)
 
 void onyx_state::c8002_io(address_map &map)
 {
-	map(0xff00, 0xff07).lrw8("sio1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio[0]->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio[0]->cd_ba_w(space, offset >> 1, data, mem_mask); });
+	map(0xff00, 0xff07).lrw8("sio1_rw", [this](offs_t offset) { return m_sio[0]->cd_ba_r(offset >> 1); }, [this](offs_t offset, u8 data) { m_sio[0]->cd_ba_w(offset >> 1, data); });
-	map(0xff08, 0xff0f).lrw8("sio2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio[1]->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio[1]->cd_ba_w(space, offset >> 1, data, mem_mask); });
+	map(0xff08, 0xff0f).lrw8("sio2_rw", [this](offs_t offset) { return m_sio[1]->cd_ba_r(offset >> 1); }, [this](offs_t offset, u8 data) { m_sio[1]->cd_ba_w(offset >> 1, data); });
-	map(0xff10, 0xff17).lrw8("sio3_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio[2]->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio[2]->cd_ba_w(space, offset >> 1, data, mem_mask); });
+	map(0xff10, 0xff17).lrw8("sio3_rw", [this](offs_t offset) { return m_sio[2]->cd_ba_r(offset >> 1); }, [this](offs_t offset, u8 data) { m_sio[2]->cd_ba_w(offset >> 1, data); });
-	map(0xff18, 0xff1f).lrw8("sio4_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio[3]->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio[3]->cd_ba_w(space, offset >> 1, data, mem_mask); });
+	map(0xff18, 0xff1f).lrw8("sio4_rw", [this](offs_t offset) { return m_sio[3]->cd_ba_r(offset >> 1); }, [this](offs_t offset, u8 data) { m_sio[3]->cd_ba_w(offset >> 1, data); });
-	map(0xff20, 0xff27).lrw8("sio5_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio[4]->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio[4]->cd_ba_w(space, offset >> 1, data, mem_mask); });
+	map(0xff20, 0xff27).lrw8("sio5_rw", [this](offs_t offset) { return m_sio[4]->cd_ba_r(offset >> 1); }, [this](offs_t offset, u8 data) { m_sio[4]->cd_ba_w(offset >> 1, data); });
-	map(0xff30, 0xff37).lrw8("ctc1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc[0]->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc[0]->write(space, offset >> 1, data, mem_mask); });
+	map(0xff30, 0xff37).lrw8("ctc1_rw", [this](offs_t offset, u8 mem_mask) { return m_ctc[0]->read(offset >> 1); }, [this](offs_t offset, u8 data) { m_ctc[0]->write(offset >> 1, data); });
-	map(0xff38, 0xff3f).lrw8("ctc2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc[1]->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc[1]->write(space, offset >> 1, data, mem_mask); });
+	map(0xff38, 0xff3f).lrw8("ctc2_rw", [this](offs_t offset) { return m_ctc[1]->read(offset >> 1); }, [this](offs_t offset, u8 data) { m_ctc[1]->write(offset >> 1, data); });
-	map(0xff40, 0xff47).lrw8("ctc3_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc[2]->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc[2]->write(space, offset >> 1, data, mem_mask); });
+	map(0xff40, 0xff47).lrw8("ctc3_rw", [this](offs_t offset) { return m_ctc[2]->read(offset >> 1); }, [this](offs_t offset, u8 data) { m_ctc[2]->write(offset >> 1, data); });
 	map(0xff50, 0xff57).lrw8("pio1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_pio[0]->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_pio[0]->write(space, offset >> 1, data, mem_mask); });
 	map(0xff58, 0xff5f).lrw8("pio2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_pio[1]->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_pio[1]->write(space, offset >> 1, data, mem_mask); });
 	map(0xffb9, 0xffb9).w(FUNC(onyx_state::z8002_m1_w));

src/mame/drivers/pasopia7.cpp

@@ -630,7 +630,7 @@ READ8_MEMBER( pasopia7_state::pasopia7_io_r )
 	}
 	else
 	if(io_port >= 0x28 && io_port <= 0x2b)
-		return m_ctc->read(space,io_port & 3);
+		return m_ctc->read(io_port & 3);
 	else
 	if(io_port >= 0x30 && io_port <= 0x33)
 		return m_pio->read(space, io_port & 3);
@@ -681,7 +681,7 @@ WRITE8_MEMBER( pasopia7_state::pasopia7_io_w )
 	}
 	else
 	if(io_port >= 0x28 && io_port <= 0x2b)
-		m_ctc->write(space, io_port & 3, data);
+		m_ctc->write(io_port & 3, data);
 	else
 	if(io_port >= 0x30 && io_port <= 0x33)
 		m_pio->write(space, io_port & 3, data);

src/mame/drivers/proconn.cpp

@@ -61,9 +61,9 @@ public:
 private:
 	template <unsigned N> DECLARE_WRITE8_MEMBER( ay_w ) { m_ay->address_data_w(N, data); }
 
-	template <unsigned N> DECLARE_WRITE8_MEMBER( ctc_w ) { m_z80ctc->write(space, N, data); }
+	template <unsigned N> DECLARE_WRITE8_MEMBER( ctc_w ) { m_z80ctc->write(N, data); }
 
-	template <unsigned N> DECLARE_WRITE8_MEMBER( sio_w ) { m_z80sio->cd_ba_w(space, N, data); }
+	template <unsigned N> DECLARE_WRITE8_MEMBER( sio_w ) { m_z80sio->cd_ba_w(N, data); }
 
 	template <unsigned N> DECLARE_WRITE8_MEMBER( pio1_w ) { m_z80pio[0]->write(space, N, data); }
 	template <unsigned N> DECLARE_WRITE8_MEMBER( pio2_w ) { m_z80pio[1]->write(space, N, data); }
@@ -71,9 +71,9 @@ private:
 	template <unsigned N> DECLARE_WRITE8_MEMBER( pio4_w ) { m_z80pio[3]->write(space, N, data); }
 	template <unsigned N> DECLARE_WRITE8_MEMBER( pio5_w ) { m_z80pio[4]->write(space, N, data); }
 
-	template <unsigned N> DECLARE_READ8_MEMBER( ctc_r ) { return m_z80ctc->read(space, N); }
+	template <unsigned N> DECLARE_READ8_MEMBER( ctc_r ) { return m_z80ctc->read(N); }
 
-	template <unsigned N> DECLARE_READ8_MEMBER( sio_r ) { return m_z80sio->cd_ba_r(space, N); }
+	template <unsigned N> DECLARE_READ8_MEMBER( sio_r ) { return m_z80sio->cd_ba_r(N); }
 
 	template <unsigned N> DECLARE_READ8_MEMBER( pio1_r ) { return m_z80pio[0]->read(space, N); }
 	template <unsigned N> DECLARE_READ8_MEMBER( pio2_r ) { return m_z80pio[1]->read(space, N); }

src/mame/drivers/rainbow.cpp

@@ -2756,7 +2756,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
 	// Install 8088 read / write handler once loopback test is over
 	if ( !(data & 32) && (m_diagnostic & 32) )
 	{
-			io.install_readwrite_handler(0x40, 0x43, READ8_DEVICE_DELEGATE(m_mpsc, upd7201_new_device,cd_ba_r), WRITE8_DEVICE_DELEGATE(m_mpsc, upd7201_new_device, cd_ba_w) );
+			io.install_readwrite_handler(0x40, 0x43, read8sm_delegate(FUNC(upd7201_new_device::cd_ba_r), &*m_mpsc), write8sm_delegate(FUNC(upd7201_new_device::cd_ba_w), &*m_mpsc));
 			logerror("\n **** COMM HANDLER INSTALLED **** ");
 			//popmessage("Autoboot from drive %c", m_p_nvram[0xab] ? (64 + m_p_nvram[0xab]) : 0x3F );
 	}

src/mame/drivers/tiki100.cpp

@@ -98,7 +98,7 @@ READ8_MEMBER( tiki100_state::iorq_r )
 		break;
 
 	case 0x01: // SERS
-		data = m_dart->cd_ba_r(space, offset & 0x03);
+		data = m_dart->cd_ba_r(offset & 0x03);
 		break;
 
 	case 0x02: // PARS
@@ -119,7 +119,7 @@ READ8_MEMBER( tiki100_state::iorq_r )
 		break;
 
 	case 0x06: // TIMS
-		data = m_ctc->read(space, offset & 0x03);
+		data = m_ctc->read(offset & 0x03);
 		break;
 	}
 
@@ -137,7 +137,7 @@ WRITE8_MEMBER( tiki100_state::iorq_w )
 		break;
 
 	case 0x01: // SERS
-		m_dart->cd_ba_w(space, offset & 0x03, data);
+		m_dart->cd_ba_w(offset & 0x03, data);
 		break;
 
 	case 0x02: // PARS
@@ -170,7 +170,7 @@ WRITE8_MEMBER( tiki100_state::iorq_w )
 		break;
 
 	case 0x06: // TIMS
-		m_ctc->write(space, offset & 0x03, data);
+		m_ctc->write(offset & 0x03, data);
 		break;
 
 	case 0x07: // SYL