mirror of
https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
replaced more machine().firstcpu with m_maincpu [smf]
This commit is contained in:
parent
c2158d2c10
commit
9244b6baff
@ -23,14 +23,14 @@
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READ8_DEVICE_HANDLER(discrete_sound_r)
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{
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discrete_device *disc_device = downcast<discrete_device *>(device);
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return disc_device->read( disc_device->machine().firstcpu->space(), offset, 0xff);
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return disc_device->read( space, offset, 0xff);
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}
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WRITE8_DEVICE_HANDLER(discrete_sound_w)
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{
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discrete_device *disc_device = downcast<discrete_device *>(device);
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disc_device->write(disc_device->machine().firstcpu->space(), offset, data, 0xff);
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disc_device->write(space, offset, data, 0xff);
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}
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/************************************************************************
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@ -861,7 +861,8 @@ static void jamtable_disasm(running_machine &machine, address_space &space,UINT3
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static void jamtable_disasm_command(running_machine &machine, int ref, int params, const char **param)
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{
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address_space &space=machine.firstcpu->space();
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space=state->m_maincpu->space();
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UINT64 addr,size;
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if (params < 2)
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@ -875,7 +876,8 @@ static void jamtable_disasm_command(running_machine &machine, int ref, int param
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static void dump_string_command(running_machine &machine, int ref, int params, const char **param)
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{
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address_space &space=machine.firstcpu->space();
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space=state->m_maincpu->space();
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UINT64 addr;
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offs_t address;
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UINT32 length,maximumlength;
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@ -914,7 +916,8 @@ static void dump_string_command(running_machine &machine, int ref, int params, c
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static void dump_process_command(running_machine &machine, int ref, int params, const char **param)
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{
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address_space &space=machine.firstcpu->space();
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space=state->m_maincpu->space();
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UINT64 addr;
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offs_t address;
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@ -940,7 +943,8 @@ static void dump_process_command(running_machine &machine, int ref, int params,
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static void dump_list_command(running_machine &machine, int ref, int params, const char **param)
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{
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address_space &space=machine.firstcpu->space();
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space=state->m_maincpu->space();
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UINT64 addr,offs,start,old;
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offs_t address,offset;
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@ -987,14 +991,13 @@ static void dump_list_command(running_machine &machine, int ref, int params, con
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static void curthread_command(running_machine &machine, int ref, int params, const char **param)
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{
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address_space &space=machine.firstcpu->space();
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space=state->m_maincpu->space();
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UINT64 fsbase;
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UINT32 kthrd,topstack,tlsdata;
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offs_t address;
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cpuinfo cpu_info;
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fsbase = machine.firstcpu->state_int(44);
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fsbase=cpu_info.i;
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fsbase = state->m_maincpu->state_int(44);
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address=(offs_t)fsbase+0x28;
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if (!debug_cpu_translate(space,TRANSLATE_READ_DEBUG,&address))
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{
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@ -1076,9 +1076,9 @@ ROM_END
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READ32_MEMBER(limenko_state::dynabomb_speedup_r)
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{
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if(machine().firstcpu->pc() == 0xc25b8)
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if(m_maincpu->pc() == 0xc25b8)
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{
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machine().firstcpu->eat_cycles(50);
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m_maincpu->eat_cycles(50);
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}
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return m_mainram[0xe2784/4];
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@ -1086,9 +1086,9 @@ READ32_MEMBER(limenko_state::dynabomb_speedup_r)
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READ32_MEMBER(limenko_state::legendoh_speedup_r)
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{
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if(machine().firstcpu->pc() == 0x23e32)
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if(m_maincpu->pc() == 0x23e32)
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{
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machine().firstcpu->eat_cycles(50);
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m_maincpu->eat_cycles(50);
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}
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return m_mainram[0x32ab0/4];
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@ -1096,9 +1096,9 @@ READ32_MEMBER(limenko_state::legendoh_speedup_r)
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READ32_MEMBER(limenko_state::sb2003_speedup_r)
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{
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if(machine().firstcpu->pc() == 0x26da4)
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if(m_maincpu->pc() == 0x26da4)
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{
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machine().firstcpu->eat_cycles(50);
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m_maincpu->eat_cycles(50);
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}
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return m_mainram[0x135800/4];
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@ -1106,9 +1106,9 @@ READ32_MEMBER(limenko_state::sb2003_speedup_r)
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READ32_MEMBER(limenko_state::spotty_speedup_r)
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{
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if(machine().firstcpu->pc() == 0x8560)
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if(m_maincpu->pc() == 0x8560)
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{
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machine().firstcpu->eat_cycles(50);
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m_maincpu->eat_cycles(50);
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}
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return m_mainram[0x6626c/4];
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@ -681,7 +681,7 @@ GFXDECODE_END
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INTERRUPT_GEN_MEMBER(m90_state::fake_nmi)
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{
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address_space &space = machine().firstcpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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int sample = m_audio->sample_r(space,0);
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if (sample)
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m_audio->sample_w(space,0,sample);
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@ -689,7 +689,7 @@ INTERRUPT_GEN_MEMBER(m90_state::fake_nmi)
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INTERRUPT_GEN_MEMBER(m90_state::bomblord_fake_nmi)
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{
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address_space &space = machine().firstcpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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int sample = m_audio->sample_r(space,0);
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if (sample != 0x80)
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m_audio->sample_w(space,0,sample);
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@ -214,8 +214,8 @@ static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int functi
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static UINT8 piix4_config_r(device_t *busdevice, device_t *device, int function, int reg)
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{
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address_space &space = busdevice->machine().firstcpu->space( AS_PROGRAM );
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midqslvr_state *state = busdevice->machine().driver_data<midqslvr_state>();
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address_space &space = state->m_maincpu->space( AS_PROGRAM );
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function &= 3;
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@ -647,7 +647,7 @@ READ8_MEMBER(peplus_state::peplus_input0_r)
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833.3 cycles per millisecond
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10 ms = 8333 cycles
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*/
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UINT64 curr_cycles = machine().firstcpu->total_cycles();
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UINT64 curr_cycles = m_maincpu->total_cycles();
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// Allow Bill Insert if DBV Enabled
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if (m_bv_enable_state == 0x01 && ((ioport("DBV")->read_safe(0xff) & 0x01) == 0x00)) {
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@ -865,7 +865,7 @@ READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
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UINT8 bank_a = 0x50; // Turn Off Low Battery and Hopper Full Statuses
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UINT8 coin_optics = 0x00;
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UINT8 coin_out = 0x00;
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UINT64 curr_cycles = machine().firstcpu->total_cycles();
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UINT64 curr_cycles = m_maincpu->total_cycles();
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UINT16 door_wait = 500;
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UINT8 sda = 0;
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@ -876,14 +876,14 @@ READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
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if ((ioport("SENSOR")->read_safe(0x00) & 0x01) == 0x01 && m_coin_state == 0) {
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m_coin_state = 1; // Start Coin Cycle
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m_last_cycles = machine().firstcpu->total_cycles();
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m_last_cycles = m_maincpu->total_cycles();
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} else {
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/* Process Next Coin Optic State */
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if (curr_cycles - m_last_cycles > 600000/6 && m_coin_state != 0) {
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m_coin_state++;
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if (m_coin_state > 5)
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m_coin_state = 0;
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m_last_cycles = machine().firstcpu->total_cycles();
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m_last_cycles = m_maincpu->total_cycles();
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}
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}
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@ -918,7 +918,7 @@ READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
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} else {
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m_door_open = 1;
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}
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m_last_door = machine().firstcpu->total_cycles();
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m_last_door = m_maincpu->total_cycles();
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}
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if (curr_cycles - m_last_coin_out > 600000/12 && m_coin_out_state != 0) { // Guessing with 600000
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@ -928,7 +928,7 @@ READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
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m_coin_out_state = 3; // Coin-Out On
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}
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m_last_coin_out = machine().firstcpu->total_cycles();
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m_last_coin_out = m_maincpu->total_cycles();
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}
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switch (m_coin_out_state)
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@ -213,7 +213,7 @@ WRITE32_MEMBER(policetr_state::speedup_w)
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/* see if the PC matches */
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if ((space.device().safe_pcbase() & 0x1fffffff) == m_speedup_pc)
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{
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UINT64 curr_cycles = machine().firstcpu->total_cycles();
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UINT64 curr_cycles = m_maincpu->total_cycles();
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/* if less than 50 cycles from the last time, count it */
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if (curr_cycles - m_last_cycles < 50)
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@ -1418,7 +1418,7 @@ WRITE_LINE_MEMBER(seattle_state::voodoo_stall)
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/* if the CPU had a pending write, do it now */
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if (m_cpu_stalled_on_voodoo)
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{
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address_space &space = machine().firstcpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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voodoo_w(m_voodoo, space, m_cpu_stalled_offset, m_cpu_stalled_data, m_cpu_stalled_mem_mask);
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}
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m_cpu_stalled_on_voodoo = FALSE;
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@ -148,7 +148,7 @@ WRITE8_MEMBER(skydiver_state::skydiver_nmion_w)
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INTERRUPT_GEN_MEMBER(skydiver_state::skydiver_interrupt)
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{
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/* Convert range data to divide value and write to sound */
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address_space &space = machine().firstcpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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discrete_sound_w(m_discrete, space, SKYDIVER_RANGE_DATA, (0x01 << (~m_videoram[0x394] & 0x07)) & 0xff); // Range 0-2
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discrete_sound_w(m_discrete, space, SKYDIVER_RANGE3_EN, m_videoram[0x394] & 0x08); // Range 3 - note disable
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@ -366,7 +366,7 @@ READ8_MEMBER(splus_state::splus_serial_r)
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UINT8 coin_out = 0x00;
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UINT8 coin_optics = 0x00;
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UINT8 door_optics = 0x00;
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UINT32 curr_cycles = machine().firstcpu->total_cycles();
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UINT32 curr_cycles = m_maincpu->total_cycles();
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UINT8 in = 0x00;
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UINT8 val = 0x00;
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@ -389,7 +389,7 @@ READ8_MEMBER(splus_state::splus_serial_r)
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// Test for Coin-In
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if ((ioport("SENSOR")->read_safe(0x00) & 0x01) == 0x01 && m_coin_state == 0) {
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m_coin_state = 1; // Start Coin Cycle
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m_last_cycles = machine().firstcpu->total_cycles();
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m_last_cycles = m_maincpu->total_cycles();
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#if DEBUG_OUTPUT
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mame_printf_info("coin=%02X\n", m_coin_state);
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#endif
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@ -399,7 +399,7 @@ READ8_MEMBER(splus_state::splus_serial_r)
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m_coin_state++;
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if (m_coin_state > 5)
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m_coin_state = 0;
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m_last_cycles = machine().firstcpu->total_cycles();
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m_last_cycles = m_maincpu->total_cycles();
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#if DEBUG_OUTPUT
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mame_printf_info("coin=%02X\n", m_coin_state);
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#endif
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@ -451,7 +451,7 @@ READ8_MEMBER(splus_state::splus_serial_r)
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m_coin_out_state = 3; // Coin-Out On
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}
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m_last_coin_out = machine().firstcpu->total_cycles();
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m_last_coin_out = m_maincpu->total_cycles();
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}
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// Set Coin Out State
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@ -93,7 +93,7 @@ INTERRUPT_GEN_MEMBER(sprint2_state::sprint2)
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}
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}
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address_space &space = machine().firstcpu->space(AS_PROGRAM);
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address_space &space = m_maincpu->space(AS_PROGRAM);
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discrete_sound_w(m_discrete, space, SPRINT2_MOTORSND1_DATA, m_video_ram[0x394] & 15); // also DOMINOS_FREQ_DATA
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discrete_sound_w(m_discrete, space, SPRINT2_MOTORSND2_DATA, m_video_ram[0x395] & 15);
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discrete_sound_w(m_discrete, space, SPRINT2_CRASHSND_DATA, m_video_ram[0x396] & 15); // also DOMINOS_AMP_DATA
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@ -251,7 +251,7 @@ READ8_MEMBER(balsente_state::balsente_random_num_r)
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UINT32 cc;
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/* CPU runs at 1.25MHz, noise source at 100kHz --> multiply by 12.5 */
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cc = machine().firstcpu->total_cycles();
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cc = m_maincpu->total_cycles();
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/* 12.5 = 8 + 4 + 0.5 */
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cc = (cc << 3) + (cc << 2) + (cc >> 1);
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@ -13,16 +13,7 @@
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IRQ_CALLBACK_MEMBER(galaxold_state::hunchbkg_irq_callback)
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{
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//galaxold_state *state = device->machine().driver_data<galaxold_state>();
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/* for some reason a call to cputag_set_input_line
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* is significantly delayed ....
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*
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* state->m_maincpu->set_input_line(0, CLEAR_LINE);
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*
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* Therefore we reset the line without any detour ....
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*/
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device.machine().firstcpu->set_input_line(0, CLEAR_LINE);
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//cpu_set_info(device->machine().firstcpu, CPUINFO_INT_INPUT_STATE + state->m_irq_line, CLEAR_LINE);
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m_maincpu->set_input_line(0, CLEAR_LINE);
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return 0x03;
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}
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@ -255,7 +255,7 @@ inline void system1_state::videoram_wait_states(cpu_device *cpu)
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READ8_MEMBER(system1_state::system1_videoram_r)
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{
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UINT8 *videoram = m_videoram;
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videoram_wait_states(machine().firstcpu);
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videoram_wait_states(m_maincpu);
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offset |= 0x1000 * ((m_videoram_bank >> 1) % (m_tilemap_pages / 2));
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return videoram[offset];
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}
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@ -263,7 +263,7 @@ READ8_MEMBER(system1_state::system1_videoram_r)
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WRITE8_MEMBER(system1_state::system1_videoram_w)
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{
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UINT8 *videoram = m_videoram;
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videoram_wait_states(machine().firstcpu);
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videoram_wait_states(m_maincpu);
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offset |= 0x1000 * ((m_videoram_bank >> 1) % (m_tilemap_pages / 2));
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videoram[offset] = data;
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@ -60,10 +60,8 @@ bus serial (available in all modes), a Fast and a Burst serial bus
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#include "bus/cbmiec/cbmiec.h"
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#include "machine/ram.h"
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static void cbm_c65_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
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static void cbm_c65_quick_sethiaddress( address_space &space, UINT16 hiaddress )
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{
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address_space &space = machine.firstcpu->space(AS_PROGRAM);
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space.write_byte(0x82, hiaddress & 0xff);
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space.write_byte(0x83, hiaddress >> 8);
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}
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@ -31,10 +31,8 @@
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#define A0 BIT(offset, 0)
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#define VA12 BIT(va, 12)
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static void cbmb_quick_sethiaddress(running_machine &machine, UINT16 hiaddress)
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static void cbmb_quick_sethiaddress(address_space &space, UINT16 hiaddress)
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{
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address_space &space = machine.firstcpu->space(AS_PROGRAM);
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space.write_byte(0xf0046, hiaddress & 0xff);
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space.write_byte(0xf0047, hiaddress >> 8);
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}
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@ -548,7 +548,7 @@ WRITE8_MEMBER(esq1_state::duart_output)
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{
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int bank = ((data >> 1) & 0x7);
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// printf("DP [%02x]: %d mlo %d mhi %d tape %d\n", data, data&1, (data>>4)&1, (data>>5)&1, (data>>6)&3);
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// printf("[%02x] bank %d => offset %x (PC=%x)\n", data, bank, bank * 0x1000, device->machine().firstcpu->safe_pc());
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// printf("[%02x] bank %d => offset %x (PC=%x)\n", data, bank, bank * 0x1000, m_maincpu->safe_pc());
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membank("osbank")->set_base(memregion("osrom")->base() + (bank * 0x1000) );
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m_seq_bank = (data & 0x8) ? 0x8000 : 0x0000;
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@ -69,7 +69,7 @@ ADDRESS_MAP_END
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INPUT_CHANGED_MEMBER(junior_state::junior_reset)
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{
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if (newval == 0)
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machine().firstcpu->reset();
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m_maincpu->reset();
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}
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@ -233,7 +233,7 @@ const i8251_interface mc1502_i8251_interface =
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WRITE_LINE_MEMBER(mc1502_state::mc1502_i8251_syndet)
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{
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if (!BIT(m_ppi_portc,3))
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machine().firstcpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
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m_maincpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
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}
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WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out1_changed)
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@ -65,12 +65,12 @@ INPUT_PORTS_END
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|
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void msbc1_state::machine_reset()
|
||||
{
|
||||
void *ram = machine().firstcpu->space(AS_PROGRAM).get_write_ptr(0);
|
||||
void *ram = m_maincpu->space(AS_PROGRAM).get_write_ptr(0);
|
||||
UINT8 *rom = memregion(MC68000R12_TAG)->base();
|
||||
|
||||
memcpy(ram, rom, 8);
|
||||
|
||||
machine().firstcpu->reset();
|
||||
m_maincpu->reset();
|
||||
}
|
||||
|
||||
static GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
||||
|
@ -157,10 +157,8 @@ ROM sockets: UA3 2K or 4K character
|
||||
|
||||
|
||||
|
||||
static void cbm_pet_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
|
||||
static void cbm_pet_quick_sethiaddress( address_space &space, UINT16 hiaddress )
|
||||
{
|
||||
address_space &space = machine.firstcpu->space(AS_PROGRAM);
|
||||
|
||||
space.write_byte(0x2e, hiaddress & 0xff);
|
||||
space.write_byte(0x2c, hiaddress & 0xff);
|
||||
space.write_byte(0x2a, hiaddress & 0xff);
|
||||
|
@ -532,7 +532,7 @@ WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
|
||||
case 0x02: /* CPU related?
|
||||
Bit 0-7 R/W Unknown
|
||||
*/
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
|
||||
break;
|
||||
case 0x08: /* Seconds-timer control
|
||||
Bit 0 R/W Timer enable
|
||||
@ -564,7 +564,7 @@ WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
|
||||
Bit 5 R Battery status: 0 - battery OK, 1 - battery low
|
||||
Bit 6-7 Unused
|
||||
*/
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
|
||||
break;
|
||||
case 0x18: /* Timer 1 pre-scale + enable
|
||||
Bit 0-2 R/W low timer 1 prescaler select
|
||||
@ -1423,7 +1423,7 @@ WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
|
||||
Map size 2: 0x00 to 0x60
|
||||
Bit 7 Unused
|
||||
*/
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
|
||||
break;
|
||||
case 0x87: /* Sprite tile data memory offset (low)
|
||||
Bit 0-5 Always "0"
|
||||
@ -1464,7 +1464,7 @@ WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
|
||||
// lcd_data_w( data );
|
||||
break;
|
||||
default:
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
|
||||
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
|
||||
break;
|
||||
}
|
||||
m_pm_reg[offset] = data;
|
||||
|
@ -155,7 +155,7 @@ READ8_MEMBER( ravens_state::port17_r )
|
||||
|
||||
keyin = ioport("X2")->read();
|
||||
if (!BIT(keyin, 0))
|
||||
machine().firstcpu->reset();
|
||||
m_maincpu->reset();
|
||||
if (keyin != 0xff)
|
||||
for (i = 0; i < 8; i++)
|
||||
if BIT(~keyin, i)
|
||||
|
@ -132,7 +132,7 @@ port 03de write/read
|
||||
|
||||
DRIVER_INIT_MEMBER(amstrad_pc_state,pc1640)
|
||||
{
|
||||
address_space &io_space = machine().firstcpu->space( AS_IO );
|
||||
address_space &io_space = m_maincpu->space( AS_IO );
|
||||
|
||||
io_space.install_read_handler(0x278, 0x27b, read8_delegate(FUNC(amstrad_pc_state::pc1640_port278_r),this), 0xffff);
|
||||
io_space.install_read_handler(0x4278, 0x427b, read8_delegate(FUNC(amstrad_pc_state::pc1640_port4278_r),this), 0xffff);
|
||||
|
@ -438,7 +438,7 @@ READ8_MEMBER(apollo_state::apollo_dma_read_byte){
|
||||
offset &= 0x3ff;
|
||||
}
|
||||
|
||||
data = machine().firstcpu->space(AS_PROGRAM).read_byte(page_offset + offset);
|
||||
data = m_maincpu->space(AS_PROGRAM).read_byte(page_offset + offset);
|
||||
|
||||
if (VERBOSE > 1 || offset < 4 || (offset & 0xff) == 0 || (offset & 0xff) == 0xff)
|
||||
{
|
||||
@ -458,7 +458,7 @@ WRITE8_MEMBER(apollo_state::apollo_dma_write_byte){
|
||||
offset &= 0x3ff;
|
||||
}
|
||||
// FIXME: MSB not available, writing only LSB
|
||||
machine().firstcpu->space(AS_PROGRAM).write_byte(page_offset + offset, data);
|
||||
m_maincpu->space(AS_PROGRAM).write_byte(page_offset + offset, data);
|
||||
|
||||
if (VERBOSE > 1 || offset < 4 || (offset & 0xff) == 0 || (offset & 0xff) == 0xff)
|
||||
{
|
||||
@ -481,7 +481,7 @@ READ8_MEMBER(apollo_state::apollo_dma_read_word){
|
||||
offset = (offset << 1) & 0x3ff;
|
||||
}
|
||||
|
||||
data = machine().firstcpu->space(AS_PROGRAM).read_byte(page_offset + offset);
|
||||
data = m_maincpu->space(AS_PROGRAM).read_byte(page_offset + offset);
|
||||
|
||||
SLOG1(("dma read word at offset %x+%03x = %04x", page_offset, offset , data));
|
||||
// FIXME: MSB will get lost
|
||||
@ -505,7 +505,7 @@ WRITE8_MEMBER(apollo_state::apollo_dma_write_word){
|
||||
offset = (offset << 1) & 0x3ff;
|
||||
}
|
||||
|
||||
machine().firstcpu->space(AS_PROGRAM).write_byte(page_offset + offset, data);
|
||||
m_maincpu->space(AS_PROGRAM).write_byte(page_offset + offset, data);
|
||||
SLOG1(("dma write word at offset %x+%03x = %02x", page_offset, offset, data));
|
||||
}
|
||||
|
||||
@ -1293,11 +1293,11 @@ SLOT_INTERFACE_END
|
||||
|
||||
|
||||
void apollo_state::fdc_interrupt(bool state) {
|
||||
apollo_pic_set_irq_line( machine().firstcpu, APOLLO_IRQ_FDC, state ? ASSERT_LINE : CLEAR_LINE);
|
||||
apollo_pic_set_irq_line( m_maincpu, APOLLO_IRQ_FDC, state ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
void apollo_state::fdc_dma_drq(bool state) {
|
||||
apollo_dma_fdc_drq(machine().firstcpu, state);
|
||||
apollo_dma_fdc_drq(m_maincpu, state);
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
@ -1306,7 +1306,7 @@ void apollo_state::fdc_dma_drq(bool state) {
|
||||
|
||||
static void apollo_3c505_set_irq(device_t *device, int state) {
|
||||
// DLOG2(("apollo_3c505_interrupt: state=%x", state ));
|
||||
apollo_pic_set_irq_line(device->machine().firstcpu, APOLLO_IRQ_ETH1, state);
|
||||
apollo_pic_set_irq_line(device->machine().driver_data<apollo_state>()->m_maincpu, APOLLO_IRQ_ETH1, state);
|
||||
}
|
||||
|
||||
static int apollo_3c505_tx_data(device_t *device,
|
||||
@ -1350,7 +1350,7 @@ static THREECOM3C505_INTERFACE(apollo_3c505_config) = {
|
||||
static void apollo_wdc_set_irq(const running_machine *machine, int state) {
|
||||
// FIXME:
|
||||
// MLOG2(("apollo_wdc_set_irq: state=%x", state ));
|
||||
apollo_pic_set_irq_line(machine->firstcpu, APOLLO_IRQ_WIN1, state);
|
||||
apollo_pic_set_irq_line(machine->driver_data<apollo_state>()->m_maincpu, APOLLO_IRQ_WIN1, state);
|
||||
}
|
||||
|
||||
static const omti8621_config apollo_wdc_config = {
|
||||
@ -1363,13 +1363,13 @@ static const omti8621_config apollo_wdc_config = {
|
||||
|
||||
static void apollo_ctape_set_irq(const device_t *device, int state) {
|
||||
DLOG2(("apollo_ctape_set_irq: state=%x", state ));
|
||||
apollo_pic_set_irq_line(device->machine().firstcpu, APOLLO_IRQ_CTAPE, state);
|
||||
apollo_pic_set_irq_line(device->machine().driver_data<apollo_state>()->m_maincpu, APOLLO_IRQ_CTAPE, state);
|
||||
}
|
||||
|
||||
|
||||
static void apollo_ctape_dma_drq(const device_t *device, int state) {
|
||||
DLOG2(("apollo_ctape_dma_drq: state=%x", state ));
|
||||
apollo_dma_ctape_drq(device->machine().firstcpu, state);
|
||||
apollo_dma_ctape_drq(device->machine().driver_data<apollo_state>()->m_maincpu, state);
|
||||
}
|
||||
|
||||
static const sc499_interface apollo_ctape_config = {
|
||||
|
@ -23,7 +23,7 @@
|
||||
|
||||
|
||||
int general_cbm_loadsnap( device_image_interface &image, const char *file_type, int snapshot_size,
|
||||
address_space &space, offs_t offset, void (*cbm_sethiaddress)(running_machine &machine, UINT16 hiaddress) )
|
||||
address_space &space, offs_t offset, void (*cbm_sethiaddress)(address_space &space, UINT16 hiaddress) )
|
||||
{
|
||||
char buffer[7];
|
||||
UINT8 *data = NULL;
|
||||
@ -80,7 +80,7 @@ int general_cbm_loadsnap( device_image_interface &image, const char *file_type,
|
||||
for (i = 0; i < snapshot_size; i++)
|
||||
space.write_byte(address + i + offset, data[i]);
|
||||
|
||||
cbm_sethiaddress(image.device().machine(), address + snapshot_size);
|
||||
cbm_sethiaddress(space, address + snapshot_size);
|
||||
free(data);
|
||||
return IMAGE_INIT_PASS;
|
||||
|
||||
@ -90,10 +90,8 @@ error:
|
||||
return IMAGE_INIT_FAIL;
|
||||
}
|
||||
|
||||
void cbm_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
|
||||
void cbm_quick_sethiaddress( address_space &space, UINT16 hiaddress )
|
||||
{
|
||||
address_space &space = machine.firstcpu->space(AS_PROGRAM);
|
||||
|
||||
space.write_byte(0x31, hiaddress & 0xff);
|
||||
space.write_byte(0x2f, hiaddress & 0xff);
|
||||
space.write_byte(0x2d, hiaddress & 0xff);
|
||||
|
@ -12,8 +12,8 @@
|
||||
#define CBM_QUICKLOAD_DELAY_SECONDS 3
|
||||
|
||||
int general_cbm_loadsnap( device_image_interface &image, const char *file_type, int snapshot_size,
|
||||
address_space &space, offs_t offset, void (*cbm_sethiaddress)(running_machine &machine, UINT16 hiaddress) );
|
||||
address_space &space, offs_t offset, void (*cbm_sethiaddress)(address_space &space, UINT16 hiaddress) );
|
||||
|
||||
void cbm_quick_sethiaddress( running_machine &machine, UINT16 hiaddress );
|
||||
void cbm_quick_sethiaddress( address_space &space, UINT16 hiaddress );
|
||||
|
||||
#endif /* __CBM_SNQK_H__ */
|
||||
|
@ -229,19 +229,19 @@ static emu_timer *pc_int_delay_timer;
|
||||
|
||||
TIMER_CALLBACK_MEMBER(pc_state::pcjr_delayed_pic8259_irq)
|
||||
{
|
||||
machine().firstcpu->set_input_line(0, param ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_maincpu->set_input_line(0, param ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(pc_state::pcjr_pic8259_set_int_line)
|
||||
{
|
||||
UINT32 pc = machine().firstcpu->pc();
|
||||
UINT32 pc = m_maincpu->pc();
|
||||
if ( (pc == 0xF0453) || (pc == 0xFF196) )
|
||||
{
|
||||
pc_int_delay_timer->adjust( machine().firstcpu->cycles_to_attotime(20), state );
|
||||
pc_int_delay_timer->adjust( m_maincpu->cycles_to_attotime(20), state );
|
||||
}
|
||||
else
|
||||
{
|
||||
machine().firstcpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_maincpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -457,7 +457,7 @@ static struct {
|
||||
READ8_MEMBER(pc_state::pcjr_nmi_enable_r)
|
||||
{
|
||||
pcjr_keyb.latch = 0;
|
||||
machine().firstcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
return nmi_enabled;
|
||||
}
|
||||
|
||||
@ -511,7 +511,7 @@ static void pcjr_set_keyb_int(running_machine &machine, int state)
|
||||
|
||||
pcjr_keyb.latch = 1;
|
||||
}
|
||||
machine.firstcpu->set_input_line(INPUT_LINE_NMI, pcjr_keyb.latch && nmi_enabled);
|
||||
drvstate->m_maincpu->set_input_line(INPUT_LINE_NMI, pcjr_keyb.latch && nmi_enabled);
|
||||
}
|
||||
|
||||
|
||||
|
@ -43,7 +43,7 @@ READ8_MEMBER(p1_state::p1_trap_r)
|
||||
UINT8 data = m_video.trap[offset];
|
||||
DBG_LOG(1,"trap",("R %.2x $%02x\n", 0x28+offset, data));
|
||||
if (offset == 0)
|
||||
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -54,7 +54,7 @@ WRITE8_MEMBER(p1_state::p1_trap_w)
|
||||
|
||||
READ8_MEMBER(p1_state::p1_cga_r)
|
||||
{
|
||||
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -66,7 +66,7 @@ WRITE8_MEMBER(p1_state::p1_cga_w)
|
||||
m_video.trap[2] = data;
|
||||
m_video.trap[1] = 0xC0 | ((port >> 8) & 0x3f);
|
||||
m_video.trap[0] = port & 255;
|
||||
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(p1_state::p1_vram_w)
|
||||
@ -77,7 +77,7 @@ WRITE8_MEMBER(p1_state::p1_vram_w)
|
||||
m_video.trap[2] = data;
|
||||
m_video.trap[1] = 0x80 | ((offset >> 8) & 0x3f);
|
||||
m_video.trap[0] = offset & 255;
|
||||
space.machine().firstcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
}
|
||||
|
||||
// CGA emulator
|
||||
@ -92,7 +92,7 @@ WRITE8_MEMBER(p1_state::p1_vram_w)
|
||||
|
||||
WRITE8_MEMBER(p1_state::p1_ppi2_porta_w)
|
||||
{
|
||||
address_space &space_prg = machine().firstcpu->space(AS_PROGRAM);
|
||||
address_space &space_prg = m_maincpu->space(AS_PROGRAM);
|
||||
rectangle visarea;
|
||||
|
||||
DBG_LOG(1,"color_select_68",("W $%02x\n", data));
|
||||
@ -283,7 +283,7 @@ void p1_state::palette_init()
|
||||
|
||||
void p1_state::video_start()
|
||||
{
|
||||
address_space &space = machine().firstcpu->space( AS_PROGRAM );
|
||||
address_space &space = m_maincpu->space( AS_PROGRAM );
|
||||
|
||||
DBG_LOG(0,"init",("video_start()\n"));
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user